The APW7037/A controller IC is designed to provide
a low cost synchronous Buck regulator for on-board
DC to DC converter applications. The APW7037 to-
gether with dual N-channel MOSFETs such as
APM7313, provide a low cost solution for such
applications. This device features an internal 200KHz
oscillator (400KHz for “A” version), Power-On-Reset
(POR) for both VCC and VC supplies, an external
programmable soft-start function as well as output
under-voltage detection that latches off the device
when an output short is detected.
Pin Description
1
VCC
LDRV
GNDHDRV
2
3
45
8FB
SS
7
COMP
6
VC
••
• Low-Voltage Distributed Power Supplies
••
Ordering and Marking Information
APW7037/A
Handling Code
Temp. Range
Package Code
APW 7037/A K :
APW 7037/A R :
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
APW 7037/A
XXXXX
APW 7037/A
XXXXX
Package Code
K : S O-8 R : TS SO P-8
Operating Junction Temp. Range
C : 0 to 70°C
Handling Code
TU : Tube
TR : Tape & R eel
XXXXX - Date Code
XXXXX - Date Code
www.anpec.com.tw1
Page 2
APW7037/A
Block Diagram
SS
20uA
3.3V
Max .
64uA
Under-Voltage
V
FBUV
FB
25k
25k
V
REF
Error
Amp.
COMP
OSC
F
OSC
Absolute Maximum Ratings
4.5V
Regulator
PW M
POR
Po w e r
On Reset
Gate
Control
VCC
VC
HDRV
VCC
LDRV
GND
DescriptionRatingUnit
VCC to GND-0.2~30V
VC to GND-0.2~30V
Operating Junction Temperature0~125°C
Storage Temperature-65~150°C
Soldering Temperature (10 Seconds)300°C
Minimum ESD Rating±2kV
Thermal Characteristics
SymbolParameterValueUnit
θ
JA
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
Thermal Resistance in Free Air
8-pin SOIC
8-pin TSSOP
160
124
°
www.anpec.com.tw2
C/W
Page 3
APW7037/A
Electrical Characteristics
Unless otherwise specified, these specifications apply over VCC=5V, VC=12V and TA=0 to 70°C. Typical values refer
A=25°C.
to T
APW7037/AUnit
SymbolParameterTest Conditions
SUPPLY CURRENT
I
I
CCQ
I
VCC Dynamic Supply Current F
CC
I
VC Dynamic Supply Current F
C
VCC Static Supply Current
VC Static Supply CurrentSS=GND0.20.41mA
CQ
=200KHz, CL=1500pF235mA
OSC
=200KHz, CL=1500pF25.58mA
OSC
SS=GND
POWER-ON RESET
Rising VCC Threshold4.04.24.4V
VCC POR Hysteresis0.25V
Rising VC Threshold3.13.33.5V
VC POR Hysteresis0.2V
OSCILLATOR
F
V
∆
Free Running Frequency
OSC
Ramp Amplitude
OSC
1.10V
APW7037
APW7037A
ERROR AMPLIFIER
I
I
FB Pin Input Bias CurrentSS=3V, VFB=1V
FB1
FB Pin Input Bias Current
FB2
SS=0V, V
FB
=1V
GMTransconductance450600750
REFERENCE VOLTAGE
V
FB Pin Regulation Voltage
FB
APW7037
APW7037A
LREGVFB Line Regulation VCC = 5~12V0.2 0.35%
GATE DRIVERS
HDRV Rising TimeCL = 1500pF2050nS
HDRV Falling TimeCL = 1500pF1550nS
LDRV Rising TimeCL = 1500pF2550nS
LDRV Falling TimeCL = 1500pF2550nS
Dead Band Time50150250
PROTECTION
V
FB Under-Voltage Threshold VFB Falling APW7037
FBUV
APW7037A
V
Shutdown Threshold Voltage Pull the voltage of SS pin0.5V
SD
Soft-Start CurrentSS=0102030
I
SS
Min.Typ.Max.
0.51.53mA
180
360
200
400
220
440
1nA
-64
µ
1.225
0.784
0.4
0.3
1.250
0.800
0.6
0.4
1.275
0.816
0.8
0.5
KHz
A
µ
mho
V
nS
V
A
µ
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
www.anpec.com.tw3
Page 4
APW7037/A
Functional Pin Description
FB (Pin 1)
Connect this pin to the output (VOUT) of the PWM con-
verter via an external resistor divider to provide a volt-
age feedback path for the converter. The output volt-
age set by the resistor divider is determined using the
following formula :
OUT
R
()
VOUT = VREF x
1+
GND
R
where ROUT is the resistor connected from VOUT to FB
, and RGND is the resistor connected from FB to ground.
The voltage at this pin is also monitored for Under-
Voltage protection.
VCC (Pin 2)
Connect this pin to input voltage from 5V to 20V. This
pin provides the bias for the control circuitry and the
low-side power MOSFET driver (LDRV). The voltage
at this pin is monitored for Power-On Reset (POR)
purpose.
HDRV (Pin 5)
Connect this pin to the gate of the high-side power
MOSFET. This pin provides the gate drive for the
MOSFET.
VC (Pin 6)
This pin provides bias voltage to the high-side
MOSFET driver. A bootstrap circuit may be used to
pump a boot voltage for enforcing the driving capabil-
ity of the gate driver and improving the performance of
the MOSFET.
COMP (Pin 7)
This pin is the output of the error amplifier. Add an
external resistor-capacitor network to provide a loop
compensation for the PWM converter.
SS (Pin 8)
LDRV (Pin 3)
Connect this pin to the gate of the low-side power
MOSFET. This pin provides the gate drive for the
MOSFET.
GND (Pin 4)
Signal and power ground for the IC. All voltage levels
are measured with respect to this pin.
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
Connect a capacitor from this pin to ground.This
capacitor, along with an internal 20uA current source,
sets the soft-start interval of the PWM converter and
prevents the outputs from overshoot as well as limits
the input current. Pull this pin below 0.5V can shut-
down the converter.
www.anpec.com.tw4
Page 5
APW7037/A
Typical Applications
1. Dual supply voltage(5V and 12V) application
C1
1uF
2
VCC
Q2
AP M2300A
C7
0.1uF
8
SS
APW7037
Shutdown
7
COM P
R3
24k
C8
2200pF
2. Single supply voltage(5V) application
R4
3
U1
GND
+12V
V
C3
47uF
IN
+5V
V
OUT
VC
HDRV
C2
6
1uF
5
Q1A
AP M7313
C5
1uF
100uF
L4
3.3uH
C4
L3
1uH
1.5V/5 A
LDRV
3
Q1B
APM7313
C6,C9
2 x 150uF
R1
1
FB
4
249
R2
1.24k
C1
1uF
VCC
Q2
APM2300A
8
SS
C8
Shutdown
0.1uF
7
COM P
R3
24k
C9
2200pF
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
R4
3
D3
1N4148
2
U1
APW7037
GND
D2
1N4148
C6
1uF
C5
100uF
L3
1uH
C4
47uF
IN
V
+5V
VC
D1
1N4148
C2
1uF
6
C3
HDRV
0.1uF
5
Q1A
APM7312
L4
3.3uH
OUT
V
1.5V/5 A
LDRV
3
Q1B
APM7312
C7,C10
2 x150uF
R1
1
FB
4
249
R2
1.24k
www.anpec.com.tw5
Page 6
APW7037/A
Typical Applications (Cont.)
3. LCD Monitor Application Circuit
R4
3
C11
1uF
C3
0.1uF
R9
12
R10
12
C8
0.1uF
R3
24k
C9
2200pF
7
8
C1
1uF
VCC
SS
AP W 7037
COM P
D2
1N4148
D1
1N4148
C2
U1
GND
6
1uF
VC
5
HDRV
3
LDRV
1
FB
4
2
R5
18k
R6
10k
APM7313
APM7313
Q1A
Q1B
Q2
2N3904
C6
1uF
R8 0
R7 1k
U2
APL431
C5
470uF
L4
50uH
Ex tra Circuit for VIN>15V Application
C12
0.1uF
V
L3
1uH
C4
47uF
C7,C10
IN
9V~ 22V
V
OUT
5V / 0.2~ 5 A
2 x470uF
R1
3k
R2
1k
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
www.anpec.com.tw6
Page 7
APW7037/A
Package Information
SOP-8 pin ( Reference JEDEC Registration MS-012)
HE
0.015X45
e1e2
D
A1
A
1
L
0.004max.
Dim
A1.351.750.0530.069
A10.100.250.0040.010
D4.805.000.1890.197
E3.804.000.1500.157
H5.806.200.2280.244
L0.401.270.0160.050
e10.330.510.0130.020
e21.27BSC0.50BSC
18
φ
MillimetersInches
Min.Max.Min.Max.
°
8
°
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
www.anpec.com.tw8
Page 9
APW7037/A
Physical Specifications
Terminal MaterialSolder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb)
Lead SolderabilityMeets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition (IR/Convection or VPR Reflow)
Peak temperature
temperature
Pre-heat temperature
°
183 C
Time
Classification Reflow Profiles
Convection or IR/
Convection
Average ramp-up rate(183°C to Peak)3°C/second max.10 °C /second max.
Preheat temperature 125 ± 25°C)
Temperature maintained above 183°C
Time within 5°C of actual peak temperature
Peak temperature range
Ramp-down rate
Time 25°C to peak temperature
120 seconds max
60 – 150 seconds
10 –20 seconds60 seconds
220 +5/-0°C or 235 +5/-0°C215-219°C or 235 +5/-0°C
6 °C /second max.10 °C /second max.
6 minutes max.
VPR
Package Reflow Conditions
pkg. thickness ≥≥≥≥ 2.5mm
and all bgas
Convection 220 +5/-0 °CConvection 235 +5/-0 °C
VPR 215-219 °CVPR 235 +5/-0 °C
IR/Convection 220 +5/-0 °CIR/Convection 235 +5/-0 °C
Copyright ANPEC Electronics Corp.
Rev. A.4 - May, 2003
pkg. thickness < 2.5mm and
pkg. volume ≥≥≥≥ 350 mm³