Datasheet APR3102-43BI-TR, APR3102-43BC-TR, APR3102-39BI-TR, APR3102-30BI-TR, APR3102-30BC-TR Datasheet (ANPEC)

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Page 1
MicroPower Microprocessor Reset Circuit with Manual Reset
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.
Features General Description
••
••
1.2V to 6V Input Voltage Range
••
••
Low Quiescent Current : less Than 1.5 µA
••
••
High accuracy detection threshold : ±1.5%
••
••
Fixed trimmed reset thresholds for 1.5V, 1.75V,
2.32V, 2.63V, 2.93V, 3.08V, 3.9V, 4.38V.
••
••
Manual Reset Input
••
••
Reset Timeout Period 250ms
••
••
Available output configurations
- Open-drain output
- CMOS active high output
- CMOS active low output
••
••
SOT-23-5 package
••
••
No external components
Pin Configuration
°
The APR3101/2/3 are designed to monitor voltage supplies in µP and digital systems. The quiescent current is extremely low, typically 1.5 µA, making it ideal for portable battery operated equipment. The APR3101/2/3 operate by monitoring the system power supply voltage. When the input voltage drops below a fixed threshold or whenever manual reset is asserted, the device asserts a reset signal for a fixed time pe­riod after Vcc rises above the fixed threshold or manual reset is deasserted. The APR3101/2/3 series is avail­able with three output stage versions:APR3101 push­pull active low output, APR3102 push-pull active high output and APR3103 open drain active low output. The APR3101/2/3 also have a debounced manual reset input that is provided to override the reset monitor. They are also designed to reject fast line transient glitches on Vcc. The APR3101/2/3 are come in a miniature SOT-23-5 package.
NCGND
MRV
CC
123
45
(3101/3) (3102)
Reset Reset
SOT-23-5 (T op View)
Computers
Cell Phones
Portable Electronics
µP Power Supply Monitoring
Page 2
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw2
Ordering and Marking Information
Package Code B : SOT-23-5 Tem p. Range
C : 0 to 70 C I : -40 to 85 C
Handling Code
TR : Tape & Reel
Voltage Code :
15 : 1.5V ~ 50 : 5.0V
AP R31 01 /2 /3 -
Handling Code Tem p. Range Package Code
Voltage Code
Date Code
X X
Voltage Code
A1/2 /3
APR31 01/2/3 B :
A:1.5V B:1.75V C:2.32V D:2.63 V E:2.93V F:3.08V G:3.9V H:4.38V
Absolute Maximum Ratings
Symbol Parameter Value Unit
VCC V
CC
to GND -0.3 to 6 V
RESET to GND (Push-Pull Output) -0.3 to VCC +0.3
V
RESET
RESET to GND (Open Drain Output) -0.3 to 6
V
ICC, IMR Maximum Continuous Input Current 20 mA
I
RESET
RESET/RESET Current 20 mA
dVcc/dt Rate of Rise of VCC 100
V/µs TJ Junction Temperature Range -40 to 150 °C TL Lead Temperature (Soldering, 10 second) 260 °C
R
TH,JA
Thermal Resistance – Junction to Ambient 357 °C/W
PD Power Dissipation Internally Limited W
TSTG Storage Temperature Range -65 to +150
°C
Pin Function Descrpition
PIN
No. Name
Description
1 GND Ground connection 2 NC No internal connection
RESET
(APR3101/3)
RESET output remains low while VCC is below the reset threshold and remains so for a fixed time period after V
CC
raises above the reset threshold.
3
RESET
(APR3102)
RESET output remains high while V
CC
is below the reset threshold and remains
so for a fixed time period after V
CC
raises above the reset threshold.
4 MR
Manual Reset active low input. A logic low signal on MR asserts a reset condition. Asserted reset c ontinues as long as MR is lo w and for a fixed time period after MR returns high.
5 VCC Supply Voltage (+1.2V to +6V)
Note: The pin sequence here might not be correct for all different package types, and please refer pin
configuration in page1 for correct pin assignment.
Page 3
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw3
Block Diagram
V
c c
MR
GND
V
REF
Reset
Generator
+ Timer
Oscillator
RESET
APR3102
V
c c
MR
GND
V
REF
Reset
Generator
+ Timer
Oscillator
RESET
APR3101
V
c c
MR
GND
V
REF
Reset
Generator
+ Timer
Oscillator
RESET
APR3103
Page 4
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw4
Part Number Part Description
APR3101 Reset Output Push Pull Active Low with Delay APR3102 Reset Output Push Pull Active High with Delay APR3103 Reset Output Open Drain Active Low with Delay
APR3101/2/3
Symbol Parameter Test Conditions
Min. Typ. Max.
Unit
VCC
Supply Voltage
1.2 6
V
ICC
Supply Current V
CC
=1.5V~6V 1.5 4
µA
T
A
=-40 to 85°C 3 5
T A=25°C ±1.5%
VTH
Reset Threshold
T
A
=-40 to 85°C ±2%
V
HYST
Hysteresis Range 20 mV
T
RTP
Reset Timeout Period
150 250 350
ms
VOL
Reset Output Low I
SINK
=1.2mA 0.5 V
VOH
Reset Output High I
SOURCE
=0.6mA 0.8*VCC
TD
V
CC
to Reset Delay VCC=VTH to (VTH-100mV) 25
µS
ILE
Reset Output Leakage 0.5
µA
T
MPW
MR Minimum Pulse Width 10
µS
T
MRD
MR to Reset Delay 0.5
µS
V
MIL
MR Input Low Threshold 0.4* V
CC
V
V
MIH
MR Input High Threshold 0.5* V
CC
RMR
MR Pull-Up resistance
30 47 70
K
Application Circuit
V
CC
V
CC
GND
100k
APR3103 RESET
RESET INPUT
µP
V
CC
GND
Part Number Description
Electrical Characteristics
VIN = 5V, TA = -40 to 85°C unless otherwise noted. Typical values are at TA=25°C, VCC = 5V for 4.38V versions, VCC = 3.3V for 3.08/2.93V versions, VCC = 3.0V for 2.63V. versions and VCC = 2.5V for 2.32V versions, VCC = 2.0V for 1.75V versions , VCC = 1.8V for 1.5V versions.
V
CC
V
CC
GND
RESET (RESET)
RESET INPUT
µP
V
CC
GND
APR3101 APR3102
Page 5
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw5
Vcc
MR
RESET
Reset Timeout P eriod 250ms
MR to Res et Delay 0. 5us
Vc c t o Res et Delay 25us
Reset Threshold Reset Threshold
Reset Timeout P eriod 250ms
RESET
(APR3102)
(APR3101/ 3)
Timing Chart
Page 6
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw6
0
5
10
15
20
25
30
35
40
45
50
0123456
Vcc=2.9V
Vcc=2V
Vcc=2.5V
Vcc=1.5
0
10
20
30
40
50
60
70
0123456
Vcc=4 V
Vcc=3 V
Vcc=5 V
0
0.4
0.8
1.2
1.6
2
0123456
0
20
40
60
80
100
120
10 100 1000
Typical Characteristics
Supply Current vs. Supply Voltage
Supply Current (uA)
Supply Voltage (V)
Maximum Transient Duration vs.
Reset Threshold Overdrive VTH - VCC
Reset Threshold Overdrive VTH - VCC (mV)
Maximum Transient Duration (us)
Output Source Current vs. Reset High Output Voltage
Reset High Output Voltage (V)
Output Source Current (mA)
Output Sink Current vs. Reset Low Output Voltage
Reset Low Output Voltage (V)
Output Sink Current (mA)
generate a reset signal
never generate a reset signal
Page 7
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw7
0
0.5
1
1.5
2
2.5
3
3.5
-40-200 20406080100120
Vcc=3V
Vcc=5V
0
100
200
300
400
500
600
-40-200 20406080100120
0.994
0.996
0.998
1
1.002
1.004
1.006
1.008
-40 -20 0 20 40 60 80 100 120
0
10
20
30
40
50
60
-40-200 20406080100120
VOD=100mV
Typical Characteristics
Normalized Reset Threshold vs. T emperature
Temperature (°C)
Normalized Reset Threshold (%)
Supply Current vs. T emperature Reset Timeout Period vs. Temperature
Reset Propagation Delay vs. T emperature
Reset Propagation Delay (us)
Temperature (°C)
T emperature (°C)
Reset Timeout Period (ms)
T emperature (°C)
Supply Current (uA)
Page 8
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw8
Typical Characteristics
Power Up
Vcc(2V/div)
RESET(2V/div)
MR(2V/div)
RESET(2V/div)
MR(2V/div)
Vcc(2V/div)
Time (50ms/div) Time (500ms/div)
Power Down
Vcc(2V/div)
RESET(2V/div)
MR(2V/div)
Time (0.2us/div)
MR to Reset Delay
Time (10us/div)
Vcc to RESET Delay
Vcc(0.5V/div) Vcc=VTH to (VTH-100mV)
RESET(2V/div)
Page 9
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw9
Time (100ms/div)
Typical Characteristics
Manual Reset
Vcc(2V/div)
RESET(2V/div)
MR(2V/div)
Page 10
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw10
RESET
V
CC
GND
V
CC
100K
Application Information
VCC Transient Rejection
The APR3101/2/3 have the function to reject the tran­sient glitches from the power line. The Maximum Tran­sient Duration vs. Reset Threshold Overdrive shows at Typical Characteristics. The transient voltage with the duration under the curve will not generate a reset signal, e.g. a transient of 100mV below the reset threshold voltage have the duration more than 35us, it will generate a reset signal. Connect a 0.1uF bypass capacitor to the VCC pin can improve the transient immunity.
Manual Reset Input
The APR3101/2/3 have 3 output stage versions: APR3101 is an active low push-pull output,when the VCC drops below the reset threshold or MR goes low, the RESET output generates a low signal. APR3102 is an active high push-pull output, when the VCC drops below the reset threshold or MR goes low; the RE­SET output generates a high signal (see Timing Chart). APR3103 is an active low open drain output, the RE­SET output must be connected a pull-up resistor to a supply voltage that is lower than 6V, it suits to use in multiple voltage systems (see Figure 2). The APR3101 RESET output is valid until the VCC=1.2V, below 1.2V
the IC is shutdown, and the output becomes a floating state. If it is a trouble, a resistor should be connected from reset output to ground to keep the reset output low (see Figure 1). For The APR3102, a pull-up resis­tor to VCC is required to keep the valid reset output for VCC below 1.2V.(
Figure 1. Ensuring RESET Valid to VCC = 0 V
Reset Output
V
CC
APR3103
RESET
GND
MR
+3.3V +5.0V
V
CC
GND
RESET
INPU T5VSystem
100k
Figure 2. APR3103 Open Drain Output with Multiple Supplies
Force the MR low asserts the reset signal, asserted reset continues as long as MR is low and after the MR goes high the reset signal is maintained for a fixed timeout period. The MR is internally connected a 47k resistor to VCC, so it can be floating if MR is not used. The MR input also has a debounce time 500ns to avoid the glitches. It allows use of a mechanical switch or a TTL, and CMOS logic signal.
Page 11
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw11
Packaging Information
SOT-23-5
e1
E1 E
b
12
3
45
e
D
A2
A
A1 L 2
L
L 1
a
Millimeters Inches
Dim
Min. Max. Min. Max.
A 0.95 1.45
0.037 0.057
A1 0.05 0.15
0.002 0.006
A2 0.90 1.30
0.035 0.051
D2.83.00
0.110 0.118
E2.63.00
0.102 0.118
E1 1.5 1.70
0.059 0.067
L 0.35 0.55
0.014 0.022 L1 0.20 BSC 0.008 BSC L2 0.5 0.7
0.020 0.028
N5 5
α
0
°
10
°
0
°
10
°
Page 12
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw12
Physical Specifications
Reference JEDEC Standard J-STD-020A APRIL 1999
Reflow Condition (IR/Convection or VPR Reflow)
Pre-heat temperature
183 C
Peak temperature
Time
°
temperature
Classification Reflow Profiles
Convection or IR/
Convection
VPR
Average ramp-up rate(183°C to Peak) 3°C/second max. 10 °C /second max . Preheat temperature 125 ± 25°C)
120 seconds max
Temperature maintained above 183°C
60 – 150 seconds
Time within 5°C of actual peak temperature
10 –20 seconds 60 seconds
Peak temperature range
220 +5/-0°C or 235 +5/-0°C 215-219°C or 235 +5/-0°C
Ramp-down rate
6 °C /second max. 10 °C /second max .
Time 25°C to peak temperature
6 minutes max.
Package Reflow Conditions
pkg. thickness
≥≥≥≥
2.5mm
and all bgas
pkg. thickness < 2.5mm and pkg. volume
≥≥≥≥
350 mm³
pkg. thickness < 2.5mm and pkg. volume < 350mm³
Convection 220 +5/-0 °C Convection 235 +5/-0 °C VPR 215-219 °C VPR 235 +5/-0 °C IR/Convection 220 +5/-0 °C IR/Convection 235 +5/-0 °C
Terminal M aterial Solder-Plated Copp er (So lder Material : 90/10 or 63/37 SnPb) Lead Solderab ility Meets EIA S pecification RSI86-91, ANSI/J-STD-002 Category 3.
Page 13
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw13
R e lia bilit y te s t pr o g r am
Test item Method D escription
SOLDERABILITY MIL-STD-883D-2003
245°C , 5 SEC
HO LT MIL-STD-883D-1005.7
1000 Hrs Bias @ 125 °C
PCT JESD-22-B, A102
168 Hrs, 100 % RH , 121°C
TST MIL-S TD-883D-1011.9
-65°C ~ 150°C, 200 Cycles ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V La tc h -Up J E SD 7 8 10 ms , Itr > 100mA
Carrier Tape
A
J
B
T2
T1
C
t
Ao
E
W
Po
P
Ko
Bo
D1
D
F
P1
Application
A B C J T1 T2 W P E
178±172 ± 1.0 13.0 + 0.2 2.5 ± 0.15 8.4 ± 2 1.5± 0.3
8.0+ 0.3
- 0.3
4 ± 0.1 1.75± 0.1
F D D1 Po P1 Ao Bo Ko t
SOT-23-5
3.5 ± 0.05 1.5 +0.1 1.5 +0.1 4.0 ± 0.1 2.0 ± 0.1 3.15 ± 0.1 3.2± 0.1 1.4± 0.1 0.2±0.03
Page 14
Copyright ANPEC Electronics Corp. Rev. A.2 - Oct., 2003
APR3101/2/3
www.anpec.com.tw14
Application Carrier Width Cover Tape Width Devices Per Re el
SOT- 23
8 5.3 3000
Cover Tape Dimensions
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, T aiwan, R.O.C. T el : 886-3-5642000 Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. T el : 886-2-89191368 Fax : 886-2-89191369
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