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PLUS MAKE YOUR PRODUCTION A-PLUS
A
APExx12 Series
DATA SHEET
PLUS INTEGRATED CIRCUITS INC.
A
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.
TEL: 886-2-2782-9266
FAX: 886-2-2782-9255
WEBSITE : http: //www.aplusinc.com.tw
Sales E-mail:
sales@aplusinc.com.tw
Technology E-mail:
service@aplusinc.com.tw
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APExx12 Series
1.0 General Description
The APExx12 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody
synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one
voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.
With CMOS technology and halt function can minimize power dissipation. Their architectures are similar
to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single
cycle, except for program branches and data table read instructions (which need two instruction cycles).
2.0 Features
(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.
(2) Program ROM: 16k x 10 bits
(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 18-bits
VPR can access up to 256k x 10 bits voice data memory space.
Product Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit )
APE0612 6 14-bits 20k
APE1012 10 15-bits 32k
APE1512 15 16-bits 48k
APE2012 20 16-bits 64k
APE3112 31 17-bits 96k
APE4112 41 17-bits 128k
APE5212 52 18-bits 160k
APE6312 63 18-bits 192k
APE7312 73 18-bits 224k
APE8412 84 18-bits 256k
(4) Data Registers:
a). 128 x 4-bit data RAM (00-7Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh
(5) I/O Ports:
a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Regist er control)
b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)
c). PRD: 4-b its I/O Port D (15h) c a n be pr og r am me d t o inpu t/output ind i v i du al l y. (Reg i s t er c ont r ol )
(6) On-chip clock generator: Resistive Clock Drive (RM)
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).
(8) Stack: 2-level subroutine nesting.
(9) B uilt-in 4 Level Vol u me Co ntrol can be pro gr amm ed .
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APExx12 Series
(10) Built-in 8 Level DAC current output can be configured. (Mask option)
(11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option)
(12) External Reset: Port B[3] can be configured as reset pin. (Mask opt on)
(13) HALT and Release from HALT function to reduce power consumption
(14) Watch Dog Timer (WDT)
(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
(16) Number of instruction: 27
(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).
FIGURE 1 : ROM Map of APExx12 Series
00000h-0FFFFh
Data ROM for Melody
PC[13:0]
14-bit x 2 STACK
16-bit Data Pointer
18-bit Voice Pointer
Reserved for Testing
Reset Vector
00000h
000FEh
000FFh-00400h
00401h
00000h-03FFFh
Program ROM
00000h-5FFFFh
Voice ROM for Voi ce
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3.0 Pin Description
Pad Name Pin Attr. Description
PWM2/Cout
PWM1
Vdd1~2
PRA0~3
PRD0~3
PRB0, PRB2
PRB1 / IR
PRB3 / Reset
OSC
GND1~3
Power
Power
O
O PWM1 output.
I/O
I/O
I/O
I/O
I
PWM2 output, or Current Output of Audio.
Power supply during operation.
I/O port can be prog rammed to input/output individ ually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
I/O port can be conf igured to input/output individ ually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an IR Carrier Output with 38k / 56kHz
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an external RESET pin with weak pull-low
capability.
RM mode Oscillator input
Ground Potential
APExx12 Series
4.0 DC Characteristics
Symbol Parameter Vdd Min. Typ. Max. Unit Condition
Vdd Operating voltage 2.4 3 5.5 V depending on Freq.
Isb Standby
Iop
Iih
Ioh Output-high current
Iol Output-low current
Cout
dF/F Frequency stability -5 5 %
dF/F Fosc lot variation -10 10 %
Supply
current
Input current
(Inter n al pu l l lo w)
DAC output current
(8-level option)
Operating
3 1
4.5 1
3 2
4.5 7
3 3
4.5 10
3 -3
4.5 -10
3 7
4.5 19
3 0.8 ~ 4.8
4.5 0.9 ~ 6.5
uA
mA
uA
mA
mA
4MHz, RM,
in HALT Mode
4MHz, RM,
IO Floating
Input ports with weak
pull-low
4MHz, RM
(IO ports)
4MHz, RM
(Full s cale)
Fosc(3v- 2.4v)
Fosc (3v)
Vdd=3V, Rosc=180k,
4MHz
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APExx12 Series
FIGURE 2 : Frequency vs. Rosc (at 3V)
Resistor (Rosc ohms) 110k 200k 300k 430k
Frequency (MHz)
20
15
14.84 8.25 5.54 3.92
Rosc vs Freq.
14.84
10
Freq. (MHz)
5
0
0 100 200 300 400 500
5.0 Application Circuit
8.25
Rosc (k ohm)
5.54
3.92
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6.0 Bonding Diagram
X
Y
APExx12 Series
ROM
1
2
3
4
PWM1
Vdd2
PWM2/Cout
GND3
Pad Size : 80 um x 80 um
* The IC substrate must be connected to GND.
PRD3
PRD2
PRD1
PRD0
OSC
GND1
20
19
18
17
16
15
(0,0)
GND2
5 6 7
PRA1 PRA0
PRA2
PRA3
8
PRB0
9
10
PRB1
11
PRB2
12
PRB3
13
Vdd1
14
Pad # Pad Name X Y Pad # Pad Name X Y
1
2
3
4
5
6
7
8
9
10
PWM1 57 865
Vdd2 58 670
PWM2/ Cout 58 386
GND3 58 235
GND2 65 87
PRA0 175 87
PRA1 285 87
PRA2 395 87
PRA3 505 87
PRB0 615 87
11
12
13
14
15
16
17
18
19
20
PRB1 725 87
PRB2 835 87
PRB3 945 87
Vdd1 1055 87
GND1 1059 241
OSC 1059 351
PRD0 1059 461
PRD1 1059 571
PRD2 1059 681
PRD3 1059 791
Chip Size :
APE0612 : 1230 um x 1530 um, APE1012 : 1230 um x 1530 um
APE1512 : 1230 um x 1758 um, APE2012 : 1230 um x 1758 um
APE3112 : 1230 um x 2210 um, APE4112 : 1230 um x 2210 um
APE5212 : 1230 um x 3116 um, APE6312 : 1230 um x 3116 um
APE7312 : 1230 um x 3116 um, APE8412 : 1230 um x 3116 um
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Rev 1.3 2003/8/18
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