Datasheet AOZ1237QI-02 Datasheet (Alpha & Omega) [ru]

AOZ1237QI-02

24V/8A Synchronous EZBuckTM Regulator

General Description

The AOZ1237 is a high-efficiency, easy-to-use DC/DC
synchronous buck regulator that operates up to 24V.
The device is capable of supplying 8A of continuous
output current with an output voltage adjustable down to

0.8V (±1.0%).

A proprietary constant on-time PWM control with input
feed-forward results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input voltage range. The switching frequency
can be externally programmed up to 1MHz.

The device features multiple protection functions such as
V

under-voltage lockout, cycle-by-cycle current limit,

CC

output over-voltage protection, short-circuit protection, as
well as thermal shutdown.

The AOZ1237 is available in a 4mm x 4mm QFN-23L
package and is rated over a -40°C to +85°C ambient
temperature range.

Features



Wide input voltage range

– 2.7V to 24V



8A continuous output current



Output voltage adjustable down to 0.8V (±1.0%)



Low R

– 35m high-side
– 8m low-side SRFET™



Constant On-Time with input feed-forward



Programmable frequency up to 1MHz



Selectable PFM light load operation



Ceramic capacitor stable



Adjustable soft start



Power Good output



Integrated bootstrap diode



Cycle-by-cycle current limit



Short-circuit protection



Over voltage protection



Thermal shutdown



Thermally enhanced 4mm x 4mm QFN-23L package

internal NFETs

DS(ON)

Applications



Portable computers



Compact desktop PCs



Servers



Graphics cards



Set-top boxes



LCD TVs



Cable modems



Point-of-load DC/DC converters



Telecom/Networking/Datacom equipment

Rev. 2.0 April 2013

www.aosmd.com

Page 1 of 15

Typical Application

5V

Power Good

Off On

R3
100kΩ

R

TON

C4
1μF

C

SS

TON IN

VCC

AOZ1237

PGOOD

EN

PFM

SS

Power Ground

Analog Ground

BST

LX

FB

AGND

PGND

C5

0.1μF

L1

1μH

R1

2.65kΩ
1%

R2

8.06kΩ
1%

C2
33μF

AOZ1237QI-02

Input

2.7V to 24V

Output

1.05V, 8A

C3
44μF

Ordering Information

Part Number Ambient Temperature Range Package Environmental

AOZ1237QI-02 -40°C to +85°C 23-Pin 4mm x 4mm QFN Green Product

AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.

Pin Configuration

SS

IN

VCC

BST

PGND

LX

23 21 20 19 18

22

PGOOD

EN

PFM

AGND

FB

TON

1

2

3

IN

4

5

6

789 1110

IN

NC

IN

LX

LX

LX

LX

17

LX

16

PGND

15

PGND

14

PGND

13

PGND

12

Rev. 2.0 April 2013

23-Pin 4mm x 4mm QFN

(Top View)

www.aosmd.com

Page 2 of 15

Pin Description

Pin Number Pin Name Pin Function

Power Good Signal Output. PGOOD is an open-drain output used to indicate the status

1 PGOOD

2EN

3PFM

4 AGND Analog Ground.

5FB

6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.

7 NC Not Connected. Connect to IN pins (8 and 9) to help with heat dissipation.

8, 9, 22 IN Supply Input. IN is the regulator input. All IN pins must be connected together.

12, 13, 14, 15, 19 PGND Power Ground.

10, 11, 16, 17, 18 LX Switching Node.

20 BST

21 VCC

23 SS

of the output voltage. It is internally pulled low when the output voltage is 10% lower than
the nominal regulation voltage for 50µs (typical time) or 15% higher than the nominal
regulation voltage. PGOOD is pulled low during soft-start and shut down.

Enable Input. The AOZ1237 is enabled when EN is pulled high. The device shuts down
when EN is pulled low.

PFM Selection Input. Connect PFM pin to VCC/VIN for forced PWM operation. Connect
PFM pin to ground for PFM operation to improve light load efficiency.

Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
regulator’s output and AGND.

Bootstrap Capacitor Connection. The AOZ1237 includes an internal bootstrap diode.
Connect an external capacitor between BST and LX as shown in the Typical Application
diagram.

Supply Input for analog functions. Bypass VCC to AGND with a 1µF ceramic capacitor.
Place the capacitor close to VCC pin.

Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
soft-start time.

AOZ1237QI-02

Rev. 2.0 April 2013

www.aosmd.com

Page 3 of 15

AOZ1237QI-02

Absolute Maximum Ratings

Exceeding the Absolute Maximum Ratings may damage the
device.

Parameter Rating

IN, TON to AGND -0.3V to 30V

LX to AGND -2V to 30V

BST to AGND -0.3V to 36V

SS, PGOOD, FB, EN, VCC, PFM to
AGND

PGND to AGND -0.3V to +0.3V

Junction Temperature (T

Storage Temperature (T

ESD Rating

Note:

1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k

2. LX to PGND Transient (t<20ns) ------ -7V to V

(1)

) +150°C

J

) -65°C to +150°C

S



in series with 100pF.

IN

+ 7V.

-0.3V to 6V

2kV

Electrical Characteristics

TA = 25°C, V

-40°C to +85°C.

= 12V, V

IN

= 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of

CC

Maximum Operating Ratings

The device is not guaranteed to operate beyond the
Maximum Operating ratings.

Parameter Rating

Supply Voltage (VIN)2.7V

Output Voltage Range 0.8V to 0.85*V

Ambient Temperature (TA) -40°C to +85°C

Package Thermal Resistance

)40°C/W

(θ

JA

) 4.5°C/W

(θ

JC

Note:

3. Connect V

to external 5V for VIN = 2.7V ~ 6.5V application.

CC

(3)

to 24V

IN

Symbol Parameter Conditions Min. Typ. Max Units

V

IN

V

UVLO

I

q

I

OFF

V

FB

I

FB

Enable

V

EN

V

EN_HYS

PFM Control

V

PFM

V

PFMHYS

Modulator

T

ON

T

ON_MIN

T

OFF_MIN

IN Supply Voltage 2.7 24 V

Under-Voltage Lockout Threshold of VCC

Quiescent Supply Current of VCC I

Shutdown Supply Current V

Feedback Voltage

rising

V

CC

falling 3.2

V

CC

= 0, VFB = 1V, V

OUT

= 0V 120A

EN

T

= 25°C

A

TA = 0°C to 85°C

> 2V 11.5mA

EN

0.792

0.788

4.0

3.7

0.800

0.800

4.4

0.808

0.812

V

V

Load Regulation 0.5 %

Line Regulation 1%

FB Input Bias Current 200 nA

EN Input Threshold

Off threshold
On threshold 2.5

0.5
V

EN Input Hysteresis 100 mV

PFM Input Threshold

PFM Mode threshold
Force PWM threshold 2.5

0.5
V

PFM Input Hysteresis 100 mV

On Time

R

= 100k, VIN = 12V

TON

= 100k, VIN = 24V

R

TON

200 250

150

300

ns

Minimum On Time 100 ns

Minimum Off Time 250 400 ns

Rev. 2.0 April 2013

www.aosmd.com

Page 4 of 15

AOZ1237QI-02

Electrical Characteristics

TA = 25°C, V

= 12V, V

IN

= 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of

CC

(Continued)

-40°C to +85°C.

Symbol Parameter Conditions Min. Typ. Max Units

Soft-Start

I

SS_OUT

Power Good Signal

V

PG_LOW

V

PGH

V

PGL

T

PG_L

Under Voltage and Over Voltage Protection

V

PL

T

PL

V

PH

T

UV_LX

Power Stage Output

R

DS(ON)

R

DS(ON)

Over-current and Thermal Protection

I

LIM

SS Source Current VSS = 0

C

= 0.001F to 0.1F

SS

PGOOD Low Voltage I

= 1mA 0.5 V

OL

71015A

PGOOD Leakage Current ±1 A

PGOOD Threshold
(Low level to High level)

PGOOD Threshold
(High level to Low level)

FB rising (AOZ1237-02)
FB rising (AOZ1237-04)
FB falling (AOZ1237-04 only)

FB rising (AOZ1237-02/04)
FB falling (AOZ1237-02)
FB falling (AOZ1237-04)

80
85

114

117

77
82

85
90

117

120

82
87

90
95

120

123

87
92

PGOOD Threshold Hysteresis 3 %
PGOOD Fault Delay Time (FB falling) 50 s

Under Voltage Threshold FB falling -30 -25 -20 %
Under Voltage Delay Time 128 s

Over Voltage Threshold FB rising 17 20 23 %

Under Voltage Shutdown Blanking Time VIN = 12V, VEN = 0V, VCC = 5V 20 ms

High-Side NFET On-Resistance VIN = 12V, VCC = 5V 35 45 m

High-Side NFET Leakage V

= 0V, VLX = 0V 10 A

EN

Low-Side NFET On-Resistance VLX = 12V, VCC = 5V 8 12 m

Low-Side NFET Leakage V

= 0V 10 A

EN

Valley Current Limit VCC = 5V 11 A

Thermal Shutdown Threshold

T

J

T

J

rising

falling

145
100

%

%

°C

Rev. 2.0 April 2013

www.aosmd.com

Page 5 of 15

Functional Block Diagram

TON

Generator

ISENSE

ILIM_VALLEY

Error Comp

ILIM Comp

0.8V

ISENCE

(AC)

FB

Decode

OTP

Reference

& Bias

BST

PG Logic

LX

AGNDPGND

ISENSE (DC)

ISENSE (AC)

Current
Information
Processing

Vcc

IN PGood

UVLO

TON

Timer

Q

TOFF_MIN

S
R

Q

Timer

Q

TON

PFM

FB

SS

EN

VCC

Light Load

Threshold

ISENSE

Light Load
Comp

AOZ1237QI-02

Rev. 2.0 April 2013

www.aosmd.com

Page 6 of 15

Typical Performance Characteristics

Normal Operation

VLX
10V/div

Io
2A/div

Vo ripple
20mV/div

5μs/div

Full Load Start-up

LX
10V/div

Ven
2V/div

ILX
5A/div

Vo
500mV/div

VLX
20V/div

ILX
5A/div

Vo ripple
500mV/div

50μs/div

Full Load Short

50μs/div

Load Transient 0.8A (10%) to 7.2A (90%)

VLX
20V/div

ILX
5A/div

Vo ripple
50mV/div

1ms/div

Circuit of Typical Application. TA = 25°C, VIN = 19V, V

= 1.05V, fs = 400kHz unless otherwise specified.

OUT

AOZ1237QI-02

Rev. 2.0 April 2013

www.aosmd.com

Page 7 of 15

AOZ1237QI-02

0.8V

FB Voltage/
AC Current

Information

Comp

Programmable

One-Shot

IN

PWM

+

–

T

ON

26.3 10

12–

R

TON



V

IN

V

----------------------------------------------------------------

=

(1)

F

SW

V

OUT

V

INTON



-------------------------- -

=

(2)

F

SW

V

OUT

10

12



26.3 R

TON



---------------------------------

=

(3)

Detailed Description

The AOZ1237 is a high-efficiency, easy-to-use,
synchronous buck regulator optimized for notebook
computers. The regulator is capable of supplying 8A of
continuous output current with an output voltage
adjustable down to 0.8V. The programmable operating
frequency range of 100kHz to 1MHz enables optimizing
the configuration for PCB area and efficiency.

The input voltage of AOZ1237 can be as low as 4.5V.
The highest input voltage of AOZ1237 can be 24V.
Constant on-time PWM with input feed-forward control
scheme results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input range. True AC current mode control
scheme guarantees the regulator can be stable with a
ceramic output capacitor. The switching frequency can
be externally programmed up to 1MHz. Protection
features include V
current limit, output over voltage and under voltage
protection, short-circuit protection, and thermal
shutdown.

The AOZ1237 is available in 23-pin 4mm x 4mm QFN
package.

under-voltage lockout, valley

CC

The simplified control schematic is shown in Figure 1.

Figure 1. Simplified Control Schematic of AOZ1237

The high-side switch on-time is determined solely by a
one-shot whose pulse width can be programmed by one
external resistor and is inversely proportional to input
voltage (IN). The one-shot is triggered when the internal

0.8V is lower than the combined information of FB
voltage and the AC current information of inductor, which
is processed and obtained through the sensed lower-side
MOSFET current once it turns on. The added AC current
information can help the stability of constant-on time
control even with pure ceramic output capacitors, which
have very low ESR. The AC current information has no
DC offset, which does not cause offset with output load
change, which is fundamentally different from other V

2

constant-on time control schemes.

Input Power Architecture

The AOZ1237 integrates an internal linear regulator to
generate 5.3V V

from input. If input voltage is lower

CC

than 5.3V, the linear regulator operates at low drop­output mode; the V

voltage is equal to input voltage

CC

minus the drop-output voltage of internal linear regulator.

Enable and Soft Start

The AOZ1237 has external soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when V

rises to 4.1V and voltage on EN pin is

CC

HIGH. An internal current source charges the external
soft-start capacitor; the FB voltage follows the voltage of
soft-start pin (V

) when it is lower than 0.8V. When VSS

SS

is higher than 0.8V, the FB voltage is regulated by
internal precise band-gap voltage (0.8V). The soft-start
time can be calculated by the following formula:

T

(s) = 330 x CSS(nF)

SS

If C

is 1nF, the soft-start time will be 330µs; if CSS is

SS

10nF, the soft-start time will be 3.3ms.

Constant-On-Time PWM Control with Input
Feed-Forward

The control algorithm of AOZ1237 is constant-on-time
PWM Control with input feed-forward.

Rev. 2.0 April 2013

The constant-on-time PWM control architecture is a
pseudo-fixed frequency with input voltage feed-forward.
The internal circuit of AOZ1237 sets the on-time of high­side switch inversely proportional to the IN.

To achieve the flux balance of inductor, the buck
converter has the equation:

Once the product of V
frequency keeps constant and is independent with input
voltage.

An external resistor between the IN and TON pin sets the
switching frequency according to the following equation:

www.aosmd.com

IN

x T

is constant, the switching

ON

Page 8 of 15

A further simplified equation will be:

F

SW

kHz

38000 V

OUT

 V

R

TON

k

-----------------------------------------------

=

(4)

AOZ1237QI-02

If V

is 1.8V, R

OUT

is 137k, the switching frequency

TON

will be 500kHz.

This algorithm results in a nearly constant switching
frequency despite the lack of a fixed-frequency clock
generator.

True Current Mode Control

The constant-on-time control scheme is intrinsically
unstable if output capacitor’s ESR is not large enough as
an effective current-sense resistor. Ceramic capacitors
usually cannot be used as output capacitor.

The AOZ1237 senses the low-side MOSFET current and
processes it into DC and AC current information using
AOS proprietary technique. The AC current information is
decoded and added on the FB pin on phase. With AC
current information, the stability of constant-on-time
control is significantly improved even without the help of
output capacitor’s ESR, and thus the pure ceramic
capacitor solution can be applicable. The pure ceramic
capacitor solution can significantly reduce the output
ripple (no ESR caused overshoot and undershoot) and
less board area design.

Valley Current-Limit Protection

The AOZ1237 uses the valley current-limit protection by
using R

of the lower MOSFET current sensing. To

DSON

detect real current information, a minimum constant-off
(250ns typical) is implemented after a constant-on time. If
the current exceeds the valley current-limit threshold, the
PWM controller is not allowed to initiate a new cycle. The
actual peak current is greater than the valley current-limit
threshold by an amount equal to the inductor ripple
current. Therefore, the exact current-limit characteristic
and maximum load capability are a function of the
inductor value as well as input and output voltages. The
current limit will keep the low-side MOSFET ON and will
not allow another high-side on-time, until the current in
the low-side MOSFET reduces below the current limit.
Figure 2 shows the inductor current during the current
limit.

Inductor

Current

Time

Figure 2. Inductor Current

Ilim

After 128s (typical), the AOZ1237 considers this is a
true failed condition and therefore, turns-off both high­side and low-side MOSFETs and latches off. When
triggered, only the enable can restart the AOZ1237
again.

Output Voltage Under-Voltage Protection

If the output voltage is lower than 25% by over-current or
short circuit, the AOZ1237 will wait for 128s (typical)
and turns-off both high-side and low-side MOSFETs and
latches off. When triggered, only the enable can restart
the AOZ1237 again.

Output Voltage Over-Voltage Protection

The threshold of OVP is set 20% higher than 800mV.
When the V

voltage exceeds the OVP threshold,

FB

AOZ1237-02 will shutdown.

Power Good Output

The power good (PGOOD) output, which is an open
drain output, requires the pull-up resistor. When the
output voltage is 15% below than the nominal regulation
voltage for 50s (typical), the PGOOD is pulled low.
When the output voltage is 20% higher than the nominal
regulation voltage, the PGOOD is also pulled low.

Rev. 2.0 April 2013

www.aosmd.com

Page 9 of 15

Application Information

V

IN

I

O

fC

IN



-----------------

1

V

O

V

IN

-------- -

–







V

O

V

IN

---------

=

I

CIN_RMSIO

V

O

V

IN

-------- -

1

V

O

V

IN

-------- -

–







=

V

O

V

IN

-------- -

m=

I

L

V

O

fL

-----------

1

V

O

V

IN

-------- -

–







=

I

Lpeak

I

O

I

L

2

--------

+=

0

0.1

0.2

0.3

0.4

0.5

0 0.5 1

m

I

CIN_RMS

(m)

I

O

The basic AOZ1237 application circuit is shown in page

2. Component selection is explained below.

Input Capacitor

The input capacitor must be connected to the IN pins and
PGND pin of the AOZ1237 to maintain steady input
voltage and filter out the pulsing input current. A small
decoupling capacitor, usually 1F, should be connected
to the VCC pin and AGND pin for stable operation of the
AOZ1237. The voltage rating of input capacitor must be
greater than maximum input voltage plus ripple voltage.

The input ripple voltage can be approximated by
equation below:

Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:

AOZ1237QI-02

For reliable operation and best performance, the input
capacitors must have current rating higher than I
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic capacitors are preferred for their better
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.

Inductor

The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:

The peak inductor current is:

CIN-RMS

if let m equal the conversion ratio:

The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 3. It can be seen that when V

is half of VIN, CIN it

O

is under the worst current stress. The worst current
stress on C

is 0.5 x IO.

IN

Figure 3. I

vs. Voltage Conversion Ratio

CIN

High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 30% to
50% of output current.

When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.

The inductor takes the highest current in a buck circuit.
The conduction loss on the inductor needs to be checked
for thermal and efficiency requirements.

Surface mount inductors in different shapes and styles
are available from Coilcraft, Elytone and Murata.
Shielded inductors are small and radiate less EMI noise,
but they do cost more than unshielded inductors. The
choice depends on EMI requirement, price and size.

Rev. 2.0 April 2013

www.aosmd.com

Page 10 of 15

AOZ1237QI-02

V

O

I

L

ESR

CO

1

8 fC

O



-------------------------

+





=

V

O

I

L

1

8 fC

O



-------------------------

=

V

O

ILESR

CO

=

I

CO_RMS

I

L

12

----------

=

P

total_loss

V

INIINVOIO

–=

P

inductor_lossIO

2

R

inductor

1.1=

T

junction

P

total_lossPinductor_loss

–

JA

=

Output Capacitor

The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.

The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.

Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck con­verter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:

where,

C

is output capacitor value and

O

ESR

is the Equivalent Series Resistor of output capacitor.

CO

When a low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:

Thermal Management and Layout
Consideration

In the AOZ1237 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
load, and then returns to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from the inductor, to
the output capacitors and load, to the low side switch.
Current flows in the second loop when the low side
switch is on.

In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect the input
capacitor, output capacitor and PGND pin of the
AOZ1237.

In the AOZ1237 buck regulator circuit, the major power
dissipating components are the AOZ1237 and output
inductor. The total power dissipation of the converter
circuit can be measured by input power minus output
power.

The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor and
output current.

If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:

For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.

In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:

Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.

The actual junction temperature can be calculated with
power dissipation in the AOZ1237 and thermal
impedance from junction to ambient.

The maximum junction temperature of AOZ1237 is
150ºC, which limits the maximum load current capability.

The thermal performance of the AOZ1237 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.

Rev. 2.0 April 2013

www.aosmd.com

Page 11 of 15

Layout Considerations

ġġġġġġġġġġġġġġġġġġġġ3*1'













3*22'

(1

3)0

$*1'

)%

721







1&

,1











/;

3*1'

%67

9&&

,1

66









/;

/;

/;

3*1'

3*1'

,1





3*1'

,1

/;



/;



3*1'

/

;

/

;





/

;

/;/

;

,

1

,

1





,

1

9LQ

/

;

9RXW



9

&

&

9RXW

3*1'

/;

3*1'

9RXW

9RXW

,1

,1

Several layout tips are listed below for the best electric
and thermal performance.

1. The LX pins and pad are connected to internal low
side switch drain. They are low resistance thermal
conduction path and most noisy switching node.
Connect a large copper plane to LX pin to help
thermal dissipation.

2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance
thermal conduction path. Connect a large copper
plane to IN pins to help thermal dissipation.

3. Input capacitors should be connected to the IN pin
and the PGND pin as close as possible to reduce the
switching spikes.

4. Decoupling capacitor C

should be connected to

VCC

VCC and AGND as close as possible.

AOZ1237QI-02

5. Voltage divider R1 and R2 should be placed as close
as possible to FB and AGND.

6. R

7. A ground plane is preferred; Pin 19 (PGND) must be

8. Keep sensitive signal traces such as feedback trace

9. Pour copper plane on all unused board area and

should be placed on PCB on the opposite side

TON

of feedback network or away from FB pin and FB
feedback resistors in order to avoid unwanted touch,
which will short T

pin and FB together to ground

ON

and cause improper operation.

connected to the ground plane through via.

far away from the LX pins.

connect it to stable DC nodes, like VIN, GND or
VOUT.

&















Rev. 2.0 April 2013

www.aosmd.com

Page 12 of 15

Package Dimensions, QFN 4x4, 23 Lead EP2_S

TOP VIEW

SIDE VIEW

BOTTOM VIEW

D

Notes:

1. Controlling dimensions are in millimeters. Converted inch dimensions are not necessarily exact.

2. Tolerance: ± 0.05 unless otherwise specified.

3. Radius on all corners is 0.152 max., unless otherwise specified.

4. Package wrapage: 0.012 max.

5. No plastic flash allowed on the top and bottom lead surface.

6. Pad planarity: ± 0.102

7. Crack between plastic body and lead is not allowed.

RECOMMENDED LAND PATTERN

Dimensions in millimeters

Dimensions in inches

UNIT: MM

Symbols Min. Typ. Max.

E

Pin #1 Dot
By Marking

D2

D3

L1

L

E1

e

EE

b

E2 E3

L3

D1

D1

L2

A1

A

A2

0.37

0.50

0.45

0.25

0.25

0.22

3.10

2.71

3.10

3.43

0.37

0.75

0.95

0.26

0.75

1.34

A
A1
A2

E
E1

D
D1
D2
D3

L
L1
L2
L3

b
e

0.80

0.00

3.90

2.95

3.90

0.65

0.85

1.24

0.35

0.57

0.23

0.57

0.20

0.90
—

0.2 REF

4.00

3.05

4.00

0.75

0.95

1.34

0.40

0.62

0.28

0.62

0.25

0.50 BSC

1.00

0.05

4.10

3.15

4.10

0.85

1.05

1.44

0.45

0.67

0.33

0.67

0.30

Symbols Min. Typ. Max.

A
A1
A2

E
E1

D
D1
D2
D3

L
L1
L2
L3

b

e

0.031

0.000

0.154

0.116

0.154

0.026

0.033

0.049

0.014

0.022

0.009

0.022

0.008

0.035
—

0.008 REF

0.157

0.120

0.157

0.030

0.037

0.053

0.016

0.024

0.011

0.024

0.010

0.020 BSC

0.039

0.002

0.141

0.124

0.141

0.033

0.041

0.057

0.018

0.026

0.013

0.026

0.012

AOZ1237QI-02

Rev. 2.0 April 2013

www.aosmd.com

Page 13 of 15

Tape and Reel Dimensions, QFN 4x4, 23 Lead EP2_S

Carrier Tape

Reel

Tape Size

12mm

Reel Size

ø330Mø330.0

±2.0

N

ø79.0

±1.0

UNIT: mm

G

M

W1

S

K

H

N

W

V

R

Trailer Tape
300mm min.

or 75 Empty Pockets

Components Tape

Orientation in Pocket

Leader Tape
500mm min.

or 125 Empty Pockets

H

ø13.0

±0.5

W

12.4

+2.0/-0.0

W1

17.0

+2.6/-1.2

K

10.5
±0.2

S

2.0

±0.5

G—R—V

—

Leader/Trailer and Orientation

UNIT: mm

P1

D1

P2

B0

P0

D0

E2

E1

E

A0

Feeding Direction

Package

A0 B0

K0

EE1 E2

D0

D1 P0 P1 P2 T

4.35

±0.10 ±0.10

4.35
±0.10

1.10

1.50

1.50

12.00
±0.10

1.75
±0.05

5.50
±0.10

8.00
±0.10

4.00
±0.05

2.00
±0.05

0.30

±0.30

+0.10/-0Min.

QFN 4x4

(12mm)

T

K0

AOZ1237QI-02

Rev. 2.0 April 2013

www.aosmd.com

Page 14 of 15

Part Marking

AOZ1237QI-02

AOZ1237QI-02

(QFN4x4)

Fab & Assembly Location

Z1237QI2

Part Number Code

FAYWLT

Assembly Lot Code

Year & Week Code

LEGAL DISCLAIMER

Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.

LIFE SUPPORT POLICY

ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.

As used herein:

1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.

Rev. 2.0 April 2013

www.aosmd.com

2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.

Page 15 of 15