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A
A
AOD407
P-Channel Enhancement Mode Field Effect Transistor
General Description
The AOD407 uses advanced trench technology to
provide excellent R
gate resistance. With the excellent thermal resistance
of the DPAK package, this device is well suited for
high current load applications.
-RoHS Compliant
-Halogen Free*
D
Absolute Maximum Ratings T
Drain-Source Voltage -60
Gate-Source Voltage
Continuous Drain
Current
G
Pulsed Drain Current
Avalanche Current
Repetitive avalanche energy L=0.1mH
Power Dissipation
Power Dissipation
Junction and Storage Temperature Range -55 to 175
, low gate charge and low
DS(ON)
TO252
DPAK
Top View
G
=25°C unless otherwise noted
A
Bottom View
D
S
Symbol
V
DS
V
GS
T
=25°C
C
=100°C
T
C
C
C
TC=25°C
B
T
=100°C
C
TA=25°C
A
T
=70°C 1.6
A
I
D
I
DM
I
AR
C
E
AR
P
D
P
DSM
TJ, T
STG
Features
VDS (V) = -60V
= -12A (VGS = -10V)
I
D
R
DS(ON)
R
DS(ON)
100% UIS tested
100% RG tested
G
S
< 115mΩ (VGS = -10V)
< 150mΩ (VGS = -4.5V)
Maximum UnitsParameter
-12
-10
-30
-12
23
50
25
2.5
D
G
S
V
V±20
A
A
mJ
W
W
°C
Thermal Characteristics
Parameter Units
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Maximum Junction-to-Case
B
t ≤ 10s
Steady-State
Steady-State
Symbol Typ Ma
R
θJA
R
θJC
16.7 25
40 50
2.5 3
°C/W
°C/W
°C/W
Alpha & Omega Semiconductor, Ltd.
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AOD407
Electrical Characteristics (T
Symbol Min Typ Max Units
=25°C unless otherwise noted)
J
Parameter Conditions
STATIC PARAMETERS
BV
I
DSS
I
GSS
V
GS(th)
I
D(ON)
R
DS(ON)
g
FS
V
SD
I
S
Drain-Source Breakdown Voltage
DSS
Zero Gate Voltage Drain Current
Gate-Body leakage current
Gate Threshold Voltage V
On state drain current
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
=-250µA, VGS=0V
I
D
V
=-48V, VGS=0V
DS
=0V, VGS=±20V
V
DS
DS=VGS ID
V
GS
V
GS
V
GS
V
DS
=-1A,VGS=0V
I
S
=-250µA
=-10V, VDS=-5V
=-10V, ID=-12A
=-4.5V, ID=-8A
=-5V, ID=-12A
T
J
=125°C
T
J
=55°C
-60 V
-0.003 -1
-5
µA
±100 nA
-1.5 -2.1 -3 V
-30 A
91 115
150
114 150
mΩ
mΩ
12.8 S
-0.76 -1 V
-12 A
DYNAMIC PARAMETERS
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate resistance V
=0V, VDS=-30V, f=1MHz
V
GS
=0V, VDS=0V, f=1MHz
GS
987 1185 pF
114 pF
46 pF
710Ω
SWITCHING PARAMETERS
(10V)
Q
g
(4.5V)
Q
g
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
A: The value of R
Power dissipation P
depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation P
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
D. The R
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of T
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1
Rev 7 : May 2010
Total Gate Charge (10V)
Total Gate Charge (4.5V)
Gate Source Charge
V
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
V
R
Turn-Off Fall Time
ST
I
F
I
F
2008).
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
θJA
is based on R
DSM
is based on T
D
is the sum of the thermal impedence from junction to case R
θJA
and the maximum allowed junction temperature of 150°C. The value in any given application
θJA
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
J(MAX)
=175°C.
J(MAX)
=-10V, VDS=-30V, ID=-12A
GS
=-10V, VDS=-30V, RL=2.5Ω,
GS
=3Ω
GEN
=-12A, dI/dt=100A/µs
=-12A, dI/dt=100A/µs
=175°C.
J(MAX)
and case to ambient.
θJC
15.8 20 nC
7.4 9 nC
3nC
3.5 nC
9ns
10 ns
25 ns
11 ns
27.5
35 ns
30 nC
=25°C. The SOA
A
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE
Alpha & Omega Semiconductor, Ltd.
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AOD407
S
S
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTIC
30
25
-10V
-7V
-6V
-5V
20
-4.5V
(A)
15
D
-I
VGS=-4V
10
5
-3.5V
-3V
0
012345
-V
(Volts)
DS
Fig 1: On-Region Characteristics
220
200
)
Ω
(m
DS(ON)
R
180
160
140
120
VGS=-4.5V
VGS=-10V
100
10
V
=-5V
D
8
6
(A)
D
-I
4
125°C
25°C
2
0
012345
-V
(Volts)
GS
Figure 2: Transfer Characteristics
2
1.8
VGS=-10V
I
=-12A
D
1.6
VGS=-4.5V
1.4
I
D
=-8A
1.2
1
Normalized On-Resistance
80
0 5 10 15 20 25
-I
(A)
D
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
300
ID=-12A
250
125°C
)
200
Ω
(m
150
DS(ON)
R
25°C
100
50
246810
-V
(Volts)
GS
Figure 5: On-Resistance vs. Gate-Source Voltage
0.8
0 25 50 75 100 125 150 175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
1.0E+01
1.0E+00
1.0E-01
1.0E-02
(A)
S
-I
1.0E-03
125°C
25°C
1.0E-04
1.0E-05
1.0E-06
0.0 0.2 0.4 0.6 0.8 1.0 1.2
(Volts)
-V
SD
Figure 6: Body-Diode Characteristics
Alpha & Omega Semiconductor, Ltd.
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AOD407
S
ss
o
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTIC
10
8
VDS=-30V
=-12A
I
D
6
(Volts)
GS
4
-V
2
0
0 4 8 12 16
-Q
(nC)
g
Figure 7: Gate-Charge Characteristics
100.0
T
=175°C, TA=25°C
J(Max)
R
1.0
DS(ON)
limited
1ms
100µs
10ms
DC
10.0
(Amps)
D
-I
10µs
1200
C
iss
1000
800
600
400
Capacitance (pF)
C
oss
C
r
200
0
0 5 10 15 20 25 30
-V
(Volts)
DS
Figure 8: Capacitance Characteristics
200
160
T
T
J(Max)
=25°C
C
=175°C
120
80
Power (W)
40
0.1
0.1 1 10 100
-VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
D=Ton/T
T
J,PK=TC+PDM.ZθJC.RθJC
R
=3°C/W
θJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0
0.0001 0.001 0.01 0.1 1 10
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
1
0.1
Normalized Transient
Thermal Resistance
JC
θ
Z
P
T
n
T
Single Pulse
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10 100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
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AOD407
S
o
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTIC
14
IL
⋅
D
VBV
−
DD
12
t
=
A
10
8
(A), Peak Avalanche Current
D
-I
TA=25°C
6
0.00001 0.0001 0.001
Time in avalanche, t
(s)
A
Figure 12: Single Pulse Avalanche capability
14
12
10
(A)
D
8
6
4
Current rating -I
2
60
50
40
30
20
Power Dissipation (W)
10
0
0 25 50 75 100 125 150 175
T
(°C)
CASE
Figure 13: Power De-rating (Note B)
60
50
TA=25°C
40
30
Power (W)
20
10
0
0 25 50 75 100 125 150 175
T
(°C)
CASE
Figure 14: Current De-rating (Note B)
0
0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
10
D=Ton/T
T
J,PK=TA+PDM.ZθJA.RθJA
R
=50°C/W
1
θJA
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
Normalized Transient
Thermal Resistance
0.01
JA
θ
Z
Single Pulse
P
T
n
T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Alpha & Omega Semiconductor, Ltd.
Page 6
AOD407
VDC
Rg
Gate Charge Test Circuit & Waveform
Vgs
Qg
-
-10V
-
+
VDC
Vds
+
Qgs
DUT
Vgs
Ig
Resistive Switching Test Circuit & W aveforms
RL
Vds
Vgs
t
on
tt
d(on)
r
Qgd
t
d(off)
Charge
t
off
t
f
-
Vgs
DUT
VDC
Vdd
+
90%
Vgs
Vgs
Vds +
Vds -
Ig
Rg
Vgs
Isd
Vgs
Vds
Id
DUT
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
DUT
Vgs
VDC
-
Vdd
+
E = 1/2 LI
AR
Vds
Id
Vgs
2
AR
Diode Recovery Test Circuit & Waveforms
Q = - Idt
rr
Vgs
t
L
+
Vdd
VDC
-
-Isd
-Vds
-I
F
dI/dt
rr
-I
RM
10%
BV
I
AR
Vdd
DSS
Alpha & Omega Semiconductor, Ltd.
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