The AN8725FH is a laser driver IC that can set a laser
emitting level to a maximum precision in recording and
playback of an optical recording equipment such as PD,
and can modulate a laser light in tune with the external
signal.
■ Features
• Digital setting of playback current, peak current, bias
current and abnormal light emitting level
• Peak current and bias current can be modulated by the
external signal.
• Driving current set-up (digital set-up)
For playback: 8-bit + 4-bit (0 mA to 80 mA)
5-bit + 4-bit (0 mA to 150 mA)
For peak: 4-bit + 8-bit (0 mA to 150 mA)
For bias: 4-bit + 8-bit (0 mA to 150 mA)
• Laser output light monitoring circuit built-in
• Abnormal light emitting detecting function built-in:
Possible to set up excessive and insufficient light emitting levels with 4-bit DAC for playback and recording,
respectively.
• Supply voltage abnormality detection:
Voltage down (3.9 V or less), voltage up (6.1 V or more)
14.00±0.20
12.00±0.20
6041
61
80
120
(1.25)
0.50
+0.10
0.18
–0.05
Seating plane
QFP080-P-1212
40
(1.25)
21
0.90±0.10
0.90±0.10
14.00±0.20
12.00±0.20
1.95±0.20
0.50±0.20
0.10±0.10
Unit: mm
(1.00)
–0.05
+0.10
0.15
0° to 10°
■ Applications
• Optical disk drive
1
Page 2
AN8725FHICs for Optical Disk Drive
■ Block Diagram
IGND
AGND
PKMD
BIMD
RPHOLD
XWR
XRD
AD0
AD1
AD2
AD3
DT0
DT1
DT2
DT3
DT4
DT5
DT6
DT7
XLDEN
XCLR
XLDERR
XHFON
logic
CC
PKGND
PKV
72
BIV
71
77
4
Playback
current
5
DAC9
4
Playback
current
8
DAC1
8
Peak bias
4
current
DAC4
8
X1/SX2 changeover
AAF off
AAF RST
CTL SW6
DAC1
DAC9 DAC4
Current source for DAC
PS over
Supply voltage
PS down
WPW over
WPW down
RPW over
RPW down
Sleep
4
4
monitoring
Insufficient
light emission
DAC5
Excessive
light emission
DAC6
CC
LPF off
LPF off
DAC56SW
BIGND
RGND
76
62
Playback
current
DAC7
LPF9
Playback
current
DAC8
LPF1
Peak
current
DAC2
Bias
current
DAC3
Shunt circuit
SW5
Abnormal
light
emitting
detection
CC
RV
68
SW1
SW1
SW2
SW3
I/V
conversion
AAF
Sleep circuit
voltage source
BIDCP
78
Reference
(1.25 V)
PKDCP
73
64
Current
amplification
Current
amplification
Current
amplification
X1, X10
SW6
RDCP2
DAC7DAC8DAC2DAC3
Buffer
RDCP1
63
44
43
65
39
38
70
69
75
74
51
50
49
48
47
46
56
36
53
52
34
9
33
28
19
10
3
2
LPF92
LPF91
LDRP
LPF12
LPF11
XLDPK
LDPK
XLDBI
LDBI
IPD
IVIN
IVOUT
AAF
PWRMONI
DETMONI
VNR
VC
CV
CC
CGND
DV
CC
DGND
CC
AV
45
58
40
35
54
4
5
6
8
9
11
12
13
14
Control
15
16
17
18
22
23
24
25
26
27
29
32
30
31
PWMSK
ERFIL
55
ERREF
57
37
RREF
1
202141425960617980
SGND
DACMONI
2
Page 3
ICs for Optical Disk DriveAN8725FH
■ Pin Descriptions
Note) Description on notations of "Category" in the following list:
IN : Input pinI/O : Input/output pin (pull-down with 100 k Ω)
IND : Input pin (pull-down with 100 kΩ)PS : Power supply/GND pin
INU : Input pin (pull-up with 100 kΩ)MSC: Parts connecting pin, etc.
OUT: Output pin
A: Analog functionD: Digital function
Pin No.SymbolCategoryDescription
1SGNDPSDPin connected to the chip substrate.
Must be used in the same potential as other GND pins.
2DGNDPSDGND pin exclusive for a logic circuit.
3DGNDPSDMust be used in the same potential as other GND pins.
4PKMDINDDPeak current modulation signal input pin.
In high-level, the current set up with DAC2 is superimposed on LD.
5BIMDINDDBias current modulation signal input pin.
In high-level, the current set up with DAC3 is superimposed on LD.
6RPHOLDINDDRecord gate signal input pin.
Inputs a low-level in playback and a high-level in recording.
Switches an amp. of light monitoring signal, abnormally emitted light
detection level and on/off of HF module.
7XWRINUDRegister writing signal pin.
Selects a register specified by address in a fall edge and writes a bus data
on the register of the address specified in the rise edge.
8XRDINUDRegister read-out signal pin.
Register data of the address specified in low appears on the bus.
9DVCCPSDPower supply pin exclusive for a logic circuit.
Must be used in the same potential as other power supply pins.
10DGNDPSDGND pin exclusive for a logic circuit.
Must be used in the same potential as other GND pins.
11AD0INDD4-bit address pin for registers.
12AD1INDDSelects the register to be accessed.
13AD2INDD
14AD3INDD
15DT0I/ODData I/O 8-bit bus pin.
16DT1I/ODThe bus to set the data to be written on a register and to read out the data
17DT2I/ODof a register.
18DT3I/OD
19DGNDPSDGND pin exclusive for a logic circuit.
Must be used in the same potential as other GND pins.
3
Page 4
AN8725FHICs for Optical Disk Drive
■ Pin Descriptions (continued)
Pin No.SymbolCategoryDescription
20SGNDPSDPin connected to the chip substrate.
21SGNDPSDMust be used in the same potential as other GND pins.
22DT 4I/ODData I/O 8-bit bus pin.
23DT 5I/ODThe bus to set the data to be written on a register and to read out the data
24DT 6I/ODof a register.
25DT 7I/OD
26XLDENINUDLD enable input pin.
In a high-level or open mode, LD becomes off and open. This state is suited
to check the LD characteristics in keeping a connection to the IC. At the
time power off, both ends of LD are short-circuited by the IC for protection.
In the low-level, it returns to a normal operation.
27XCLRINDDClear signal input pin.
Sets an LDDENB register to "0" in the low-level and presets the status of
each DAC and each switch to an initial state as defined separately.
But six registers for an abnormal detection are not cleared. In this state,
each output of a current amplification 1, 2, 3 are in the off state and a
shunt circuit becomes on to continue to protect LD.
Setting this pin to the high-level and the LDDENB register to "1", it returns
to a normal operation.
28DGNDPSDGND pin exclusive for a logic circuit.
Must be used in the same potential as other GND pins.
When a supply voltage or a laser light emission exceeds a fixed range, it
goes to low-level. A supply voltage abnormality is detected for the voltage drop (3.9 V or less) or voltage rise (6.1 V or more). And an abnormal
light emission is detected for an excessive or weaker light emission set up
by 4-bit DAC5 and DAC6. This abnormality detection is latched so as to
prevent it from being reset until ERRCLR register is set to "1".
Further, each DAC output of a playback current, a peak current and a bias
current can be set to off, a shunt circuit be set to on and LD between anode
and GND be short-circuited by 100 Ω so that LD can be protected. This
protection function is latched to keep it from being reset until ERRCLR is
set to "1". Selection of either operation or non-operation for this operation can be made by an STPMSK register.
30PWMSKMSCDThe pin to set up the mask time for a transitional response output that
comes out at switching a detection level of excessive or insufficient light
emission by RPHOLD. Set a mask time by an external capacitor between
PWMSK and DGND and the resistor (10 kΩ) inside the IC. This pin is for
a schmitt-trigger input.
4
Page 5
ICs for Optical Disk DriveAN8725FH
■ Pin Descriptions (continued)
Pin No.SymbolCategoryDescription
31ERFILMSCDFilter setting pin to avoid a detection error of laser abnormality caused
by noise.
Connect an external capacitor between ERFIL and DGND, and set a filter
together with a resistor (10 kΩ) inside the IC. This pin is for schmitt-trigger
input.
32XHFONOUTDHF module on/off control signal output pin.
High corresponds to off and low to on.
33DGNDPSDGND pin exclusive to a logic circuit.
Must be used in the same potential as other GND pins.
34DV
CC
PSDPower supply pin exclusive to a logic circuit.
Must be used in the same potential as other power supply pins.
35AGNDPSAGND pin exclusive to a analog circuit.
Must be used in the same potential as other GND pins.
36VCMSCAOutput pin for reference voltage (1.25 V).
Connects a capacitor C between this pin and AGND for de-coupling.
37RREFMSCA
Reference resistor connecting pin to determine an output current for each DAC.
Connect a resistor of 10 kΩ between RREF and AGND.
38LPF11MSCALPF characteristic setting pin for DAC1 and DAC8.
39LPF12MSCAConnect an external resistor between LPF11 and LPF12, and then
capacitor between LPF12 and IGND to set up a cutoff frequency.
40IGNDPSAGND pin for playback power supply setting DAC1, DAC9 and distur-
bance reduction LPF.
Must be used in the same potential as other GND pins.
41SGNDPSDPin connected to the chip substrate.
42SGNDPSDMust be used in the same potential as other GND pins.
43LPF91MSCALPF characteristic setting pin for DAC9 and DAC7.
44LPF92MSCAConnect an external resistor between LPF91 and LPF92 and then
capacitor between LPF92 and IGND to set a cutoff frequency.
45AV
CC
PSAPower supply pin for an analog circuit, a reference supply voltage circuit, etc.
Must be used in the same potential as other power supply pins.
46DETMONIOUTAPin to monitor a signal for detecting abnormally emitted light.
In a playback mode, the signal output is five times that in recording
(ten times is posisible by a register setting). Has offset to VNR due to
being outputted through a buffer of transistors.
In a low-level of RPHOLD, the amplifier output has 10 times gain
compared with recording, and is equipped with AFF.
5
Page 6
AN8725FHICs for Optical Disk Drive
■ Pin Descriptions (continued)
Pin No.SymbolCategoryDescription
48AAFMSCAAAF characteristic setting pin for optical monitor circuit.
Connect an external resistor, capacitor between AAF and IVOUT and set
up a cutoff frequency.
49IVOUTOUTAI to V conversion signal output pin.
Connect an external variable resistor between IVIN and IVOUT.
50IVINMSCAI to V conversion resistor connection pin.
Connect an external variable resistor between IVIN and IVOUT.
51IPDMSCAPin photo diode (PD) connection pin.
Connect a pin photo diode for detecting a semiconductor laser emitting
light. Connect anode to this pin.
Applicable to a source-type PD which has a typical value of 40 µA to
160 µA output in object lens output power of 1 mW.
52CGNDPSAGND pin in an optical monitor circuit.
Must be used in the same potential as other GND pins.
53CV
CC
PSAPower supply pin in an optical monitor circuit.
Must be used in the same potential as other power supply pins.
54AGNDPSAGND pin exclusive to a analog circuit.
Must be used in the same potential as other GND pins.
55ERREFINAAbnormally emitting light detecting range setting pin.
Sets a full scale voltage of DAC5 and DAC6.
A setting range is VNR or more and input range of an external ADC
or less.
56VNRINAReference level input pin for PWRMONI output.
Input a reference voltage of 1.25 V of an external ADC.
57DACMONI OUTADAC5, DAC6 monitor pin.
DAC5 voltage is outputted when DAC56 SW register is low, DAC6
voltage is outputted when DAC6 voltage is high.
58AV
CC
PSAPower supply pin for an analog circuit, a reference supply voltage circuit, etc.
Must be used in the same potential as other power supply pins.
59SGNDPSDPin connected to the chip substrate.
60SGNDPSDMust be used in the same potential as other GND pins.
61SGNDPSD
62RGNDPSAGND pin for the lead current setting DAC7 and DAC8.
Must be used in the same potential as other GND pins.
63RDCP1MSCAPin to connect a de-coupling capacitor to protect the output current of
DAC7, the read current setting circuit, from disturbance by a switching
noise such as peak current.
(Connects a capacitor between RDCP1 and RGND.)
6
Page 7
ICs for Optical Disk DriveAN8725FH
■ Pin Descriptions (continued)
Pin No.SymbolCategoryDescription
64RDCP2MSCAPin to connect a de-coupling capacitor to protect the output current of
DAC7, the read current setting circuit, from disturbance by a switching
noise such as peak current.
(Connects a capacitor between RDCP2 and RGND.)
65LDRPOUTASource type read current (DAC1, DAC7, DAC8, DAC9) output pin.
Possible to set up the range of 0 mA to 150 mA in the precision of 8-bit
+ 4-bit + 5-bit + 4-bit.
Output voltage range is 1.0 V to 3.5 V.
66N.C.N.C. pin.
67N.C.Open the pin or connect to GND.
68RV
CC
PSAPower supply pin for read current setting DAC7, DAC8.
Consumes approximately a quarter of the necessary read current.
Must be used in the same potential as other power supply pins.
69LDPKOUTASource-type peak current (DAC2) output pin.
Possible to set the range of 0 mA to 150 mA in the accuracy of 8-bit.
The output voltage range is 1.0 V to 3.2 V.
70XLDPKINASink-type peak current output pin.
Approximately three fourths of LDRK output current are outputted from
this pin.
71PKGNDPSAGND pin of DAC2 in the peak current setting circuit.
Must be used in the same potential as other GND pins.
72PKV
PSADAC2 power supply pin in the peak current setting circuit.
CC
Consumes approximately a quarter of the setting current.
Must be used in the same potential as other power supply pins.
73PKDCPMSCAPin to connect a de-coupling capacitor to avoid the output current disturbance,
which is caused by a switching noise such as peak current, in peak current
setting circuit DAC2.
(Connects a capacitor between PKDCP and PKGND.)
74LDBIOUTASource-type bias current (DAC3) output pin.
Possible to set the range of 0 mA to 150 mA in the accuracy of 8-bit.
Output voltage range is 1.0 V to 3.2 V.
75XLDBIINASink-type peak current output pin.
Approximately three fourths of LDBI output current are outputted from
this pin.
76BIGNDPSAGND pin of a bias current setting circuit DAC3.
Must be used in the same potential as other GND pins.
77BIV
CC
PSAPower supply pin of a bias current setting circuit DAC3.
Consumes approximately one fourth of a setting current.
Must be used in the same potential as other power supply pins.
7
Page 8
AN8725FHICs for Optical Disk Drive
■ Pin Descriptions (continued)
Pin No.SymbolCategoryDescription
78BIDCPMSCAPin to connect a de-coupling capacitor to avoid the output current disturbance,
which is caused by a switching noise such as bias current, of a bias current
setting circuit DAC3.
(Connects a capacitor between BIDCP and BIGND.)
79SGNDPSDPin connected to the chip substrate.
80SGNDPSDMust be used in the same potential as other GND pins.
25Pin 25: DT7
26XLDENRefer to pin 7
27XCLRRefer to pin 4
28DGND
DV
CC
DGND
DV
CC
DGND
29XLDERR
22
DV
CC
Pin 29, 32
DGND
Page 23
ICs for Optical Disk DriveAN8725FH
■ Terminal Equivalent Circuits (continued)
Pin No.SymbolEquivalent circuit
30Pin 30: PWMSK
31Pin 31: ERFIL
DV
CC
Schmitt-trigger
Pin 30, 31
10 kΩ
32XHFONRefer to pin 29
33DGND
34DV
CC
Refer to pin 9
35AGND
36VC
50 Ω
37RREF
DGND
36
AV
AV
CC
AGND
CC
38LPF11
37
AGND
AV
CC
Pin 38, 43
IGND
23
Page 24
AN8725FHICs for Optical Disk Drive
■ Terminal Equivalent Circuits (continued)
Pin No.SymbolEquivalent circuit
39LPF12
Pin 39, 44
40Pim 40: IGND
41Pim 41: SGND
42Pim 42: SGND
43LPF91Refer to pin 38
44LPF92Refer to pin 39
AV
CC
IGND
45AV
CC
46DETMONI
47PWRMONI
AV
CC
Pin 45, 58
504948
AGND
CV
AV
46
CGND
CC
CC
47
AV
CC
24
CGND
Page 25
ICs for Optical Disk DriveAN8725FH
■ Terminal Equivalent Circuits (continued)
Pin No.SymbolEquivalent circuit
48AAF
5049
60
48
AV
CC
CGND
49IVOUT
50IVIN
51IPD
50
49
50
CV
AV
AV
CC
CGND
AV
CC
CGND
CC
CC
51
52CGND
CGND
25
Page 26
AN8725FHICs for Optical Disk Drive
■ Terminal Equivalent Circuits (continued)
Pin No.SymbolEquivalent circuit
53CV
54AGND
CC
53
CV
CC
CGND
55Pim 55: ERREF
56Pim 56: VNR
Pin55, 56
57DACMONI
58AV
CC
Refer to pin 45
59Pim 59: SGND
60Pim 60: SGND
61Pim 61: SGND
62Pim 62: RGND
AV
CC
AGND
AV
57
AGND
CC
63Pim 63: RDCP1
64Pim 64: RDCP2
26
RV
CC
Pin63, 64
RGND
Page 27
ICs for Optical Disk DriveAN8725FH
■ Terminal Equivalent Circuits (continued)
Pin No.SymbolEquivalent circuit
65LDRP
66N.C.
67N.C.
68
RV
CC
AV
65
SGND
CC
68RV
CC
69LDPK
70XLDPK
68
Pin 70, 75
70
75
RV
CC
RGND
AV
CC
Pin 69, 74
SGND
PBGND
6974
SGND
27
Page 28
AN8725FHICs for Optical Disk Drive
■ Terminal Equivalent Circuits (continued)
Pin No.SymbolEquivalent circuit
71PKGND
72PKV
CC
Pin 72
77
PKV
BIV
CC
CC
73PKDCP
74LDBIRefer to pin 69
75XLDBIRefer to pin 70
76BIGND
77BIV
CC
Refer to pin 72
78BIDCPRefer to pin 73
79SGND
80SGND
SGND
AV
CC
Pin 73, 78
SGND
PBGND
■ Application Notes
1. PD Ta curves of QFP080-P-1212
2.000
1.920
1.800
1.600
1.400
(W)
D
1.200
1.000
0.800
0.600
Power dissipation P
0.400
0.200
0.000
0
28
Mounted on standard board
(glass epoxy: 75 mm × 75 mm × t0.8 mm)
R
= 65.1°C/W
th(j-a)
Independent IC
without a heat shink
R
= 125.0°C/W
th(j-a)
2550
Ambient temperature Ta (°C)
75100125150
Page 29
ICs for Optical Disk DriveAN8725FH
■ Application Notes (continued)
2. Timing chart
1) Definition of rising and falling
2) Interface
t
HL
90%90%
10%10%
In write
t
LH
In read
t
2
AD0
Write address
to AD3
DT0
to DT7
XWR
XRD
ParameterSymbolConditionsMinTypMaxUnit
Switching characteristicst
Pulse widtht
Setup timet
Hold timet
t
6
t
9
Read address
t
3
Write data
t
4
LH
t
HL
4
t
11
2
t
3
t
9
t
10
6
t
7
t
13
t
14
t
7
t
10
Read data
t
11
10% to 90%10ns
90% to 10%10
XWR ↓ to XWR ↑50 ns
XRD ↓ to XRD ↑70
AD defined to XWR ↓10 ns
DT defined to XWR ↑35
AD defined to XRD ↓10
XRD ↓ to DT defined50
XWR ↑ to AD released0 ns
XWR ↑ to DT released0
XRD ↑ to AD released0
XRD ↑ to DT released030
t
13
t
14
29
Page 30
AN8725FHICs for Optical Disk Drive
■ Application Notes (continued)
3. I/O specifications
• Parallel interface
1) I/O level is CMOS.
2) Transfers a digital signal to DAC and each mode setting register with 4 addresses, 8 data and 2 control signals.
Address signalAD0 to AD3
Data signalDT0 to DT7
Control signalXWR, XRD
3) Write can be done at the rise of XWR.
However, selection of a write register can be done at the fall of XWR.
DAC and register data are stored at D-FF.
4) Read appears on DT0 to DT7 at XRD = low.
5) Refer to "■ Application Notes, 2. Timing chart" for the timing chart.
6) Each signal line is pulled up and down as below:
Pull-down to GND with 100 kΩAD0 to AD3