At VIH = 2.16 V applied− 10 1 µA
At VIL = 0 V applied− 10 1 µA
= 19.68 MHz, V
REFIN
2.55 to 3.3V
= 0.6 V[p-p], Ta = 25°C
REFIN
2.163.30V
00.4V
Page 3
ICs for Mobile CommunicationAN8538SH
■ Electrical Characteristics at VCC = 2.7 V, f
= 19.68 MHz, V
REFIN
= 0.6 V[p-p], Ta = 25°C
REFIN
(continued)
• Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
ParameterSymbolConditionsMinTypMaxUnit
Consumption current 1I
SELECT = low0.901.34mA
CC1
At 260.76 MHz lock
Consumption current 2I
SELECT = high0.901.34mA
CC2
At 260.76 MHz lock
IF input levelV
Reference signal input levelV
Output leak currentI
IFINfIFIN
REFINfREFIN
OZ
= 100 MHz to 350 MHz− 10+2dBm
= 10 MHz to 25 MHz0.51.2V[p-p]
At VOZ = 0 V, 2.7 V applied− 1.0+1.0µA
■ Terminal Equivalent Circuits
Pin No.Equivalent circuitDescription
1Pin 1: CPSUB
2Pin 2: CP
2
1
SW
3GND
4IFIN
4
4.5 kΩ
4.5 kΩ
5PS
Pin 5
9
6SW
6
3
Page 4
AN8538SHICs for Mobile Communication
■ Terminal Equivalent Circuits (continued)
Pin No.Equivalent circuitDescription
7V
8REF
10 kΩ10 kΩ
8
9Refer to pin 5SELECT
10LD
10
CC
■ Application Notes
1. Input level characteristics
1) IF input level characteristics
V
Upper limit
10
Ta =−30°C, 25°C, 85°C
0
(dBm)
−10
Lower limit
Input level
−20
Ta = −30°C
−30
−40
75 100150200250300350
Input frequency (MHz
Ta = 85°C
= 2.55 V to 3.3V
CC
Ta = 25°C
)
4
Page 5
ICs for Mobile CommunicationAN8538SH
■ Application Notes (continued)
1. Input level characteristics (continued)
2) REF input level characteristics
= 2.55 V to 3.3V
V
CC
Upper limit
20
Ta =−30°C, 25°C, 85°C
10
(dBm)
0
Lower limit
Input level
−10
−20
−30
051015202530
Ta = −30°C
Ta = 85°C
Input frequency (MHz
Ta = 25°C
)
2. Characteristics specification
1) IF select specification
SELECT pin control enables you to switch IF as below:
SELECT = low → f
SELECT = high→ f
= 260.76 MHz, fR = 60 kHz (P = 16, N = 271, A = 10, R = 328)
OUT
= 260.76 MHz, fR = 60 kHz (P = 16, N = 271, A = 10, R = 330)
OUT
2) Unlock detection and LD output specification
LD output is high in a lock mode and low in an unlock mode. Lock signal is outputted in a power save mode.
SELECT = high: Detection time is 16 µs. About detection accuracy, when a dividing output shifts
by ±(51 × 3) ns for f
= 60 kHz, it generates an unlock output.
REF
SELECT = low : Detection time is 16 µs. About detection accuracy, when a dividing output shifts
by ±(51 × 3) ns for f
= 60 kHz, it generates an unlock output.
REF
3) Power save control specification
When power save control pin (PS) is high, it is set to an operating mode. When it is low, it is set to power save mode.
4) Analog SW control specification
CPSUB is controlled by SW pin.
SW = low : CPSUB open
SW = high : CPSUB operation
5) Other specification
Set CMOS input pins, such as PS pin, SW pin, SELECT pin, etc., normally to VCC or GND.
5
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.