This note describes the performances of a 400 W reference board, with wide-range mains
operation and power-factor-correction (PFC) and presents the results of its bench
evaluation. The electrical specification refers to a power supply for a typical high-end PDP
application.
The main features of this design are the very low no-load input consumption (<0.5 W) and
the very high global efficiency, better than 90% at full load and nominal mains voltage (115 230 V
The circuit consists of three main blocks. The first is a front-end PFC pre-regulator based on
the L6563 PFC controller. The second stage is a multi-resonant half-bridge converter with
an output voltage of +200 V/400 W, whose control is implemented through the L6599
resonant controller. A further auxiliary flyback converter based on the VIPer12A off-line
primary switcher completes the architecture. This third block, delivering a total power of 7 W
on two output voltages (+3.3 V and +5 V), is mainly intended for microprocessor supply and
display power management operations.
Figure 19.Thermal map @115 V
Figure 20.Thermal map at 230 V
Figure 21.Peak measurement on LINE at 115 V
Figure 22.Peak measurement on NEUTRAL at 115 V
Figure 23.Peak measurement on LINE at 230 V
Figure 24.Peak measurement on NEUTRAL at 230 V
Main characteristics and circuit descriptionAN2492
1 Main characteristics and circuit description
The main characteristics of the SMPS are listed below:
●Universal input mains range: 90 to 264 V
●Output voltages: 200 V @ 2 A - 3.3 V @ 0.7 A - 5 V @ 1 A
●Mains harmonics: Compliance with EN61000-3-2 specifications
●Stand-by mains consumption: Typical 0.5 W @230 V
●
Overall efficiency: better than 88% at full load, 90-264 V
●
EMI: Compliance with EN55022-class B specifications
●Safety: Compliance with EN60950 specifications
●PCB single layer: 132x265 mm, mixed PTH/SMT technologies
The circuit consists of three stages. A front-end PFC pre-regulator implemented by the
controller L6563 (Figure 1), a half-bridge resonant DC/DC converter based on the resonant
controller L6599 (Figure 2) and a 7 W flyback converter intended for stand-by management
(Figure 3) utilizing the VIPer12A off-line primary switcher.
The PFC stage delivers a stable 400 VDC supply to the downstream converters (resonant +
flyback) and provides for the reduction of the current harmonics drawn from the mains, in
order to meet the requirements of the European norm EN61000-3-2 and the JEIDA-MITI
norm for Japan.
- 45 to 65 Hz
AC
AC
AC
The PFC controller is the L6563 (U1), integrating all functions needed to operate the PFC
and interface the downstream resonant converter. Though this controller chip is designed for
Transition-Mode (TM) operation, where the boost inductor works next to the boundary
between Continuous (CCM) and Discontinuous Conduction Mode (DCM), by adding a
simple external circuit, it can be operated in LM-FOT (line-modulated fixed off-time) mode,
allowing Continuous Conduction Mode operation, normally achievable with more expensive
control chips and more complex architectures. This operative mode allows the use of this
device at a high power level, usually covered by CCM topologies. For a detailed and
complete description of the LM-FOT operating mode, see the application note AN1792. The
external components to configure the circuit in LM-FOT mode are: C15, C17, D5, Q3, R14,
R17 and R29.
The power stage of the PFC is a conventional boost converter, connected to the output of
the rectifier bridge through a differential mode filtering cell (C5, C6 and L3) for EMI
reduction. It includes a coil (L4), a diode (D3), and two capacitors (C7 and C8). The boost
switch consists of two Power MOSFETs (Q1 and Q2), connected in parallel, which are
directly driven by the L6563 output drive thanks to the high current capability of the IC. The
divider (R30, R31 and R32) connected to MULT pin 3 brings the information of the
instantaneous voltage that is used to modulate the boost current and to derive further
information like the average value of the AC line used by the VFF (voltage feed-forward)
function. This function is used to keep the output voltage almost independent of the mains.
The divider (R3, R6, R8, R10 and R11) is dedicated to detecting the output voltage while a
further divider (R5, R7, R9, R16 and R25) is used to protect the circuit in case of voltage
loop failure.
The second stage is an LLC resonant converter, with half-bridge topology implementation,
working in ZVS (zero voltage switching) mode. The controller is the L6599 integrated circuit
that incorporates the necessary functions to properly drive the two half-bridge MOSFETs by
a 50% fixed duty cycle with fixed dead-time, changing the frequency according to the
4/35
Page 5
AN2492Main characteristics and circuit description
feedback signal in order to regulate the output voltages against load and input voltage
variations.
The main features of the L6599 are a non-linear soft-start, a current protection mode used
to program the hiccup mode timing, a dedicated pin for sequencing or brown-out (LINE) and
a stand-by pin (STBY) for burst mode operation at light loads (not used in this design).
The transformer (T1) uses the magnetic integration approach, incorporating the resonant
series and shunt inductances of the LLC resonant tank. Thus, no additional external coils
are needed for the resonance. For a detailed analysis of the LLC resonant converter, please
refer to the application note AN2450.
The secondary side power circuit is configured with a single-ended transformer winding and
full-bridge rectification (diodes D8A, D8B, D10A, D10B), which is more suitable for the
current design. In fact, with this configuration, the total junction capacitance of the output
diodes reflected at primary side is one half the capacitance in case of center-tap
transformer. This capacitance at transformer primary side may affect the behavior of the
resonant tank, changing the circuit from LLC to LLCC type, with the risk that the converter,
in light-load/no-load condition (when the feedback loop increases the operating frequency)
can no longer control the output voltage. If the converter has to operate down to zero load,
this capacitance needs to be minimized. An inherent advantage of the full-bridge
rectification is that the voltage rating of the output diodes in this configuration is one half the
rating necessary for center-tap and two diodes circuit, which translates into a lower junction
capacitance device, with consequent lower reflected capacitance at primary side.
The feedback loop is implemented by means of a classical configuration using a TL431 (U4)
to adjust the current in the optocoupler diode (U3). The optocoupler transistor modulates the
current from controller Pin 4, so the frequency will change accordingly, thus achieving the
output voltage regulation. Resistors R46 and R54 set the maximum operating frequency. In
case of a short circuit, the current entering the primary winding is detected by the lossless
circuit (C34, C39, D11, D12, R43, and R45) and the resulting signal is fed into L6599 Pin 6.
In case of overload, the voltage on Pin 6 will exceed an internal threshold that triggers a
protection sequence via Pin 2, keeping the current flowing in the circuit at a safe level.
The third stage is a small flyback converter based on the VIPer12A, a current mode
controller with integrated Power MOSFET, capable of delivering about 7 W total output
power on the output voltages (5 V and 3.3 V). The regulated output voltage is the 3.3 V
output and, also in this case, the feedback loop uses the TL431 (U7) and optocoupler (U6)
to control the output voltage. This converter is able to operate in the whole mains voltage
range, even when the PFC stage is not working. From the auxiliary winding on the primary
side of the flyback transformer (T2), a voltage Vs is available, intended to supply the other
controllers (L6563 and L6599) in addition to the VIPer12A itself.
The PFC stage and the resonant converter can be switched on and off through the circuit
based mainly on components Q7, Q8, D22 and U8, which, depending on the level of the
signal ST-BY, supplies or removes the auxiliary voltage (VAUX) necessary to start up the
controllers of the PFC and resonant stages. When the AC input voltage is applied to the
power supply, the small flyback converter switches on first. Then, when the ST-BY signal is
low, the PFC pre-regulator becomes operative, and the resonant converter can deliver the
output power to the load. Note that if Pin 9 of Connector J3 is left floating (no signal ST-BY
present), the PFC and resonant converter will not operate, and only +5 V and +3.3 V
supplies are available on the output. In order to enable the +200 V output, Pin 9 of
Connector J3 must be pulled down to ground.
5/35
Page 6
Main characteristics and circuit descriptionAN2492
Figure 1.PFC pre-regulator electrical diagram
Vdc
+400V
C9
2nF2-Y1
330uF/450V
C8
R2
NTC 2R5-S237
C7
470nF/630V
D3
STTH8R0 6
1-2
D1
1N5406
L4
PQ40-500uH
5-6
D4
LL4148
Q2
STP12NM50FP
Q1
STP12NM50FP
D6
LL4148
R18
R15
6R8
6R8
R24
0R39
R23
0R39
R22
0R39
R21
0R39
R19
1k0
C18
330pF
Vrect
C6
470nF/630V
L3
DM-51uH-6A
C5
470nF/630V
Vaux
+
-
D2
D15XB60
~
~
C11
C4
L2
CM-10m H-5A
C3
L1
CM-1.5mH-5A
C2
R1
F1
8A/250V
1
J1
2nF2-Y2
680nF-X2
C10
2nF2-Y2
330nF-X2
470nF-X2
1M5
2
CON2-IN
R4
47
C13
10uF/50V
C12
100nF
R6
680kR8680k
R3
680k
R5
Vdc
2M2
R11
R10
R7
2M2
R9
D5
C15
100pF
R14
3k3
R17
C17
15k
U1
L6563
100k
R13
56k
C14
100nF
C16
1uF
2M2
CSCS
LL4148
15k
220pF
GD
VCC
INV
COMP
ZCD
GND
MULTCSVFF
PWM-Latch
R29
1k5
Q3
BC857C
R20
1k0
C21
2nF2
R28
RUN
PWM-STOP
TBO
PFC-OK PWM-LATCH
R16
5k1
LINE
240k
R26
150k
C20
470nF
C19
10nF
R25
30k
C22
10nF
R32
10k
R31
620k
R30
620k
Vrect
6/35
Page 7
AN2492Main characteristics and circuit description
Figure 2.Resonant converter electrical diagram
1234567
J2
+200V
8
CON8
C59
47nF
R86
470R
R61
R53
75k
R58
75k
C38
C25
22uF/250V
C29
100uF/250V
100uF/250V
R51
330k
2k2
R60
12k
L5
10uH
C30
100uF/250V
D8A
D8B
D10A
STTH803
STTH803
T1
T-RES-ER49
C28
47nF/630V
Vdc
Q5
R33
D7
Q6
STP14NK50Z
0R
R35
47
LL4148
STP14NK50Z
R39
0R
R40
47
D9
LL4148
C37
100uF/250V
STTH803
D10B
STTH803
R43
150
C34
220pF/630V
Vaux
C32
100nF
R38
47
C31
10uF/50V
D11
LL4148
D12
LL4148
R45
75R
C39
1uF0
C41
R85
R50
R49
R48
10uF/50V
120k
D13
C-12V
330k
R59
R56
330k
R52
330k
1k0
3k3
U3A
SFH617A-2
1k0
C44
47nF
U4
TL431
C27 100nF
NC
LVG
OUT
VCC
HVG
VBOOT
U2
L6599
CSS
DELAYCFRFMIN
STBY
ISEN
LINEGND
R36
0R
R34
3k9
C23
4uF7
C24
470nF
C26
270pF
R37
1M0
R41
DISPFC-STOP
C33
4nF7
R42
10
16k
LINE
C40
10nF
R47
10k
R46
1k5
PWM-Latch
U3B
SFH617A-2
C60
470nF
R87
220R
R54
1k5
7/35
Page 8
Main characteristics and circuit descriptionAN2492
Figure 3.Auxiliary converter electrical diagram
J3
+5Vst-by
L7
T2
123456789
+5Vst-by
T-FLY -AUX-E20
+3V3
C46
100uF/10V
33uH
C45
1000uF/10V
D15
1N5822
D14
10
CON10
St-By
C49
100uF/10V
L8
33uH
C47
1000uF/10V
D16
1N5821
D20
PKC-136
Vs
C51
100nF
R77
R64
1k6
C54
100nF
R67
1k0
C53
2nF2
R73
8k2
R62
47
U6A
SFH617A-2
+5Vst-by
R68
BAV103
C50
10uF/50V
R66
1k0
St-By
22k
R71
10k
Q8
BC847C
R69
0R
4k7
U7
TL431
+200V
R76
150k
R75
150k
D21
B-15V
R80
30k
R79
2k2
Vdc
+400V
D19
C-30V
D
D
D
SSFB
U5
VIPER-12A
U6B
SFH617A-2
Vdd D
D17
LL4148
D18
B-10V
C52
C48
10uF/50V
8/35
47nF
Q9
BC857C
U8A
R72
22R
10k
R74
C55
10uF/50V
Vdc
+400V
R83
Q11
BC557C
SFH617A-2
1M0
R84
C58
10nF
150k
Vs
Q7
BC547C
R70
Vaux
C56
100nF
Q10
BC847C
U8B
SFH617A-2
10k
D22
C-15V
C57
1nF0
Page 9
AN2492Electrical test results
2 Electrical test results
2.1 Harmonic content measurement
The current harmonics drawn from the mains have been measured according to the
European rule EN61000-3-2 Class-D and Japanese rule JEIDA-MITI Class-D, at full load
and 70 W output power, at both nominal input voltages (230 V
in Figure 4., Figure 5., Figure 6. and Figure 7. show that the measured current harmonics
are well below the limits imposed by the regulations, both at full load and at 70 W load.
and 100 VAC). The pictures
AC
Figure 4.Compliance to EN61000-3-2 for
10
1
0.1
0.01
0.001
0.0001
harmonic reduction: full load
Measurements @ 230Vac Full load EN61000-3-2 class D limit s
Measurements @ 100Vac Full load JEI DA- M ITI c l ass D l im it s
Figure 5.Compliance to EN EN61000-3-2 for
harmonic reduction: 70 W load
Measurement s @ 230Vac 70W EN61 00 0-3-2 class D limits
1
0.1
0.01
0.001
0.0001
1234567891011121314151617181920
Harmoni c Order (n)
Figure 7.Compliance to JEIDA-MITI standard
for harmonic reduction: 70 W load
Measurement s @ 100V ac 70W JEI DA -MI TI cla s s D limits
1
0.1
0.01
0.001
0.0001
1234567891011121314151617181920
Harmoni c Orde r (n )
The Power Factor (PF) and the Total Harmonic Distortion (THD) are reported in Figure 8.
and Figure 9. It is evident from the picture that the PF stays close to unity in the whole mains
voltage range at full load and at half load, while it decreases at high mains at low load
(70W). The THD has similar behavior, remaining within 25% overall the mains voltage range
and increasing at low load (70 W) at high mains voltage.
0.0001
1234567891011121314151617181920
Harmoni c Orde r ( n)
9/35
Page 10
Electrical test resultsAN2492
60%
65%
70%
75%
80%
85%
90%
95%
100%
050100150200250300350400450
Output Power (W)
Eff. (%)
@230Vac@115Vac
Figure 8.Power factor vs. Vin & loadFigure 9.Total harmonic distortion vs. Vin &
PF
1.00
0.98
0.95
0.93
0.90
0.88
0.85
80120160200240280
400W
200W
70W
Vin [Vrms]
THD [%]
35.00
30.00
25.00
20.00
15.00
10.00
5.00
0.00
80120160200240280
load
400W
200W
70W
Vin [Vrms]
2.2 Efficiency measurements
Table 1. and Tab l e 2 . show the output voltage measurements at the nominal mains voltages
of 115 V
load and at light load operations, the input power is measured using a Yokogawa WT-210
digital power meter. Particular attention has to be paid when measuring input power at full
load in order to avoid measurement errors due to the voltage drop on cables and
connections.
and 230 VAC, with different load conditions. For all measurements, both at full
AC
Figure 10. shows the overall circuit efficiency, measured at each load condition, at both
nominal input mains voltages of 115 V
and 230 VAC. The values were measured after 30
AC
minutes of warm-up at maximum load. The high efficiency of the PFC pre-regulator working
in FOT mode and the very high efficiency of the resonant stage working in ZVS (i.e. with
negligible switching losses), provides for an overall efficiency better than 88% at full load in
the complete mains voltage range. This is a significant high value for a two-stage converter,
especially at low input mains voltage where PFC conduction losses increase. Even at lower
loads, the efficiency still remains high.
Figure 10. Overall efficiency versus output power at nominal mains voltages
10/35
Page 11
AN2492Electrical test results
The global efficiency at full load has been measured even at the limits of the input voltage
range, with good results:
At VIN = 90 V
At VIN = 264 V
- full load, the efficiency is 88.48%
AC
- full load, the efficiency is 93.70%
AC
Also at light load, at an output power of about 10% of the maximum level, the overall
efficiency is very good, reaching a value better than 79% over the entire input mains voltage
range. Figure 11. shows the efficiency measured at various output power levels versus input
mains voltage.
Table 1.Efficiency measurements @V
+200 V@load(A)+5 V @load(A)+3.3 V @load(A)POUT(W)PIN(W)Efficiency
202.501.9894.840.9683.330.695409.77451.3890.78%
202.501.7514.840.9683.330.695361.58397.7090.92%
202.501.5014.840.9683.330.695310.95341.3991.08%
202.501.2514.840.9683.330.695260.33285.8691.07%
202.501.0004.840.9683.330.695209.50230.9690.71%
202.530.7514.840.9683.330.695159.10176.6390.08%
202.530.5004.840.9683.330.695108.26122.6288.29%
202.530.2504.840.9683.330.69557.6369.0483.48%
202.560.1504.840.2933.330.30932.8341.1479.80%
202.670.0514.840.2933.330.30912.7820.3462.85%
= 115 V
IN
AC
Table 2.Efficiency measurements @VIN = 230 V
+200 V@load(A)+5 V @load(A)+3.3 V @load(A)POUT(W)PIN(W)Efficiency
202.501.9874.840.9683.330.695409.37437.7993.51%
202.501.7504.840.9683.330.695361.37386.9093.40%
202.501.5004.840.9683.330.695310.75333.3393.23%
202.501.2504.840.9683.330.695260.12279.6593.02%
202.501.0004.840.9683.330.695209.50226.6892.42%
202.500.7504.840.9683.330.695158.87174.1091.25%
202.530.5004.840.9683.330.695108.26121.5489.08%
202.530.2504.840.9683.330.69557.6368.9683.57%
202.540.1504.840.2933.330.30932.8341.8078.54%
202.670.0504.840.2933.330.30912.5819.8663.35%
AC
11/35
Page 12
Electrical test resultsAN2492
Figure 11. Overall efficiency versus input mains voltage at various output power
levels
400W200W70W
Eff[%]
94%
93%
92%
91%
90%
89%
88%
87%
86%
85%
80120160200240280
Vin [Vrms]
2.3 Resonant stage operating waveforms
Figure 12. shows some waveforms during steady state operation of the resonant circuit at
full load. The Ch1 waveform is the half-bridge square voltage on Pin 14 of L6599, driving the
resonant circuit. In the picture it is not evident, but the switching frequency is normally
slightly modulated following the PFC pre-regulator 100-Hz ripple that is rejected by the
resonant control circuitry. The Ch2 waveform represents the transformer primary current
flowing into the resonant tank. As shown, it has almost a sinusoidal shape. The resonant
tank has been designed (following the procedure presented in the application note AN2450)
to operate at a resonance frequency of about 120 kHz when the dc input voltage of the halfbridge circuit is at 390 V (that is the nominal output voltage of the PFC stage).
The resonant frequency has been selected at approximately 120 kHz in order to have a
good trade off between transformer losses and dimensions.
The resonant tank circuit has been designed in order to have a good margin for ZVS
operation, providing good efficiency, while the almost sinusoidal current waveform allows for
an extremely low EMI generation.
Figure 13. and Figure 14. shows the same waveforms as Figure 12, when the +200 V output
is at a light load (about 30 W) or not loaded at all. These two graphics demonstrate the
ability of the converter to operate down to zero load, with the output voltage still within the
regulation range. The resonant tank current has a triangular shape and represents the
magnetizing current flowing into the transformer primary side. The oscillation superimposed
on the tank current depends on the occurrence of a further resonance due to the parallel of
the inductances at primary side (the series and shunt inductances in the APR (all primary
referred) transformer model presented in AN2450) and the undesired secondary side
capacitance reflected at the transformer primary side.
12/35
Page 13
AN2492Electrical test results
Figure 12. Resonant circuit primary side waveforms at full load
Ch1: half-bridge square
voltage on pin 14 of L6599
Ch2: resonant tank current
Ch3: low side MOSFET
drive signal
Figure 13. Resonant circuit primary side waveforms at light load (about 30 W output
power)
Ch1: half-bridge square
voltage on pin 14 of L6599
Ch2: resonant tank current
Ch3: low side MOSFET
drive signal
13/35
Page 14
Electrical test resultsAN2492
Figure 14. Resonant circuit primary side waveforms at no load condition
Ch1: half-bridge square
voltage on pin 14 of L6599
Ch2: resonant tank current
Ch3: low side MOSFET
drive signal
In Figure 15., waveforms relevant to the secondary side are represented. In particular, the
waveform Ch1 is the voltage of D8A anode referenced to the secondary ground potential,
while the waveform CH3 shows the current flowing into D8A-D10B diodes. Also this current
waveform (like the one flowing into the resonant tank at the transformer primary side) has
almost a sine shape, and its average value is one half the output average current.
Thanks to the advantages of the resonant converter, the high frequency noise on the output
voltages is less than 50 mV, while the residual ripple at twice the mains frequency (100 Hz)
is about 150 mV at maximum load and worse line condition (90 V
), as shown in Figure 16.
AC
Figure 15. Resonant circuit secondary side waveforms: +200 V output
Ch1: anode voltage of diode D8A
Ch2: current into diode D8A
14/35
Page 15
AN2492Electrical test results
Figure 16. Low frequency (100 Hz) ripple voltage on the +200 V output
Ch2: resonant tank current
envelope
Ch3: +200 V output voltage
ripple at 100 Hz
Figure 17. shows the dynamic behavior of the converter during a load variation from 20% to
100% on the +200 V output. This figure also highlights the induced effect of this load change
on the PFC pre-regulator output voltage (+400 V on Ch1 track). Both the transitions (from
20% to 100% and from 100% to 20%) are clean and do not show any problem for the output
voltage regulation.
This shows that the proposed architecture is also highly suitable for power supplies
operating with strong load variation without any problems related to the load regulation.
Figure 17. Load transition (0.4 A - 2 A) on +200 V output voltage
Ch1: PFC output voltage
Ch2: resonant tank current
envelope
Ch3: +200 V output voltage
ripple
2.4 Stand-by and no-load power consumption
The board is specifically designed for light load and zero load operations, typical conditions
occurring during Stand-by or Power-off operations, when no power is requested from the
15/35
Page 16
Electrical test resultsAN2492
+200 V output. Though the resonant converter can operate down to zero load, some actions
are required to keep the input power drawn from the mains very low when the complete
system is in this load condition. Thus, when entering this power management mode, the STBY signal needs to be set high (by the microcontroller of the system). This forces the PFC
pre-regulator and the resonant stage to switch off, because the supply voltage of the two
control ICs is no longer present (Figure 3) and only the auxiliary flyback converter continues
working just to supply the microprocessor circuitry.
Table 3. and Table 4. show the measurements of the input power in several light load
conditions at 115 and 230 V
. These tables show that at no-load the input power is about
AC
0.5 W.
Table 3.Stand-by consumption at VIN = 115 V
+5 V @load(A) +3.3 V @load(A) POUT(W) PIN(W)
5.06 - 0.017 3.33 - 0.102 0.425 0.860
5.04 - 0.0173.33 - 0.079 0.349 0.750
4.98 - 0.0173.33 - 0.046 0.238 0.581
4.90 - 0.0173.33 - 0.024 0.163 0.475
4.47 - 0.000 3.33 - 0.000 0.00 0.245
Table 4.Stand-by consumption at VIN = 230 V
+5 V @load(A) +3.3 V @load(A) POUT(W) PIN(W)
5.06 - 0.017 3.33 - 0.102 0.425 1.156
5.04 - 0.0173.33 - 0.079 0.349 1.044
4.98 - 0.0173.33 - 0.046 0.238 0.870
4.90 - 0.0173.33 - 0.024 0.163 0.755
4.47 - 0.000 3.33 - 0.000 0.00 0.510
2.5 Short-circuit protection
AC
AC
The L6599 is equipped with a current sensing input (pin 6, ISEN) and a dedicated
overcurrent management system. The current flowing in the circuit is detected (through the
not dissipative sensing circuit already mentioned in Chapter 1, mainly based on a capacitive
divider formed by the resonant capacitor C28 and the capacitor C34, followed by an
integration cell D12, R45, C39) and the signal is fed into the ISEN pin. This is internally
connected to the input of a first comparator, referenced to 0.8 V, and to that of a second
comparator referenced to 1.5 V. If the voltage externally applied to the ISEN pin exceeds 0.8
V, the first comparator is tripped causing an internal switch to be turned on discharging the
soft-start capacitor CSS.
For output short-circuits, this operation results in a nearly constant peak primary current.
The designer can externally program the maximum time (t
to run overloaded or under short-circuit conditions. Overloads or shortcircuits lasting less
than t
duration phenomena. If, instead, t
16/35
will not cause any other action, hence providing the system with immunity to short
SH
is exceeded, an overload protection (OLP) procedure is
SH
) that the converter is allowed
SH
Page 17
AN2492Electrical test results
activated that shuts down the device and, in case of continuous overload/short circuit,
results in continuous intermittent operation with a user-defined duty cycle. This function is
accomplished by the DELAY pin 2 of the resonant controller, by means of the capacitor C24
and the parallel resistor R37 connected to ground. As the voltage on the ISEN pin exceeds
0.8V, the first OCP comparator, in addition to discharging CSS, turns on an internal current
generator that via the DELAY pin charges C24. As the voltage on C24 reaches 3.5 V, the
L6599 stops switching and the internal generator is turned off, so that C24 will now be slowly
discharged by R37. The IC will restart when the voltage on C24 becomes less than 0.3 V.
Additionally, if the voltage on the ISEN pin reaches 1.5 V for any reason (e.g. transformer
saturation), the second comparator will be triggered, the device will shut down and the
operation will be resumed after an on-off cycle. Figure 18.illustrates the short-circuit
protection sequence described above. The on-off operation is controlled by the voltage on
pin 2 (DELAY), providing for the hiccup mode of the circuit. Thanks to this control pin, the
designer can select the hiccup mode timing and thus keep the average output current at a
safe level.
Figure 18. +200 V output short-circuit waveforms
2.6 Overvoltage protection
Both the PFC pre-regulator and the resonant converter are equipped with their own
overvoltage protection circuit. The PFC controller is internally equipped with a dynamic and
a static overvoltage protection circuit sensing the current flowing through the error amplifier
compensation network and entering in the COMP pin (#2). When this current reaches about
18 µA, the output voltage of the multiplier is forced to decrease, thus reducing the energy
drawn from the mains. If the current exceeds 20 µA, the OVP is triggered (Dynamic OVP),
and the external power transistor is switched off until the current falls approximately below 5
µA. However, if the overvoltage persists (e.g. in case the load is completely disconnected),
the error amplifier will eventually saturate low, triggering an internal comparator (Static OVP)
that will keep the external power switch turned off until the output voltage comes back close
to the regulated value. Moreover, in the L6563 there is additional protection against loop
failures using an additional divider (R5, R7, R9, R16 and R25) connected to a dedicated pin
(PFC_OK, Pin 7) protecting the circuit in case of loop failures, disconnection, or deviation
from the nominal value of the feedback loop divider. Hence the PFC output voltage is always
Ch1: half-bridge voltage on pin
14
Ch2: + 200 V output current
Ch3: pin 6 (ISEN)
Ch4: pin 2 (DELAY)
17/35
Page 18
Thermal testsAN2492
under control and if a fault condition is detected, the PFC_OK circuitry will latch the PFC
operation and, by means of the PWM_LATCH pin 8 it will also latch the L6599 via the DIS
pin of the resonant controller.
The OVP circuit (see Figure 3) for the output voltages of the resonant converter uses a
resistive divider (R75, R76, R80) and the zener diode D21 to sense the +200 V output: if the
sensed voltage exceeds the threshold imposed by the zener diode plus the VBE of Q10, the
transistor Q9 starts conducting and the optocoupler U8 opens Q7, so that the VAUX supply
voltage of the controller ICs L6563 and L6599 is no longer available. This state is latched
until a mains voltage recycle occurs.
3 Thermal tests
In order to check design reliability, a thermal mapping by an IR Camera was performed.
Figure 19. and Figure 20. show the thermal measurements of the board, component side, at
nominal input voltage. The correlation between measurement points and components is
indicated for both diagrams in Table 5.
All other board components work well within the temperature limits, assuring a reliable long
term operation of the power supply.
Note that the temperatures of L4 and T1 have been measured both on the ferrite core (Fe)
and on the copper winding (Cu).
Table 5.Key components temperature at nominal voltages and full load
PointItem230 V
AD240,3°C47,6°C
BL4-(FE)44,2°C50,5°C
CL4-(CU)46,0°C55,5°C
DQ144,5°C53,4°C
ER263,5°C73,0°C
FD346,1°C51,0°C
GC839,3°C40,1°C
HQ651,4°C52,8°C
IT1-(CU)63,7°C62,6°C
JT1-(FE)51,3°C49,6°C
KU553,2°C53,4°C
LD1451,8°C52,3°C
MC3839,4°C38,5°C
NC4536,1°C35,7°C
AC
115 V
AC
OD8A44,5°C44,9°C
PR2241,4°C55,6°C
18/35
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AN2492Thermal tests
Table 5.Key components temperature at nominal voltages and full load
PointItem230 V
QD1543,3°C43,5°C
RD1642,6°C42,1°C
ST243,3°C43,6°C
Figure 19. Thermal map @115 VAC - full load
Figure 20. Thermal map at 230 V
- full load
AC
AC
115 V
AC
19/35
Page 20
Conducted emission pre-compliance testAN2492
4 Conducted emission pre-compliance test
The measurements have been taken in peak detection mode, both on LINE and on Neutral
at nominal input mains and at full load. The limits indicated on the following diagrams refer
to the EN55022 Class- B specifications (the higher limit curve is the quasi-peak limit while
the lower curve is the average limit) and the measurements show that the PSU emission is
well below the maximum allowed limit.
Figure 21. Peak measurement on LINE at 115 V
Figure 22. Peak measurement on NEUTRAL at 115 V
and full load
AC
and full load
AC
20/35
Page 21
AN2492Conducted emission pre-compliance test
Figure 23. Peak measurement on LINE at 230 VAC and full load
Figure 24. Peak measurement on NEUTRAL at 230 V
and full load
AC
21/35
Page 22
Bill of materialsAN2492
5 Bill of materials
Table 6.Bill of materials
ItemPartDescriptionSupplier
C2470 nF-X2275
C3330 nF-X2275
C4680 nF-X227 5
C5470 nF/630 VPOLYPROPYLENE CAPACITOR HIGH RIPPLE MKP R71ARCOTRONICS - EPCOS
C6470 nF/630 VPOLYPROPYLENE CAPACITOR HIGH RIPPLE MKP R71ARCOTRONICS - EPCOS
C7470 nF/630 VPOLYPROPYLENE CAPACITOR HIGH RIPPLE MKP R71ARCOTRONICS - EPCOS
C8330 µF/450 VALUMINIUM ELCAP USC SERIES 85 DEG SNAP-INRUBYCON
C92 nF2-Y1400
C102 nF2-Y1250
C112 nF2-Y1250
C12100 nF50 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C1310 µF/50 VALUMINIUM ELCAP GENERAL PURPOSE 85 DEGRUBYCON
C14100 nF50 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C15100 pF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C161 µF25 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C17220 pF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C18330 pF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C1910 nF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C20470 nF50 V 1206 SMD CERCAP GENERAL PURPOSEAVX
V
X2 SAFETY CAPACITOR MKP R46ARCOTRONICS
AC
V
X2 SAFETY CAPACITOR MKP R46ARCOTRONICS
AC
V
X2 SAFETY CAPACITOR MKP R46ARCOTRONICS
AC
V
Y1 SAFETY CERAMIC DISK CAPACITORMURATA
AC
V
Y1 SAFETY CERAMIC DISK CAPACITORMURATA
AC
V
Y1 SAFETY CERAMIC DISK CAPACITORMURATA
AC
C212 nF2100 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C2210 nF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C234 µF716 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C24470 nF25 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C2522 µF/250 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C26270 pF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C27100 nF50 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C2847 nF/630 VPOLYPROPYLENE CAPACITOR HIGH RIPPLE PHE450RIFA-EVOX
C29100 µF/250 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C30100 µF/250 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C3110 µF/50 VALUMINIUM ELCAP GENERAL PURPOSE 85 DEGRUBYCON
C32100 nF50 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C334 nF7100 V 1206 SMD CERCAP GENERAL PURPOSEAVX
22/35
Page 23
AN2492Bill of materials
Table 6.Bill of materials (continued)
ItemPartDescriptionSupplier
C34220 pF/630 VPOLYPROPYLENE CAPACITOR HIGH RIPPLE PFRRIFA-EVOX
C37100 µF/250 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C38100 µF/250 V ALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C391 µF025 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C4010 nF100 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C4110 µF/50 VALUMINIUM ELCAP GENERAL PURPOSE 85 DEGRUBYCON
C4447 nF100 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C451000 µF/10 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C46100 µF/10 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C471000 µF/10 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C4810 µF/50 VALUMINIUM ELCAP GENERAL PURPOSE 85 DEGRUBYCON
C49100 µF/10 VALUMINIUM ELCAP YXF SERIES 105 DEGRUBYCON
C5010 µF/50 VALUMINIUM ELCAP GENERAL PURPOSE 85 DEGRUBYCON
C51100 nF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C5247 nF100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C532 nF2100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C54100 nF50 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C5510 µF/50 VALUMINIUM ELCAP GENERAL PURPOSE 85 DEGRUBYCON
C56100 nF50 V 1206 SMD CERCAP GENERAL PURPOSEAVX
C571 nF0100 V 0805 SMD CERCAP GENERAL PURPOSEAVX
C5810 nF50 V X7R STANDARD CERAMIC CAPACITORAVX
C5947 nF/250 VPOLCAP PHE426 SERIESRIFA-EVOX
C60470 nF25 V 1206 SMD CERCAP GENERAL PURPOSEVISHAY
D11N5406GENERAL PURPOSE RECTIFIERVISHAY
D2D15XB60SINGLE PHASE BRIDGE RECTIFIERSHINDENGEN
D3STTH8R06TO220FP ULTRAFAST HIGH VOLTAGE RECTIFIERSTMicroelectronics
D4LL4148MINIMELF FAST SWITCHING DIODEVISHAY
D5LL4148MINIMELF FAST SWITCHING DIODEVISHAY
D6LL4148MINIMELF FAST SWITCHING DIODEVISHAY
D7LL4148MINIMELF FAST SWITCHING DIODEVISHAY
D8ASTTH803TO220FP ULTRAFAST HIGH VOLTAGE RECTIFIERSTMicroelectronics
D8BSTTH803TO220FP ULTRAFAST HIGH VOLTAGE RECTIFIERSTMicroelectronics
D9LL4148MINIMELF FAST SWITCHING DIODEVISHAY
D10ASTTH803TO220FP ULTRAFAST MEDIUM VOLTAGE RECTIFIERSTMicroelectronics
D10BSTTH803TO220FP ULTRAFAST MEDIUM VOLTAGE RECTIFIERSTMicroelectronics
– Cross references updated
– Table 6: Bill of materials modified
34/35
Page 35
AN2492
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