Page 1
High Accuracy 8-Pin
a
FEATURES
Low Offset Voltage: 100 mV max
Low Drift: 2 mV/8C max
Wide Gain Range 1 to 10,000
High Common-Mode Rejection: 115 dB min
High Bandwidth (G = 1000): 200 kHz typ
Gain Equation Accuracy: 0.5% max
Single Resistor Gain Set
Input Overvoltage Protection
Low Cost
Available In Die Form
APPLICATIONS
Differential Amplifier
Strain Gauge Amplifier
Thermocouple Amplifier
RTD Amplifier
Programmable Gain Instrumentation Amplifier
Medical Instrumentation
Data Acquisition Systems
Instrumentation Amplifier
AMP02
PIN CONNECTIONS
Epoxy Mini-DIP 16-Pin SOL
(P Suffix) (S Suffix)
and
Cerdip
(Z Suffix)
NC = NO CONNECT
GENERAL DESCRIPTION
The AMP02 is the first precision instrumentation amplifier
available in an 8-pin package. Gain of the AMP02 is set by a
single external resistor, and can range from 1 to 10,000. No
gain set resistor is required for unity gain. The AMP02 includes
an input protection network that allows the inputs to be taken
60 V beyond either supply rail without damaging the device.
Laser trimming reduces the input offset voltage to under 100 µV.
Output offset voltage is below 4 mV and gain accuracy is better
than 0.5% for gain of 1000. PMI’s proprietary thin-film resistor
process keeps the gain temperature coefficient under 50 ppm/°C.
Due to the AMP02’s design, its bandwidth remains very high
over a wide range of gain. Slew rate is over 4 V/µs making the
AMP02 ideal for fast data acquisition systems.
Figure 1. Basic Circuit Connections
A reference pin is provided to allow the output to be referenced
to an external dc level. This pin may be used for offset correction or level shifting as required. In the 8-pin package, sense is
internally connected to the output.
For an instrumentation amplifier with the highest precision,
consult the AMP01 data sheet. For the highest input impedance
and speed, consult the AMP05 data sheet.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
Page 2
AMP02–SPECIFICA TIONS
ELECTRICAL CHARACTERISTICS
(@ VS = 615 V, VCM = 0 V, TA = +258C, unless otherwise noted.)
AMP02E AMP02F
Parameter Symbol Conditions Min Typ Max Min Typ Max Units
OFFSET VOLTAGE
Input Offset Voltage V
Input Offset Voltage Drift TCV
Output Offset Voltage V
Output Offset Voltage Drift TCV
Power Supply Rejection PSR VS = ±4.8 V to ±18 V
IOS
IOS
OOS
OOS
TA = +25°C 20 100 40 200 µV
–40°C ≤ TA ≤ +85°C 50 200 100 350 µV
–40°C ≤ TA ≤ +85°C 0.5 2 1 4 µV/°C
TA = +25°C1428mV
–40°C ≤ TA ≤ +85°C410920mV
–40°C ≤ TA ≤ +85°C 50 100 100 200 µV/°C
G = 100, 1000 115 125 110 115 dB
G = 10 100 110 95 100 dB
G = 1 80 90 75 80 dB
VS = ±4.8 V to ±18 V
–40°C ≤ TA ≤ +85°C
G = 1000, 100 110 120 105 110 dB
G = 10 95 110 90 95 dB
G = 1 75 90 70 75 dB
INPUT CURRENT
Input Bias Current I
Input Bias Current Drift TCI
Input Offset Current I
Input Offset Current Drift TCI
B
OS
B
OS
TA = +25°C210420nA
–40°C ≤ TA ≤ +85°C 150 250 pA/°C
TA = +25°C 1.2 5 2 10 nA
–40°C ≤ TA ≤ +85°C 9 15 pA/ °C
INPUT
Input Resistance R
IN
Differential, G ≤ 1000 10 10 GΩ
Common-Mode, G = 1000 16.5 16.5 GΩ
Input Voltage Range IVR TA = +25°C (Note 1) ±11 ±11 V
Common-Mode Rejection CMR V
= ±11 V
CM
G = 1000, 100 115 120 110 115 dB
G = 10 100 115 95 110 dB
G = 1 80 95 75 90 dB
VCM = ±11 V
–40°C ≤ TA ≤ +85°C
G = 100, 1000 110 120 105 115 dB
G = 10 95 110 90 105 dB
G = 1 75 90 70 85 dB
GAIN
Gain Equation G = 1000 0.50 0.70 %
Accuracy G =
50 kΩ
+1 G = 100 0.30 0.50 %
R
G
G = 10 0.25 0.40 %
G = 1 0.02 0.05 %
Gain Range G 1 10k 1 10k V/V
Nonlinearity G = 1 to 1000 0.006 0.006 %
Temperature Coefficient G
TC
1 ≤ G ≤ 1000 (Notes 2, 3) 20 50 20 50 ppm/°C
OUTPUT RATING
Output Voltage Swing V
OUT
Positive Current Limit Output-to-Ground Short 22 22 mA
TA = +25°C, RL = 1 kΩ±12 ±13 ±12 ±13 V
R
= 1 kΩ, –40°C ≤ TA ≤ +85°C ±11 ±12 ±11 ±12 V
L
Negative Current Limit Output-to-Ground Short 32 32 mA
NOISE
Voltage Density, RTI e
n
fO = 1 kHz
G = 1000 9 9 nV/√Hz
G = 100 10 10 nV/√Hz
G = 10 18 18 nV/√Hz
G = 1 120 120 nV/√Hz
Noise Current Density, RTI i
Input Noise Voltage en p-p 0.1 Hz to 10 Hz
n
fO = 1 kHz, G = 1000 0.4 0.4 pA/√Hz
G = 1000 0.4 0.4 µV p-p
G = 100 0.5 0.5 µV p-p
G = 10 1.2 1.2 µV p-p
DYNAMIC RESPONSE
Small-Signal Bandwidth BW G = 1 1200 1200 kHz
(–3 dB) G = 10 300 300 kHz
G = 100, 1000 200 200 kHz
Slew Rate SR G = 10, RL = 1 kΩ 46 4 6 V/µs
Settling Time t
S
To 0.01% ±10 V Step
G = 1 to 1000 10 10 µs
SENSE INPUT
Input Resistance R
Voltage Range ± 11 ±11 V
IN
25 25 kΩ
REFERENCE INPUT
Input Resistance R
Voltage Range ± 11 ± 11 V
IN
50 50 kΩ
Gain to Output 1 1 V/V
–2–
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AMP02
AMP02E AMP02F
Parameter Symbol Conditions Min Typ Max Min Typ Max Units
POWER SUPPLY
Supply Voltage Range V
Supply Current I
NOTES
1
Input voltage range guaranteed by common-mode rejection test.
2
Guaranteed by design.
3
Gain tempco does not include the effects of external component drift.
Specifications subject to change without notice.
S
SY
TA = +25°C5656mA
–40°C ≤ TA ≤ +85°C5656mA
±4.5 ±18 ±4.5 ±18 V
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Common-Mode Input Voltage .[(V–) – 60 V] to [(V+) + 60 V]
Differential Input Voltage . . . .[(V–) – 60 V] to [(V+) + 60 V]
Output Short-Circuit Duration . . . . . . . . . . . . . . .Continuous
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Function Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300°C
ORDERING GUIDE
V
max @ V
Model TA = +258CTA = +258C Range Description
AMP02EP 100 µV 4 mV –40°C to +85°C 8-Pin Plastic DIP
AMP02FP 200 µV 8 mV –40°C to +85°C 8-Pin Plastic DIP
AMP02AZ/883C 200 µV 10 mV –55°C to +125°C 8-Pin Cerdip
AMP02FS 200 µV 8 mV –40°C to +85°C 16-Pin SOIC
AMP02GBC Die
AMP02FS-REEL 200 µV 8 mV –40°C to +85°C 16-Pin SOIC
IOS
max @ Temperature Package
OOS
Package Type u
2
JA
u
JC
Units
8-Pin Plastic DIP (P) 96 37 °C/W
16-Pin SOL (S) 92 27 °C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless oth-
erwise noted.
2
θJA is specified for worst case mounting conditions, i.e., θJA is specified for de-
vice in socket for P-DIP package; θJA is specified for device soldered to printed
circuit board for SOL package.
REV. D
Figure 2. Simplified Schematic
–3–
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AMP02
WARNING!
ESD SENSITIVE DEVICE
DIE SIZE 0.103 X 0.116 inch, 11,948 sq. mils
(2.62 X 2.95 mm, 7.73 sq. mm)
Dice Characteristics
1. RG
1
2. –IN
3. +IN
4. V–
5. REFERENCE
6. OUT
7. V+
8. RG
2
9. SENSE
CONNECT SUBSTRATE TO V–
WAFER TEST LIMITS
at VS = 615 V, VCM = 0 V, TA = +258C, unless otherwise noted.
AMP02 GBC
Parameter Symbol Conditions Limits Units
Input Offset Voltage V
Output Offset Voltage V
IOS
OOS
V
= ±4.8 V to ±18 V
S
200 µV max
8 mV max
G = 1000 110
Power Supply PSR G = 100 110 dB min
Rejection G = 10 95
G = 1 75
Input Bias Current I
Input Offset Current I
B
OS
20 nA max
10 nA max
Input Voltage Range IVR Guaranteed by CMR Tests ±11 V min
V
= ±11 V
CM
G = 1000 110
Common-Mode CMR G = 100 110 dB min
Rejection G = 10 95
G = 1 75
50 kΩ
Gain Equation Accuracy
Output Voltage Swing V
Supply Current I
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
OUT
SY
G =
RL = 1 kΩ±12 V min
R
G
+1, G = 1000
0.7 % max
6 mA max
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AMP02 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
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T ypical Performance Characteristics–AMP02
Figure 3. Typical Distribution of
Input Offset Voltage
Figure 6. Typical Distribution of
Output Offset Voltage
Figure 4. Typical Distribution
of TCV
Figure 7. Typical Distribution
of TCV
IOS
OOS
Figure 5. Input Offset Voltage
Change vs. Supply Voltage
Figure 8. Output Offset Voltage
Change vs. Supply Voltage
Figure 9. Input Offset Current
vs. Temperature
REV. D
Figure 10. Input Bias Current
vs. Temperature
–5–
Figure 11. Input Bias Current
vs. Supply Voltage
Page 6
AMP02
Figure 12. Closed-Loop Voltage
Gain vs. Frequency
Figure 15. Positive PSR vs. Frequency
Figure 13. Common-Mode Rejection
vs. Frequency
Figure 16. Negative PSR vs. Frequency
Figure 14. Common-Mode Rejection
vs. Voltage Gain
Figure 17. Total Harmonic Distortion
vs. Frequency
Figure 18. Voltage Noise Density
vs. Frequency
Figure 19. RTI Voltage Noise
Density vs. Gain
–6–
Figure 20. 0.1 Hz to 10 Hz Noise
= 1000
A
V
REV. D
Page 7
AMP02
Figure 21. Maximum Output Swing
vs. Frequency
Figure 24. Supply Current
vs. Supply Voltage
Figure 22. Maximum Output Voltage
vs. Load Resistance
Figure 25. Slew Rate vs.
Voltage Gain
Figure 23. Closed Loop Output
Impedance vs. Frequency
REV. D
–7–
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AMP02
APPLICATIONS INFORMATION
INPUT AND OUTPUT OFFSET VOLTAGES
Instrumentation amplifiers have independent offset voltages
associated with the input and output stages. The input offset
component is directly multiplied by the amplifier gain, whereas
output offset is independent of gain. Therefore, at low gain,
output-offset-errors dominate, while at high gain, input-offseterrors dominate. Overall offset voltage, V
put (RTO) is calculated as follows:
V
where V
IOS
and V
(RTO) = (V
OS
are the input and output offset voltage
OOS
3 G) + V
IOS
specifications and G is the amplifier gain.
The overall offset voltage drift TCV
OS
a combination of input and output drift specifications. Input
offset voltage drift is multiplied by the amplifier gain, G, and
summed with the output offset drift:
TCV
(RTO) = (TCV
where TCV
OS
is the input offset voltage drift, and TCV
IOS
IOS
the output offset voltage drift. Frequently, the amplifier drift is
referred back to the input (RTI) which is then equivalent to an
input signal change:
TCV
(RTI) =TCV
OS
IOS
For example, the maximum input-referred drift of an
AMP02EP set to G = 1000 becomes:
, referred to the out-
OS
OOS
, referred to the output, is
3 G) + TCV
TCV
+
OOS
is
OOS
OOS
G
The voltage gain can range from 1 to 10,000. A gain set resistor
is not required for unity-gain applications. Metal-film or wirewound resistors are recommended for best results.
The total gain accuracy of the AMP02 is determined by the tolerance of the external gain set resistor, R
, combined with the
G
gain equation accuracy of the AMP02. Total gain drift combines the mismatch of the external gain set resistor drift with
that of the internal resistors (20 ppm/°C typ). Maximum gain
drift of the AMP02 independent of the external gain set resistor
is 50 ppm/°C.
All instrumentation amplifiers require attention to layout so
thermocouple effects are minimized. Thermocouples formed between copper and dissimilar metals can easily destroy the
TCV
performance of the AMP02 which is typically
OS
0.5 µV/°C. Resistors themselves can generate thermoelectric
EMFs when mounted parallel to a thermal gradient.
The AMP02 uses the triple op amp instrumentation amplifier
configuration with the input stage consisting of two transimpedance amplifiers followed by a unity-gain differential amplifier.
The input stage and output buffer are laser-trimmed to increase
gain accuracy. The AMP02 maintains wide bandwidth at all
gains as shown in Figure 26. For voltage gains greater than 10,
the bandwidth is over 200 kHz. At unity-gain, the bandwidth of
the AMP02 exceeds 1 MHz.
TCV
(RTI) = 2 µV/°C +
OS
INPUT BIAS AND OFFSET CURRENTS
100 µV /°C
1000
= 2.1 µV/°C
Input transistor bias currents are additional error sources which
can degrade the input signal. Bias currents flowing through the
signal source resistance appear as an additional offset voltage.
Equal source resistance on both inputs of an IA will minimize
offset changes due to bias current variations with signal voltage
and temperature. However, the difference between the two bias
currents, the input offset current, produces an error. The magnitude of the error is the offset current times the source resistance.
A current path must always be provided between the differential
inputs and analog ground to ensure correct amplifier operation.
Floating inputs, such as thermocouples, should be grounded
close to the signal source for best common-mode rejection.
GAIN
The AMP02 only requires a single external resistor to set the
voltage gain. The voltage gain, G, is:
50kΩ
G =
+1
R
G
and
50kΩ
R
=
G
G –1
Figure 26. The AMP02 Keeps Its Bandwidth at
High Gains
COMMON-MODE REJECTION
Ideally, an instrumentation amplifier responds only to the difference between the two input signals and rejects common-mode
voltages and noise. In practice, there is a small change in output
voltage when both inputs experience the same common-mode
voltage change; the ratio of these voltages is called the commonmode gain. Common-mode rejection (CMR) is the logarithm
of the ratio of differential-mode gain to common-mode gain, expressed in dB. Laser trimming is used to achieve the high CMR
of the AMP02.
–8–
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Page 9
Figure 27. Triple Op Amp Topology of the AMP02
AMP02
Figure 27 shows the triple op amp configuration of the AMP02.
With all instrumentation amplifiers of this type, it is critical not
to exceed the dynamic range of the input amplifiers. The amplified differential input signal and the input common-mode voltage must not force the amplifier’s output voltage beyond ±12 V
(V
= ±15 V) or nonlinear operation will result.
S
The input stage amplifier’s output voltages at V, and V
2R
V
D
2
2R
R
R
G
+V
G
+V
V
CM
D
+V
CM
2
CM
D
+V
CM
2
=
V
1
=
V2=
=
–1+
–G
1+
V
G
V
D
2
equals:
2
where
= Differential input voltage
V
D
= (+IN) – (–IN)
= Common-mode input voltage
V
CM
G = Gain of instrumentation amplifier
and V2 can equal ±12 V maximum, then the
If V
1
common-mode input voltage range is:
CMVR =
±
12V –
GV
D
2
GROUNDING
The majority of instruments and data acquisition systems the
separate grounds for analog and digital signals. Analog ground
may also be divided into two or more grounds which will be tied
together at one point, usually the analog power-supply ground.
In addition, the digital and analog grounds may be joined, normally at the analog ground pin on the A to D converter. Follow
this basic practice is essential for good circuit performance.
Mixing grounds causes interactions between digital circuits and
the analog signals. Since the ground returns have finite resistance and inductance, hundreds of millivolts can be develop between the system ground and the data acquisition components.
Using separate ground returns minimizes the current flow in the
sensitive analog return path to the system ground point. Consequently, noisy ground currents from logic gates do interact with
the analog signals.
Inevitably, two or more circuits will be joined together with their
grounds at differential potentials. In these situations, the differential input of an instrumentation amplifier, with its high CMR,
can accurately transfer analog information from one circuit to
another.
SENSE AND REFERENCE TERMINALS
The sense terminal completes the feedback path for the instrumentation amplifier output stage and is internally connected
directly to the output. For SOL devices, connect the sense
terminal to the output. The output signal is specified with respect to the reference terminal, which is normally connected to
analog ground. The reference may also be used for offset correction level shifting. A reference source resistance will reduce the
common-mode rejection by the ratio of 25 kΩ/R
. If the refer-
REF
ence source resistance is 1 Ω, then the CMR will be reduced
88 dB (25 kΩ/1 Ω = 88 dB).
REV. D
–9–
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AMP02
OVERVOLTAGE PROTECTION
Instrumentation amplifiers invariably sit at the front end of instrumentation systems where there is a high probability of exposure to overloads. Voltage transients, failure of a transducer, or
removal of the amplifier power supply while the signal source is
connected may destroy or degrade the performance of an unprotected device. A common technique used is to place limiting resistors in series with each input, but this adds noise. The
AMP02 includes internal protection circuitry that limits the input current to ±4 mA for a 60 V differential overload (see Figure
28) with power off, ±2.5 mA with power on.
POWER SUPPLY CONSIDERATIONS
Achieving the rated performance of precision amplifiers in a
practical circuit requires careful attention to external influences.
For example, supply noise and changes in the nominal voltage
directly affect the input offset voltage. A PSR of 80 dB means
that a change of 100 mV on the supply, not an uncommon
value, will produce a 10 µV input offset change. Consequently,
care should be taken in choosing a power unit that has a low
output noise level, good line and load regulation, and good temperature stability. In addition, each power supply should be
properly bypassed.
Figure 28. AMP02’s Input Protection Circuitry Limits Input
Current During Overvoltage Conditions
–10–
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Page 11
0.210 (5.33)
16 9
81
0.4133 (10.50)
0.3977 (10.00)
0.4193 (10.65)
0.3937 (10.00)
0.2992 (7.60)
0.2914 (7.40)
PIN 1
SEATING
PLANE
0.0118 (0.30)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.1043 (2.65)
0.0926 (2.35)
0.0500
(1.27)
BSC
0.0125 (0.32)
0.0091 (0.23)
0.0500 (1.27)
0.0157 (0.40)
8°
0°
0.0291 (0.74)
0.0098 (0.25)
x 45°
MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Mini-Dip (N-8) Package
0.430 (10.92)
0.348 (8.84)
8
14
PIN 1
0.100
(2.54)
BSC
5
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
SEATING
PLANE
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
Cerdip (Q-8) Package
AMP02
0.195 (4.95)
0.115 (2.93)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.005 (0.13)
MIN
8
1
0.405 (10.29)
0.055 (1.4)
MAX
5
0.310 (7.87)
0.220 (5.59)
4
PIN 1
MAX
0.100
(2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.070 (1.78)
0.030 (0.76)
0.150
(3.81)
MIN
SEATING
PLANE
SOL (R-16) Package
0.320 (8.13)
0.290 (7.37)
15°
0°
0.015 (0.38)
0.008 (0.20)
REV. D
–11–
Page 12
000000000
–12–
PRINTED IN U.S.A.
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