Datasheet ADuM6400, ADuM6401, ADuM6402, ADuM6403, ADuM6404 Datasheet (ANALOG DEVICES)

Download

Page 1

Quad-Channel, 5 kV Isolators with

VOCV

Data Sheet

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

FEATURES

isoPower integrated, isolated dc-to-dc converter Regulated 5 V or 3.3 V output Up to 400 mW output power 16-lead SOIC wide body package (RW-16) 16-lead SOIC wide body package with enhanced

creepage (RI-16-1) Quad dc-to-25 Mbps (NRZ) signal isolation channels Schmitt triggered inputs High temperature operation: 105°C maximum High common-mode transient immunity: >25 kV/μs

Safety and regulatory approvals (RI-16-1 package)

UL recognition

5000 V rms for 1 minute per UL 1577

CSA Component Acceptance Notice #5A (pending)

IEC 60601-1: 250 V rms IEC 60950-1: 400 V rms

VDE certificate of conformity

DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 V

= 846 V peak

IORM

APPLICATIONS

RS-232/RS-422/RS-485 transceivers Medical isolation AC/DC power supply start-up bias and gate drives Isolated sensor interfaces

GENERAL DESCRIPTION

The ADuM6400/ADuM6401/ADuM6402/ADuM6403/

ADuM6404

an integrated, isolated dc-to-dc converter. Based on the Analog Devices, Inc., iCoupler® technology, the dc-to-dc converter provides up to 400 mW of regulated, isolated power at either 5.0 V or 3.3 V from a 5.0 V input supply, or at 3.3 V from a 3.3 V supply at the power levels shown in Table 1. These devices eliminate the need for a separate, isolated dc-to-dc converter in low power, isolated designs.

The ADuM6400/ADuM6401/ADuM6402/ADuM6403/

ADuM6404 isolators provide four independent isolation

channels in a variety of channel configurations and data rates (see the Ordering Guide for more information).

isoPower uses high frequency switching elements to transfer power through its transformer. Special care must be taken during printed circuit board (PCB) layout to meet emissions standards. See the

AN-0971 Application Note for board layout recommendations.

Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

are quad-channel digital isolators with isoPower®,

Integrated DC-to-DC Converter

FUNCTIONAL BLOCK DIAGRAMS

OSC

4-CHANNEL iCOUPLER CORE

ADuM6400/ADuM6401/ ADuM6402/ADuM6403/

ADuM6404

ADuM6400

GND VIA/V VIB/V VIC/V VID/V

GND

DD1

DDL

Figure 2. ADuM6400

ADuM6401

Figure 3. ADuM6401

ADuM6402

Figure 4. ADuM6402

ADuM6403

Figure 5. ADuM6403

ADuM6404

Figure 6. ADuM6404

Table 1. Power Levels

Input Voltage Output Voltage Output Power

5.0 V 5.0 V 400 mW

5.0 V 3.3 V 330 mW

3.3 V 3.3 V 132 mW

Figure 1.

RECT

REG

ISO

GND

ISO

VIA/V

VIB/V

VIC/V

VID/V

SEL

GND

ISO

08141-002

08141-003

08141-004

08141-005

08141-006

08141-001

Page 2

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

Features .............................................................................................. 1

Applications ....................................................................................... 1 

General Description ......................................................................... 1

Functional Block Diagrams ............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics—5 V Primary Input Supply/

5 V Secondary Isolated Supply ................................................... 3

Electrical Characteristics—3.3 V Primary Input Supply/

3.3 V Secondary Isolated Supply ................................................ 5

Electrical Characteristics—5 V Primary Input Supply/

3.3 V Secondary Isolated Supply ................................................ 6

Package Characteristics ............................................................... 8

Regulatory Information ............................................................... 9

Insulation and Safety-Related Specifications ............................ 9

Insulation Characteristics .......................................................... 10

Recommended Operating Conditions .................................... 10

Absolute Maximum Ratings .......................................................... 11

ESD Caution ................................................................................ 11



Pin Configurations and Function Descriptions ......................... 12

Truth Table .................................................................................. 16

Typical Performance Characteristics ........................................... 17

Terminology .................................................................................... 20

Applications Information .............................................................. 21

PCB Layout ................................................................................. 21

Start-Up Behavior....................................................................... 21

EMI Considerations ................................................................... 22

Propagation Delay Parameters ................................................. 22

DC Correctness and Magnetic Field Immunity ..................... 22

Power Consumption .................................................................. 23

Current Limit and Thermal Overload Protection ................. 24

Power Considerations ................................................................ 24

Thermal Analysis ....................................................................... 25

Insulation Lifetime ..................................................................... 25

Outline Dimensions ....................................................................... 26

Ordering Guide .......................................................................... 27

REVISION HISTORY

4/12—Rev. 0 to Rev. A

Changes to Features Section, General Description Section,

and Table 1 ......................................................................................... 1

Changes to Table 2 and Table 3 ....................................................... 3

Changes to Endnote 1 in Table 5 .................................................... 4

Changes to Table 6 and Table 7 ....................................................... 5

Change to Propagation Delay Parameter in Table 8 .................... 5

Changes to Endnote 1 in Table 9; Changes to Table 10 ............... 6

Changes to Table 11 .......................................................................... 7

Changes to Endnote 1 in Table 13; Changes to Table 14 ............. 8

Changes to Regulatory Information Section, Table 15,

and Table 16 ....................................................................................... 9

Changes to Insulation Characteristics Section, Table 17,

and Table 18 ..................................................................................... 10

Changes to Table 20 ........................................................................ 11

Changes to Table 26 ........................................................................ 16

Changes to Figure 13, Figure 14, Figure 15, Figure 17,

and Figure 18 ................................................................................... 17

Changes to Figure 19 and Figure 20............................................. 18

Added Figure 21 and Figure 22; Renumbered

Figures Sequentially ....................................................................... 18

Added Definition of I

Changes to PCB Layout Section ................................................... 21

Added Start-Up Behavior Section ................................................ 21

Changes to EMI Considerations Section .................................... 22

Moved Propagation Delay Parameters Section .......................... 22

Changes to Power Consumption Section .................................... 23

Added Current Limit and Thermal Overload Protection

Section .............................................................................................. 24

Moved Thermal Analysis Section ................................................ 25

Changes to Insulation Lifetime Section and Figure 33 ............. 25

Updated Outline Dimensions ....................................................... 26

Changes to Ordering Guide .......................................................... 27

5/09—Revision 0: Initial Version

to Terminology Section .............. 20

ISO(LOAD)

Rev. A | Page 2 of 28

Page 3

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY

Typical specifications are at TA = 25°C, V operation range, which is 4.5 V ≤ V tested with C

= 15 pF and CMOS signal levels, unless otherwise noted.

DD1

Table 2. DC-to-DC Converter Static Specifications

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint V Line Regulation V Load Regulation V Output Ripple V Output Noise V Switching Frequency f PWM Frequency f Output Supply Current I Efficiency at I I

, No V

DD1

, Full V

ISO

34 % I

ISO(MAX)

Load I

ISO

ISO(LINE)

ISO(LOAD)

ISO(RIP)

ISO(NOISE)

OSC

PWM

ISO(MAX)

DD1(Q)

DD1(MAX)

= V

DD1

SEL

, V

≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are

SEL

ISO

4.7 5.0 5.4 V I 1 mV/V I

1 5 % I

= 5 V. Minimum/maximum specifications apply over the entire recommended

ISO

= 0 mA

ISO

= 40 mA, V

ISO

= 8 mA to 72 mA

ISO

= 4.5 V to 5.5 V

DD1

75 mV p-p 20 MHz bandwidth, CBO = 0.1 μF||10 μF, I

200 mV p-p CBO = 0.1 μF||10 μF, I

= 72 mA

ISO

180 MHz

625 kHz

80 mA V

> 4.5 V

ISO

= 80 mA

ISO

13 35 mA

290 mA

= 72 mA

ISO

Table 3. DC-to-DC Converter Dynamic Specifications

1 Mbps—A or C Grade 25 Mbps—C Grade

Parameter Symbol

Min Typ Max Min Typ Max

Unit

Test Conditions/ Comments

SUPPLY CURRENT

Input I

ADuM6400 12 64 mA No V ADuM6401 12 68 mA No V ADuM6402 13 71 mA No V ADuM6403 14 75 mA No V ADuM6404 14 78 mA No V

Available to Load I

ADuM6400

DD1(D)

ISO(LOAD)

80 69 mA

ISO

load load load load load

ADuM6401 80 67 mA ADuM6402 80 65 mA ADuM6403 80 63 mA ADuM6404 80 61 mA

Rev. A | Page 3 of 28

Page 4

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

Table 4. Switching Specifications

A Grade C Grade

Parameter Symbol

Unit

SWITCHING SPECIFICATIONS

Data Rate 1 25 Mbps Within PWD limit Propagation Delay t

, t

55 100 45 60 ns 50% input to 50% output

PHL

PLH

Pulse Width Distortion PWD 40 6 ns |t

Change vs. Temperature 5 ps/°C Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t

50 15 ns Between any two units

PSK

Channel Matching

Codirectional

Opposing Directional

7Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the

isolation barrier.

50 6 ns

PSKCD

50 15 ns

PSKOD

Table 5. Input and Output Characteristics

Parameter Symbol Min Typ Max Unit

DC SPECIFICATIONS

Logic High Input Threshold VIH 0.7 × V Logic Low Input Threshold VIL 0.3 × V Logic High Output Voltages VOH V V

− 0.3 or V

DD1

− 0.5 or V

DD1

or 0.7 × V

ISO

DD1

or 0.3 × V

ISO

− 0.3 5.0 V IOx = −20 μA, VIx = V

ISO

− 0.5 4.8 V IOx = −4 mA, VIx = V

ISO

DD1

Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 μA, VIx = V

0.2 0.4 V IOx = 4 mA, VIx = V Undervoltage Lockout UVLO V

Positive-Going Threshold V

Negative-Going Threshold V

Hysteresis V

UV+

UV−

UVH

2.7 V

2.4 V

0.3 V

Input Currents per Channel II −20 +0.01 +20 μA 0 V ≤ VIx ≤ V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient

Immunity

|CM| 25 35 kV/μs

Refresh Rate fr 1.0 Mbps

|CM | is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.7 × V

input. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

or 0.7 × V

DD1

for a high input or VO < 0.3 × V

ISO

Test Conditions/ Comments Min Typ Max Min Typ Max

− t

PHL

PLH

Test Conditions/ Comments

IxH

IxL

, V

DD1

DDL

or V

supplies

ISO

DDx

, VCM = 1000 V,

ISO

DD1

= V

transient magnitude = 800 V

or 0.3 × V

DD1

for a low

ISO

Rev. A | Page 4 of 28

Page 5

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at TA = 25°C, V recommended operation range, which is 3.0 V ≤ V specifications are tested with C

= 15 pF and CMOS signal levels, unless otherwise noted.

Table 6. DC-to-DC Converter Static Specifications

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint V Line Regulation V Load Regulation V Output Ripple V Output Noise V Switching Frequency f PWM Frequency f Output Supply Current I Efficiency at I I

, No V

DD1

, Full V

DD1

ISO

33 % I

ISO(MAX)

Load I

ISO

ISO(LINE)

ISO(LOAD)

ISO(RIP)

ISO(NOISE)

OSC

PWM

ISO(MAX)

DD1(Q)

DD1(MAX)

Table 7. DC-to-DC Converter Dynamic Specifications

Parameter Symbol

SUPPLY CURRENT

Input I

DD1(D)

ADuM6400 8 41 mA No V ADuM6401 8 44 mA No V ADuM6402 8 46 mA No V ADuM6403 9 47 mA No V ADuM6404 9 51 mA No V

Available to Load I

ADuM6400

ISO(LOAD)

ADuM6401 40 31 mA ADuM6402 40 30 mA ADuM6403 40 29 mA ADuM6404 40 28 mA

Table 8. Switching Specifications

Parameter Symbol

SWITCHING SPECIFICATIONS

Data Rate 1 25 Mbps Within PWD limit Propagation Delay t

PHL

Pulse Width Distortion PWD 40 6 ns |t

Change vs. Temperature 5 ps/°C Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t

PSK

Channel Matching

Codirectional

Opposing Directional

7Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the

isolation barrier.

PSKCD

PSKOD

= V

DD1

= 3.3 V, V

ISO

, V

DD1

3.0 3.3 3.6 V I 1 mV/V I

1 5 % I

50 mV p-p 20 MHz bandwidth, CBO = 0.1 μF||10 μF, I

130 mV p-p CBO = 0.1 μF||10 μF, I

= GND

SEL

, V

≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching

SEL

ISO

. Minimum/maximum specifications apply over the entire

ISO

= 0 mA

ISO

= 20 mA, V

ISO

= 4 mA to 36 mA

ISO

= 3.0 V to 3.6 V

DD1

= 54 mA

ISO

= 54 mA

ISO

180 MHz

625 kHz

40 mA V

> 3 V

ISO

= 40 mA

ISO

15 28 mA

175 mA

1 Mbps—A or C Grade 25 Mbps—C Grade

Unit

Test Conditions/ Comments Min Typ Max Min Typ Max

load

ISO

load

ISO

load

ISO

load

ISO

load

ISO

40 33 mA

A Grade C Grade

Unit

, t

60 100 45 65 ns 50% input to 50% output

PLH

Test Conditions/ Comments Min Typ Max Min Typ Max

− t

PLH

PHL

50 45 ns Between any two units

50 6 ns 50 15 ns

Rev. A | Page 5 of 28

Page 6

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

Table 9. Input and Output Characteristics

Test Conditions/

Parameter Symbol Min Typ Max Unit

DC SPECIFICATIONS

Logic High Input Threshold VIH 0.7 × V Logic Low Input Threshold VIL 0.3 × V Logic High Output Voltages VOH V V

− 0.2 or V

DD1

− 0.5 or V

DD1

or 0.7 × V

ISO

DD1

or 0.3 × V

ISO

− 0.2 3.3 V IOx = −20 μA, VIx = V

ISO

− 0.5 3.1 V IOx = −4 mA, VIx = V

ISO

DD1

Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 μA, VIx = V

0.0 0.4 V IOx = 4 mA, VIx = V Undervoltage Lockout UVLO V

Positive-Going Threshold V Negative-Going Threshold V Hysteresis V

UV+

UV−

UVH

2.7 V

2.4 V

0.3 V

Input Currents per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient

Immunity

|CM| 25 35 kV/μs

Refresh Rate fr 1.0 Mbps

|CM | is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.7 × V

input. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

or 0.7 × V

DD1

for a high input or VO < 0.3 × V

ISO

Comments

IxH

IxL

, V

DD1

DDL

or V

supplies

ISO

DDx

, VCM = 1000 V,

ISO

DD1

= V

transient magnitude = 800 V

or 0.3 × V

DD1

for a low

ISO

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at TA = 25°C, V recommended operation range, which is 4.5 V ≤ V Switching specifications are tested with C

Table 10. DC-to-DC Converter Static Specifications

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint V Line Regulation V Load Regulation V Output Ripple V Output Noise V Switching Frequency f PWM Frequency f Output Supply Current I Efficiency at I I

, No V

DD1

, Full V

ISO

30 % I

ISO(MAX)

Load I

ISO

ISO(LINE)

ISO(LOAD)

ISO(RIP)

ISO(NOISE)

OSC

PWM

ISO(MAX)

DD1(Q)

DD1(MAX)

= 5.0 V, V

DD1

= 15 pF and CMOS signal levels, unless otherwise noted.

3.0 3.3 3.6 V I 1 mV/V I

1 5 % I

= 3.3 V, V

ISO

≤ 5.5 V, 3.0 V ≤ V

DD1

= GND

SEL

. Minimum/maximum specifications apply over the entire

ISO

≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted.

ISO

= 0 mA

ISO

= 50 mA, V

ISO

= 10 mA to 90 mA

ISO

= 4.5 V to 5.5 V

DD1

50 mV p-p 20 MHz bandwidth, CBO = 0.1 μF||10 μF, I

130 mV p-p CBO = 0.1 μF||10 μF, I

= 90 mA

ISO

180 MHz

625 kHz

100 mA V

> 3 V

ISO

= 100 mA

ISO

11 20 mA

230 mA

= 90 mA

ISO

Rev. A | Page 6 of 28

Page 7

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

Table 11. DC-to-DC Converter Dynamic Specifications

1 Mbps—A or C Grade 25 Mbps—C Grade

Parameter Symbol

Unit

SUPPLY CURRENT

Input I

DD1(D)

ADuM6400 6 43 mA No V ADuM6401 6 44 mA No V ADuM6402 7 45 mA No V ADuM6403 7 46 mA No V ADuM6404 7 47 mA No V

Available to Load I

ADuM6400

ISO(LOAD)

100 93 mA ADuM6401 100 92 mA ADuM6402 100 91 mA ADuM6403 100 89 mA ADuM6404 100 88 mA

Table 12. Switching Specifications

A Grade C Grade

Parameter Symbol

Unit

SWITCHING SPECIFICATIONS

Data Rate 1 25 Mbps Within PWD limit Propagation Delay t

, t

60 100 45 60 ns 50% input to 50% output

PHL

PLH

Pulse Width Distortion PWD 40 6 ns |t

Change vs. Temperature 5 ps/°C

Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t

50 15 ns Between any two units

PSK

Channel Matching

Codirectional Opposing Directional

7Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the

isolation barrier.

50 6 ns

PSKCD

50 15 ns

PSKOD

Test Conditions/ Comments Min Typ Max Min Typ Max

load

ISO

load

ISO

load

ISO

load

ISO

load

ISO

Test Conditions/ Comments Min Typ Max Min Typ Max

− t

PLH

PHL

Rev. A | Page 7 of 28

Page 8

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

Table 13. Input and Output Characteristics

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC SPECIFICATIONS

Logic High Input Threshold VIH

0.7 × V

ISO

DD1

Logic Low Input Threshold VIL

Logic High Output Voltages VOH

DD1

ISO

DD1

ISO

− 0.2 or

− 0.2

− 0.5 or

− 0.5

Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 μA, VIx = V

0.0 0.4 V IOx = 4 mA, VIx = V Undervoltage Lockout UVLO V

Positive-Going Threshold V Negative-Going Threshold V Hysteresis V

UV+

UV−

UVH

2.7 V

2.4 V

0.3 V

Input Currents per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient

Immunity

|CM| 25 35 kV/μs

Refresh Rate fr 1.0 Mbps

|CM | is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.7 × V

input. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

for a high input or VO < 0.3 × V

ISO

DD1

ISO

DD1

0.3 × V

or V

V IOx = −20 μA, VIx = V

ISO

− 0.2 or

V I

− 0.2

or 0.7 × V

DD1

IxH

= −4 mA, VIx = V

, V

DD1

DDL

ISO

DDx

= V

or V

DD1

IxH

IxL

supplies

, VCM = 1000 V,

ISO

transient magnitude = 800 V

or 0.3 × V

DD1

for a low

ISO

PACKAGE CHARACTERISTICS

Table 14.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

RESISTANCE AND CAPACITANCE

Resistance (Input-to-Output) Capacitance (Input-to-Output) Input Capacitance

IC Junction-to-Ambient Thermal

Resistance

THERMAL SHUTDOWN

Thermal Shutdown Threshold TSSD 150 °C TJ rising Thermal Shutdown Hysteresis TS

This device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.

Input capacitance is from any input data pin to ground.

Refer to the section for thermal model definitions. Thermal Analysis

1012 Ω

I-O

2.2 pF f = 1 MHz

I-O

4.0 pF

45 °C/W

Thermocouple is located at the center of the package underside; test conducted on a 4-layer board with thin traces

20 °C

SD-HYS

Rev. A | Page 8 of 28

Page 9

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

REGULATORY INFORMATION

The ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 are approved by the organizations listed in Tabl e 15 . Refer to Ta b le 2 0 and the Insulation Lifetime section for more information about the recommended maximum working voltages for specific cross-insulation waveforms and insulation levels.

Table 15.

Recognized under UL 1577 component recognition program

Single protection, 5000 V rms isolation voltage

RW-16 package:

RI-16-1 package:

File E214100 File 205078 File 2471900-4880-0001

In accordance with UL 1577, each ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 is proof-tested by applying an insulation test voltage ≥ 6000 V rms for

1 sec (current leakage detection limit = 20 μA).

In accordance with IEC 60747-5-2 (VDE 0884 Part 2):2003-01, each ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 in the RW-16 package is proof-tested

by applying an insulation test voltage ≥ 1590 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates IEC 60747-5-2 (VDE 0884 Part 2):2003-01 approval.

In accordance with DIN V VDE V 0884-10 (VDE V 0884-10):2006-12, each ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 in the RI-16-1 package is proof-tested

by applying an insulation test voltage ≥ 1590 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 approval.

CSA (Pending) VDE

Approved under CSA Component Acceptance Notice #5A RW-16 package:

Certified according to IEC 60747-5-2 (VDE 0884 Part 2):2003-01 (pending) Basic insulation, 846 V peak

Basic insulation per CSA 60950-1-07 and IEC 60950-1, 600 V rms (848 V peak) maximum working voltage

RI-16-1 package: Certified according to DIN V VDE V

0884-10 (VDE V 0884-10):2006-12 Reinforced insulation, 846 V peak

Reinforced insulation per CSA 60950-1-07 and IEC 60950-1, 380 V rms (537 V peak) maximum working voltage Reinforced insulation per IEC 60601-1, 125 V rms (176 V peak) maximum working voltage

Reinforced insulation per CSA 60950-1-07 and IEC 60950-1, 400 V rms (565 V peak) maximum working voltage Reinforced insulation per IEC 60601-1, 250 V rms (353 V peak) maximum working voltage

INSULATION AND SAFETY-RELATED SPECIFICATIONS

Table 16.

Parameter Symbol Value Unit Test Conditions/Comments

Rated Dielectric Insulation Voltage 5000 V rms 1-minute duration Minimum External Air Gap (Clearance) L(I01) 8.0 mm

Minimum External Tracking (Creepage) L(I02)

RW-16 Package 7.6 mm

RI-16-1 Package 8.3 mm Minimum Internal Distance (Internal Clearance) 0.017 min mm Distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303, Part 1 Material Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)

Rev. A | Page 9 of 28

Measured from input terminals to output terminals, shortest distance through air

Measured from input terminals to output terminals, shortest distance path along body

Page 10

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

INSULATION CHARACTERISTICS

IEC 60747-5-2 (VDE 0884 Part 2):2003-01 and DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marking branded on the components designates IEC 60747-5-2 (VDE 0884 Part 2):2003-01 or DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 approval.

Table 17.

Description Test Conditions/Comments Symbol Characteristic Unit

Installation Classification per DIN VDE 0110

For Rated Mains Voltage ≤ 300 V rms I to IV For Rated Mains Voltage ≤ 450 V rms I to II

For Rated Mains Voltage ≤ 600 V rms I to II Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage V Input-to-Output Test Voltage

Method b1

× 1.875 = VPR, 100% production test, tm = 1 sec,

IORM

partial discharge < 5 pC

Method a VPR

After Environmental Tests Subgroup 1 V After Input and/or Safety Tests

× 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC 1375 V peak

IORM

× 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC 1018 V peak

IORM

Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Transient overvoltage, tTR = 10 sec V Safety-Limiting Values

Maximum value allowed in the event of a failure

(see Figure 7) Case Temperature TS 150 °C Side 1 Current (I

Insulation Resistance at TS V

) IS1 555 mA

DD1

= 500 V RS >109 Ω

846 V peak

IORM

1590 V peak

6000 V peak

IOTM

Thermal Derating Curve

600

500

400

CURRENT (mA)

DD1

300

200

100

SAFE OPERATING V

0 50 100 150 200

AMBIENT TEM P E RATURE (°C)

08141-007

Figure 7. Thermal Derating Curve, Dependence of Safety-Limiting Values on Case Temperature, per DIN EN 60747-5-2

RECOMMENDED OPERATING CONDITIONS

Table 18.

Parameter Symbol Min Max Unit Test Conditions/Comments

TEMPERATURE

Operating Temperature TA −40 +105 °C

SUPPLY VOLTAGES V

@ V @ V

= GND

SEL

= V

SEL

DD1

3.0 5.5 V

ISO

4.5 5.5 V

ISO

Each voltage is relative to its respective ground

DD1

Rev. A | Page 10 of 28

Operation at 105°C requires reduction of the maximum load current as specified in Table 19

Page 11

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 19.

Parameter Rating

Storage Temperature Range (TST) −55°C to +150°C Ambient Operating Temperature

Range (T Supply Voltages (V Input Voltage (VIA, VIB, VIC, VID, V

)

, V

DD1

)1 −0.5 V to +7.0 V

DDL

ISO

SEL

Output Voltage (VOA, VOB, VOC, VOD)

−40°C to +105°C

1, 2

)

−0.5 V to V

1, 2

−0.5 V to V

+ 0.5 V

DDI

+ 0.5 V

DDO

Average Output Current per Pin3 −10 mA to +10 mA Common-Mode Transients4 −100 kV/μs to +100 kV/μs

Each voltage is relative to its respective ground.

and V

DDI

a given channel, respectively. See the PCB Layout section.

See Figure 7 for maximum rated current values for various temperatures.

Common-mode transients exceeding the absolute maximum ratings may

cause latch-up or permanent damage.

refer to the supply voltages on the input and output sides of

DDO

Table 20. Maximum Continuous Working Voltage

Parameter Max Unit Applicable Certification

AC Voltage, Bipolar Waveform 424 V peak All certifications, 50-year operation AC Voltage, Unipolar Waveform

Basic Insulation 600 V peak

Reinforced Insulation 565 V peak Working voltage per IEC 60950-1 DC Voltage

Basic Insulation 600 V peak

Reinforced Insulation 565 V peak Working voltage per IEC 60950-1

Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

Rev. A | Page 11 of 28

Page 12

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Table 21. ADuM6400 Pin Function Descriptions

Pin No. Mnemonic Description

1 V 2, 8 GND1

Primary Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external voltage source.

DD1

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other, and

it is recommended that both pins be connected to a common ground. 3 VIA Logic Input A. 4 VIB Logic Input B. 5 VIC Logic Input C. 6 VID Logic Input D. 7 V 9, 15 GND

Data Channel Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external voltage source.

DDL

ISO

Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each other,

and it is recommended that both pins be connected to a common ground. 10 V

Output Voltage Selection. When V

SEL

11 VOD Logic Output D. 12 VOC Logic Output C. 13 VOB Logic Output B. 14 VOA Logic Output A. 16 V

Secondary Supply Voltage Output for External Loads: 3.3 V (V

ISO

DD1

GND

ADuM6400

TOP VIEW

(Not to Scale)

DDL

GND

Figure 8. ADuM6400 Pin Configuration

= V

SEL

ISO

, the V

ISO

GND

ISO

SEL

GND

ISO

08141-008

setpoint is 5.0 V. When V

ISO

= GND

SEL

= GND

SEL

) or 5.0 V (V

ISO

SEL

, the V

= V

setpoint is 3.3 V.

ISO

Rev. A | Page 12 of 28

Page 13

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

Table 22. ADuM6401 Pin Function Descriptions

Pin No. Mnemonic Description

1 V 2, 8 GND1

Primary Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external voltage source.

DD1

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other, and

it is recommended that both pins be connected to a common ground. 3 VIA Logic Input A. 4 VIB Logic Input B. 5 VIC Logic Input C. 6 VOD Logic Output D. 7 V 9, 15 GND

Data Channel Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external voltage source.

DDL

ISO

Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each other,

and it is recommended that both pins be connected to a common ground. 10 V

Output Voltage Selection. When V

SEL

11 VID Logic Input D. 12 VOC Logic Output C. 13 VOB Logic Output B. 14 VOA Logic Output A. 16 V

Secondary Supply Voltage Output for External Loads: 3.3 V (V

ISO

DD1

GND

ADuM6401

TOP VIEW

(Not to Scale)

DDL

GND

Figure 9. ADuM6401 Pin Configuration

= V

SEL

ISO

GND

ISO

SEL

GND

ISO

, the V

setpoint is 5.0 V. When V

ISO

08141-009

= GND

SEL

= GND

SEL

) or 5.0 V (V

ISO

SEL

, the V

= V

ISO

setpoint is 3.3 V.

ISO

Rev. A | Page 13 of 28

Page 14

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

Table 23. ADuM6402 Pin Function Descriptions

Pin No. Mnemonic Description

1 V 2, 8 GND1

Primary Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external voltage source.

DD1

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other, and

it is recommended that both pins be connected to a common ground. 3 VIA Logic Input A. 4 VIB Logic Input B. 5 VOC Logic Output C. 6 VOD Logic Output D. 7 V 9, 15 GND

Data Channel Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external voltage source.

DDL

ISO

Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each other,

and it is recommended that both pins be connected to a common ground. 10 V

Output Voltage Selection. When V

SEL

11 VID Logic Input D. 12 VIC Logic Input C. 13 VOB Logic Output B. 14 VOA Logic Output A. 16 V

Secondary Supply Voltage Output for External Loads: 3.3 V (V

ISO

DD1

GND

ADuM6402

TOP VIEW

(Not to Scale)

DDL

GND

Figure 10. ADuM6402 Pin Configuration

= V

SEL

ISO

, the V

ISO

GND

ISO

SEL

GND

ISO

08141-010

setpoint is 5.0 V. When V

ISO

= GND

SEL

= GND

SEL

) or 5.0 V (V

ISO

SEL

, the V

= V

setpoint is 3.3 V.

ISO

Rev. A | Page 14 of 28

Page 15

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

Ta DuM6403 Function Descriptions

ble 24. A Pin

. nic

Pin No Mnemo Description

1 V 2, 8 GND1

the same external voltage source. Primary Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to

DD1

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other, and it is recommen

ded that both pins be connected to a common ground. 3 VIA Logic Input A. 4 VOB Logic Output B. 5 VOC Logic Output C. 6 VOD Logic Output D. 7 V 9, 15 GND

Data Channel Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external voltage source.

DDL

ISO

Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each other, and it is recommended that both pins be connected to a common ground.

10 V

Output Voltage Selection. When V

SEL

11 VID Logic Input D. 12 VIC Logic Input C. 13 VIB Logic Input B. 14 VOA Logic Output A. 16 V

Secondary Supply Voltage Output for External Loads: 3.3 V (V

ISO

DD1

GND

ADuM6403

TOP VIEW

(Not to Scale)

DDL

GND

Figure 11. ADuM6403 Pin Configuration

= V

SEL

ISO

GND

ISO

SEL

GND

ISO

, the V

setpoint is 5.0 V. When V

ISO

141-011 08

= GND

SEL

= GND

SEL

) or 5.0 V (V

ISO

SEL

, the V

= V

ISO

setpoint is 3.3 V.

ISO

Rev. A | Page 15 of 28

Page 16

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

DD1

GND

ADuM6404

TOP VIEW

(Not to Scale)

DDL

GND

Figure 12. ADuM6404 Pin Configuration

ISO

GND

ISO

SEL

GND

ISO

141-012 08

Table 25. AD Pin F riptions

Pin No M emonic n Description

1 V 2, 8 GND1

uM6404 unction Desc

oltage source. Primary Supply Voltage, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be connected to the same external v

DD1

Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other, and

it is recommended that both pins be connected to a common ground. 3 VOA Logic Output A. 4 V

Logic Output B.

5 VOC Logic Output C. 6 VOD ic OuLog tput D. 7 V 9, 15 GND

10 V

Data Cha pply Voltag nected to the same external voltage source. nnel Su e, 3.0 V to 5.5 V. Pin 1 and Pin 7 must be con

DDL

Output V e Selection. W V. oltag hen V

SEL

Ground R e for the S e internally connected to each other,

and it is r ended tha ound.

eferenc econdary Side of the Isolator. Pin 9 and Pin 15 ar

ecomm t both pins be connected to a common gr

= V

, the V

SEL

ISO

setpoint is 5.0 V. When V

ISO

= GND

SEL

ISO

, the V

setpoint is 3.3

ISO

11 VID Logic Input D. 12 VIC Logic Input C. 13 VIB Logic Input B. 14 VIA Logic Input A. 16 V

Secondary Supply Voltage Output for External Loads: 3.3 V (V

ISO

= GND

SEL

) or 5.0 V (V

ISO

= V

SEL

ISO

TRUTH TABLE

Table 26. Power Control Truth Table (Positive Logic)

Input V

SEL

High 5 V 5 V Self-regulation mode, normal operation Low 5 V 3.3 V Self-regulation mode, normal operation Low 3.3 V 3.3 V Self-regulation mode, normal operation High 3.3 V 5 V This supply configuration is not recommended due to extremely poor efficiency

Input V

DD1

Output Operation

ISO

Rev. A | Page 16 of 28

Page 17

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

TYPICAL PERFORMANCE CHARACTERISTICS

4.0

EFFICIE NCY ( %)

0 20 40 60 80 100 120

ISO

5.0V INPUT/5.0V OUTPUT

5.0V INPUT/3.3V OUTPUT

3.3V INPUT/3.3V OUTPUT

CURRENT (mA)

Figure 13. Typical Power Supply Efficiency

in All Supported Power Configurations

120

100

CURRENT (mA)

ISO

CURRENT (mA)

DD1

5.0V INPUT /5.0V OUTPUT

5.0V INPUT /3.3V OUTPUT

3.3V INPUT /3.3V OUTPUT

0 50 100 150 200 250 300

Figure 14. Typical Isolated Output Supply Current vs. Input Current

in All Supported Power Configurations

3.5

3.0

2.5

2.0

1.5

INPUT CURRENT (A)

1.0

0.5

08141-033

3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5

INPUT SUPPLY V OLTAGE (V )

POWER

DD1

3.5

3.0

2.5

2.0

1.5

1.0

0.5

POWER (W)

08141-036

Figure 16. Typical Short-Circuit Input Current and Power

Supply Voltage

vs. V

DD1

5.4

5.2

(V)

5.0

ISO

4.8

4.6

(mA)

10% LOAD

ISO

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

08141-035

Figure 17. Typical V

90% LOAD

10% LOAD

TIME (ms)

Transient Load Response, 5 V Output,

ISO

08141-107

10% to 90% Load Step

1200

1000

800

600

400

200

TOTAL POWER DISSIPATION (mW)

0 20406080100120

ISO

5.0V INPUT /5.0V OUTPUT

5.0V INPUT /3.3V OUTPUT

3.3V INPUT /3.3V OUTPUT

CURRENT (mA)

08141-034

Figure 15. Typical Total Power Dissipation vs. Isolated Output Supply Current

in All Supported Power Configurations

Rev. A | Page 17 of 28

3.7

3.5

(V)

ISO

3.3

3.1

(mA)

10% LOAD

ISO

0.51.01.52.02.53.03.54.0

Figure 18. Typical V

90% LOAD

10% LOAD

TIME (ms)

Transient Load Response, 3.3 V Output,

ISO

10% to 90% Load Step

08141-108

Page 18

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

5.02

5.00

4.98

(V)

4.96

ISO

4.94

4.92

4.90

5.0

2.5

SIGNAL (V)

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

TIME (µs)

Figure 19. Typical Output Voltage Ripple at 90% Load, V

ISO

= 5 V

08141-109

(V)

ISO

–1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0

90% LOAD 10% LOAD

Time (ms)

Figure 22. Typical Output Voltage Start-Up Transient

at 10% and 90% Load, V

= 3.3 V

ISO

08141-113

3.34

3.32

3.30

(V)

ISO

3.28

3.26

3.24 4

SIGNAL (V)

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

TIME (µs)

Figure 20. Typical Output Voltage Ripple at 90% Load, V

(V)

ISO

90% LOAD 10% LOAD

= 3.3 V

ISO

SUPPLY CURRENT ( mA)

08141-110

Figure 23. Typical I

5.0V INPUT/5.0V O UTPUT

5.0V INPUT/3.3V O UTPUT

3.3V INPUT/3.3V O UTPUT

051015

DATA RATE (Mbps)

Supply Current per Forward Data Channel

CHn

20 25

08141-041

(15 pF Output Load)

5.0V INPUT /5.0V OUTPUT

5.0V INPUT /3.3V OUTPUT

3.3V INPUT /3.3V OUTPUT

SUPPLY CURRENT (mA)

–1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0

TIME (ms)

Figure 21. Typical Output Voltage Start-Up Transient

at 10% and 90% Load, V

ISO

= 5 V

08141-112

Rev. A | Page 18 of 28

051015

Figure 24. Typical I

DATA RATE (Mbps)

Supply Current per Reverse Data Channel

CHn

(15 pF Output Load)

20 25

08141-042

Page 19

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

3.0

SUPPLY CURRENT (mA)

051015

Figure 25. Typical I

DATA RATE (Mbps)

ISO(D)

3.3V

Dynamic Supply Current per Input

20 25

08141-043

2.5

2.0

1.5

1.0

SUPPLY CURRENT (mA)

0.5

051015

Figure 26. Typical I

3.3V

DATA RATE (Mbps)

Dynamic Supply Current per Output

ISO(D)

20 25

08141-044

(15 pF Output Load)

Rev. A | Page 19 of 28

Page 20

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

TERMINOLOGY

DD1(Q)

is the minimum operating current drawn at the V

DD1(Q)

pin when there is no external load at V

and the I/O pins are

ISO

DD1

operating below 2 Mbps, requiring no additional dynamic supply current. I

reflects the minimum current operating

DD1(Q)

condition.

DD1(D)

is the typical input supply current with all channels

DD1(D)

simultaneously driven at a maximum data rate of 25 Mbps with full capacitive load representing the maximum dynamic load conditions. Resistive loads on the outputs should be treated separately from the dynamic load.

DD1(MAX)

is the input current under full dynamic and V

DD1(MAX)

ISO

load

conditions.

ISO(LOAD)

The t the falling edge of the V edge of the V

is the current available to the load.

ISO(LOAD)

Propagation Delay

PHL

propagation delay is measured from the 50% level of

PHL

signal to the 50% level of the falling

signal.

Propagation Delay

PLH

The t the rising edge of the V edge of the V

Propagation Delay Skew (t

t or t

propagation delay is measured from the 50% level of

PLH

signal to the 50% level of the rising

signal.

)

PSK

is the magnitude of the worst-case difference in t

PSK

that is measured between units at the same operating

PLH

PHL

and/

temperature, supply voltages, and output load within the recommended operating conditions.

Channel-to-Channel Matching (t

PSKCD/tPSKOD

)

Channel-to-channel matching is the absolute value of the difference in propagation delays between two channels when operated with identical loads.

Minimum Pulse Width

The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.

Maximum Data Rate

The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.

Rev. A | Page 20 of 28

Page 21

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

APPLICATIONS INFORMATION

The dc-to-dc converter section of the ADuM640x works on principles that are common to most switching power supplies. It has a secondary side controller architecture with isolated pulsewidth modulation (PWM) feedback. V

power is supplied to

DD1

an oscillating circuit that switches current into a chip scale air core transformer. Power transferred to the secondary side is rectified and regulated to either 3.3 V or 5 V. The secondary (V

) side controller regulates the output by creating a PWM

ISO

control signal that is sent to the primary (V

) side by a dedicated

DD1

iCoupler data channel. The PWM modulates the oscillator circuit to control the power being sent to the secondary side. Feedback allows for significantly higher power and efficiency.

The ADuM640x implements undervoltage lockout (UVLO) with hysteresis on the V

power input. This feature ensures

DD1

that the converter does not enter oscillation due to noisy input power or slow power-on ramp rates.

A minimum load current of 10 mA is recommended to ensure optimum load regulation. Smaller loads can generate excess noise on chip due to short or erratic PWM pulses. Excess noise that is generated in this way can cause data corruption, in some cases.

PCB LAYOUT

The ADuM640x digital isolators with 0.4 W isoPower integrated dc-to-dc converter require no external interface circuitry for the logic interfaces. Power supply bypassing is required at the input and output supply pins (see Figure 27). Note that low ESR bypass capacitors are required between Pin 1 and Pin 2 and between Pin 15 and Pin 16, as close to the chip pads as possible.

The power supply section of the ADuM640x uses a 180 MHz oscillator frequency to pass power efficiently through its chip scale transformers. In addition, the normal operation of the data section of the iCoupler introduces switching transients on the power supply pins. Bypass capacitors are required for several operating frequencies. Noise suppression requires a low inductance, high frequency capacitor, whereas ripple suppression and proper regulation require a large value capacitor. These capacitors are most conveniently connected between Pin 1 and Pin 2 for V

, and between Pin 15 and Pin 16 for V

DD1

To suppress noise and reduce ripple, a parallel combination of at least two capacitors is required. The recommended capacitor values are 0.1 μF and 10 μF for V

DD1

and V capacitor must have a low ESR; for example, use of a ceramic capacitor is advised.

ISO

. The smaller

ISO

The total lead length between the ends of the low ESR capacitor and the input power supply pin must not exceed 2 mm. Installing the bypass capacitor with traces more than 2 mm in length may result in data corruption. Consider bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 unless both common ground pins are connected together close to the package.

BYPASS < 2mm

DD1

GND

IA/VOA IB/VOB IC/VOC ID/VOD

DDL

GND

Figure 27. Recommended PCB Layout

ISO

GND VIA/V VIB/V VIC/V VID/V V

SEL

GND

ISO

OA OB OC OD

08141-025

In applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. Furthermore, design the board layout such that any coupling that does occur affects all pins equally on a given component side. Failure to ensure this can cause voltage differentials between pins exceeding the absolute maximum ratings for the device as specified in Ta bl e 19 , thereby leading to latch-up and/or permanent damage.

The ADuM640x is a power device that dissipates approximately 1 W of power when fully loaded and running at maximum speed. Because it is not possible to apply a heat sink to an isolation device, the device primarily depends on heat dissipation into the PCB through the GND pins. If the device is used at high ambient temperatures, provide a thermal path from the GND pins to the PCB ground plane. The board layout in Figure 27 shows enlarged pads for Pin 8 (GND

) and Pin 9 (GND

ISO

). Multiple vias should be implemented from the pad to the ground plane to significantly reduce the temperature inside the chip. The dimensions of the expanded pads are at the discretion of the designer and depend on the available board space.

START-UP BEHAVIOR

The ADuM640x devices do not contain a soft start circuit. Therefore, the start-up current and voltage behavior must be taken into account when designing with this device.

When power is applied to V to operate and draw current when the UVLO minimum voltage is reached. The switching circuit drives the maximum available power to the output until it reaches the regulation voltage where PWM control begins. The amount of current and the time required to reach regulation voltage depends on the load and the V

With a fast V up to 100 mA/V of V

slew rate.

DD1

slew rate (200 μs or less), the peak current draws

DD1

the output can turn on, so the peak current is proportional to the maximum input voltage.

, the input switching circuit begins

DD1

. The input voltage goes high faster than

Rev. A | Page 21 of 28

Page 22

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

With a slow V voltage is not changing quickly when V minimum voltage. The current surge is approximately 300 mA because V behavior during startup is similar to when the device load is a short circuit; these values are consistent with the short-circuit current shown in Figure 16.

When starting the device for V the current available to the V The ADuM640x devices may not be able to drive the output to the regulation point if a current-limiting device clamps the V voltage during startup. As a result, the ADuM640x devices can draw large amounts of current at low voltage for extended periods of time.

The output voltage of the ADuM640x devices exhibits V overshoot during startup. If this overshoot could potentially damage components attached to V such as a Zener diode can be used to clamp the voltage. Typical behavior is shown in Figure 21 and Figure 22.

EMI CONSIDERATIONS

The dc-to-dc converter section of the ADuM640x devices must operate at 180 MHz to allow efficient power transfer through the small transformers. This creates high frequency currents that can propagate in circuit board ground and power planes, causing edge emissions and dipole radiation between the primary and secondary ground planes. Grounded enclosures are recommended for applications that use these devices. If grounded enclosures are not possible, follow good RF design practices in the layout of the PCB. See the AN-0971 Application Note for board layout recommendations.

PROPAGATION DELAY PARAMETERS

Propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. The propagation delay to a logic low output may differ from the propagation delay to a logic high output.

INPUT (

)

OUTPUT (V

Pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved.

Channel-to-channel matching refers to the maximum amount that the propagation delay differs between channels within a single ADuM640x component.

Propagation delay skew refers to the maximum amount that the propagation delay differs between multiple ADuM640x components operating under the same conditions.

slew rate (in the millisecond range), the input

DD1

reaches the UVLO

DD1

is nearly constant at the 2.7 V UVLO voltage. The

DD1

= 5 V operation, do not limit

ISO

power pin to less than 300 mA.

DD1

, a voltage-limiting device

ISO

50%

PLH

)

Figure 28. Propagation Delay Parameters

PHL

50%

ISO

DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY

Positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent to the decoder via the transformer. The decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. In the absence of logic transitions at the input for more than 1 μs, a periodic set of refresh pulses indicative of the correct input state is sent to ensure dc correctness at the output. If the decoder receives no internal pulses for more than approximately 5 μs, the

DD1

08141-026

input side is assumed to be unpowered or nonfunctional, and the isolator output is forced to a default state by the watchdog timer circuit. This situation should occur in the ADuM640x devices only during power-up and power-down operations.

The limitation on the magnetic field immunity of the ADuM640x is set by the condition in which induced voltage in the receiving coil of the transformer is sufficiently large to either falsely set or reset the decoder. The following analysis defines the conditions under which this may occur. The 3.3 V operating condition of the

ADuM640x is examined because it represents the most suscept-

ible mode of operation.

The pulses at the transformer output have an amplitude greater than 1.0 V. The decoder has a sensing threshold at approximately

0.5 V, thus establishing a 0.5 V margin in which induced voltages can be tolerated. The voltage induced across the receiving coil is given by

V = (−dβ/dt)

∑ πr

; n = 1, 2, … , N

where: β is the magnetic flux density (gauss).

is the radius of the nth turn in the receiving coil (cm).

N is the total number of turns in the receiving coil.

Given the geometry of the receiving coil in the ADuM640x and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated as shown in Figure 29.

100

0.1

DENSITY (kgauss)

0.01

MAXIMUM ALLOWABLE MAGNETIC FLUX

0.001 1k 10k 10M

Figure 29. Maximum Allowable External Magnetic Flux Density

MAGNETIC FIELD FREQUENCY (Hz)

100M100k

08141-027

Rev. A | Page 22 of 28

Page 23

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 V at the receiving coil. This voltage is approximately 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event occurs during a transmitted pulse (and is of the worst-case polarity), it reduces the received pulse from >1.0 V to 0.75 V—still well above the

0.5 V sensing threshold of the decoder.

The preceding magnetic flux density values correspond to specific current magnitudes at given distances from the

ADuM640x transformers. Figure 30 expresses these allowable

current magnitudes as a function of frequency for selected distances. As shown in Figure 30, the ADuM640x is extremely immune and can be affected only by extremely large currents operated at high frequency very close to the component. For the 1 MHz example noted, a 0.5 kA current placed 5 mm away from the ADuM640x is required to affect the operation of the device.

DISTANCE = 1m

100

DISTANCE = 100mm

DISTANCE = 5mm

0.1

MAXIMUM ALL OWABLE CURRENT ( kA)

0.01 1k 10k 100M100k 1M 10M

MAGNETIC FIELD FREQUENCY (Hz)

Figure 30. Maximum Allowable Current

for Various Current-to-ADuM640x Spacings

08141-028

Note that at combinations of strong magnetic field and high frequency, any loops formed by PCB traces can induce error voltages sufficiently large to trigger the thresholds of succeeding circuitry. Exercise care in the layout of such traces to avoid this possibility.

POWER CONSUMPTION

The V channels as well as to the power converter. For this reason, the quiescent currents drawn by the data converter and the primary and secondary input/output channels cannot be determined separately. All of these quiescent power demands are combined into the I current is the sum of the quiescent operating current, the dynamic current I I

power supply input provides power to the iCoupler data

DD1

current shown in Figure 31. The total I

DD1(Q)

demanded by the I/O channels, and any external

DD1(D)

load.

ISO

DD1

supply

DD1(Q)

DD1(D)

CONVERTER

PRIMARY

DDP(D)

PRIMARY

DATA

INPUT/OUTPUT

4-CHANNEL

Figure 31. Power Consumption Within the ADuM640x

CONVERTER SECONDARY

ISO(D)

SECONDARY

DATA

INPUT/OUTPUT

4-CHANNEL

Both dynamic input and output current is consumed only when operating at channel speeds higher than the refresh rate, f

. Each channel has a dynamic current determined by

its data rate. Figure 23 shows the current for a channel in the forward direction, which means that the input is on the primary side of the part. Figure 24 shows the current for a channel in the reverse direction, which means that the input is on the secondary side of the part. Both figures assume a typical 15 pF load. The following relationship allows the total I

= (I

× V

DD1

ISO

)/(E × V

ISO

DD1

current to be calculated:

DD1

) + ∑ I

; n = 1 to 4 (1)

CHn

where:

is the total supply input current.

DD1

is the current drawn by the secondary side external loads.

ISO

E is the power supply efficiency at the maximum load from

Figure 13 at the V

is the current drawn by a single channel, determined from

CHn

and V

ISO

condition of interest.

DD1

Figure 23 or Figure 24, depending on channel direction.

Calculate the maximum external load by subtracting the dynamic output load from the maximum allowable load.

ISO(LOAD)

= I

ISO(MAX)

− ∑ I

; n = 1 to 4 (2)

ISO(D)n

where:

is the current available to supply an external secondary

ISO(LOAD)

side load.

is the maximum external secondary side load current

ISO(MAX)

available at V

is the dynamic load current drawn from V

ISO(D)n

ISO

or output channel, as shown in Figure 23 and Figure 24 for a typical 15 pF load.

This analysis assumes a 15 pF capacitive load on each data output. If the capacitive load is larger than 15 pF, the additional current must be included in the analysis of I

To d ete r mi ne I dynamic output current (I

in Equation 1, additional primary side

DD1

) is added directly to I

AOD

DD1

and I

Additional secondary side dynamic output current (I is added to I

To d ete r mi ne I side output current (I

on a per-channel basis.

ISO

in Equation 2, additional secondary

ISO(LOAD)

) is subtracted from I

AOD

per-channel basis.

ISO

ISO(LOAD)

ISO(MAX)

ISO

8141-029

by an input

DD1

)

AOD

on a

Rev. A | Page 23 of 28

Page 24

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

For each output channel with CL greater than 15 pF, the additional capacitive supply current is given by

= 0.5 × 10−3 × ((CL − 15) × V

AOD

) × (2f − fr); f > 0.5 fr (3)

ISO

where:

is the output load capacitance (pF).

is the output supply voltage (V).

ISO

f is the input logic signal frequency (MHz); it is half the input

data rate expressed in units of Mbps.

is the input channel refresh rate (Mbps).

CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION

The ADuM640x is protected against damage due to excessive power dissipation by thermal overload protection circuits. Thermal overload protection limits the junction temperature to a maximum of 150°C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 150°C, the PWM is turned off, turning off the output current. When the junction temperature drops below 130°C (typical), the PWM turns on again, restoring the output current to its nominal value.

Consider the case where a hard short from V

to ground occurs.

ISO

At first, the ADuM640x reaches its maximum current, which is proportional to the voltage applied at V

. Power dissipates on

DD1

the primary side of the converter (see Figure 16). If self-heating of the junction becomes great enough to cause its temperature to rise above 150°C, thermal shutdown is activated, turning off the PWM and turning off the output current. As the junction temperature cools and drops below 130°C, the PWM turns on and power dissipates again on the primary side of the converter, causing the junction temperature to rise to 150°C again. This thermal oscillation between 130°C and 150°C causes the part to cycle on and off as long as the short remains at the output.

Thermal limit protections are intended to protect the device against accidental overload conditions. For reliable operation, externally limit device power dissipation to prevent junction temperatures from exceeding 130°C.

POWER CONSIDERATIONS

The ADuM6400/ADuM6401/ADuM6402/ADuM6403/

ADuM6404 power input, data input channels on the primary

side, and data input channels on the secondary side are all protected from premature operation by undervoltage lockout (UVLO) circuitry. Below the minimum operating voltage, the power converter holds its oscillator inactive, and all input channel drivers and refresh circuits are idle. Outputs remain in a high impedance state to prevent transmission of undefined states during power-up and power-down operations.

During application of power to V

, the primary side circuitry

DD1

is held idle until the UVLO preset voltage is reached. At that time, the data channels initialize to their default low output state until they receive data pulses from the secondary side.

When the primary side is above the UVLO threshold, the data input channels sample their inputs and begin sending encoded pulses to the inactive secondary output channels. The outputs on the primary side remain in their default low state because no data comes from the secondary side inputs until secondary side power is established. The primary side oscillator also begins to operate, transferring power to the secondary power circuits.

The secondary V

voltage is below its UVLO limit at this point;

ISO

the regulation control signal from the secondary side is not being generated. The primary side power oscillator is allowed to free run under these conditions, supplying the maximum amount of power to the secondary side.

As the secondary side voltage rises to its regulation setpoint, a large inrush current transient is present at V

. When the

DD1

regulation point is reached, the regulation control circuit produces the regulation control signal that modulates the oscillator on the primary side. The V

current is then reduced and is

DD1

proportional to the load current. The inrush current is less than the short-circuit current shown in Figure 16. The duration of the inrush current depends on the V on the current and voltage available at the V

loading conditions and

ISO

pin.

DD1

As the secondary side converter begins to accept power from the primary, the V

voltage starts to rise. When the secondary

ISO

side UVLO is reached, the secondary side outputs are initialized to their default low state until data is received from the corresponding primary side input. It can take up to 1 μs after the secondary side is initialized for the state of the output to correlate to the primary side input.

Secondary side inputs sample their state and transmit it to the primary side. Outputs are valid about 1 μs after the secondary side becomes active.

Because the rate of charge of the secondary side power supply is dependent on loading conditions, the input voltage, and the output voltage level selected, take care that the design allows the converter sufficient time to stabilize before valid data is required.

When power is removed from V

, the primary side converter

DD1

and coupler shut down when the UVLO level is reached. The secondary side stops receiving power and starts to discharge.

The outputs on the secondary side hold the last state that they received from the primary side. Either the UVLO level is reached and the outputs are placed in their high impedance state, or the outputs detect a lack of activity from the primary side inputs and the outputs are set to their default low value before the secondary power reaches UVLO.

Rev. A | Page 24 of 28

Page 25

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

THERMAL ANALYSIS

The ADuM640x devices consist of four internal silicon die attached to a split lead frame with two die attach paddles. For the purposes of thermal analysis, the device is treated as a thermal unit with the highest junction temperature reflected in the θ value from Tabl e 14. The value of θ

is based on measurements

taken with the part mounted on a JEDEC standard 4-layer board with fine width traces and still air. Under normal operating conditions, the ADuM640x operates at full load across the full temperature range without derating the output current. However, following the recommendations in the PCB Layout section decreases the thermal resistance to the PCB, allowing increased thermal margin at high ambient temperatures.

INSULATION LIFETIME

All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. In addition to the testing performed by the regulatory agencies, Analog Devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the ADuM640x devices.

Analog Devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. The values shown in Tab l e 20 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum CSA/VDE approved working voltages. In many cases, the approved working voltage is higher than the 50-year service life voltage. Operation at these high working voltages can lead to shortened insulation life in some cases.

The insulation lifetime of the ADuM640x devices depends on the voltage waveform type imposed across the isolation barrier. The iCoupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. Figure 32, Figure 33, and Figure 34 illustrate these different isolation voltage waveforms.

Bipolar ac voltage is the most stringent environment. The goal of a 50-year operating lifetime under the bipolar ac condition determines the maximum working voltage recommended by Analog Devices.

In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. This allows operation at higher working voltages while still achieving a 50-year service life. The working voltages listed in Tab l e 20 can be applied while maintaining the 50-year minimum lifetime, provided that the voltage conforms to either the unipolar ac or dc voltage cases.

Any cross-insulation voltage waveform that does not conform to Figure 33 or Figure 34 should be treated as a bipolar ac waveform and its peak voltage limited to the 50-year lifetime voltage value listed in Table 2 0. The voltage presented in Figure 33 is shown as sinusoidal for illustration purposes only. It is meant to represent any voltage waveform varying between 0 V and some limiting value. The limiting value can be positive or negative, but the voltage cannot cross 0 V.

TED PEAKVOLTAGE

Figure 32. Bipolar AC Waveform

TED PEAKVOLTAGE

Figure 33. Unipolar AC Waveform

TED PEAKVOLTAGE

Figure 34. DC Waveform

08141-030

08141-032

08141-031

Rev. A | Page 25 of 28

Page 26

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

OUTLINE DIMENSIONS

10.50 (0.4134)

10.10 (0.3976)

BSC

7.60 (0.2992)

7.40 (0.2913)

10.65 (0.4193)

10.00 (0.3937)

2.65 (0.1043)

2.35 (0.0925)

SEATING PLANE

8° 0°

0.33 (0.0130)

0.20 (0.0079)

0 0

(

)

45°

)

1.27 (0.0500)

0.40 (0.0157)

03-27-2007-B

0.30 (0.0118)

0.10 (0.0039)

OPLANARITY

0.10

1.27 (0.0500)

0.51 (0.0201)

0.31 (0.0122)

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.

COMPLIANT TO JEDEC STANDARDS MS-013-AA

Figure 35. 16-Lead Standard Small Outline Package [SOIC_W]

Wide Body

(RW-16)

Dimensions shown in millimeters and (inches)

13.00 (0.5118)

12.60 (0.4961)

7.60 (0.2992)

7.40 (0.2913)

10.65 (0.4193)

10.00 (0.3937)

(

)

0.30 (0.0118)

0.10 (0.0039)

COPLANARITY

0.10

2.65 (0.1043)

2.35 (0.0925)

1.27

(0.0500)

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.

0.51 (0.0201)

0.31 (0.0122)

BSC

COMPLIANT TO JEDEC STANDARDS MS-013-AC

SEATING PLANE

8° 0°

0.33 (0.0130)

0.20 (0.0079)

(

1.27 (0.0500)

0.40 (0.0157)

45°

)

10-12-2010-A

Figure 36. 16-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC]

Wide Body

(RI-16-1)

Dimensions shown in millimeters and (inches)

Rev. A | Page 26 of 28

Page 27

Data Sheet ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404

ORDERING GUIDE

Number of Inputs, V

Side

ISO

Model

1, 2

Number of Inputs,

Side

DD1

ADuM6400ARWZ 4 0 1 100 40 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6400CRWZ 4 0 25 60 6 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6401ARWZ 3 1 1 100 40 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6401CRWZ 3 1 25 60 6 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6402ARWZ 2 2 1 100 40 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6402CRWZ 2 2 25 60 6 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6403ARWZ 1 3 1 100 40 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6403CRWZ 1 3 25 60 6 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6404ARWZ 0 4 1 100 40 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6404CRWZ 0 4 25 60 6 −40°C to +105°C 16-Lead SOIC_W RW-16 ADuM6400ARIZ 4 0 1 100 40 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6400CRIZ 4 0 25 60 6 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6401ARIZ 3 1 1 100 40 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6401CRIZ 3 1 25 60 6 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6402ARIZ 2 2 1 100 40 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6402CRIZ 2 2 25 60 6 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6403ARIZ 1 3 1 100 40 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6403CRIZ 1 3 25 60 6 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6404ARIZ 0 4 1 100 40 −40°C to +105°C 16-Lead SOIC_IC RI-16-1 ADuM6404CRIZ 0 4 25 60 6 −40°C to +105°C 16-Lead SOIC_IC RI-16-1

Z = RoHS Compliant Part.

Tape and reel are available. The additional -RL suffix designates a 13-inch (1,000 units) tape and reel option.

Maximum Data Rate (Mbps)

Maximum Propagation Delay, 5 V (ns)

Maximum Pulse Width Distortion (ns)

Temperature Range

Package Description

Package Option

Rev. A | Page 27 of 28

Page 28

ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404 Data Sheet

NOTES

Rev. A | Page 28 of 28

Datasheet ADuM6400, ADuM6401, ADuM6402, ADuM6403, ADuM6404 Datasheet (ANALOG DEVICES)

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAMS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY

ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

PACKAGE CHARACTERISTICS

REGULATORY INFORMATION

INSULATION AND SAFETY-RELATED SPECIFICATIONS

INSULATION CHARACTERISTICS

IEC 60747-5-2 (VDE 0884 Part 2):2003-01 and DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

Thermal Derating Curve

RECOMMENDED OPERATING CONDITIONS

ABSOLUTE MAXIMUM RATINGS

ESD CAUTION

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

TRUTH TABLE

TYPICAL PERFORMANCE CHARACTERISTICS

TERMINOLOGY

APPLICATIONS INFORMATION

PCB LAYOUT

START-UP BEHAVIOR

EMI CONSIDERATIONS

PROPAGATION DELAY PARAMETERS

DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY

POWER CONSUMPTION

CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION

POWER CONSIDERATIONS

THERMAL ANALYSIS

INSULATION LIFETIME

OUTLINE DIMENSIONS

ORDERING GUIDE