Datasheet ADUM5400 Datasheet (ANALOG DEVICES)

Quad-Channel Isolator with

Data Sheet

FEATURES

isoPower integrated, isolated dc-to-dc converter
Regulated 5 V output
500 mW output power
Quad dc-to-25 Mbps (NRZ) signal isolation channels
Schmitt trigger inputs
16-lead SOIC package with >7.6 mm creepage
High temperature operation: 105°C maximum
High common-mode transient immunity: >25 kV/μs

Safety and regulatory approvals

UL recognition

2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity (pending)

IEC 60747-5-2 (VDE 0884, Part 2)

V

= 560 V peak

IORM

APPLICATIONS

RS-232/RS-422/RS-485 transceivers
Industrial field bus isolation
Power supply start-up bias and gate drives
Isolated sensor interfaces
Industrial PLCs

Integrated DC-to-DC Converter

ADuM5400

GENERAL DESCRIPTION

The ADuM54001 device is a quad-channel digital isolator with
isoPower®, an integrated, isolated dc-to-dc converter. Based on
the Analog Devices, Inc., iCoupler® technology, the dc-to-dc
converter provides up to 500 mW of regulated, isolated power
with 5.0 V input and 5.0 V output voltages. This architecture
eliminates the need for a separate, isolated dc-to-dc converter in
low power, isolated designs. The iCoupler chip scale transformer
technology is used to isolate the logic signals and the magnetic
components of the dc-to-dc converter. The result is a small form
factor, total isolation solution.

The ADuM5400 isolator provides four independent isolation
channels in two speed grades (see the Ordering Guide for more
information).

isoPower uses high frequency switching elements to transfer
power through its transformer. Special care must be taken
during printed circuit board (PCB) layout to meet emissions
standards. Refer to the AN-0971 Application Note for details
on board layout recommendations.

FUNCTIONAL BLOCK DIAGRAM

1

V

DD1

2

GND

1

V

3

IA

V

4

IB

V

5

IC

V

6

ID

7

V

DDL

GND

8

1

1

Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329.

OSC

4-CHANNEL iCOUPLER CORE

ADuM5400

Figure 1.

RECT

REG

16

V

ISO

15

GND

ISO

V

14

OA

V

13

OB

V

12

OC

V

11

OD

10

V

ISO

GND

9

ISO

07509-001

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2008–2012 Analog Devices, Inc. All rights reserved.

ADuM5400 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1 

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics ............................................................. 3

Package Characteristics ............................................................... 5

Regulatory Information ............................................................... 5

Insulation and Safety Related Specifications ............................ 5

IEC 60747-5-2 (VDE 0884, Part 2):2003-01 Insulation

Characteristics .............................................................................. 6

Recommended Operating Conditions ...................................... 6

Absolute Maximum Ratings ............................................................ 7

ESD Caution .................................................................................. 7



Pin Configuration and Function Descriptions ..............................8

Typical Performance Characteristics ..............................................9

Terminology .................................................................................... 11

Applications Information .............................................................. 12

PCB Layout ................................................................................. 12

EMI Considerations ................................................................... 12

Propagation Delay Parameters ................................................. 13

DC Correctness and Magnetic Field Immunity ..................... 13

Power Consumption .................................................................. 14

Power Considerations ................................................................ 14

Thermal Analysis ....................................................................... 15

Insulation Lifetime ..................................................................... 15

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 16

REVISION HISTORY

6/12—Rev. A to Rev. B

Created Hyperlink for Safety and Regulatory Approvals

Entry in Features Section ................................................................. 1

Change to EMI Considerations Section ...................................... 12

9/11—Rev. 0 to Rev. A

Changes to Features Section............................................................ 1

Changes to Table 1 ............................................................................ 3

Added Table 2 and Table 3; Renumbered Sequentially ............... 3

Added Table 4 .................................................................................... 4

Changes to Table 5, Table 6, and Table 7 ........................................ 5

Changed DIN V VDE V 0884-10 to IEC 60747-5-2

(VDE 0884, Part 2) Throughout ...................................................... 6

Changes to Table 8 and Table 9 ....................................................... 6

Changes to Table 11 .......................................................................... 7

Added Figure 9; Renumbered Sequentially ................................... 9

Changes to Applications Information Section ........................... 12

Change to Figure 17 ....................................................................... 14

10/08—Revision 0: Initial Version

Rev. B | Page 2 of 16

Data Sheet ADuM5400

Setpoint

V

ISO

4.7

5.0

5.4 V I

ISO

= 0 mA

ISO(LINE)

ISO

DD1

ISO(LOAD)

ISO

ISO(RIP)

BO

1

ISO

ISO(NOISE)

BO

ISO

OSC

PWM

ISO(MAX)

ISO

ISO(MAX)

ISO

DD1

ISO

DD1(Q)

DD1

ISO

DD1(M AX)

Min

Typ

Max

Min

Typ

Max

DD1

ISO

ISO(LOAD)

PHL

PLH

PLH

PHL

PSK

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

4.5 V ≤ V
recommended operating range, unless otherwise noted. All typical specifications are at T

Table 1. DC-to-DC Converter Static Specifications

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

≤ 5.5 V; each voltage is relative to its respective ground. All minimum/maximum specifications apply over the entire

DD1

= 25°C, V

A

= 5.0 V, V

DD1

= 5.0 V.

ISO

Line Regulation V
Load Regulation V
Output Ripple V
Output Noise V
Switching Frequency f
PWM Frequency f
Output Supply Current I
Efficiency at I
I

, No V

I

, Full V

1

CBO = capacitive bypass output. This represents the parallel combination of high frequency bypass capacitors between Pin 15 and Pin 16.

34 % I

Load I

Load I

1 mV/V I

1 5 % I

= 50 mA, V
= 10 mA to 90 mA

75 mV p-p 20 MHz bandwidth, C

200 mV p-p C

1

= 0.1 µF||10 µF, I

180 MHz

625 kHz

100 mA V

> 4.5 V

= 100 mA
19 30 mA
290 mA

= 4.5 V to 5.5 V

= 0.1 µF||10 µF, I

= 90 mA

Table 2. DC-to-DC Converter Dynamic Specifications

1 Mbps—

A Grade, C Grade

Parameter Symbol

25 Mbps—C Grade

Unit Test Conditions/Comments

SUPPLY CURRENT

Input I
Available to Load I

19 64 mA No V

100 89 mA

load

Table 3. Switching Specifications

A Grade C Grade

Parameter Symbol

Unit Test Conditions/Comments Min Typ Max Min Typ Max

SWITCHING SPECIFICATIONS

Maximum Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
Pulse Width Distortion PWD 40 6 ns |t

, t

55 100 45 60 ns 50% input to 50% output

− t

|

Change vs. Temperature 5 ps/°C
Minimum Pulse Width PW 1000 40 ns Within PWD limit
Propagation Delay Skew t
Channel-to-Channel

50 15 ns Between any two units

t

PSKCD/tPSKOD

50 6 ns

Matching

= 90 mA

Rev. B | Page 3 of 16

ADuM5400 Data Sheet

DD1

DD1

ISO

IxH

ISO

IxH

IxL

IxL

DD1

DDL

ISO

UV+

UV−

UVH

DDx

AC SPECIFICATIONS

Table 4. Input and Output Characteristics

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC SPECIFICATIONS

Logic High Input Threshold VIH 0.7 × V
Logic Low Input Threshold VIL 0.3 × V
Logic High Output Voltages VOH V
V
Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 µA, VIx = V

0.0 0.4 V IOx = 4 mA, VIx = V
Undervoltage Lockout UVLO V

Positive Going Threshold V
Negative Going Threshold V
Hysteresis V

2.7 V

2.4 V

0.3 V

Input Currents per Channel II −20 +0.01 +20 µA 0 V ≤ VIx ≤ V

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%
Common-Mode Transient

Immunity

1

|CM| 25 35 kV/µs V

Refresh Rate fr 1.0 Mbps

1

|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.7 × V

low output. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

V

V

− 0.3 5.0 V IOx = −20 µA, VIx = V

− 0.5 4.8 V IOx = −4 mA, VIx = V

, V

, V

supplies

= V

or V

Ix

DD1

, VCM = 1000 V,

ISO

transient magnitude = 800 V

or 0.7 × V

DD1

for a high output or VO < 0.3 × V

ISO

or 0.3 × V

DD1

for a

ISO

Rev. B | Page 4 of 16

Data Sheet ADuM5400

RESISTANCE AND CAPACITANCE

I-O

I-O

Tracking Resistance (Comparative Tracking

CTI

>175

V

DIN IEC 112/VDE 0303 Part 1

PACKAGE CHARACTERISTICS

Table 5.

Parameter Symbol Min Ty p Max Unit Test Conditions/Comments

Resistance (Input-to-Output)1 R
Capacitance (Input-to-Output)1 C

1012 Ω

2.2 pF f = 1 MHz
Input Capacitance2 CI 4.0 pF
IC Junction-to-Ambient Thermal

Resistance

1

This device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.

2

Input capacitance is from any input data pin to ground.

3

See the Thermal Analysis section for thermal model definitions.

θJA 45 °C/W Thermocouple located at center of package underside;

test conducted on 4-layer board with thin traces

3

REGULATORY INFORMATION

The ADuM5400 is approved by the organizations listed in Table 6. Refer to Table 11 and to the Insulation Lifetime section for details
regarding the recommended maximum working voltages for specific cross-isolation waveforms and insulation levels.

Table 6.

UL1 CSA VDE (Pending)2

Recognized Under 1577 Component

Recognition Program

1

Single Protection, 2500 V rms

Isolation Voltage

Approved under CSA Component
Acceptance Notice #5A

Testing was conducted per CSA 60950-1-07
and IEC 60950-1 2

nd

Ed. at 2.5 kV rated voltage
Basic insulation at 600 V rms (848 V peak)
working voltage
Reinforced insulation at 250 V rms (353 V peak)
working voltage

File E214100 File 205078 File 2471900-4880-0001

1

In accordance with UL 1577, each ADuM5400 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 10 µA).

2

In accordance with IEC 60747-5-2 (VDE 0884 Part 2):2003-01, each ADuM5400 is proof tested by applying an insulation test voltage ≥ 1590 V peak for 1 second (partial

discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates IEC 60747-5-2 (VDE 0884 Part 2):2003-01

Certified according to IEC 60747-5-2
(VDE 0884 Part 2):2003-012

Basic insulation, 560 V peak

approval.

INSULATION AND SAFETY RELATED SPECIFICATIONS

Table 7. Critical Safety Related Dimensions and Material Properties

Parameter Symbol Value Unit Test Conditions/Comments

Rated Dielectric Insulation Voltage 2500 V rms 1 minute duration
Minimum External Air Gap L(I01) 8.0 mm Measured from input terminals to output terminals,

shortest distance through air

Minimum External Tracking (Creepage) L(I02) 7.6 mm Measured from input terminals to output terminals,

shortest distance path along body

Minimum Internal Gap (Internal Clearance) 0.017 min mm Distance through insulation

Index)

Material Group IIIa Material group (DIN VDE 0110, 1/89, Table 1)

Rev. B | Page 5 of 16

ADuM5400 Data Sheet

IORM

PEAK

IOTM

PEAK

Withstand Isolation Voltage

1 minute withstand rating

V

ISO

2500

V

RMS

PEAK

IOSM

PEAK

DD1

Insulation Resistance at TS

VIO = 500 V

RS

>109

Ω

0

100

200

300

400

500

600

0 50 100 150 200

AMBIENT T E M P E RATURE (°C)

SAFE OPERATING V

DD1

CURRENT (mA)

07509-003

IEC 60747-5-2 (VDE 0884, PART 2):2003-01 INSULATION CHARACTERISTICS

The ADuM5400 is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
protective circuits. The asterisk (*) marking branded on the component denotes IEC 60747-5-2 (VDE 0884, Part 2) approval.

Table 8. VDE Characteristics

Description Conditions Symbol Characteristic Unit

Installation Classification per DIN VDE 0110

For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III

For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/105/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage V
Input-to-Output Test Voltage, Method b1 V

× 1.875 = V

IORM

, 100% production test, t

pd(m)

= tm =

ini

1 sec, partial discharge < 5 pC

Input-to-Output Test Voltage, Method a

After Environmental Tests Subgroup 1 V

IORM

× 1.5 = V

, t

= 60 sec, tm = 10 sec, partial

pd(m)

ini

discharge < 5 pC

After Input and/or Safety Test Subgroup 2

and Subgroup 3

V

× 1.2 = V

IORM

pd(m)

discharge < 5 pC

, t

= 60 sec, tm = 10 sec, partial

ini

Highest Allowable Overvoltage V

560 V

V

1050 V

pd(m)

V

840 V

pd(m)

V

672 V

pd(m)

4000 V

PEAK

PEAK

PEAK

Surge Isolation Voltage V

= 6 kV, 1.2 µs rise time, 50 µs, 50% fall time V

Safety Limiting Values Maximum value allowed in the event of a failure

(see Figure 2)
Case Temperature TS 150 °C
Side 1 I

Current IS1 555 mA

Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case Temperature, per DIN EN 60747-5-2

RECOMMENDED OPERATING CONDITIONS

Table 9.

Parameter Symbol Min Max Unit

Operating Temperature Range TA −40 +105 °C
Supply Voltages1 VDD 4.5 5.5 V

1

Each voltage is relative to its respective ground.

6000 V

Rev. B | Page 6 of 16

Data Sheet ADuM5400

DD1

ISO

ISO

Input Voltage ( VIA, VIB, VIC, VID)

1, 3

−0.5 V to V

DDI

+ 0.5 V

1, 3

ISO

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 10.

Parameter Rating

Storage Temperature (TST) −55°C to +150°C
Ambient Operating Temperature (TA) −40°C to +85°C
Supply Voltages (V
V

Supply Current2

, V

)1 −0.5 V to +7.0 V

−40°C to +85°C 100 mA

−40°C to +105°C 60 mA

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Output Voltage (VOA, VOB, VOC, VOD)
Average Output Current

per Data Output Pin

4

Common-Mode Transients5 −100 kV/µs to +100 kV/µs

1

Each voltage is relative to its respective ground.

2

V

provides current for dc and dynamic loads on the Side 2 I/O channels.

ISO

This current must be included when determining the total V
current.

3

V

and V

DDI

a given channel, respectively. See the PCB Layout section.

4

See Figure 2 for maximum rated current values for various temperatures.

5

Refers to common-mode transients across the insulation barrier. Common-

mode transients exceeding the absolute maximum ratings may cause latch-up
or permanent damage.

refer to the supply voltages on the input and output sides of

ISO

−0.5 V to V

−10 mA to +10 mA

+ 0.5 V

supply

ISO

Table 11. Maximum Continuous Working Voltage Supporting 50-Year Minimum Lifetime

1

Parameter Max Unit Applicable Certification

AC Voltage, Bipolar Waveform 424 V peak All certifications, 50 year operation
AC Voltage, Unipolar Waveform

Basic Insulation 600 V peak Working voltage per IEC 60950-1
Reinforced Insulation 353 V peak Working voltage per IEC 60950-1

DC Voltage

Basic Insulation 600 V peak Working voltage per IEC 60950-1
Reinforced Insulation 353 V peak Working voltage per IEC 60950-1

1

Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.

Rev. B | Page 7 of 16

ADuM5400 Data Sheet

V

DD1

1

GND

1

2

V

IA

3

V

IB

4

V

ISO

16

GND

ISO

15

V

OA

14

V

OB

13

V

IC

5

V

OC

12

V

ID

6

V

OD

11

V

DDL

7

V

ISO

10

GND

1

8

GND

ISO

9

ADuM5400

TOP VIEW

(Not to Scale)

07509-004

DD1

DDL

DD1

9, 15

GND

Ground Reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected to each other, and it is

DD1/VDDL

DD1/VDDL

ISO

ISO

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 3. Pin Configuration

Table 12. Pin Function Descriptions

Pin No. Mnemonic Description

1 V

Primary Supply Voltage, 4.5 V to 5.5 V.

2, 8 GND1 Ground 1. Ground reference for isolator primary. Pin 2 and Pin 8 are internally connected to each other,

and it is recommended that both pins be connected to a common ground.
3 VIA Logic Input A.
4 VIB Logic Input B.
5 VIC Logic Input C.
6 VID Logic Input D.
7 V

Logic Power Supply Voltage. This pin must be connected to V

ISO

and have a dedicated bypass capacitor.

recommended that both pins be connected to a common ground.
10, 16 V

Secondary Supply Voltage Output for External Loads, 5.0 V. These pins are not tied together internally

ISO

and must be connected together on the PCB.
11 VOD Logic Output D.
12 VOC Logic Output C.
13 VOB Logic Output B.
14 VOA Logic Output A.

Table 13. Truth Table (Positive Logic)

VIx Input1 V

State V

Input (V) V

State V

Output (V) VOx Output1 Operation

High Powered 5.0 Powered 5.0 High Normal operation, data is high
Low Powered 5.0 Powered 5.0 Low Normal operation, data is low

1

VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D).

Rev. B | Page 8 of 16

Data Sheet ADuM5400

0

5

10

15

20

25

30

35

40

0 0.02 0.04 0.06 0.08 0.10 0.12

OUTPUT CURRE NT (A)

EFFICIENCY (%)

5V IN/5V O UT

07509-005

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

0 0.02 0.04 0.06 0.08 0.10 0.12

I

ISO

(A)

POWER DISSIPATION (W)

V

DD1

= 5V, V

ISO

= 5V

07509-006

0

0.02

0.04

0.06

0.08

0.10

0.12

0 0.05 0.10 0.15 0.20 0.25 0.350.30

INPUT CURRENT ( A)

OUTPUT CURRE NT (A)

5V IN/5V O UT

07509-007

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5

INPUT VOLTAGE (V)

INPUT CURRENT (A)

POWER (W)

I

DD

POWER

07509-008

OUTPUT VOLTAGE

(500mV/DIV)

(100µs/DIV)

DYNAMIC LO AD

10% LOAD 90% LOAD

07509-009

TIME (ms)

V

ISO

(V)

7

6

5

4

3

2

1

0

–1 0 1 2 3

90% LOAD

10% LOAD

07509-027

TYPICAL PERFORMANCE CHARACTERISTICS

Each voltage is relative to its respective ground; all typical specifications are at TA = 25°C.

Figure 4. Typical Power Supply Efficiency at 5 V/5 V

Figure 7. Typical Short-Cir cuit Input Current and Power vs. V

Supply Voltage

DD1

Figure 5. Typical Total Power Dissipation vs. I

Figure 6. Typical Isolated Output Supply Current, I

of External Load, No Dynamic Current Draw at 5 V/5 V

with Data Channels Idle

ISO

, as a Function

ISO

Rev. B | Page 9 of 16

Figure 8. Typical V

Figure 9. Typical V

Transient Load Response, 5 V Output,

ISO

10% to 90% Load Step

= 5 V Output Voltage Start-Up Transient

ISO

at 10% and 90% Load

ADuM5400 Data Sheet

BW = 20MHz (400ns/DIV)

5V OUTPUT RIPPLE (10mV/DIV)

07509-011

0

1.0

0.5

1.5

2.0

2.5

3.0

0 5 10 15

DATA RATE (Mbps)

SUPPLY CURRENT (mA)

20 25

5V

07509-016

0

4

8

12

16

20

0 5 10 15

DATA RATE (Mbps)

SUPPLY CURRENT (mA)

20 25

5V IN/5V O UT

07509-013

Figure 10. Typical V

Figure 11. Typical I

= 5 V Output Voltage Ripple at 90% Load

ISO

Dynamic Supply Current per Output

ISO(D)

(15 pF Output Load)

Figure 12. Typical I

Supply Current per Forward Data Channel

CH

(15 pF Output Load)

Rev. B | Page 10 of 16

Data Sheet ADuM5400

TERMINOLOGY

I

DD1(Q)

I

is the minimum operating current drawn at the V

DD1(Q)

pin when there is no external load at V

and the I/O pins

ISO

DD1

are operating below 2 Mbps, requiring no additional dynamic
supply current.

I

I

DD1(MAX)

is the input current under full dynamic and V

DD1(MAX)

ISO

load

conditions.

t

Propagation Delay

PHL

t

propagation delay is measured from the 50% level of the

PHL

falling edge of the V
of the V

t

PLH

t

PLH

signal.

Ox

Propagation Delay

propagation delay is measured from the 50% level of the
rising edge of the V
of the V

signal.

Ox

signal to the 50% level of the falling edge

Ix

signal to the 50% level of the rising edge

Ix

Propagation Delay Skew (t

t

is the magnitude of the worst-case difference in t

PSK

t

that is measured between units at the same operating

PLH

temperature, supply voltages, and output load within the
recommended operating conditions.

Channel-to-Channel Matching

Channel-to-channel matching is the absolute value of the
difference in propagation delays between two channels when
operated with identical loads.

Minimum Pulse Width

The minimum pulse width is the shortest pulse width at which
the specified pulse width distortion is guaranteed.

Maximum Data Rate

The maximum data rate is the fastest data rate at which the
specified pulse width distortion is guaranteed.

PSK

)

and/or

PHL

Rev. B | Page 11 of 16

ADuM5400 Data Sheet

APPLICATIONS INFORMATION

The dc-to-dc converter section of the ADuM5400 works on
principles that are common to most modern power supplies. It
has a secondary side controller architecture with isolated pulse­width modulation (PWM) feedback. V

power is supplied to

DD1

an oscillating circuit that switches current into a chip scale air
core transformer. Power transferred to the secondary side is
rectified and regulated to 5 V. The secondary (V

ISO

) side
controller regulates the output by creating a PWM control
signal that is sent to the primary (V

) side by a dedicated

DD1

iCoupler data channel. The PWM modulates the oscillator
circuit to control the power being sent to the secondary side.
Feedback allows for significantly higher power and efficiency.

The ADuM5400 implements undervoltage lockout (UVLO)
with hysteresis on the V

DD1

, V

DDL

, and V

power supplies. This

ISO

feature ensures that the converter does not enter oscillation due
to noisy input power or slow power-on ramp rates.

PCB LAYOUT

The ADuM5400 digital isolator with integrated 0.5 W isoPower
dc-to-dc converter requires no external interface circuitry for the
logic interfaces. Power supply bypassing is required at the input
and output supply pins (see Figure 13). Note that a low ESR bypass
capacitor is required between Pin 1 and Pin 2, within 2 mm of
the chip leads.

The power supply section of the ADuM5400 uses a 180 MHz
oscillator frequency to efficiently pass power through its chip
scale transformers. In addition, normal operation of the data
section of the iCoupler introduces switching transients on the
power supply pins. Bypass capacitors are required and must
provide transient suppression at several operating frequencies.
Noise suppression requires a low inductance, high frequency
capacitor that is effective at 180 MHz and 360 MHz. Ripple
suppression and proper regulation require a large value capacitor
to provide bulk current at 625 kHz. These are most conveniently
connected between Pin 1 and Pin 2 for V
and Pin 16 for V

. To suppress noise and reduce ripple, a

ISO

parallel combination of at least two capacitors is required. The
recommended capacitor values are 0.1 μF and 10 μF for V
The smaller capacitor must have low ESR; for example, use of a
ceramic capacitor is advised.

Note that the total lead length between the ends of the low ESR
capacitor and the input power supply pin must not exceed 2 mm.
Installing the bypass capacitor with traces more than 2 mm in
length may result in data corruption. Consider a bypass capacitor
between Pin 1 and Pin 8 and between Pin 9 and Pin 16 unless
both common ground pins are connected together close to the
package.

and between Pin 15

DD1

DD1

.

BYPASS < 2mm

V

GND

V

GND

DD1

V
V
V
V

DDL

1
IA
IB
IC
ID

1

Figure 13. Recommended PCB Layout

ADuM5400

V

ISO

GND
V

OA

V

OB

V

OC

V

OD

V

ISO

GND

ISO

ISO

07509-017

In applications involving high common-mode transients, ensure
that board capacitive coupling across the isolation barrier is
minimized. Furthermore, design the board layout so that any
coupling that does occur affects all pins on a given component
side equally. Failure to ensure this can cause differential voltages
between pins, exceeding the absolute maximum ratings for the
device (specified in Table 10) and thereby leading to latch-up
and/or permanent damage.

The ADuM5400 is a power device that dissipates about 1 W
of power when fully loaded and running at maximum speed.
Because it is not possible to apply a heat sink to an isolation
device, the device depends primarily on heat dissipation into
the PCB through the GND pins. If the device is used at high
ambient temperatures, provide a thermal path from the GND
pins to the PCB ground plane. The board layout in Figure 13
shows enlarged pads for Pin 8 (GND

) and Pin 9 (GND

1

ISO

).
Large diameter vias should be implemented from the pad to the
ground, and power planes should be used to reduce inductance.
Multiple vias in the thermal pads can significantly reduce temper­atures inside the chip. The dimensions of the expanded pads are
at the discretion of the designer and depend on the available
board space.

EMI CONSIDERATIONS

The dc-to-dc converter section of the ADuM5400 component
must operate at a very high frequency to allow efficient power
transfer through the small transformers. This creates high
frequency currents that can propagate in circuit board ground
and power planes, causing edge emissions and dipole radiation
between the primary and secondary ground planes. Grounded
enclosures are recommended for applications that use these
devices. If grounded enclosures are not possible, follow good
RF design practices in the layout of the PCB. See the AN-0971

Application Note for board layout recommendations.

Rev. B | Page 12 of 16

Data Sheet ADuM5400

INPUT (VIx)

OUTPUT (V

Ox

)

t

PLH

t

PHL

50%

50%

07509-018

MAGNETI C FIELD FRE QUENCY (Hz)

100

MAXIMUM ALLOWABLE MAGNETIC FLUX

DENSITY ( kgauss)

0.001
1M

10

0.01

1k 10k 10M

0.1

1

100M

100k

07509-019

MAGNETI C FIELD FRE QUENCY (Hz)

MAXIMUM AL LOWABLE CURRE NT (kA)

1000

100

10

1

0.1

0.01
1k 10k 100M100k 1M 10M

DISTANCE = 5mm

DISTANCE = 1m

DISTANCE = 100mm

07509-020

PROPAGATION DELAY PARAMETERS

Propagation delay is a parameter that describes the time it takes a
logic signal to propagate through a component (see Figure 14).
The propagation delay to a logic low output may differ from the
propagation delay to a logic high output.

Given the geometry of the receiving coil in the ADuM5400 and
an imposed requirement that the induced voltage be, at most,
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated as shown in Figure 15.

Figure 14. Propagation Delay Parameters

Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of how
accurately the timing of the input signal is preserved.

Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM5400 component.

Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM540x
components operating under the same conditions.

DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY

Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the trans­former. The decoder is bistable and is, therefore, either set or
reset by the pulses, indicating input logic transitions. In the
absence of logic transitions at the input for more than 1 µs,
periodic sets of refresh pulses indicative of the correct input
state are sent to ensure dc correctness at the output. If the decoder
receives no internal pulses for more than approximately 5 µs,
the input side is assumed to be unpowered or nonfunctional, in
which case the isolator output is forced to a default state by the
watchdog timer circuit. This situation should occur in the
ADuM5400 only during power-up and power-down operations.

The limitation on the ADuM5400 magnetic field immunity is
set by the condition in which induced voltage in the receiving
coil of the transformer is sufficiently large to falsely set or reset
the decoder. The following analysis defines the conditions
under which this can occur.

The 3.3 V operating condition of the ADuM5400 is examined
because it represents the most susceptible mode of operation.

The pulses at the transformer output have an amplitude of >1.0 V.
The decoder has a sensing threshold of about 0.5 V, thus estab­lishing a 0.5 V margin in which induced voltages can be tolerated.
The voltage induced across the receiving coil is given by

V = (−dβ/dt)

where:

β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r

is the radius of the nth turn in the receiving coil (cm).

n

∑πr

2

; n = 1, 2, … , N

n

Figure 15. Maximum Allowable External Magnetic Flux Density

For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse
(and is of the worst-case polarity), the received pulse is reduced
from >1.0 V to 0.75 V, which is still well above the 0.5 V sensing
threshold of the decoder.

The preceding magnetic flux density values correspond to
specific current magnitudes at given distances from the
ADuM5400 transformers. Figure 16 expresses these allowable
current magnitudes as a function of frequency for selected
distances. As shown in Figure 16, the ADuM5400 is extremely
immune and can be affected only by extremely large currents
operated at high frequency very close to the component. For
example, at a magnetic field frequency of 1 MHz, a 0.5 kA current
placed 5 mm away from the ADuM5400 is required to affect the
operation of the component.

Figure 16. Maximum Allowable Current

for Various Current-to-ADuM5400 Spacings

Rev. B | Page 13 of 16

ADuM5400 Data Sheet

Note that in the presence of strong magnetic fields and high
frequencies, any loops formed by PCB traces may induce error
voltages sufficiently large to trigger the thresholds of succeeding
circuitry. Exercise care in the layout of such traces to avoid this
possibility.

POWER CONSUMPTION

The V
data channels, as well as to the power converter. For this reason,
the quiescent currents drawn by the data converter and the
primary and secondary I/O channels cannot be determined
separately. All of these quiescent power demands have been
combined into the I
total I
operating current; the dynamic current due to high data rate,
and any external I

Dynamic I/O current is consumed only when operating a channel
at speeds higher than the refresh rate of f
of each channel is determined by its data rate. Figure 12 shows
the current for a channel in the forward direction, meaning that
the input is on the V

The following relationship allows the total I
calculated:

where:

I

DD1

I

CHn

Figure 12.

I

ISO

E is the power supply efficiency at 100 mA load from Figure 4

at the V

The maximum external load can be calculated by subtracting
the dynamic output load from the maximum allowable load.

where:

I

ISO(LOAD)

side load.

power supply input provides power to the iCoupler

DD1

current, as shown in Figure 17. The

DD1(Q)

supply current is equal to the sum of the quiescent

DD1

load.

ISO

I

DD1

I

DD1

CONVERTER

PRIMARY

I

DDP(D)

PRIMARY

DATA

I/O

4-CHANNEL

Figure 17. Power Consumption Within the ADuM5400

side of the part.

DD1

= (I

× V

ISO

)/(E × V

ISO

DD1

CONVERTER
SECONDARY

SECONDARY

DATA

4-CHANNEL

) + Σ I

I

ISO(D)

I/O

. The dynamic current

r

; n = 1 to 4 (1)

CHn

I

ISO

current to be

DD1

is the total supply input current.
is the current drawn by a single channel determined from

is the current drawn by the secondary side external load.

ISO

I

ISO(LOAD)

and V

condition of interest.

DD1

= I

ISO(MAX)

− Σ I

; n = 1 to 4 (2)

ISO(D)n

is the current available to supply an external secondary

7509-021

I

is the maximum external secondary side load current

ISO(MAX)

available at V

I

is the dynamic load current drawn from V

ISO(D)n

ISO

.

by an

ISO

output channel, as shown in Figure 11.

The preceding analysis assumes a 15 pF capacitive load on
each data output. If the capacitive load is larger than 15 pF,
the additional current must be included in the analysis of I
and I

ISO(LOAD)

.

DD1

POWER CONSIDERATIONS

The ADuM5400 power input, the data input channels on the
primary side, and the data output channels on the secondary side
are all protected from premature operation by UVLO circuitry.
Below the minimum operating voltage, the power converter holds
its oscillator inactive, and all input channel drivers and refresh
circuits are idle. Outputs are held in a low state to prevent trans­mission of undefined states during power-up and power-down
operations.

During application of power to V
is held idle until the UVLO preset voltage is reached.

The primary side input channels sample the input and send a
pulse to the inactive secondary output. As the secondary side
converter begins to accept power from the primary, the V
voltage starts to rise. When the secondary side UVLO is reached,
the secondary side outputs are initialized to their default low
state until data, either from a logic transition or a dc refresh
cycle, is received from the corresponding primary side input. It
can take up to 1 μs after the secondary side is initialized for the
state of the output to correlate to the primary side input.

The dc-to-dc converter section goes through its own power-up
sequence. When UVLO is reached, the primary side oscillator
also begins to operate, transferring power to the secondary power
circuits. The secondary V

voltage is below its UVLO limit at

ISO

this point; the regulation control signal from the secondary is
not being generated. The primary side power oscillator is allowed
to free run in this circumstance, supplying the maximum amount
of power to the secondary, until the secondary voltage rises to its
regulation setpoint. This creates a large inrush current transient
at V

. When the regulation point is reached, the regulation

DD1

control circuit produces the regulation control signal that mod­ulates the oscillator on the primary side. The V
reduced and is then proportional to the load current. The
inrush current is less than the short-circuit current shown in
Figure 7. The duration of the inrush depends on the V
conditions and the current available at the V

Because the rate of charge of the secondary side is dependent on
load conditions, the input voltage, and the output voltage level
selected, ensure that the design allows the converter to stabilize
before valid data is required.

, the primary side circuitry

DD1

current is

DD1

load

ISO

pin.

DD1

ISO

Rev. B | Page 14 of 16

Data Sheet ADuM5400

0V

RATED PEAK VOLTAGE

07509-022

0V

RATED PEAK VOLTAGE

07509-024

0V

RATED PEAK VOLTAGE

07509-023

When power is removed from V

, the primary side converter

DD1

and coupler shut down when the UVLO level is reached. The
secondary side stops receiving power and starts to discharge.
The outputs on the secondary side hold the last state that they
received from the primary until one of these events occurs:

• The UVLO level is reached and the outputs are placed in

their high impedance state.

• The outputs detect a lack of activity from the inputs and

the outputs transition to their default low state until the
secondary power reaches UVLO and the outputs transition
to their high impedance state.

THERMAL ANALYSIS

The ADuM5400 consists of four internal die attached to a split
lead frame with two die attach paddles. For the purposes of
thermal analysis, the die are treated as a thermal unit, with the
highest junction temperature reflected in the θ
The value of θ

is based on measurements taken with the part

JA

from Ta b l e 5.

JA

mounted on a JEDEC standard 4-layer board with fine width
traces and still air. Under normal operating conditions, the
ADuM5400 operates at full load up to 85°C and at derated load
up to 105°C.

INSULATION LIFETIME

All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insu­lation degradation depends on the characteristics of the voltage
waveform applied across the insulation. Analog Devices conducts
an extensive set of evaluations to determine the lifetime of the
insulation structure within the ADuM5400.

Accelerated life testing is performed using voltage levels higher
than the rated continuous working voltage. Acceleration factors
for several operating conditions are determined, allowing calcu­lation of the time to failure at the working voltage of interest.
Table 11 summarizes the peak voltages for 50 years of service
life in several operating conditions. In many cases, the working
voltage approved by agency testing is higher than the 50-year
service life voltage. Operation at working voltages higher than
the service life voltage listed can lead to premature insulation
failure.

The insulation lifetime of the ADuM5400 depends on the
voltage waveform type imposed across the isolation barrier.
The iCoupler insulation structure degrades at different rates,
depending on whether the waveform is bipolar ac, unipolar ac,
or dc. Figure 18, Figure 19, and Figure 20 illustrate these
different isolation voltage waveforms.

Bipolar ac voltage is the most stringent environment. A 50-year
operating lifetime under the bipolar ac condition determines
the maximum working voltage recommended by Analog Devices.

In the case of unipolar ac or dc voltage, the stress on the insulation
is significantly lower. This allows operation at higher working
voltages while still achieving a 50-year service life. The working
voltages listed in Tabl e 11 can be applied while maintaining the
50-year minimum lifetime, provided that the voltage conforms
to either the unipolar ac or dc voltage cases.

Any cross-insulation voltage waveform that does not conform
to Figure 19 or Figure 20 should be treated as a bipolar ac wave­form, and its peak voltage limited to the 50-year lifetime voltage
value listed in Table 11.

The voltage presented in Figure 20 is shown as sinusoidal for
illustration purposes only. It is meant to represent any voltage
waveform varying between 0 V and some limiting value. The
limiting value can be positive or negative, but the voltage cannot
cross 0 V.

Figure 18. Bipolar AC Waveform

Figure 19. DC Waveform

Figure 20. Unipolar AC Waveform

Rev. B | Page 15 of 16

ADuM5400 Data Sheet

C

OUTLINE DIMENSIONS

10.50 (0.4134)

10.10 (0.3976)

BSC

9

7.60 (0.2992)

7.40 (0.2913)

8

10.65 (0.4193)

10.00 (0.3937)

2.65 (0.1043)

2.35 (0.0925)

SEATING
PLANE

8°
0°

0.33 (0.0130)

0.20 (0.0079)

0
0

.

7

.

2

(

5

0

(

5

0

)

.

0

2

9

5

9

8

)

.

0

0

1.27 (0.0500)

0.40 (0.0157)

45°

03-27-2007-B

0.30 (0.0118)

0.10 (0.0039)

OPLANARITY

0.10

16

1

1.27 (0.0500)

0.51 (0.0201)

0.31 (0.0122)

CONTROLLING DIMENSIONSARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR USE IN DESIGN.

COMPLIANT TO JEDEC STANDARDS MS-013-AA

Figure 21. 16-Lead Standard Small Outline Package [SOIC_W]

Wide Body

(RW-16)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Number

Model

1, 2

of Inputs,
V

Side

DD1

ADuM5400ARWZ 4 0 1 100 40 −40°C to +105°C 16-Lead SOIC_W RW-16
ADuM5400CRWZ 4 0 25 60 6 −40°C to +105°C 16-Lead SOIC_W RW-16

1

Z = RoHS Compliant Part.

2

Tape and reel are available. The addition of an RL suffix designates a 13” (1,000 units) tape and reel option.

Number
of Inputs,
V

Side

ISO

Maximum
Data Rate
(Mbps)

Maximum
Propagation
Delay, 5 V (ns)

Maximum
Pulse Width
Distortion (ns)

Temperature
Range

Package
Description

Package
Option

©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07509-0-6/12(B)

Rev. B | Page 16 of 16