High side or low side relative to input: ±700 V
High-side/low-side differential: 700 V
PEAK
0.1 A peak output current
CMOS input threshold levels
High frequency operation: 5 MHz maximum
High common-mode transient immunity: >75 kV/μs
High temperature operation: 105°C
Wide body, RoHS compliant, 16-lead SOIC
UL1577 2500 V rms input-to-output withstand voltage
The ADuM12341 is an isolated, half-bridge gate driver that
employs the Analog Devices, Inc. iCoupler® technology to
provide independent and isolated high-side and low-side
outputs. Combining high speed CMOS and monolithic
transformer technology, this isolation component provides
outstanding performance characteristics superior to
optocoupler-based solutions.
By avoiding the use of LEDs and photodiodes, this iCoupler
gate drive device is able to provide precision timing characteristics
not possible with optocouplers. Furthermore, the reliability and
performance stability problems associated with optocoupler
LEDs are avoided.
In comparison to gate drivers employing high voltage level
translation methodologies, the ADuM1234 offers the benefit
of true, galvanic isolation between the input and each output.
Each output can be operated up to ±700 V
input, thereby supporting low-side switching to negative voltages.
The differential voltage between the high side and low side can be
as high as 700 V
PEAK
.
As a result, the ADuM1234 provides reliable control over the
switching characteristics of IGBT/MOSFET configurations over
a wide range of positive or negative switching voltages.
relative to the
PEAK
FUNCTIONAL BLOCK DIAGRAM
ADuM1234
116
V
IA
215
V
IB
314
V
DD1
413
GND
1
DISABLE
5
6
NC
7
NC
8
V
DD1
NC = NO CONNECT
1
Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,329. Other patents pending.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Part-to-Part Matching, Rising or Falling Edges
Part-to-Part Matching, Rising vs. Falling
Output Rise/Fall Time (10% to 90%) tR/tF 25 ns CL = 200 pF
1
Short-circuit duration less than 1 second.
2
The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3
The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4
t
propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. t
PHL
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
Channel-to-channel matching, rising or falling edges, is the magnitude of the propagation delay diffe
are either both rising or falling edges. The supply voltages and the loads on each channel are equal.
6
Channel-to-channel matching, rising vs. falling edges, is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7
Part-to-part matching, rising or falling edges, is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8
Part-to-part matching, rising vs. falling edges, is the magnitude of the propagation delay difference between the same cha
is
a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
≤ 5.5 V, 12 V ≤ V
DD1
Current B, Quiescent
Current B, 10 Mbps
4
t
2
PW 100 ns C
≤ 18 V, 12 V ≤ V
DDA
1
I
3
10 Mbps C
≤ 18 V. All minimum/maximum specifications apply over the entire recommended
DDB
= 25°C, V
A
3.0 4.2 mA
DDI(Q)
I
,
DDA(Q)
I
DDB(Q)
6.0 9.0 mA
DDI(10)
I
,
DDA(10)
I
DDB(10)
, IIB,
I
IA
I
DISABLE
OAH,VOBH
OAL,VOBL
, I
OA(SC)
, t
PHL
PLH
0.3 1.2 mA
16 22 mA C
−10 +0.01 +10 μA 0 V ≤ VIA, VIB, V
V
DD1
V
V
DDA
DDB
− 0.1,
− 0.1
V
DDA
0.1 V IOA, I
100 mA
OB(SC)
97 124 160 ns CL = 200 pF
, V
= 5 V, V
DD1
V IOA, I
DDB
= 15 V, V
DDA
V
DD1
= 15 V. All voltages are
DDB
= 200 pF
L
= −1 mA
OB
= +1 mA
OB
= 200 pF
L
= 200 pF
L
Change vs. Temperature 100 ps/°C CL = 200 pF
− t
| PWD 8 ns CL = 200 pF
PHL
5 ns CL = 200 pF
6
13 ns CL = 200 pF
7
55 ns C
63 ns CL = 200 pF, Input tR = 3 ns
rence between two channels of the same part when the inputs
nnels of two different parts when one input
= 200 pF, Input tR = 3 ns
L
propagation delay is
PLH
Rising or Falling Edges
Rising vs. Falling Edges
8
Edges
PLH
5
DISABLE
≤ V
DD1
Rev. 0 | Page 3 of 12
Page 4
ADuM1234
PACKAGE CHARACTERISTICS
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions
Resistance (Input-to-Output)
Capacitance (Input-to-Output)
Input Capacitance CI 4.0 pF
IC Junction-to-Ambient Thermal Resistance θJA 76 °C/W
1
The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM1234 has been approved by the organization listed in Table 3. Refer to Tab l e 7 and the Insulation Lifetime section for details
regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels.
Table 3.
UL
Recognized under the 1577 component recognition program
Single/basic insulation, 2500 V rms isolation voltage
1
In accordance with UL1577, each ADuM1234 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 μA).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
1
R
1
C
1012 Ω
I-O
2.0 pF f = 1 MHz
I-O
1
Table 4.
Parameter Symbol Value Unit Conditions
Rated Dielectric Insulation Voltage 2500 V rms 1 minute duration
Minimum External Air Gap (Clearance) L(I01) 7.7 min mm
Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 8.1 min mm
Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
RECOMMENDED OPERATING CONDITIONS
Table 5.
Parameter Symbol Min Max Unit
Operating Temperature TA −40 +105 °C
Input Supply Voltage
Output Supply Voltages
Input Signal Rise and Fall Times 100 ns
Common-Mode Transient Immunity, Input-to-Output
Common-Mode Transient Immunity, Between Outputs
Transient Immunity, Supply Voltages
1
All voltages are relative to their respective ground.
2
See the section for additional data.Common-Mode Transient Immunity
1
V
1
V
2
−75 +75 kV/μs
2
2
−75 +75 kV/μs
−75 +75 kV/μs
4.5 5.5 V
DD1
, V
12 18
DDA
DDB
Rev. 0 | Page 4 of 12
Page 5
ADuM1234
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Table 6.
Parameter Rating
Storage Temperature (TST) −55°C to +150°C
Ambient Operating Temperature (TA) −40°C to +105°C
Input Supply Voltage (V
Output Supply Voltage1 (V
Input Voltage1 (VIA, VIB)
Output Voltage
1
VOA −0.5 V to V
VOB −0.5 V to V
Input-to-Output Voltage
Output Differential Voltage
Output DC Current (IOA, IOB) −20 mA to +20 mA
Common-Mode Transients
1
All voltages are relative to their respective ground.
2
Input-to-output voltage is defined as GNDA − GND1 or GNDB − GND1.
3
Output differential voltage is defined as GNDA − GNDB.
4
Refers to common-mode transients across any insulation barrier.
Common-mode transients exceeding the absolute maximum ratings
may cause latch-up or permanent damage.
1
)
−0.5 V to +7.0 V
DD1
)
−0.5 V to +27 V
DDA
, V
DDB
−0.5 V to V
2
−700 V
3
700 V
4
PEAK
−100 kV/μs to +100 kV/μs
DDI
DDA
DDB
to +700 V
PEAK
+ 0.5 V
+ 0.5 V
+ 0.5 V
PEAK
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Table 7. Maximum Continuous Working Voltage1
Parameter Max Unit Constraint
AC Voltage, Bipolar Waveform 565 V peak
AC Voltage, Unipolar Waveform V peak
Basic Insulation 700 V peak
50-year minimum lifetime
Analog Devices recommended maximum working voltage
DC Voltage
Basic Insulation 700 V peak
1
Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details.
Analog Devices recommended maximum working voltage
Rev. 0 | Page 5 of 12
Page 6
ADuM1234
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
V
V
DD1
GND
DISABLE
NC
NC
V
DD1
1
IA
2
IB
3
ADuM1234
4
1
TOP VIEW
(Not to Scale)
5
6
7
8
NC = NO CONNECT
16
V
DDA
15
V
OA
14
GND
A
NC
13
12
NC
11
V
DDB
10
V
OB
9
GND
B
6920-002
Figure 2. Pin Configuration
Table 8. ADuM1234 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
2 V
1
31, 8
V
IA
IB
DD1
4 GND
1
Logic Input A.
Logic Input B.
Input Supply Voltage, 4.5 V to 5.5 V.
Ground Reference for Input Logic Signals.
5 DISABLE Input Disable. Disables the isolator inputs and refresh circuits. Outputs take on default low state.
6, 7, 122, 13
9 GND
2
NC No Connect.
B
Ground Reference for Output B.
10 VOB Output B.
11 V
Output B Supply Voltage, 12 V to 18 V.
DDB
14 GNDA Ground Reference for Output A.
15 VOA Output A.
16 V
1
Pin 3 and Pin 8 are internally connected. Connecting both pins to V
2
Pin 12 and Pin 13 are floating and should be left unconnected.
Output A Supply Voltage, 12 V to 18 V.
DDA
is recommended.
DD1
Table 9. Truth Table (Positive Logic)
VIA/VIB Input V
State DISABLE VOA/VOB Output Notes
DD1
H Powered L H
L Powered L L
X Unpowered X L Output returns to input state within 1 μs of V
X Powered H L
power restoration.
DD1
Rev. 0 | Page 6 of 12
Page 7
ADuM1234
G
A
A
G
A
A
G
A
A
TYPICAL PERFOMANCE CHARACTERISTICS
7
115
6
5
4
3
2
INPUT CURRENT (mA)
1
0
DATA RATE (Mbps)
Figure 3. Typical Input Supply Current Variation with Data Rate
18
16
14
12
10
8
6
OUTPUT CURRENT (mA)
4
2
0
DATA RATE (Mbps)
Figure 4. Typical Output Supply Current Variation with Data Rate
120
114
113
Y (ns)
112
TION DEL
111
PROPA
110
1002468
06920-006
109
CH. B, FALLING EDG E
CH. A, FALLING EDGE
CH. A, RISING EDG E
CH. B, RISING EDGE
OUTPUT SUPPLY VOLTAGE (V)
181215
06920-009
Figure 6. Typical Propagation Delay Variation with Output Supply Voltage
(Input Supply Voltage = 5.0 V)
115
114
113
Y (ns)
112
TION DEL
111
PROPA
110
1002468
06920-007
109
CH. B, FALLING EDG E
INPUT SUPPLY VOLTAGE (V)
CH. A, FALLING EDGE
CH. A, RISING EDG E
CH. B, RISING EDGE
5.54.55.0
06920-010
Figure 7. Typical Propagation Delay Variation with Input Supply Voltage
(Output Supply Voltage = 15.0 V)
115
Y (ns)
110
TION DEL
105
PROPA
100
TEMPERATURE (°C)
120–40020–20406080100
06920-008
Figure 5. Typical Propagation Delay Variation with Temperature
Rev. 0 | Page 7 of 12
Page 8
ADuM1234
APPLICATION NOTES
COMMON-MODE TRANSIENT IMMUNITY
In general, common-mode transients consist of linear and
sinusoidal components. The linear component of a commonmode transient is given by
V
where ΔV/Δt is the slope of the transient shown in Figure 11
and Figure 12.
The transient of the linear component is given by
dV
Figure 8 characterizes the ability of the ADuM1234 to operate
correctly in the presence of linear transients. The data is based
on design simulation and is the maximum linear transient
magnitude that the ADuM1234 can tolerate without an
operational error. This data shows a higher level of robustness
than what is listed in Tab le 5 because the transient immunity
values obtained in Tabl e 5 use measured data and apply
allowances for measurement error and margin.
Figure 8. Transient Immunity (Linear Transients) vs. Temperature
The sinusoidal component (at a given frequency) is given by
V
CM, sinusoidal
= V0sin(2πft)
where:
V
is the magnitude of the sinusoidal.
0
f is the frequency of the sinusoidal.
The transient magnitude of the sinusoidal component is given by
dV
/dt = 2πf V0
CM
Figure 9 and Figure 10 characterize the ability of the
ADuM1234 to operate correctly in the presence of sinusoidal
transients. The data is based on design simulation and is the
maximum sinusoidal transient magnitude (2πf V
) that the
0
ADuM1234 can tolerate without an operational error. Values
for immunity against sinusoidal transients are not included in
Tabl e 5 because measurements to obtain such values have not
been possible.
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of
insulation degradation depends on the characteristics of the
voltage waveform applied across the insulation. In addition to
the testing performed by the regulatory agencies, Analog
Devices conducts an extensive set of evaluations to determine
the lifetime of the insulation structure within the ADuM1234.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage.
Acceleration factors for several operating conditions are
determined. These factors allow calculation of the time to
failure at the actual working voltage. Table 7 summarizes the
peak voltages for 50 years of service life for a bipolar ac
operating condition and the maximum Analog Devices
recommended working voltages. In many cases, the approved
working voltage is higher than the 50-year service life voltage.
Operation at these high working voltages can lead to shortened
insulation life in some cases.
The insulation lifetime of the ADuM1234 depends on the
voltage waveform type imposed across the isolation barrier.
The iCoupler insulation structure degrades at different rates
depending on whether the waveform is bipolar ac, unipolar ac,
or dc. Figure 14, Figure 15, and Figure 16 illustrate these
different isolation voltage waveforms.
Bipolar ac voltage is the most stringent environment. The goal
of a 50-year operating lifetime under the ac bipolar condition
determines the maximum working voltage recommended by
Analog Devices.
In the case of unipolar ac or dc voltage, the stress on the insu-
06920-005
lation is significantly lower. This allows operation at higher
working voltages while still achieving a 50-year service life.
The working voltages listed in Tab l e 7 can be applied while
maintaining the 50-year minimum lifetime provided the voltage
conforms to either the unipolar ac or dc voltage cases. Any cross
insulation voltage waveform that does not conform to Figure 15
or Figure 16 should be treated as a bipolar ac waveform and its
peak voltage should be limited to the 50-year lifetime voltage
value listed in Tabl e 7. Note that the voltage presented in Figure 15
is shown as sinusoidal for illustration purposes only. It is meant
to represent any voltage waveform varying between 0 V and
some limiting value. The limiting value can be positive or
negative, but the voltage cannot cross 0 V.
RATED PEAK VOLT AGE
0V
Figure 14. Bipolar AC Waveform
06920-014
RATED PEAK VOLT AGE
0V
Figure 15. Unipolar AC Waveform
06920-015
RATED PEAK VOLT AGE
0V
Figure 16. DC Waveform
06920-016
Rev. 0 | Page 9 of 12
Page 10
ADuM1234
C
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
0.30 (0.0 118)
0.10 (0.0039)
OPLANARITY
0.10
ORDERING GUIDE
No. of
Model
ADuM1234BRWZ
1
2 0.1 15 −40°C to +105°C 16-Lead SOIC_W RW-16
ADuM1234BRWZ-RL1,
1
Z = RoHS Compliant Part.
2
13-inch tape and reel option (1,000 units).
Channels
2
2 0.1 15 −40°C to +105°C 16-Lead SOIC_W RW-16
BSC
9
7.60 (0.2992)
7.40 (0.2913)
8
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
8°
0°
0.33 (0.0130)
0.20 (0.0079)
5
0
.
7
0
.
2
5
16
1
1.27 (0.0500)
0.51 (0.0201)
0.31 (0.0122)
CONTROLL ING DIMENS IONS ARE IN MILLIM ETERS; INCH DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-O FF MIL LIMETE R EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-013- AA
Figure 17. 16-Lead Standard Small Outline Package [SOIC_W]