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ADSP-TS101S EZ-KIT Lite
®
Evaluation System Manual
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
Revision 2.1, April 2006
Part Number
82-000635-01
a
Page 2
Copyright Information
©2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document
may not be reproduced in any form without prior, express written consent
from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, TigerSHARC, VisualDSP++, the VisualDSP++
logo, CROSSCORE, the CROSSCORE logo, and EZ-KIT Lite are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
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Regulatory Compliance
The ADSP-TS101S EZ-KIT Lite evaluation system has been certified to
comply with the essential requirements of the European EMC directive
89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE”
mark.
The ADSP-TS101S EZ-KIT Lite evaluation system had been appended to
Analog Devices Development Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE
Certification by an appointed European Competent Body and is on file.
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
Page 4
Page 5
CONTENTS
PREFACE
Purpose of This Manual ................................................................. xii
Intended Audience ......................................................................... xii
Manual Contents .......................................................................... xiii
What’s New in This Manual .......................................................... xiii
Technical or Customer Support ...................................................... xiv
Supported Processors ...................................................................... xiv
Product Information ....................................................................... xv
MyAnalog.com .......................................................................... xv
Processor Product Information ................................................... xv
Related Documents .................................................................. xvi
Online Technical Documentation ............................................ xvii
Accessing Documentation From VisualDSP++ .................... xviii
Accessing Documentation From Windows .......................... xviii
Accessing Documentation From Web ................................... xix
Printed Manuals ....................................................................... xix
VisualDSP++ Documentation Set ......................................... xix
Hardware Tools Manuals ...................................................... xix
Processor Manuals ................................................................. xx
ADSP-TS101S EZ-KIT Lite Evaluation System Manual v
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CONTENTS
Data Sheets .......................................................................... xx
Notation Conventions ................................................................... xxi
USING ADSP-TS101S EZ-KIT LITE
Package Contents ......................................................................... 1-2
Default Configuration .................................................................. 1-3
Installation and Session Startup ..................................................... 1-5
Evaluation License Restrictions ..................................................... 1-7
Memory Map ............................................................................... 1-7
SDRAM Interface ......................................................................... 1-8
Programmable FLAG Pins ............................................................ 1-9
Interrupt Pins ............................................................................. 1-10
Flash Memory ............................................................................ 1-11
Audio Interface ........................................................................... 1-11
Example Programs ...................................................................... 1-12
Flash Programmer Utility ............................................................ 1-13
Handling ADSP-TS101S EZ-KIT Lite Flash Memory ............ 1-13
ADSP-TS101S EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
External Port ........................................................................... 2-3
Expansion Interface ................................................................. 2-3
JTAG Emulation Port ............................................................. 2-4
DIP Switch Settings ...................................................................... 2-4
Control Impedance Selection ................................................... 2-5
vi ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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CONTENTS
Drive Strength Selection .......................................................... 2-5
Boot Mode Settings ................................................................. 2-6
Interrupt Enable Settings ......................................................... 2-7
Clock Mode Settings ............................................................... 2-7
LEDs and Push Buttons ................................................................ 2-8
USB Monitor LED (LED1) ..................................................... 2-8
Reset LEDs (LED2, LED8–9) ................................................. 2-8
Power LED (LED3) ................................................................. 2-9
FLAG LEDs (LED4–7) ......................................................... 2-10
Reset Push Button (SW1) ...................................................... 2-10
Programmable FLAG Push Buttons (SW2, SW4–5, and SW9) 2-10
Interrupt Push Buttons (SW3 and SW6) ................................ 2-11
Connectors ................................................................................. 2-12
Audio (P2 and P3) ................................................................. 2-12
USB (P4) .............................................................................. 2-13
JTAG (P5) ............................................................................ 2-13
Expansion Interface (P11–13) ................................................ 2-14
Link Ports (P7–10) ................................................................ 2-14
Power Connector (P14) ......................................................... 2-15
Power Supply Specifications ........................................................ 2-15
ADSP-TS101S EZ-KIT LITE BILL OF MATERIALS
ADSP-TS101S EZ-KIT LITE SCHEMATIC
Title Page .................................................................................... B-1
ADSP-TS101S EZ-KIT Lite Evaluation System Manual vii
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CONTENTS
Processor A ................................................................................... B-2
Processor B ................................................................................... B-3
SDRAM and Flash ....................................................................... B-4
Audio Interface ............................................................................. B-5
Audio In Amplifiers ...................................................................... B-6
Audio Out Amplifiers ................................................................... B-7
Push Buttons and LEDs ................................................................ B-8
Configuration ............................................................................... B-9
Expansion Connectors ................................................................ B-10
Power Supply .............................................................................. B-11
Caps ........................................................................................... B-12
INDEX
viii ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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PREFACE
Thank you for purchasing the ADSP-TS101S EZ-KIT Lite®, Analog
Devices (ADI) evaluation system for TigerSHARC
embedded processors.
The TigerSHARC processor is a static super scalar (SSS) architecture targeted at software-defined radio applications. In these wireless
infrastructure applications, the TigerSHARC processor is replacing
field-programmable gate arrays (FPGAs) in the chip rate processing applications for third generation cellular. The performance, flexibility,
multiprocessing and IO capabilities of the TigerSHARC processor makes
it superior to FPGA implementations.
The evaluation board is designed to be used in conjunction with the VisualDSP++
ADSP-TS101S TigerSHARC processor. The VisualDSP++ development
environment gives you the ability to perform advanced application code
development and debug, such as:
®
development environment to test the capabilities of the
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-TS101S assembly
• Load, run, step-in, step-out, step-over, halt, and set breakpoints in
application program
®
floating-point
• Profile programs
• Read and write data and program memory
ADSP-TS101S EZ-KIT Lite Evaluation System Manual ix
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• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-TS101S processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface gives unrestricted access to the ADSP-TS101S processor and the
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools/.
ADSP-TS101S EZ-KIT Lite provides example programs to demonstrate
the capabilities of the evaluation board.
L
Refer to the VisualDSP++ Installation Quick Reference Card for details.
The board features:
The ADSP-TS101S EZ-KIT Lite installation is part of the VisualDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
to “Evaluation License Restrictions” on page 1-7.
• Two Analog Devices ADSP-TS101S processors
D 250 MHz core clock speed
D Configurable core clock mode
• USB debugging interface
• Analog Devices AD1871 96 kHz analog-to-digital converter
(ADC)
D Line-in 3.5 mm stereo jack
x ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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Preface
• Analog Devices AD1854 96 kHz digital-to-analog converter
(DAC)
D Line-out 3.5 mm stereo jack
• SDRAM memory
D 32 MB (4M byte x 64) DIMM
• Flash memory (544K x 8)
D 512K main flash memory
D 32K secondary flash memory
• Interface connectors
D 14-pin emulator connector for JTAG interface
D Link port 0 and link port 1 for each processor
D Expansion interface connectors (not populated)
• General-purpose IO
D 4 push button flags (two for each processor)
D 2 push button interrupts (one for each processor)
D 4 LED flag outputs (two for each processor)
• Analog Devices ADP3338, ADP3339, ADM660, and ADP3170
for voltage regulation
The EZ-KIT Lite board has two external memories: flash memory and
SDRAM. The flash memory can be used to store user-specific boot code.
By configuring the boot mode switch (
SW7) and programming the flash
memory, the board can run as a stand-alone unit. For more information,
see “Memory Map” on page 1-7.
The EZ-KIT Lite board also contains an audio interface, facilitating creation of audio signal processing applications.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual xi
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Purpose of This Manual
Additionally, the EZ-KIT Lite board provides expansion connectors,
allowing you to connect to the processor’s external port (EP).
Purpose of This Manual
The ADSP-TS101S EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes the operation and configuration of the board components and
provides guidelines for running your own code on the ADSP-TS101S
EZ-KIT Lite. Finally, a schematic and a bill of materials are provided as a
reference for future designs.
The product software installation is detailed in the VisualDSP++ Installa-
tion Quick Reference Card
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-TS101 TigerSHARC Processor Hardware Reference and
the ADSP-TS101 TigerSHARC Processor Programming Reference) that
describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
xii ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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Manual Contents
The manual consists of:
• Chapter 1. “Using ADSP-TS101S EZ-KIT Lite” on page 1-1
Provides information on the EZ-KIT Lite from a programmer’s
perspective and outlines the processor’s memory map.
• Chapter 2, “ADSP-TS101S EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the hardware aspects of the evaluation
system.
• Appendix A,“ADSP-TS101S EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
Preface
• Appendix B, “ADSP-TS101S EZ-KIT Lite Schematic” on
page B-1
Provides the resources to allow EZ-KIT Lite board-level debugging
or to use as a reference design.
L
Appendix B now is part of the online Help. The online Help viewers should go to the PDF version of the ADSP-TS101S EZ-KIT
Lite Evaluation System Manual located in the
Manuals
can be found on the Analog Devices Web site:
www.analog.com/processors.
folder on the installation CD. Alternatively, the schematic
Docs\EZ-KIT Lite
What’s New in This Manual
This revision of the ADSP-TS101S EZ-KIT Lite Evaluation System Manual
has been updated for VisualDSP++ 4.5.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual xiii
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Technical or Customer Support
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
processor.tools.support@analog.com
• E-mail processor questions to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This EZ-KIT Lite evaluation system supports the Analog Devices
ADSP-TS101S TigerSHARC embedded processors.
xiv ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from the printed publications (manuals).
Preface
Analog Devices is online at
mation about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
www.analog.com. Our Web site provides infor-
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
Registration:
Visit
www.myanalog.com to sign up. Click Register to use MyAnalog.com.
Registration takes about five minutes and serves as means for you to select
the information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
www.analog.com/processors, which provides access to technical publica-
tions, data sheets, application notes, product overviews, and product
announcements.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual xv
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Product Information
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• E-mail questions or requests for information to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Fax questions or requests for information to
1-781-461-3010 (North America)
+49-89-76903-157 (Europe)
Related Documents
For information on product related development software, see the following publications.
Table 1. Related Processor Publications
Title Description
ADSP-TS101S TigerSHARC Embedded
Processor Datasheet
ADSP-TS101S TigerSHARC Processor
Hardware Reference
TigerSHARC Processor Instruction Set Reference
General functional description, pinout, and timing
Description of internal processor architecture and
all register functions
Description of all allowed processor assembly
instructions
Table 2. Related VisualDSP++ Publications
Title Description
VisualDSP++ User’s Guide Description of VisualDSP++ features and usage
VisualDSP++ Assembler and Preprocessor
Manual
VisualDSP++ C/C++ Complier and
Library Manual for TigerSHARC Processors
Description of the assembler function and commands
Description of the complier function and commands for TigerSHARC processors
xvi ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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Preface
Table 2. Related VisualDSP++ Publications (Cont’d)
Title Description
VisualDSP++ Linker and Utilities Manual Description of the linker function and commands
VisualDSP++ Loader and Utilities Manual Description of the loader/splitter function and com-
mands
L
JTAG emulator, also refer to the documentation that accompanies
the emulator.
All documentation is available online. Most documentation is available in
printed form.
Visit the Technical Library Web site to access all processor and tools manuals and data sheets:
If you plan to use the EZ-KIT Lite board in conjunction with a
http://www.analog.com/processors/resources/technicalLibrary.
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary
Docs folder on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
.pdf files of most manuals are provided in the
File Description
.chm Help system files and manuals in Help format
ADSP-TS101S EZ-KIT Lite Evaluation System Manual xvii
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Product Information
File Description
.htm or
.html
.pdf VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the
Internet Explorer 5.01 (or higher).
Viewing and printing the
Reader (4.0 or higher).
.pdf files requires a PDF reader, such as Adobe Acrobat
.html files requires a browser, such as
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the
VisualDSP++ environment, Windows
®
Explorer, or the Analog Devices
Web site.
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and navigate to the VisualDSP++ documentation via
the Start menu.
To view ADSP-TS101S EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help
window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
Help system files (
.chm) are located in the Help folder, and .pdf files are
located in the Docs folder of your VisualDSP++ installation CD-ROM.
The
Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
xviii ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 19
Your software installation kit includes online Help as part of the Win-
®
dows
interface. These help files provide information about VisualDSP++
and the ADSP-TS101S EZ-KIT Lite evaluation system.
Accessing Documentation From Web
Download manuals at the following Web site:
http://www.analog.com/processors/resources/technicalLibrary/manuals
.
Preface
Select a processor family and book title. Download archive (
.zip) files,
one for each manual. Use any archive management software, such as WinZip, to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir/continent.asp.
Hardware Tools Manuals
To purchase EZ-KIT Lite and in-circuit emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual xix
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Product Information
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
xx ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example Description
Preface
Close command
(File menu)
{this | that} Alternative required items in syntax descriptions appear within curly
[this | that] Optional items in syntax descriptions appear within brackets and sepa-
[this,…] Optional item lists in syntax descriptions appear within brackets
.SECTION Commands, directives, keywords, and feature names are in text with
filename Non-keyword placeholders appear in text with italic style format.
L
a
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
brackets and separated by vertical bars; read the example as
that. One or the other is required.
rated by vertical bars; read the example as an optional
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of
letter gothic font.
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
this.
this or
this or that.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
[
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Wa rn in g
appears instead of this symbol.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual xxi
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Notation Conventions
L
Additional conventions, which apply only to specific chapters, may
appear throughout this document.
xxii ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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1 USING ADSP-TS101S EZ-KIT
LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-TS101S EZ-KIT Lite evaluation system.
The information appears in the following sections.
• “Package Contents” on page 1-2
Lists the items contained in your ADSP-TS101S EZ-KIT Lite
package.
• “Default Configuration” on page 1-3
Shows the default configuration of the ADSP-TS101S EZ-KIT
Lite.
• “Installation and Session Startup” on page 1-5
Instructs how to start a new or open an existing
ADSP-TS101SEZ-KIT Lite session using VisualDSP++.
• “Evaluation License Restrictions” on page 1-7
Describes the restrictions of the VisualDSP++ demo license
shipped with the EZ-KIT Lite.
• “Memory Map” on page 1-7
Describes the ADSP-TS101S EZ-KIT Lite board’s memory map.
• “SDRAM Interface” on page 1-8
Defines the register values needed to configure the external memory for SDRAM access.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 1-1
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Package Contents
• “Programmable FLAG Pins” on page 1-9
Describes the function and use of the programmable FLAG pins on
the EZ-KIT Lite evaluation system.
• “Interrupt Pins” on page 1-10
Describes the function and use of the interrupt pins on the
EZ-KIT Lite evaluation system.
• “Flash Memory” on page 1-11
Describes how to program and use the flash memory.
• “Audio Interface” on page 1-11
Describes how to use and configure the audio interface.
• “Example Programs” on page 1-12
Provides information about the example programs included in the
ADSP-TS101S EZ-KIT Lite evaluation system.
• “Flash Programmer Utility” on page 1-13
Provides information on the Flash Programmer utility included
with VisualDSP++.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For detailed information about programming the ADSP-TS101S TigerSHARC processor, see the documents referred to as “Related
Documents”.
Package Contents
Your ADSP-TS101S EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-TS101S EZ-KIT Lite board
1-2 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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Using ADSP-TS101S EZ-KIT Lite
• VisualDSP++ Installation Quick Reference card
• CD containing:
D VisualDSP++ software
D ADSP-TS101S EZ-KIT Lite debug software
D USB driver files
D Example programs
D ADSP-TS101S EZ-KIT Lite Evaluation System Manual (this
document)
• Universal 7.5V DC power supply
• USB 2.0 cable
• Registration card (please fill out and return)
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
The ADSP-TS101S EZ-KIT Lite board is designed to run outside your
personal computer as a stand-alone unit. You do not have to open your
computer case.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 1-3
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Default Configuration
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components. Figure 1-1 shows the default DIP switch,
connector locations, and LEDs used in installation. Confirm that your
board is set up in the default configuration before using the board.
Figure 1-1. EZ-KIT Lite Hardware Setup
1-4 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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Using ADSP-TS101S EZ-KIT Lite
Installation and Session Startup
L
For correct operation, install the software and hardware in the
order presented in the VisualDSP++ Installation Quick Reference
Card.
1. Verify that the yellow USB monitor LED (
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start –> Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 3.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 4.
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
LED1, located near the
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Ses-
sion from the Session List dialog box.
• From the Session menu, Connect to Target. Then click
New Session from the Session List dialog box.
4. The Select Processor page of the wizard appears on the screen.
Ensure TigerSHARC is selected in Processor family. In Choose a
target processor, select ADSP-TS101. Click Next.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 1-5
Page 28
Installation and Session Startup
5. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen.
In the Select your platform list, select ADSP-TS101S EZ-KIT
Lite via Debug Agent. In Session name, highlight or specify the
session name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and to open a
new session.
Click Next.
7. The Finish page of the wizard appears on the screen. The page dis-
plays your selections. If you are satisfied, click Finish. If not, click
Back to make changes.
L
1-6 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
To disconnect from a session, click the disconnect button
or select Session –> Disconnect from Target.
To delete a session, select Session –> Session List. Select the ses-
sion name from the list and click Delete. Click OK.
Page 29
Using ADSP-TS101S EZ-KIT Lite
Evaluation License Restrictions
The ADSP-TS101S EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
• VisualDSP++ allows a connection to the ADSP-TS101S EZ-KIT
Lite via the USB debug agent interface only. Connections to simulators and emulation products are no longer allowed.
• The linker restricts a users program to 96 KB of internal memory
for code space with no restrictions for data space.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
Memory Map
The ADSP-TS101S processor has 6 M bits of internal memory that can be
used for program storage or data storage. The configuration of internal
memory is detailed in the ADSP-TS101 TigerSHARC Processor Hardware
Reference.
The ADSP-TS101S EZ-KIT Lite board contains 544K x 8-bits of external
flash memory. The memory is separated into two sections. One section
contains 512K bytes of main flash memory, and the other section contains
32K bytes of secondary flash memory. This memory is connected to the
processor’s
space.
The board also contains one 4M x 64-bit SDRAM DIMM. This memory
is connected to the processor’s SDRAM interface.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 1-7
~BMS pin. The flash memory can be accessed in boot memory
Page 30
SDRAM Interface
Table 1-1. EZ-KIT Lite Evaluation Board Memory Map
Start Address End Address Content
Internal Memory
0x0000 0000 0x0000 FFFF Internal memory 0
0x0008 0000 0x0008 FFFF Internal memory 1
0x0010 0000 0x0010 FFFF Internal memory 2
0x0018 0000 0x0018 07FF Internal registers
0x01C0 0000 0x01C0 FFFF Broadcast
0x0200 0000 0x023F FFFF Processor ID 0
0x0240 0000 0x027F FFFF Processor ID 1
External Memory
0x0400 0000 0x047F FFFF External memory space (SDRAM)
SDRAM Interface
The DIMM shipped with the EZ-KIT Lite evaluation board is a 32 MB
module. You can upgrade to a 64 MB or 128 MB module. The module
must be a 168-pin DIMM PC100 device. Modules can be purchased from
such vendors as Viking, Infineon, or Crucial.
L
To properly access SDRAM, the
figured properly. For the supplied DIMM, the
configured as follows: SDRAM enable, CAS latency of two cycles, pipe
depth of zero, page boundary of 256 words (1K words on revision 1.2
boards), refresh rate of every 1200 cycles (every 600 cycles on revision 1.2
boards), pre-charge to RAS of three cycles, RAS to pre-charge of four
cycles, and init sequence is MRS cycle follows refresh.
Revision 1.2 boards are shipped with 128 MB modules, but only
32 MB of the 128 MB can be accessed, and the boards cannot be
upgraded with more memory. The issue is resolved in revision 1.3
boards.
SYSCON and SDRCON registers must be con-
SDRCON register should be
1-8 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 31
Using ADSP-TS101S EZ-KIT Lite
When you are in a VisualDSP++ session and connected to the EZ-KIT
Lite board, the SDRAM registers are set to the default values automatically when a reset operation is performed. Clearing the corresponding
check box accessible through the Target Options dialog box, which is
accessible through the Settings pull-down menu, disables this feature. The
default values are:
•
SYSCON = 0x001A79E7 and SDRCON = 0x00005223 (boards revision
1.2)
•
SDRCON = 0x00005303 (boards revision 1.3 and greater)
[
The SYSCON and SDRCON registers define bus control configuration.
They can be written only once after reset and cannot be changed
during system operation.
Programmable FLAG Pins
Each ADSP-TS101S processor has four programmable flag pins. Two flag
pins from each processor (
running program through the use of a switch (SW2, SW4–5, and SW9). The
FLAG2 and FLAG3 connect to the LEDs (LED4–5 and LED6–7).
After the processor is reset, the programmable flags are configured as
inputs. The direction of each programmable flag is configured in the
SQCTL register. If the flag is configured for output, the value is set in the
SQCTL register. If the flag is configured for input, the value on the flag pin
is read from the SQSTAT register. Programmable flags are summarized in
Table 1-2. For more information on configuring the programmable flag
pins, see the ADSP-TS101 TigerSHARC Processor Hardware Reference.
FLAG0 and FLAG1) allow you to interact with the
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 1-9
Page 32
Interrupt Pins
Table 1-2. Programmable FLAG Pin Summary
FLAG Pin Connection Description
FLAG0_A SW4
FLAG1_A SW9
FLAG0_B SW5
FLAG1_B
FLAG2_A LED7
FLAG3_A LED6
FLAG2_B LED4
FLAG3_B LED5
SW2
The FLAG0 and FLAG1 pins connect to the push buttons
to supply feedback for program execution. For instance,
you can write your code to trigger a routine when the
push button is pressed.
The FLAG2 and FLAG3 pins connect to the LEDs to supply feedback during program execution.
Interrupt Pins
The ADSP-TS101S processor has four interrupt pins (IRQ3-0) that allow
you to interact with the running program. One external interrupt from
each processor is directly accessible through the push button switches (
and
SW6) on the EZ-KIT Lite board. Interrupts are summarized in
Table 1-3. For more information on configuring the interrupt pins, see
the ADSP-TS101 TigerSHARC Processor Programming Reference.
SW3
Table 1-3. Interrupt Pin Summary
Interrupt Pin Connection Description
IRQ0_A SW3 The IRQ0 interrupt connects to push the buttons to sup-
IRQ0_B SW6
ply feedback for program execution. For instance, you
can write your code to perform a different function when
an interrupt is detected.
1-10 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 33
Using ADSP-TS101S EZ-KIT Lite
Flash Memory
The DSM2150 flash/PLD chip provides a total of 544K x 8-bits of external flash memory, arranged into two independent flash arrays (main and
secondary). The chip also has a series of configuration registers to control
IO and PLD. The memory chip is initially configured with the memory
sectors mapped to the processor, as shown in Figure 1-1 on page 1-8.
The DSM2150 can be re-programmed using the FlashLINK JTAG programming cable available from STMicroelectronics (
FlashLINK plugs into any PC parallel port. The software development
tool, PSDsoft Express™, is required to modify the DSM2150 configuration and operate the FlashLINK cable. PSDsoft Express can be
downloaded at no charge from the same Web site.
www.st.com/psd).
Audio Interface
The audio interface allows you to interface to the board’s analog-to-digital
converter (ADC) and digital-to-analog converter (DAC). See “Audio (P2
and P3)” on page 2-12 for more information about the connectors. The
audio interface consists of two main ICs: AD1871 and AD1854.
The AD1871 is a stereo audio ADC intended for digital audio applications requiring high-performance analog-to-digital conversion. The
AD1871 provides 97 dB THD+N and 107 dB dynamic range.
The AD1854 is a high-performance, single-chip stereo, audio DAC delivering 113 dB dynamic range and 112 dB SNR at a 48 kHz sample rate.
Because the ADSP-TS101S processor does not have any SPORTs, a Xilinx
field-programmable gate array (FPGA) generates the audio interface control signals between the processor and the audio circuit. Setting the
signal of
the audio interface has been enabled, the audio data can be transferred to
and from the processor by generating a
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 1-11
DSP_A high enables the audio interface inside of the FPGA. Once
DMAR0 cycle. The audio data inter-
FLAG3
Page 34
Example Programs
faces with the processor via the lowest 24 bits of the data bus (
Refer to the audio example program included in the EZ-KIT Lite installation directory for more information on how to use the interface.
D23-0).
Example Programs
Example programs are provided with the ADSP-TS101S EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software in the
ples\ADSP-TS101 EZ-KIT Lite
installation directory. Please refer to the readme file provided with each
example program for more information.
When running the examples, do not change these bits:
subdirectory of the VisualDSP++
…\TS\Exam-
[
•
DBGEN or NMOD (bits 8 or 9) in the SQCTL register
• DBG (bit 31) in the IMASKH register.
The change can disable communications with the host.
1-12 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 35
Using ADSP-TS101S EZ-KIT Lite
Flash Programmer Utility
The ADSP-TS101S EZ-KIT Lite evaluation system includes a Flash Programmer utility. The utility allows you to program the flash memory on
the EZ-KIT Lite. The Flash Programmer is installed with VisualDSP++.
Once the utility is installed, it is accessible from the Tools pull-down
menu.
Handling ADSP-TS101S EZ-KIT Lite Flash Memory
When the entire flash memory contents is erased using the Flash Programmer (under Advanced Options), you cannot bring up the IDDE and open
an ADSP-TS101S EZ-KIT session.
The following workaround brings the IDDE running again:
1. Power down the EZ-KIT Lite.
2. Move DIP switch 7 into the
3. Power the EZ-KIT Lite board.
4. Start the IDDE.
5. Use the Flash Programmer from the Tools pull-down menu to load
a valid program into the flash memory, such as an example program from the
For more information on the Flash Programmer utility, refer to online
Help.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 1-13
…\TS\Examples\ADSP-TS101 EZ-KIT Lite directory.
OFF position.
Page 36
Flash Programmer Utility
1-14 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 37
2 ADSP-TS101S EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-TS101S EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 2-2
Describes the configuration of the ADSP-TS101S EZ-KIT Lite
evaluation board and explains how the board components interface
with the processor.
• “DIP Switch Settings” on page 2-4
Shows the location and describes the function of the configuration
DIP switch.
• “LEDs and Push Buttons” on page 2-8
Shows the location and describes the function of the LEDs and
push buttons.
• “Connectors” on page 2-12
Shows the location of and gives the part number for all of the connectors on the board. In addition, provides the manufacturer and
part number information for the mating parts.
• “Power Supply Specifications” on page 2-15
Describes the power connector.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-1
Page 38
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board.
Figure 2-1. System Architecture
The EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-TS101S TigerSHARC processor. The processor core voltage is
1.25V. The external interface operates at 3.3V.
An 83.33 MHz SMT oscillator supplies the input clock to the processor.
The speed at which the core operates is determined by the settings of the
processor switch
on page 2-7. By default, the processor core runs at 250 MHz
(83.3 MHz x 3).
2-2 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
SW7. For more information, see “Clock Mode Settings”
Page 39
ADSP-TS101S EZ-KIT Lite Hardware Reference
External Port
The external port is connected to a 544K x 8-bit flash memory. The flash
memory connects to the boot memory select pin (
memory to be used to boot the processor as well as to store information
during normal operation. Refer to “Memory Map” on page 1-7 for infor-
mation about the location of the flash memory on the processor’s memory
map.
The external port is also connected to a 4MB x 64-bit SDRAM DIMM.
Refer to “SDRAM Interface” on page 1-8 for information on how to configure the SDRAM registers.
~BMS), allowing the
Expansion Interface
The expansion interface consists of three connectors (P1–3). The following
table shows the interfaces each connector provides. For the exact pinout of
the expansion connectors, refer to “ADSP-TS101S EZ-KIT Lite Sche-
matic” on page B-1.
Table 2-1. Expansion Connector Interfaces
Connector Interfaces
P11 5V, GND, address, data
P12 3.3V, GND, SDRAM control signals, flags, IRQs, timers
P13 GND, reset, DMA, memory control, CLKOUT, PSD IO signals
When using the expansion interface, limits to the current and to the interface speed must be taken into consideration. The maximum current limit
depends on the regulator capabilities. Additional circuitry can also add
extra loading to signals, decreasing their maximum effective speed.
L
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-3
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
Page 40
DIP Switch Settings
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory, as well as the special function registers
through a 14-pin header. See “JTAG (P5)” on page 2-13 for more infor-
mation about the JTAG connector. To learn more about available
emulators, contact Analog Devices as described in “Processor Product
Information”.
DIP Switch Settings
This section describes the function of the DIP switch, SW7. Figure 2-2
shows the location of the switch.
Figure 2-2. Switch Location
2-4 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 41
ADSP-TS101S EZ-KIT Lite Hardware Reference
Control Impedance Selection
Positions 3 through 1 (CONTROLIMP
the ADC (address/data/controls) and
the ADSP-TS101S TigerSHARC processor data sheet at
log.com/UploadedFiles/Data_Sheets/40196385778873ADSP_TS101S_b.pd
f
for more information.
) of SW7 determine the impedance for
2-0
LINK (all link port outputs). Refer to
http://www.ana-
Table 2-2. Control Impedance Selection
SW7
Position 3
ON ON ON 0 X 0 X
ON ON OFF 0 X 0 X
ON ON 0 X 10
ON OFF 0 X 11
OFF ON ON 100 X
OFF ON OFF 110 X
1
OFF
OFF OFF OFF
1 Default settings
SW7
Position 2
OFF ON 1 0 1 0
SW7
Position 1
ADC Link
dig_ctrl pulse dig_ctrl pulse
111 1
Drive Strength Selection
Positions 6 through 4 (DS
Refer to the ADSP-TS101S TigerSHARC processor data sheet at
http://www.analog.com/UploadedFiles/Data_Sheets/40196385778873ADSP_TS101S_b.pdf
information.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-5
) of SW7 determine the digital drive strength.
2-0
for more
Page 42
DIP Switch Settings
Table 2-3. Drive Strength Selection
SW7 Position 6 SW7 Position 5 SW7 Position 4 Drive Strength
ON ON ON 11%
ON ON OFF 29%
ON OFF ON 37%
ON OFF OFF 49%
OFF ON ON 62%
OFF ON OFF 75%
OFF OFF ON 88%
1
OFF
1 Default settings
OFF OFF 100%
Boot Mode Settings
Position 7 of SW7 determines how the processor boots. Table 2-4 shows
the setting for the boot modes. Refer to the ADSP-TS101S TigerSHARC
processor data sheet at
Files/Data_Sheets/40196385778873ADSP_TS101S_b.pdf
http://www.analog.com/Uploaded-
for more
information.
Table 2-4. Boot Mode Settings
SW7 Position 7 Boot Mode
1
ON
OFF External Boot
1 Default settings
EPROM BOOT
2-6 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 43
ADSP-TS101S EZ-KIT Lite Hardware Reference
Interrupt Enable Settings
Position 8 of SW2 determines how the processor handles interrupts.
Table 2-5 shows the setting for the interrupt modes. Refer to the
ADSP-TS101S TigerSHARC processor data sheet at
log.com/UploadedFiles/Data_Sheets/40196385778873ADSP_TS101S_b.pd
f
for more information.
http://www.ana-
Table 2-5. Interrupt Enable Settings
SW2 Position 8 Interrupt Enable Mode
1
ON
OFF Edge-sensitive mode
1 Default settings
Level-sensitive mode
Clock Mode Settings
Positions 9 through 11 (LCLKRAT
processor’s core speed. The frequency supplied to
may be changed by replacing the 83.33 MHz oscillator (
) of SW7 determine the ADSP-TS101S
2-0
CLKIN of the processor
U28) shipped with
the board with a different oscillator. Ensure that the selected clock mode
and frequency do not exceed the minimum and maximum specifications
of the ADSP-TS101S processor.
Table 2-6 shows the jumper settings for the clock modes. For more infor-
mation on the clock modes, see the ADSP-TS101S processor data sheet at
http://www.analog.com/UploadedFiles/Data_Sheets/40196385778873ADSP_TS101S_b.pdf
.
Table 2-6. Clock Mode Settings
SW7 Position 11 SW7 Position 10 SW7 Position 9 Ratio
ON ON ON 2
ON ON OFF 2.5
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-7
Page 44
LEDs and Push Buttons
Table 2-6. Clock Mode Settings (Cont’d)
SW7 Position 11 SW7 Position 10 SW7 Position 9 Ratio
1
ON
ON OFF OFF 3.5
OFF ON ON 4
OFF ON OFF 5
OFF OFF ON 6
OFF OFF OFF RSVD
1 Default settings
OFF ON 3
LEDs and Push Buttons
This section describes the function of the LEDs and push buttons.
Figure 2-3 shows the locations of the LEDs and push buttons.
USB Monitor LED (LED1)
The USB monitor LED, LED1, indicates that USB communication has
been initialized successfully, allowing you to connect to the processor
using VisualDSP++. If the LED is not lit, try resetting the board and/or
reinstalling the USB driver.
When VisualDSP++ is actively communicating with the EZ-KIT
L
Lite target board, the LED can flicker, indicating communications
handshake.
Reset LEDs (LED2, LED8–9)
When LED2 is lit, the USB interface is being reset. The USB interface is
reset only when it is not configured. Once the USB interface has been
configured, you must remove power to reset.
2-8 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 45
ADSP-TS101S EZ-KIT Lite Hardware Reference
Figure 2-3. LEDs and Push Button Locations
When LED8 is lit, it indicates that the master reset of all the major ICs is
active.
When
LED9 is lit, the two ADSP-TS101S processors (U1 and U2) are being
reset. The USB interface resets the ADSP-TS101S processor during USB
communication initialization.
Power LED (LED3)
The green LED, LED3, indicates that power is being properly supplied to
the board.
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-9
Page 46
LEDs and Push Buttons
FLAG LEDs (LED4–7)
The flag LEDs connect to the processor’s flag pins (FLAG2 and FLAG3).
These LEDs are active high and are lit by an output of “
cessor. Refer to “SDRAM Interface” on page 1-8 for more information on
how to utilize the flags when programming the processor. Table 2-7 shows
the
FLAG signals and the corresponding LEDs.
Table 2-7. FLAG LEDs
FLAG Pin LED Reference Designator
FLAG2_A LED7
FLAG3_A LED6
FLAG2_B LED4
FLAG3_B LED5
1” from the pro-
Reset Push Button (SW1)
The RESET push button, SW1, resets all the ICs on the board, except the
USB interface after it has been configured.
Programmable FLAG Push Buttons (SW2, SW4–5,
and SW9)
Four push buttons are provided for general-purpose user input. The SW2,
SW4, SW5, and SW9 push buttons connect to the processor’s programmable
FLAG pins. The push buttons are active high and when pressed, send a
high (
1) to the processor. Refer to “SDRAM Interface” on page 1-8 for
more information on how to use the flags when programming the processor. Table 2-8 shows the flag signals and the corresponding switches.
2-10 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 47
ADSP-TS101S EZ-KIT Lite Hardware Reference
Table 2-8. FLAG Push Buttons
FLAG Pin Push Button Reference Designator
FLAG0_A SW4
FLAG1_A SW9
FLAG0_B SW5
FLAG1_B SW2
Interrupt Push Buttons (SW3 and SW6)
Two push buttons, SW3 and SW6, are provided for user input. The push
buttons connect to the processor’s interrupt pins. The push buttons are
active low and, when pressed, send a low (
“SDRAM Interface” on page 1-8 for more information on how to use the
push buttons when programming the processor. Table 2-9 shows the
interrupt signals and corresponding switches.
0) to the processor. Refer to
Table 2-9. Interrupt Push Buttons
FLAG Pin Push Button Reference
Designator
IRQ0_A SW3 IRQ0_B SW6
FLAG Pin Push Button Reference
Designator
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-11
Page 48
Connectors
Connectors
This section describes the connector functionality and provides information about mating connectors. The locations of the connectors are shown
in Figure 2-4.
Figure 2-4. Connector Locations
Audio (P2 and P3)
There are two 3.5 mm stereo audio jacks.
Part Description Manufacturer Part Number
3.5 mm stereo jack SHOGYO SJ-0359AM-5
2-12 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 49
ADSP-TS101S EZ-KIT Lite Hardware Reference
Part Description Manufacturer Part Number
Mating Connector
3.5 mm stereo plug to 3.5 mm stereo cable
RADIO SHACK L12-2397A
USB (P4)
The USB connector is a standard type B USB receptacle.
Part Description Manufacturer Part Number
Type B USB receptacle MILL-MAX 897-30-004-90-000
DIGI-KEY ED90003-ND
Mating Connector
USB cable (provided with the kit) ASSMAN AK672-5
DIGI-KEY AK672-5ND
JTAG (P5)
The JTAG header is the connecting point for a JTAG in-circuit emulator
pod.
L
Pin 3 is missing to provide keying. Pin 3 in the mating connector
should have a plug. When an emulator is connected to the JTAG
header, the USB debug interface is disabled.
[
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-13
When using an emulator with the EZ-KIT Lite board, follow the
connection instructions provided with the emulator.
Page 50
Connectors
Expansion Interface (P11–13)
Three board-to-board connector footprints provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information about the interface, see “Expansion
Interface” on page 2-3. For availability and pricing of the
P13 connectors, contact Samtec.
Part Description Manufacturer Part Number
90-position 0.05” spacing SAMTEC SFM-145-02-S-D
Mating Connectors
P11, P12, and
90-position 0.05” spacing
(through hole)
90-position 0.05” spacing
(surface mount)
90-position 0.05” spacing
(low cost)
SAMTEC TFM-145-x1 series
SAMTEC TFM-145-x2 series
SAMTEC TFC-145 series
Link Ports (P7–10)
Two link ports from each processor connect to a 26-pin connector. Refer
to EE-106 at
Files/Application_Notes/24075233ee_106.pdf
about the link port connectors. EE-106 discusses the link port assignments for ADSP-211xx SHARC processor applications.
In a TigerSHARC processor application, the link port cable connectors
require pins 12 and 13 to be populated. The correct TigerSHARC link
port cable assembly can be obtained from TransTech DSP (TTC44-30).
The associated Gore Coaxial cable (DXN2132) should also be revised for
the proper number of strands to include connector pins 12 and 13.
http://www.analog.com/Uploaded-
for more information
2-14 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 51
ADSP-TS101S EZ-KIT Lite Hardware Reference
Part Description Manufacturer Part Number
26-position connector TRANSTECH DSP TTC44-30
Mating Connectors
Cable connector HONDA RMCA-E26F1S-A
Shroud HONDA RMCA-E26L1A
Coaxial cable GORE DXN2132
Power Connector (P14)
The power connector provides all of the power necessary to operate the
EZ-KIT Lite board.
Part Description Manufacturer Part Number
2.5 mm power jack (
7.5V power supply GLOBTEK TR9CC2000LCP-Y
P14) SWITCHCRAFT RAPC712
DIGI-KEY SC1152-ND
Mating Power Supply (shipped with the EZ-KIT Lite)
Power Supply Specifications
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-10 shows the power connector pinout.
Table 2-10. Power Connectors
Terminal Connection
Center pin +7.5 VDC@2 amps
Outer ring GND
ADSP-TS101S EZ-KIT Lite Evaluation System Manual 2-15
Page 52
Power Supply Specifications
2-16 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 53
A ADSP-TS101S EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-TS101S EZ-KIT Lite Sche-
matic” on page B-1. Please check the latest schematic on the Analog
Devices Web site:
http://www.analog.com/Processors/Processors/DevelopmentTools/tec
hnicalLibrary/manuals/DevToolsIndex.html#Evaluation%20Kit%20Manuals
.
Ref. Qty. Description Reference
Designator
1 3 0.00 1/4W 5% R137,R142–143 YAGEO 0.0QBK-ND
2 1 3.3V-OCTAL-
BUFFER
31 HEX-INVER-SCH
MITT-TRIGGER
4 1 3.3V-OCTAL-
BUFFER
5 1 3.3V 1-10 CLOCK
DRIVER
61 USB-TX/RX
MICROCONTROLLER
7 1 NPN TRANSIS-
TOR 200MA
8 1 128K X 8 SRAM U16 CYPRESS CY7C1019BV33-12VC
91 12.0MHZ
CRYSTAL
U32 TI SN74LVT244BDW
U24 TI 74LVC14AD
U27 IDT IDT74FCT3244APY
U29 IDT IDT74FCT3807AQ
U13 CYPRESS CY7C64603-128NC
Q3 FAIRCHILD MMBT4401
Y1 DIG01 300-6027-ND
Manufacturer Part Number
ADSP-TS101S EZ-KIT Lite Evaluation System Manual A-1
Page 54
Ref. Qty. Description Reference
Designator
Manufacturer Part Number
10 1 XILINX-
SPARTAN2-FPGA
11 8 SINGLE-2-
INPUT-NAND
12 1 N-CHANNEL-
MOSFET
13 1 POWER MOSFET Q1 IR IRFR024
14 1 12.288MHZ
OSCILLATOR
15 1 2N7002 Q5 FAIRCHILD 2N7002
16 1 MMBT3904 Q4 FAIR CHILD MMBT3904
17 2 256Kx16 SRAM U20, U21 GSI TECH-
18 1 FLASH MEMORY U4 STMICRO DSM2150F5V
19 1 32K EEPROM U14 MICROCHIP 24LC32A-I/SN
20 1 83.33MHZ
OSCILLATOR
21 1 FLASH MEMORY U22 ST MICRO DSM2150F5V
22 38 0.01uF 100V 10%
CERM
U19 XILINX XC2S200-6FG256C
U5–6, U15, U26,
U35–U38
Q2 FAIRCHILD FDS6982
U9 DIG01 SG-8002CA-PCC-ND
U28 DIG01 SG-8002CA-PCC-ND
C46–47, C52–53,
C58–59, C64–65,
C74–81, C94–97,
C121–128,
C136–142,
C156–157, C161
TI SN74AHC1G00DBVR
GS74116TP-10
NOLOGY
AVX 12061C103KAT050M
23 2 1000pF 50V 5%
CERM
24 1 150pF 50V 5%
CERM
25 2 2200pF 50V 5%
NPO
C84–85 AVX 12065A102JAT2A
C13 AVX 12065A151JAT2A
C19, C41 AVX 12065A222JAT2A
A-2 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 55
ADSP-TS101S EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference
Designator
26 1 0.1uF 50V 20%
CERM
27 1 VOLTAGE-
SUPERVISOR
28 1 2.5V-1.0AMP
REGULATOR
29 1 5V-1.5A
REGULATOR
30 3 DUAL AUDIO OP
AMP
31 2 ADSP-TS101SKB21
80
32 1 S TE RO- DAC U 8 A NA LO G
33 1 S TE RO- AD C U7 A NA LO G
34 1 SWITCHED-VOLT
-CONVERTER
C16 AVX 12065E104MAT2A
U25 ANALOG
VR1 ANALOG
VR2 ANALOG
U10–12 ANALOG
U1–2 ANALOG
U30 ANALOG
Manufacturer Part Number
DEVICES
DEVICES
DEVICES
DEVICES
DEVICES
DEVICES
DEVICES
DEVICES
ADM708SAR
ADP3338AKC-2.5
ADP3339AKC-5-REEL
SSM2275S
ADSP-TS101SKB2180
AD1854JRS
AD1871YRS
ADM660AR
35 1 SINGLE-PHASE-
CORE-CONTROL
36 1 4.7uF 25V 10%
TANT
37 1 PWR 2.5MM_JACK P14 SWITCH-
38 1 USB 4PIN P4 MILL-MAX 897-30-004-90-000000
39 4 LNKPRT 12X2 P7–10 HONDA
40 7 SPST-MOMEN-
TARY 6M M
41 1 DIP12 SW7 DIGI-KEY CKN3063-ND
U31 ANALOG
DEVICES
CT10 AVX TAJC475K025R
CRAFT
(TSUSHINK)
SW1–6, SW9 PANASONIC EVQ-PAD04M
ADP3170
SC1152-ND12
RMCA-EA26LMY0M03-A
ADSP-TS101S EZ-KIT Lite Evaluation System Manual A-3
Page 56
Ref. Qty. Description Reference
Designator
42 1 IDC 7X2 P1 MOLEX 70247-1401
43 1 168PIN DIMM U3 MOLEX 71251-0012
44 1 7A FAST-ACTING F1 DIG01 283-2438-2-ND
Manufacturer Part Number
45 13 0.00 1/8W 5% R19, R23, R34,
R49–51, R54–55,
R131, R133–134,
R141
46 1 220uF 10V 20%
ELEC
47 5 AMBER-SMT
GULL-WING
48 2 330pF 50V 5%
NPO
49 4 0.01uF 100V 10%
CERM
50 86 0.1uF 50V 10%
CERM
51 9 0.001uF 50V 5%
NPO
CT14 SPRAGUE 293D227X9010E2T
LED1, LED4–7 PANASONIC LN1461C-TR
C20, C26 AVX 08055A331JAT
C10, C165, C167,
C168
C1, C9, C17,
C42–45, C48–51,
C54–57, C60–63,
C66–73, C82–83,
C86–93, C98–120,
C129–135,
C143–155,
C158–160, 162,
C172, C173
C4–6, C12, C28,
C30, C32–33,
C164
YAGEO 0.0ECT-ND
AVX 08051C103KAT2A
AVX 08055C104KAT
AVX 08055A102JAT2A
52 3 10uF 16V 10%
TANT
CT9, CT24–25 SPRAGUE 293D106X9025C2T
A-4 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 57
ADSP-TS101S EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference
Designator
53 35 10K 100MW 5% R8–10, R13, R15,
R30, R32, R36,
R45–47, R52, R53,
R56, R58–59, R61,
R63, R64, R67,
R73–81, R83, R93,
R97, R99, R151,
R152
54 12 33 100MW 5% R22, R66, R68–71,
R98, R130, R135,
R138–140
55 5 4.7K 100MW 5% R28–29, R31, R35,
R20
56 1 1M 100MW 5% R7 AVX CR21-1004F-T
57 1 1.5K 100MW 5% R16 AVX CR21-1501F-T
58 1 22uF 16V 10%
TANT
59 1 2.00K 1/8W 1% R2 DALE CRCW1206-2001FRT1
60 2 49.9K 1/8W 1% R102, R128 AVX CR32-4992F-T
CT26 DIG01 PCT3226CT-ND
Manufacturer Part Number
AVX CR21-103J-T
AVX CR21-330JTR
AVX CR21-4701F-T
61 2 2.21K 1/8W 1% R4–5 AVX CR32-2211F-T
62 11 100pF 100V 5%
NPO
63 3 10uF 16V 10%
TANT
64 6 100 100MW 5% R33, R44, R57,
65 2 220pf 50V 10%
NPO
66 4 1000 100MHZ 1.5A
0.06 CHOKE
C11, C18,
C22–23, C27,
C31, C34–35,
C40, C166, C169
CT15–17 AVX TAJB106K016R
R60, R62, R65
C24, C29 AVX 12061A221JAT2A
L1–L4 MURATA PLM250S40T1
AVX 12061A101JAT2A
AVX CR21-101J-T
ADSP-TS101S EZ-KIT Lite Evaluation System Manual A-5
Page 58
Ref. Qty. Description Reference
Designator
Manufacturer Part Number
67 3 SILICON
RECTIFIER
68 3 600 100MHZ
500MA 0.70 BEAD
69 4 237 1/8W 1% R114, R116, R118,
70 2 750K 1/8W 1% R115, R117 KOA RK73H2BT7503F
71 8 5.76K 1/8W 1% R103, R119–120,
72 2 3.01K 1/8W 1% R82, R85 KOA RK73H2BT3011F
73 2 11.0K 1/8W 1% R101, R129 DALE CRCW12061102FTR1
74 4 120PF 50V 5% C36–39 PHILLIPS 1206CG121J9B200
75 4 1UF 16V 10% C2–3, C15, C163 MURATA GRM40X7R105K
76 1 1.0K 1/8W 1% R89 AVX CR32-1001F-T
77 2 30PF 100V 5% C7–8 AVX 12061A300JAT2A
78 4 10 100MW 5% R25, R72, R149,
79 2 680PF 50V 1%
NPO
D1–D3 GENER-
ALSEMI
FER1–3 DIGIKEY 240-1019-1-ND
KOA P11.0FCT-ND
R121
DALE CRCW12065761FRT1
R122–126
DALE CRCW0805-10R0FRT1
R150
C21, C25 AVX 08055A681FAT2A
S2A
016AL
80 2 2.74K 1/8W 1% R108, R113 PANASONIC ERJ-8ENF2741V
81 4 5.49K 1/8W 1% R104–105,
R109–110
82 2 3.32K 1/8W 1% R106, R111 PANASONIC ERJ-8ENF3321V
83 3 1.65K 1/8W 1% R1, R107, R112 PANASONIC ERJ-8ENF1651V
84 2 10UF 16V 20%
ELEC
85 2 68UF 25V 20%
ELEC
CT11–12 DIG01 PCE3062TR-ND
CT13, CT18 PANASONIC EEV-FC1E680P
PANASONIC ERJ-8ENF5491V
A-6 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 59
ADSP-TS101S EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference
Designator
86 1 1800UF 10V 20% CT19 RUBYCON 10MBZ1800M
87 1 2.2UH X 20% L5 COOPER ELE
88 2 1800UF 6.3V 20% CT20–21 RUBYCON 6.3MBZ1800M
89 4 10K 31MW 5% RN2, RN4, RN5,
RN7
90 1 3.9NF 50V 5% C14 PANASONIC ECH-U1C392JB5
91 1 3.6K 1/8W 1% R86 PHYCOMP 311-3.60KFTR-ND
92 1 26.7K 1/8W 1% R92 PHYCOMP 311-26.7KFTR-ND
93 1 .008 1W 5% R90 PANASONIC P8.0TTR-ND
94 1 12.1K 1/8W 1% R91 PHYCOMP 311-12.1KFTR-ND
95 3 10K 50MW 5% RN1, RN3, RN6 CTS RT130B7
96 4 0.00 100MW 5% R144, R147, R148,
R153
97 4 10UH X 10% L1–L4 PANASONIC ELJ-FC100KF
98 2 3.32K 100MW 1% R11, R12 DIG01 P3.32KCCTR-ND
Manufacturer Part Number
UP2C-2R2
TEHC
CTS 746X101103J
PAN ERJ-6GE10R00V
99 3 1K 1/8W 5% R14, R21, R24 AVX CR32-102J-T
100 1 10K 1/8W 5% R17 DALE CRCW1206-1002FRT1
101 3 100K 1/8W 5% R94, R96, R136 AVX CR1206-1003FTR1
102 1 20.0K 1/8W 1% R84 DALE CRCW1206-2002FRT1
103 2 220 1/8W 5% R87–88 AVX CR32-221J-T
104 2 22 1/8W 5% R3, R6 AVX CR32-220J-T
105 8 270 1/8W 5% R18, R37–40,
R42–43, R48
106 1 680 1/8W 5% R41 AVX CR32-681J-T
107 3 RED-SMT
GULL-WING
LED2, LED8,
LED9
AVX CR32-271J-T
PANASONIC LN1261C
ADSP-TS101S EZ-KIT Lite Evaluation System Manual A-7
Page 60
Ref. Qty. Description Reference
Designator
Manufacturer Part Number
108 1 GREEN-SMT
GULL-WING
109 2 604 1/8W 1% R100, R127 PANASONIC ERJ-8ENF6040V
110 10 1uF 25V 20% CT1–8, CT22–23 PANASONIC ECS-T1EY105R
111 2 QUICK-
SWITCH-257
112 1 IDC 7X2 P5 BERG 54102-T08-07
113 2 3.5MM
STEREO_JACK
114 1 32MB SDRAM U3 VIKING PE464U4-CL2
LED3 PANASONIC LN1361C
U17–18 ANALOG
DEVICES
P2–3 SHOGYO SJ-0359AM-5
ADG774ABRQ
A-8 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
Page 61
A B C D
1
1
2
2
ADSP-TS101 EZ-KIT LITE
3
ANALOG
4
DEVICES
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
3
4
Approvals
Date
Title
ADSP-TS101 EZ-KIT LITE
Drawn
Checked
C
Engineering
A B C D
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
1211-19-2004_15:25
Page 62
A B C D
R2
2.00K
1206
3.3V
RN3
B2
COM1
A1
R1
A2
R2
A3
R3
B1
R4
B3
R5
C1
R6
C2
R7
C3
R8
E2
COM2
D1
R9
D2
R10
D3
R11
E1
R12
E3
R13
F1
R14
F2
R15
F3
R16
10K
BGA36
R1
1.65K
1206
3.3V
COM4
R32
R31
R30
R29
R28
R27
R26
R25
COM3
R24
R23
R22
R21
R20
R19
R18
R17
10K
805
C3
1UF
805
L2
K1
K2
K3
L1
L3
M1
M2
M3
H2
G1
G2
G3
H1
H3
J1
J2
J3
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
R53R56
10K
10K
805805
C4
0.001UF
805
HBG
BRST
DMAR2
MSH
DMAR0
FLYBY
BUSLOCK
DMAR1
DPA
BR5
BR7
BOFF
BR4
DMAR3
R76R63
10K
805
VREF
1
2
3
4
U1
A[0:31]
1
2
RD
WRH
WRL
ACK
BMS~/EBOOT
MS0
MS1
3
SDCKE
SDA10
SDWE
CAS
RAS
HDQM
LDQM
MSSD
MSH
BM~/IRQEN
BOFF
BUSLOCK
BRST
HBR
HBG
CPA
DPA
4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
Y15
A0
Y18
A1
AA16
A2
AB17
A3
AB18
A4
AA17
A5
AB19
A6
AB20
A7
AA18
A8
AB21
A9
AA20
A10
Y19
A11
W20
A12
AA21
A13
V20
A14
AA22
A15
Y22
A16
W21
A17
Y21
A18
V21
A19
W22
A20
Y20
A21
U21
A22
T20
A23
V22
A24
T21
A25
U22
A26
T22
A27
R20
A28
R21
A29
U20
A30
P20
A31
L22
RD
L21
WRH
K22
WRL
Y13
ACK
E21
BMS~/EBOOT
M21
MS0
M22
MS1
P22
SDCKE
AA19
SDA10
N20
SDWE
R22
CAS
P21
RAS
M20
HDQM
N22
LDQM
N21
MSSD
J22
MSH
E20
BM~/IRQEN
AB16
BOFF
G21
BUSLOCK
L20
BRST
AA14
HBR
Y17
HBG
Y14
CPA
AA15
DPA
ADSP-TS101SKB2180
PBGA484
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
C8
A6
B7
C7
A5
B6
C6
B5
A4
C4
C5
A3
B3
B4
A2
C3
D3
C2
B2
D2
E3
B1
E2
C1
D1
E1
F3
G3
G2
F1
F2
H3
R2
R3
V1
V3
T2
T3
U2
U3
W1
V2
Y1
W2
AA1
Y2
W3
AA3
Y4
AA4
AA2
AA5
Y5
AB2
AA6
AB3
AB4
AA7
Y6
AB5
Y7
AA8
AB6
Y8
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
D[0:63]
TMR0E_A~/TM2
CONTROLIMP0
CONTROLIMP1
CONTROLIMP2
DSP_RESET
L2VDDINT
10UH
1008
L1
10UH
1008
FLAG0_A
FLAG1_A
FLAG2_A
FLAG3_A
IRQ0_A
IRQ1_A
IRQ2_A
IRQ3_A
TCK
TDI
TRST
EMU_A
TMS
TDO_A
BR0
BR1
BR2
BR3
BR4
BR5
BR6
BR7
ID0_A
ID1_A
ID2_A
DS0
DS1
DS2
VREF
LCLK_P_A
LCLKRAT0
LCLKRAT1
LCLKRAT2
VREF
SCLK_P_A
SCLKFREQ
FLYBY
IOEN
DMAR0
DMAR1
DMAR2
DMAR3
VREF
CT6
1UF
A
C5
0.001UF
805
U1
G22
FLAG0
H20
FLAG1
H21
FLAG2
G20
FLAG3
C22
IRQ0
B22
IRQ1
D21
IRQ2
C21
IRQ3
F22
TMR0E~/TM2
C20
TCK
B21
TDI
C18
TRST
A21
EMU
B20
TMS
D20
TDO
AB12
BR0
AB13
BR1
AA12
BR2
AB14
BR3
Y12
BR4
AB15
BR5
AA13
BR6
Y16
BR7
J20
ID0
H22
ID1
J21
ID2
B17
CONTROLIMP0
A18
CONTROLIMP1
A17
CONTROLIMP2
C15
DS0
B16
DS1
C16
DS2
A13
LCLK_N
C12
LCLK_P
F20
LCLKRAT0
D22
LCLKRAT1
E22
LCLKRAT2
A15
SCLK_N
A16
SCLK_P
F21
SCLKFREQ
A19
RESET
K21
FLYBY
K20
IOEN
B19
DMAR0
A20
DMAR1
B18
DMAR2
C19
DMAR3
C17
VREF
C14
AVDD1
B13
AVDD2
A14
AGND1
B14
AGND2
ADSP-TS101SKB2180
PBGA484
L0DAT0
L0DAT1
L0DAT2
L0DAT3
L0DAT4
L0DAT5
L0DAT6
L0DAT7
L0CLKIN
L0CLKOUT
L0DIR
L1DAT0
L1DAT1
L1DAT2
L1DAT3
L1DAT4
L1DAT5
L1DAT6
L1DAT7
L1CLKIN
L1CLKOUT
L1DIR
L2DAT0
L2DAT1
L2DAT2
L2DAT3
L2DAT4
L2DAT5
L2DAT6
L2DAT7
L2CLKIN
L2CLKOUT
TM1/L2DIR
L3DAT0
L3DAT1
L3DAT2
L3DAT3
L3DAT4
L3DAT5
L3DAT6
L3DAT7
L3CLKIN
L3CLKOUT
L3DIR
B11
A11
C11
A10
B10
C10
A9
B9
A8
C9
A7
M1
M3
M2
N1
P1
N2
R1
N3
P3
P2
T1
AA9
AB7
AB8
AA10
Y9
Y3
AB9
AA11
AB10
Y10
AB11
H2
G1
H1
J2
J3
J1
K3
K2
L1
K1
L3
L0DAT0_A
L0DAT1_A
L0DAT2_A
L0DAT3_A
L0DAT4_A
L0DAT5_A
L0DAT6_A
L0DAT7_A
L1DAT0_A
L1DAT1_A
L1DAT2_A
L1DAT3_A
L1DAT4_A
L1DAT5_A
L1DAT6_A
L1DAT7_A
L2DAT0
L2DAT1
L2DAT2
L2DAT3
L2DAT4
L2DAT5
L2DAT6
L2DAT7
L3DAT0
L3DAT1
L3DAT2
L3DAT3
L3DAT4
L3DAT5
L3DAT6
L3DAT7
Approvals
L0DAT[0:7]_A
L0CLKIN_A
L0CLKOUT_A
L1DAT[0:7]_A
L1CLKIN_A
L1CLKOUT_A
L2DAT[0:7]
L2CLKOUT_B
L2CLKOUT_A
TM1/L2DIR
L3DAT[0:7]
L3CLKOUT_B
L3CLKOUT_A
Date
IOEN
ACK
MS1
CPA
RESET
BR2
BR6
BR3
HBR
RD
WRH
WRL
MS0
3.3V
ANALOG
DEVICES
Title
ADSP-TS101 EZ-KIT LITE - DSP A
Drawn
Checked
Engineering
C
Date
Board No.Size Rev
A0163-2001
A B C D
Sheet of
1.4
121-19-2004_15:28 2
Page 63
A B C D
U2
A[0:31]
1
2
RD
WRH
WRL
ACK
BMS~/EBOOT
MS0
MS1
3
SDCKE
SDA10
SDWE
CAS
RAS
HDQM
LDQM
MSSD
MSH
BM~/IRQEN
BOFF
BUSLOCK
BRST
HBR
HBG
CPA
DPA
4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
Y15
A0
Y18
A1
AA16
A2
AB17
A3
AB18
A4
AA17
A5
AB19
A6
AB20
A7
AA18
A8
AB21
A9
AA20
A10
Y19
A11
W20
A12
AA21
A13
V20
A14
AA22
A15
Y22
A16
W21
A17
Y21
A18
V21
A19
W22
A20
Y20
A21
U21
A22
T20
A23
V22
A24
T21
A25
U22
A26
T22
A27
R20
A28
R21
A29
U20
A30
P20
A31
L22
RD
L21
WRH
K22
WRL
Y13
ACK
E21
BMS~/EBOOT
M21
MS0
M22
MS1
P22
SDCKE
AA19
SDA10
N20
SDWE
R22
CAS
P21
RAS
M20
HDQM
N22
LDQM
N21
MSSD
J22
MSH
E20
BM~/IRQEN
AB16
BOFF
G21
BUSLOCK
L20
BRST
AA14
HBR
Y17
HBG
Y14
CPA
AA15
DPA
ADSP-TS101SKB2180
PBGA484
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
C8
A6
B7
C7
A5
B6
C6
B5
A4
C4
C5
A3
B3
B4
A2
C3
D3
C2
B2
D2
E3
B1
E2
C1
D1
E1
F3
G3
G2
F1
F2
H3
R2
R3
V1
V3
T2
T3
U2
U3
W1
V2
Y1
W2
AA1
Y2
W3
AA3
Y4
AA4
AA2
AA5
Y5
AB2
AA6
AB3
AB4
AA7
Y6
AB5
Y7
AA8
AB6
Y8
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
D[0:63]
VDDINT
FLAG0_B
FLAG1_B
FLAG2_B
FLAG3_B
IRQ0_B
IRQ1_B
IRQ2_B
IRQ3_B
TMR0E_B~/TM2
TCK
TDI_B
TRST
EMU_B
TMS
TDO_B
BR0
BR1
BR2
BR3
BR4
BR5
BR6
BR7
ID0_B
ID1_B
ID2_B
CONTROLIMP0
CONTROLIMP1
CONTROLIMP2
DS0
DS1
DS2
VREF
LCLK_P_B
LCLKRAT0
LCLKRAT1
LCLKRAT2
VREF
SCLK_P_B
SCLKFREQ
DSP_RESET
FLYBY
IOEN
DMAR0
DMAR1
DMAR2
DMAR3
L4
10UH
1008
L3
10UH
1008
VREF
CT7
1UF
A
C6
0.001UF
805
U2
G22
FLAG0
H20
FLAG1
H21
FLAG2
G20
FLAG3
C22
IRQ0
B22
IRQ1
D21
IRQ2
C21
IRQ3
F22
TMR0E~/TM2
C20
TCK
B21
TDI
C18
TRST
A21
EMU
B20
TMS
D20
TDO
AB12
BR0
AB13
BR1
AA12
BR2
AB14
BR3
Y12
BR4
AB15
BR5
AA13
BR6
Y16
BR7
J20
ID0
H22
ID1
J21
ID2
B17
CONTROLIMP0
A18
CONTROLIMP1
A17
CONTROLIMP2
C15
DS0
B16
DS1
C16
DS2
A13
LCLK_N
C12
LCLK_P
F20
LCLKRAT0
D22
LCLKRAT1
E22
LCLKRAT2
A15
SCLK_N
A16
SCLK_P
F21
SCLKFREQ
A19
RESET
K21
FLYBY
K20
IOEN
B19
DMAR0
A20
DMAR1
B18
DMAR2
C19
DMAR3
C17
VREF
C14
AVDD1
B13
AVDD2
A14
AGND1
B14
AGND2
ADSP-TS101SKB2180
PBGA484
L0DAT0
L0DAT1
L0DAT2
L0DAT3
L0DAT4
L0DAT5
L0DAT6
L0DAT7
L0CLKIN
L0CLKOUT
L0DIR
L1DAT0
L1DAT1
L1DAT2
L1DAT3
L1DAT4
L1DAT5
L1DAT6
L1DAT7
L1CLKIN
L1CLKOUT
L1DIR
L2DAT0
L2DAT1
L2DAT2
L2DAT3
L2DAT4
L2DAT5
L2DAT6
L2DAT7
L2CLKIN
L2CLKOUT
TM1/L2DIR
L3DAT0
L3DAT1
L3DAT2
L3DAT3
L3DAT4
L3DAT5
L3DAT6
L3DAT7
L3CLKIN
L3CLKOUT
L3DIR
B11
A11
C11
A10
B10
C10
A9
B9
A8
C9
A7
M1
M3
M2
N1
P1
N2
R1
N3
P3
P2
T1
AA9
AB7
AB8
AA10
Y9
Y3
AB9
AA11
AB10
Y10
AB11
H2
G1
H1
J2
J3
J1
K3
K2
L1
K1
L3
L0DAT0_B
L0DAT1_B
L0DAT2_B
L0DAT3_B
L0DAT4_B
L0DAT5_B
L0DAT6_B
L0DAT7_B
L1DAT0_B
L1DAT1_B
L1DAT2_B
L1DAT3_B
L1DAT4_B
L1DAT5_B
L1DAT6_B
L1DAT7_B
L2DAT0
L2DAT1
L2DAT2
L2DAT3
L2DAT4
L2DAT5
L2DAT6
L2DAT7
L3DAT0
L3DAT1
L3DAT2
L3DAT3
L3DAT4
L3DAT5
L3DAT6
L3DAT7
Approvals
L0DAT[0:7]_B
L0CLKIN_B
L0CLKOUT_B
L1DAT[0:7]_B
L1CLKIN_B
L1CLKOUT_B
L2DAT[0:7]
L2CLKOUT_A
L2CLKOUT_B
TM1/L2DIR
L3DAT[0:7]
L3CLKOUT_A
L3CLKOUT_B
Date
Title
VREF
C163
1UF
805
C164
0.001UF
805
ANALOG
DEVICES
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
1
2
3
4
ADSP-TS101 EZ-KIT LITE - DSP B
Drawn
Checked
Engineering
C
Date
Board No.Size Rev
A0163-2001
A B C D
Sheet of
1.4
1231-19-2004_15:28
Page 64
A B C D
4M x 64 SDRAM
U3
A[0:15]
1
SDA10
LDQM
HDQM
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A12
A13
A14
2
SDWE
SDCKE
CAS
RAS
MSSD
SDRAM_CLK0
SDRAM_CLK1
SDRAM_CLK2
SDRAM_CLK3
3
4
33
A0
117
A1
34
A2
118
A3
35
A4
119
A5
36
A6
120
A7
37
A8
121
A9
38
A10
123
A11
126
A12
122
BA0
39
BA1
28
DQMB0
29
DQMB1
46
DQMB2
47
DQMB3
112
DQMB4
113
DQMB5
130
DQMB6
131
DQMB7
27
WE
128
CKE0
111
CAS
115
RAS
30
S0
45
S2
42
CK0
125
CK1
79
CK2
163
CK3
83
SCL
81
WP
82
SDA
165
SA0
166
SA1
167
SA2
MT4LSDT464A
DIMM168
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
2
3
4
5
7
8
9
10
11
13
14
15
16
17
19
20
55
56
57
58
60
65
66
67
69
70
71
72
74
75
76
77
86
87
88
89
91
92
93
94
95
97
98
99
100
101
103
104
139
140
141
142
144
149
150
151
153
154
155
156
158
159
160
161
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
D[0:63]
3.3V
P1
1
3
5
7
9
11
13
IDC7X2SRDRA
7X2
C2C1
0.1UF
805
1UF
805
DSM JTAG HEADER
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0 PC6
PB1
PB2
PB3
PB4
PB5
PB6
PB7
2
4
6
8
10
12
14
3.3V
B2
A1
A2
A3
B1
B3
C1
C2
C3
E2
D1
D2
D3
E1
E3
F1
F2
F3
1
2
3
4
6
7
8
9
RN1
COM1
R1
R2
R3
R4
R5
R6
R7
R8
COM2
R9
R10
R11
R12
R13
R14
R15
R16
10K
BGA36
RN5
R1
R2
R3
R4
R5
R6
R7
R8
10K
RNET8
COM4
R32
R31
R30
R29
R28
R27
R26
R25
COM3
R24
R23
R22
R21
R20
R19
R18
R17
COM1
COM2
L2
K1
K2
K3
L1
L3
M1
M2
M3
H2
G1
G2
G3
H1
H3
J1
J2
J3
5
10
RESET
3.3V
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PC7
PD0
PD1
PD2
PD3
PE6
PE7
U6
1
2
SN74AHC1G00
SOT23-5
512 KB MAIN FLASH
1
32KB SECONDARY FLASH
A[21:0]
PC6
PC7
WRL
RD
BMS~/EBOOT
PE6
PE7
U5
4
1
2
SN74AHC1G00
SOT23-5
4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
ANALOG
U4
3
AD0
4
AD1
5
AD2
6
AD3
7
AD4
10
AD5
11
AD6
12
AD7
13
AD8
14
AD9
15
AD10
16
AD11
17
AD12
18
AD13
19
AD14
20
AD15
41
PC0
42
PC1
43
PC2
44
PC3
45
PC4
46
PC5
47
PC6
48
PC7
59
CNTL0/~WR
40
CNTL2
71
PE0/TMS
72
PE1/TCK
73
PE2/TDI
74
PE3/TDO
75
PE4/TSTAT
76
PE5/~TERR
78
PE7
39
RESET
DSM2150F5V-12T6
TQFP80
20 Cotton Road
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0CNTL1/~RD
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PD0PE6
PD1
PD2
PD3
D0
31
D1
32
D2
33
D3
34
D4
35
D5
36
D6
37
D7
38
21
22
23
24
25
26
27
28
51
52
53
54
55
56
57
58
6160
62
63
64
65
66
67
68
7977
80
1
2
Nashua, NH 03063
DEVICES
PH: 1-800-ANALOGD
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PD0
PD1
PD2
PD3
D[7:0]
2
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
3
4
Approvals
Date
Title
ADSP-TS101 EZ-KIT LITE - SDRAM & FLASH
Drawn
Checked
C
Engineering
A B C D
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
1241-19-2004_15:28
Page 65
A B C D
1
3.3V
3.3V
R93
10K
805
1
DAC
U8
10
R97
R10
10K
10K
805
805
ADC
C166
100PF
2
C10
0.01UF
805
C167
0.01UF
805
1206
C165
0.01UF
805
C169
100PF
1206
C168
0.01UF
805
INL+
INL-
INR+
INR-
MCLK
U7
13
CAPLN
12
CAPLP
11
VINLP
10
VINLN
18
VINRP
19
VINRN
16
CAPRN
17
CAPRP
1
MCLK
24
RESET
AD1871
SSOP28
CASC
XCTRL
CCLK/{256~/512}
COUT/{DF0}
CIN/{DF1}
CLATCH/{M~/S}
LRCLK
BCLK
DOUT
DIN
VREF
21
8
2
3
4
5
28
27
26
25
14
C17
0.1UF
805
CT17
10UF
B
LRCLK
BCLK
DR
VREF_AUDIORESET
MCLK
BCLK
LRCLK
DT
RESET
96/48~
6
384/256~
7
X2MCLK
2
MCLK
26
BCLK
25
LRCLK
27
SDATA
4
CCLK
3
CLATCH
5
CDATA
24
RESET
9
DEEMP
23
MUTE
21
IDPM0
20
IDPM1
AD1854
SSOP28
OUTL-
OUTL+
OUTR-
OUTR+
FILTR
FILTB
ZEROL
ZEROR
16
17
13
12
OUTLOUTL+
OUTROUTR+
2
14
19
22
8
CT15
10UF
B
AGND
0.1UF
1206
CT16C16
10UF
B
AGND
3
3
SLAVE MODE
3.3V
MCLK IS 256 x Fs
48 kHZ SAMPLE RATE
R99
10K
805
U9
1 3
OE OUT
12.288MHZ
OSC003
R98
33
805
AUDIOCLK
4
2
I S I/F MODE
ANALOG
DEVICES
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
4
Approvals
Date
Title
ADSP-TS101 EZ-KIT LITE - AUDIO INTERFACE
Drawn
Checked
C
Engineering
A B C D
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
1251-19-2004_15:28
Page 66
A B C D
1
C34
100PF
1206
CT11
10UF
CAP002
R119
5.76K
1206
R124
5.76K
1206
R117
750K
1206
R120
5.76K
1206
C36
120PF
1206
2
3
6
5
U10
SSM2275S
SOIC8
R123
5.76K
1206
C37
120PF
1206
U10
SSM2275S
SOIC8
1
7
R121
237
1206
R118
237
1206
AGND
C33
0.001UF
805
C30
0.001UF
805
C31
100PF
1206
INL-
ADC LEFT
INL+
FER2
600
1206
R94
100K
1206
AGND
VREF_AUDIO
P2
2
CON001
STEREO_JACK
1
5
4
3
2
LOOPBACK_LEFT
LOOPBACK_RIGHT
1
2
AGND
C35
100PF
1206
CT12
10UF
CAP002
AGND
R96
100K
1206
FER3
600
1206
AGND
3
R122
5.76K
1206
R126
5.76K
1206
R115
750K
1206
R103
5.76K
1206
C38
120PF
1206
6
5
2
3
U11
SSM2275S
SOIC8
R125
5.76K
1206
C39
120PF
1206
U11
SSM2275S
SOIC8
7
1
R116
237
1206
R114
237
1206
AGND
C32
0.001UF
805
C28
0.001UF
805
C23
100PF
1206
INR-
3
ADC RIGHT
INR+
AGND
ANALOG
20 Cotton Road
Nashua, NH 03063
4
Approvals
Date
Title
DEVICES
PH: 1-800-ANALOGD
4
ADSP-TS101 EZ-KIT LITE - AUDIO IN AMPLIFIERS
Drawn
Checked
C
Engineering
A B C D
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
1261-19-2004_15:28
Page 67
A B C D
1
R105
5.49K
1206
R108
2.74K
1206
R106
3.32K
1206
R107
1.65K
1206
R101
11.0K
1206
OUTR-
C20
330PF
805
C21
680PF
805
DAC RIGHT
OUTR+
C18
100PF
1206
R104
5.49K
1206
2
VREF_AUDIO
AGND
C22
100PF
1206
2
3
C24
220PF
1206
U12
SSM2275S
SOIC8
CT13
68UF
CAP003
1
R100
604
1206
C19
2200PF
1206
AGND
LOOPBACK_RIGHT
LOOPBACK_LEFT
R102
49.9K
1206
P3
2
3
4
5
1
CON001
STEREO_JACK
1
2
R110
5.49K
1206
R113
2.74K
1206
R111
3.32K
1206
R112
1.65K
1206
R129
11.0K
1206
OUTL-
C26
330PF
C40
DAC LEFT
3
OUTL+
100PF
1206
5.49K
1206
805
C25
680PF
805R109
C27
100PF
1206
6
5
C29
220PF
1206
U12
SSM2275S
SOIC8
CT18
68UF
CAP003
7
R127
604
1206
C41
2200PF
1206
R128
49.9K
1206
3
AGND
AGND
ANALOG
20 Cotton Road
Nashua, NH 03063
4
Approvals
Date
Title
DEVICES
PH: 1-800-ANALOGD
4
ADSP-TS101 EZ-KIT LITE - AUDIO OUT AMPLIFIERS
Drawn
Checked
Engineering
C
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
121-19-2004_15:28 7
A B C D
Page 68
A B C D
3.3V
R58
10K
805
R57
100
805
SW3
1
SWT013
SPST-MOMENTARY
CT1
1UF
A
U24
74LVC14A
SOIC14
21
U35
1
2
SN74AHC1G00
SOT23-5
4
R49
0.00
1206
IRQ0_A
3.3V
1
3.3V
3.3V
SW1
R59
10K
805
R44
100
805
SW6
SWT013
SPST-MOMENTARY
2
CT2
1UF
A
U24
3 4
74LVC14A
SOIC14
U36
1
2
SN74AHC1G00
SOT23-5
4
R50
0.00
1206
IRQ0_B
SWT013
SPST-MOMENTARY
SOFT_RESET
R46
10K
805
U25
4
PFI
ADM708SAR
SOIC8
USB_CONFIGURED
81
RESETMR
7
RESET
5
PFO
R36
10K
805
U26
1
2
SN74AHC1G00
SOT23-5
4
USB_RESET
RESET
3.3V
2
USB RESET
LED2
RED-SMT
LED001
R43
270
3.3V
R47
10K
805
R62
100
805
SW4
SWT013
SPST-MOMENTARY
3
CT4
1UF
A
U24
74LVC14A
SOIC14
65
R55
0.00
1206
FLAG0_A
SW9
SWT013
SPST-MOMENTARY
R33
100
805
3.3V
R32
10K
805
CT8
1UF
A
U24
74LVC14A
SOIC14
U27
2
USB_RESET
RESET
DSP_RESET
R34
0.00
1011
1206
FLAG1_A
FLAG2_A
FLAG2_B
FLAG3_A
FLAG3_B
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
OE1
19
OE2
IDT74FCT3244APY
SSOP20
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
18
16
14
12
9
7
5
3
FLAG3_B FLAG2_B FLAG2_AFLAG3_A/AUDIO
AMBER-SMT
LED001
1206
LED6 LED4
AMBER-SMT
LED001
RESET DSP_RESET
LED8
RED-SMT RED-SMT
LED001
R42
270
1206
AMBER-SMT AMBER-SMT
LED001
LED9
LED001
R48
270
1206
LED7LED5
LED001
5V
POWER
LED3
GREEN-SMT
LED001
3
270
1206
3.3V
R61
10K
805
R60
100
805
SW5
SWT013
SPST-MOMENTARY
4
CT3
1UF
A
U24
9 8
74LVC14A
SOIC14
R51
0.00
1206
FLAG0_B
SW2
SWT013
SPST-MOMENTARY
R65
100
805
3.3V
R64
10K
805
13 12
CT5
1UF
A
U24
74LVC14A
SOIC14
R54
0.00
1206
FLAG1_B
Approvals
Date
ANALOG
DEVICES
Title
R38R37
1206
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
270270
1206
R40R39
1206
R41
680270
1206
4
ADSP-TS101 EZ-KIT LITE - PUSH BUTTONS & LEDS
Drawn
Checked
Engineering
C
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
121-19-2004_15:28 8
A B C D
Page 69
A B C D
DSP_A ID = 000
1
ID0_A
ID1_A
ID2_A
R83
10K
805
ID2_B
ID1_B
R75
10K
805
2
ID0_B
R74
10K
805
R45
10K
805
3.3V
R73
10K
805
R52
10K
805
RN2
1
R1
2
R2
3
R3
4
R4
6
R5
7
R6
8
R7
9
R8
10K
RNET8
RN4
1
R1
2
R2
3
R3
4
R4
6
R5
7
R6
8
R7
9
R8
COM1
COM2
COM1
COM2
3.3V
5
10
5
10
1
2
10K
DSP_B ID = 001
CONTROLIMP0
R68
33
805
R69
3.3V
U29
3
3
R67
10K
805
U28 10
1 3
OE OUT IN
83.33MHZ
OSC003
R66
33
805
1
IDT74FCT3807AQ
QSOP20
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
5
7
9
11
12
14
16
18
19
33
805
R70
33
805
R71
33
805
R72
805
R130
33
805
R25
10
805
R149
10
805
R150
10
805
SCLK_P_A
SCLK_P_B
LCLK_P_A
LCLK_P_B
SDRAM_CLK0
CLKOUT
SDRAM_CLK1
SDRAM_CLK2
SDRAM_CLK3
CONTROLIMP1
CONTROLIMP2
DS0
DS1
DS2
BMS~/EBOOT
BM~/IRQEN
LCLKRAT0
LCLKRAT1
LCLKRAT2
SCLKFREQ
DEFAULT SETTINGS
CONTROLIMP0
CONTROLIMP1
CONTROLIMP2
DS0
DS1
DS2
BMS~
BM~
LCLKRAT0
LCLKRAT1
LCLKRAT2
ON
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
ON
R153
DNP
805
RNET8
SW7
1
1 2 4 5 6 7
2
3
3 8 9 10 11 12
4
5
6
7
8
9
10
11
12
SWT014
DIP12
ON
24
23
22
21
20
19
18
17
16
15
14
13
R21
1K
1206
R24
1K
1206
3
ANALOG
20 Cotton Road
Nashua, NH 03063
4
Approvals
Date
Title
DEVICES
PH: 1-800-ANALOGD
4
ADSP-TS101 EZ-KIT LITE - CONFIGURATION
Drawn
Checked
C
Engineering
A B C D
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
121-19-2004_15:28 9
Page 70
A B C D
P7
126
UD2
1
24
RXCLKSH
25
TXCLKSH
UD1
CLKCLKSH
ACKACKSH
D0D0SH
D1D1SH
D2D2SH
D3D3SH
D4D4SH
D5D5SH
D6D6SH
D7D7SH
RXCLK
TXCLK
214
315
416
L0DAT0_A
517
L0DAT1_A
618
L0DAT2_A
719
L0DAT3_A
820
L0DAT4_A
921
L0DAT5_A
1022
L0DAT6_A
1123
L0DAT7_A
12
13
L0DAT[0:7]_A
L0CLKIN_A
L0CLKOUT_A
D[0:63]
A[0:31]
5V
1
3.3V
28 27
CH1 CH2
LINKPORT
CON010
A1 A0
P8
26 1
UD2
14 2
15 3
16 4
17 5
18 6
19 7
20 8
21 9
22 10
23 11
2
24
RXCLKSH
25
TXCLKSH
CH1 CH2
LINKPORT
CON010
P9
26 1
UD2
14 2
15 3
16 4
17 5
18 6
19 7
20 8
21 9
22 10
23 11
24
RXCLKSH
25
TXCLKSH
UD1
CLKCLKSH
ACKACKSH
D0D0SH
D1D1SH
D2D2SH
D3D3SH
D4D4SH
D5D5SH
D6D6SH
D7D7SH
RXCLK
TXCLK
UD1
CLKCLKSH
ACKACKSH
D0D0SH
D1D1SH
D2D2SH
D3D3SH
D4D4SH
D5D5SH
D6D6SH
D7D7SH
RXCLK
TXCLK
L1DAT0_A
L1DAT1_A
L1DAT2_A
L1DAT3_A
L1DAT4_A
L1DAT5_A
L1DAT6_A
L1DAT7_A
12
13
2728
L0DAT0_B
L0DAT1_B
L0DAT2_B
L0DAT3_B
L0DAT4_B
L0DAT5_B
L0DAT6_B
L0DAT7_B
12
13
L1DAT[0:7]_A
L1CLKIN_A
L1CLKOUT_A
L0DAT[0:7]_B
L0CLKIN_B
L0CLKOUT_B
3
UD1
CLKCLKSH
ACKACKSH
D0D0SH
D1D1SH
D2D2SH
D3D3SH
D4D4SH
D5D5SH
D6D6SH
D7D7SH
RXCLK
TXCLK
2728
126
214
315
416
L1DAT0_B
517
L1DAT1_B
618
L1DAT2_B
719
L1DAT3_B
820
L1DAT4_B
921
L1DAT5_B
1022
L1DAT6_B
1123
L1DAT7_B
12
13
L1DAT[0:7]_B
L1CLKIN_B
L1CLKOUT_B
CH1 CH2
LINKPORT
CON010
P10
UD2
24
RXCLKSH
25
TXCLKSH
28 27
CH1 CH2
4
LINKPORT
CON010
A5
A7
A9
A11
A13
A15
A17
A19
A21
A23
A27
A29
A31
D1
D3
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D25
D27
D29
D31 D30
D33
D35
D37
D39
D41
D43
D45
D47
P11
45X2
IDC45X2
1
3
5
78
9
1112
1314
1516
1718
19
2122
2324
2526
2728
29
3132
3334
3536
3738
39
4142
4344
4546
4748
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
2
4
6
10
20
30
40
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90 89
PRT_NUM=DNP
A2A3
A4
A6
A8
A10
A12
A14
A16
A18
A20
A22
A24A25
A26
A28
A30
D0
D2
D4
D6
D8
D10
D12
D14
D16
D18
D20
D22
D24
D26
D28
D32
D34
D36
D38
D40
D42
D44
D46
SDRAM_CLK2
CAS
RAS
SDCKE
MSSD
FLAG1_A
FLAG3_A
FLAG1_B
FLAG3_B
DR
IRQ1_A
IRQ3_A
IRQ1_B
IRQ3_B
P12
2
4
6
8 7
10
12 11
14 13
16 15
18 17
20
22 21
24 23
26 25
28 27
30
32 31
34 33
36 35
38 37
40
42 41
44 43
46 45
48 47
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
PRT_NUM=DNP
45X2
IDC45X2
1
3
5
9
19
29
39
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
8990
SDWE DMAR0
SDA10
HDQM
LDQM
FLAG0_A
FLAG2_A
FLAG0_B
FLAG2_B
DT
TMR0E_A~/TM2TMR0E_B~/TM2
IRQ0_A
IRQ2_A
IRQ0_B
IRQ2_B
DMAR1
DMAR3
DSP_RESET
RESET CLKOUT
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
HBG
BMS~/EBOOT
MS0
MS1
FLYBY
IOEN
ACK BOFF
MSH
BM~/IRQEN
ANALOG
D49
D51
D53
D55
D57
D59
D61
D63
20 Cotton Road
Nashua, NH 03063
DEVICES
PH: 1-800-ANALOGD
P13
45X2
IDC45X2
1
3
5
78
9
1112
1314
1516
1718
19
2122
2324
2526
2728
29
3132
3334
3536
3738
39
4142
4344
4546
4748
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
2
4
6
10
20
30
40
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90 89
PRT_NUM=DNP
D48
D50
D52
D54
D56
D58
D60
D62
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
DMAR2
HBR
DPA
CPA
RD
WRL
WRH
BUSLOCK
BRST
2
3
4
SHGND
Approvals
Date
Title
ADSP-TS101 EZ-KIT LITE - EXPANSION CONNECTORS
Drawn
Checked
C
Engineering
A B C D
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
121-19-2004_15:28 10
Page 71
A B C D
CT19
1800UF
CAP015
U30
CT9
10UF
C
1
P14
1
2
7_5V_POWER
CON005
3
SHGND
C84
1000PF
1206
F1
7A
FUS003
C85
1000PF
1206
D2
2A
DO-214AA
FER4
CHOKE_COIL
4
1
3
2
PGND
D1
2A
DO-214AA
1
FC
2
CAP+
4
CAP-
3
GND
ADM660
SOIC8
V+
LV
OUT
OSC
8
6
5
7
R144
0.00
805
R145
0.00
805
R146
0.00
805
R147
0.00
805
R148
0.00
805
PGND
CT10
4.7UF
C
C9
0.1UF
805
U31
1
VID3
2
VID2
3
VID1
4
VID0
5
VID25
8
SD
9
FB
2
AGND
5V
AGND
ADP3170
TSSOP20
PGND
VCC
DRVH
DRVL
LRFB
LRDRV
COMP
REF
CS+
CS-
CT
PWRGOOD
GND
PGND
CT26
22UF
D
5
3
7
1
PGND
Q2
FDS6982
SOIC8
Q2
FDS6982
SOIC8
C14
3.9NF
805
4
16
18
17
15
14
13
7
11
10
12
6
20
19
C13
150PF
1206
2
PGND
L5
2.2UH
IND002
R91
12.1K
1206
R92
26.7K
1206
R90
.008
2512
CT20
1800UF
CAP015
PGND
1
2
Q1
IRFR024
TO252AA
3
CT21
1800UF
CAP015
PGND
C15
1UF
805
VDDINT
D3
2A
DO-214AA
3.3V
1
2
VR2
7V_IN
R136
100K
1206
5V
CT24
10UF
3
CT22
1UF
A
C82
0.1UF
805
3
INPUT OUTPUT
C105
0.1UF
805
VR1
INPUT OUTPUT
GND
1
GND
1
PGND
ADP3338AKC-25
SOT-223
2
ADP3339AKC-5
SOT-223
23
CT23
1UF
A
CT25
10UF
CC
2.5V
C83
0.1UF
805
C106
0.1UF
805
AGND
C11
100PF
1206
R89
1.0K
1206
PGND
AGND
C12
0.001UF
805
AGND
R87
220
1206
R88
220
1206
R84
20.0K
1206
R82
3.01K
1206
1
3
Q4
MMBT3904
SOT23D
CT14
220UF
E
R85
3.01K
1206
PGND
R86
3.6K
1206
AGND
3
3
1
Q5
2N7002
SOT23D
2
2
PGND
AGND
MH1 MH2 MH3 MH4
5V
R141
0.00
1206
A5V
SHGND
R142
0.00
RC05
PGND
R143
0.00
RC05
AGND
4
SHGND
R137
0.00
RC05
Approvals
Date
ANALOG
DEVICES
Title
AGND
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
4
ADSP-TS101 EZ-KIT LITE - POWER SUPPLY
Drawn
Checked
Engineering
C
Date
Board No.Size Rev
A0163-2001
Sheet of
1.4
121-19-2004_15:28 11
A B C D
Page 72
A B C D
VDDINTVDDINT
C107
0.1UF
805
0.1UF
805
C44 C43
0.1UF
805
0.1UF
805 805
C42 C52
0.1UF
C46
0.01UF
C47
0.01UF
12061206
C51 C50
0.1UF
0.1UF
805 805
C49 C48
0.1UF
0.1UF
805
0.01UF
1206805
1
C155
0.1UF
805
0.1UF
805
C56C57
0.1UF
805
U1
3.3V
C55
0.1UF
805 1206
C54
0.1UF
805
C58
0.01UF
C59
0.01UF
12061206
C63 C62
0.1UF
0.1UF
805 805
U2
3.3V
C61 C60
0.1UF
0.1UF
805
0.01UF
1206805
C53C45
0.01UF
1206
C65C64
0.01UF
C156
0.01UF
1206
C157
0.01UF
1206
0.1UF
805
C115C114
0.1UF
805
C113
0.1UF
805
C116
0.1UF
C119 C118
0.1UF
805
0.1UF
805
C120
0.1UF
805
3.3V
C117
0.1UF
805805
2.5V
C121
0.01UF
C122
0.01UF
12061206
0.01UF
1206
C124C123
0.01UF
1206
C125
0.01UF
C126
0.01UF
12061206
0.01UF
1206
C128C127
0.01UF
1206
U19
1
C142
0.01UF
1206
3.3V3.3V
0.1UF
805
C145C143
0.1UF
805
2
0.1UF
805
C141C140
0.01UF
1206
C139
0.01UF
12061206
0.01UF
1206
C144 C146
0.1UF
805
C112
0.1UF
C138
0.01UF
C137C136
0.01UF
1206
3.3V3.3V
C110
0.1UF
805
C135
0.1UF
805
C132C131
0.1UF
805
0.01UF
1206
C111
0.1UF
805 805
C130
0.1UF
805 805
2
C68 C67
0.1UF
805
3.3V
0.1UF
805
C69
0.1UF
805
C66
0.1UF
805 805
0.1UF
805
C72C71
0.1UF
805
3.3V
C70
0.1UF
805
3.3V
C73
0.1UF
U3
C75
0.01UF
1206 1206
C74
0.01UF
C77 C76
0.01UF
1206
0.01UF
1206
C79
0.01UF
1206 1206
C78
0.01UF
C81 C80
0.01UF
1206
3.3V5V A5VA5V5V3.3V
0.01UF
1206
0.1UF
805
C129
0.1UF
3.3V3.3V
C108C98
0.1UF
805
0.1UF
805
C134
0.1UF
805 805
3.3V
C109
0.1UF
805
C133
0.1UF
3
0.1UF
805
C88C87
0.1UF
805
C86
0.1UF
805
U4
A5V
A5V
C89
0.1UF
805
C99
0.1UF
805
U5 U6 U7 U8 U9
A5V
C100
0.1UF
805
C101
0.1UF
805
3.3V
C102
0.1UF
805
C103
0.1UF
AGNDAGND
C104
0.1UF
805805
C172 C173
0.1UF
C147
0.1UF
805
0.1UF
805
C148
0.1UF
805
U22 U23 U24 U25 U26 U27 U28 U29
U15U14
C158
0.1UF
805 805
C159 C160
0.1UF
0.1UF
805
C92
0.1UF
805
0.1UF
805
C93C91
0.1UF
805
C90
0.1UF
805
C94
0.01UF
C95
0.01UF
12061206
C96
0.01UF
1206
C97
0.01UF
1206
C161
0.01UF
1206
U16 U17 U18 U20
C149
0.1UF
805 805
C150 C151
0.1UF
0.1UF
805 805
ANALOG
C152 C153
0.1UF
20 Cotton Road
3.3V3.3V3.3V3.3V3.3V3.3V3.3V
0.1UF
805 805
3.3V
C154
0.1UF
U21
3.3V
U32
C162
0.1UF
805805
3
Nashua, NH 03063
4
DEVICES
PH: 1-800-ANALOGD
4
AGND
AGND
AGND
U12U10 U11
U13
Approvals
Drawn
Checked
Engineering
Date
Title
C
Date
ADSP-TS101 EZ-KIT LITE - CAPS
Board No.Size Rev
A0163-2001
A B C D
Sheet of
1.4
121-19-2004_15:28 12
Page 73
IINDEX
A
AD1854 digital-to-analog converters (DACs),
1-11
AD1871 analog-to-digital converters (ADCs),
1-11
address data controls (ADC), 2-5
architecture, of this EZ-KIT Lite, 2-2
audio
connectors (P2-3), 2-12
interface, 1-11
B
bill of materials, A-1
~BMS boot memory select pins, 1-7, 2-3
board schematic, B-1
boot
modes, 2-6
mode switch (SW7), 2-6
C
CLKIN pins, 2-7
CLKOUT pins, 2-3
clock
frequency, 2-7
mode settings (SW7), 2-7
codecs, See AD1871, AD1854
connectors
diagram of locations, 1-4, 2-12
P11-13 (expansion), 2-3, 2-14
P14 (power), 2-15
P2-3 (audio), 2-12
P4 (USB), 2-13
P5 (JTAG), 2-13
P7-10 (link ports), 2-14
contents, of this EZ-KIT Lite package, 1-2
control impedance selection (SW7), 2-5
core
speed, 2-2, 2-7
voltage, 2-2
customer support, -xiv
D
D23-0 pins, 1-12
DIP switch SW7, 2-4, 2-5, 2-6, 2-7
drive strength selection (SW7), 2-5
E
example programs, 1-12
expansion interface, 2-3, 2-14
external
See also SDRAM
interrupts, 1-10
memory, -xi, 1-11
ports, 2-3
ADSP-TS101S EZ-KIT Lite Evaluation System Manual I-1
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INDEX
F
features, of this EZ-KIT Lite, -x
FLAG
LEDs (LED7-LED4), 2-10
push buttons (SW2, SW4-5, SW9), 2-10
FLAG0_A (SW4) pins, 1-10, 2-11
FLAG0_B (SW5) pins, 1-10, 2-11
FLAG1_A (SW9) pins, 1-10, 2-11
FLAG1_B (SW2) pins, 1-10, 2-11
FLAG2_A (LED7) pins, 1-10, 2-10
FLAG2_B (LED4) pins, 1-10, 2-10
FLAG3_A (LED6) pins, 1-10, 1-11, 2-10
FLAG3_B (LED5) pins, 1-10, 1-11, 2-10
flash memory
boot memory select pins, 2-3
main/secondary, 1-7, 1-11
G
general-purpose IO pins, -xi, 1-10, 2-11
I
input clock, 2-2
installation, of this EZ-KIT Lite, 1-5
internal memory, 1-7
interrupt
enable settings (SW2), 2-7
pins (IR3-0), 1-10
push buttons (SW3, SW6), 2-11
IRQ0_A (SW3) interrupt pins, 1-10, 2-11
IRQ0_B (SW6) interrupt pins, 1-10, 2-11
J
JTAG
connector (P5), 2-4, 2-13
emulation port, 2-4
programming cable, 1-11
L
LEDs
diagram of locations, 1-4, 2-8
LED1 (USB monitor), 1-5, 2-8
LED2 (USB reset), 2-8
LED3 (power), 2-9
LED4-7 (FLAG3-2), 1-10, 2-10
LED8 (master reset), 2-9
LED9 (processor reset), 2-9
license restrictions, 1-7
link port
connectors (P7-10), 2-14
outputs, 2-5
M
memory map, of this EZ-KIT Lite, 1-7
N
notation conventions, -xxi
O
oscillators, 2-7
P
package contents, 1-2
power
connector (P14), 2-15
LED (LED3), 2-9
supply specifications, 2-15
programmable flag pins, See flags by name
(FLAGx)
push buttons
See also push buttons by name (SWx)
diagram of locations, 2-8
R
registration, of this product, 1-3
I-2 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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INDEX
reset
LEDs (LED2, LED8-9), 2-8
master (LED8), 2-9
processor, 1-9, 2-9
push button (SW1), 2-10
restrictions, of the license, 1-7
S
schematic, of this EZ-KIT Lite, B-1
SDRAM
external port connection, 2-3
interface, 1-8
start/end addresses, 1-7
SDRCON registers, 1-8
setup, of this EZ-KIT Lite, 1-4
specifications, of the power supply, 2-15
SQCTL registers, 1-9
SQSTAT registers, 1-9
startup, of this EZ-KIT Lite, 1-5
SW1 (reset) push buttons, 2-10
SW2 (FLAG1_B/interrupt) push button, 1-10,
2-7, 2-11
SW3 (IRQ0_A) push button, 1-10, 2-11
SW4 (FLAG0_A) push button, 1-10, 2-11
SW5 (FLAG0_B) push button, 1-10, 2-11
SW6 (IRQ0_B) push button, 1-10, 2-11
SW7 DIP switch, 2-4, 2-5, 2-6, 2-7
SW9 (FLAG1_A) push button, 1-10, 2-11
SYSCON registers, 1-8
system architecture, of this EZ-KIT Lite, 2-2
T
Target Options dialog box, 1-9
U
USB
cable, 1-3
connector (P4), 2-13
debug interface, 2-13
monitor LED (LED1), 2-8
reset LED (LED2), 2-8
V
VisualDSP++
documentation, -xix
environment, 1-5
online Help, -xix
voltage regulators, -xi
ADSP-TS101S EZ-KIT Lite Evaluation System Manual I-3
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INDEX
I-4 ADSP-TS101S EZ-KIT Lite Evaluation System Manual
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