Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, SHARC, EZ-KIT Lite, and
EZ-Extender are registered trademarks of Analog Devices, Inc.
EZ-Board is a trademark of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Page 3
Regulatory Compliance
The ADSP-21479 EZ-Board is designed to be used solely in a laboratory
environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-21479 EZ-Board is currently being processed for certification
that it complies with the essential requirements of the European EMC
directive 89/336/EEC amended by 93/68/EEC and therefore carries the
“CE” mark.
The EZ-Board evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance degradation or loss of
functionality. Store unused EZ-Boards in the protective shipping package.
Page 4
Page 5
CONTENTS
PREFACE
Product Overview .......................................................................... vi
Purpose of This Manual ................................................................. ix
Intended Audience ......................................................................... ix
Manual Contents ............................................................................ x
What’s New in This Manual ............................................................ x
Technical or Customer Support ...................................................... xi
Supported Processors ...................................................................... xi
Product Information ..................................................................... xii
Analog Devices Web Site ......................................................... xii
VisualDSP++ Online Documentation ..................................... xiii
Technical Library CD ............................................................. xiii
EngineerZone ......................................................................... xiv
Social Networking Web Sites .................................................. xiv
Related Documents ....................................................................... xv
Notation Conventions .................................................................. xvi
Expansion II Interface ................................................................ B-16
Power ........................................................................................ B-17
ADSP-21479 EZ-Board Evaluation System Manualv
Page 10
Contents
INDEX
viADSP-21479 EZ-Board Evaluation System Manual
Page 11
PREFACE
Thank you for purchasing the ADSP-21479 EZ-Board™, Analog
Devices, Inc. evaluation system for SHARC® processors.
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated IO processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today’s de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation board is designed to be used in conjunction with the Visu-
alDSP++® development environment to test the capabilities of the
ADSP-21479 SHARC processors. The VisualDSP++ development environment aids advanced application code development and debug, such as:
•Create, compile, assemble, and link application programs written
in C++, C, and assembly
•Load, run, step, halt, and set breakpoints in application programs
•Read and write data and program memory
•Read and write core and peripheral registers
•Plot memory
Access to the processor from a personal computer (PC) is achieved
through a USB port or an external JTAG emulator. The USB interface of
the standalone debug agent gives unrestricted access to the processor and
evaluation board’s peripherals. Analog Devices JTAG emulators offer
ADSP-21479 EZ-Board Evaluation System Manualv
Page 12
Product Overview
faster communication between the host PC and target hardware. To learn
more about Analog Devices emulators and processor development tools,
go to
http://www.analog.com/dsp/tools/.
The ADSP-21479 EZ-Board provides example programs to demonstrate
the product capabilities.
L
The ADSP-21479 EZ-Board installation is part of the VisualDSP++ update 8 or later installation. As an EZ-KIT Lite, an
EZ-Board is a licensed product that offers an unrestricted evaluation license for the first 90 days. For details about evaluation
license restrictions after the 90 days, refer to “Evaluation License
Restrictions” on page 1-8 and the VisualDSP++ Installation Quick
Reference Card.
Product Overview
The board features:
•Analog Devices ADSP-21479 SHARC processor
•Core performance up to 266 MHz
•196-pin BGA package
•16.625 MHz
•5 Mb of internal RAM memory
CLKIN oscillator
•Parallel flash memory
•Numonyx M29W320EB – 4 MB (4M x 8 bits)
•SDRAM memory
•Micron MT48LC16M16A2P-6A – 16 Mbx x 16 bits
(256 Mb or 32 MB)
viADSP-21479 EZ-Board Evaluation System Manual
Page 13
•Asynchronous memory (SRAM)
•ISSI IS61WV102416BLL-10TLI – 1M x 16 bits (2 MB)
•SPI flash memory
•Numonyx M25P16 – 16 Mb
•Analog audio interface
•Analog Devices AD1939 audio codec
•4 x 2 RCA phono jack for eight channels of stereo output
•4 x 1 RCA phono jack for four channel of stereo input
•Two DB25 connectors for differential inputs/outputs
•3.5 mm headphone jack with volume control connected to
one of the stereo outputs
Preface
•Supports all eight DACs and four ADCs in TDM and I
•Ten LEDs: one board reset (red), eight general-purpose
(amber), and one power (green)
•Push buttons
•Five push buttons: one reset, two connected to the DAI,
and two connected to
•Expansion interface II
•Next generation of the expansion interface design, provides
access to most of the processor signals
•Power supply
•5V @ 3.6 Amps
FLAG pins of the processor
•Other features
•Watch dog timer (WDT) system reset implementation
•Real-time clock (RTC)
•Shift register (SR)
•SHARC power measurement jumpers
•JTAG ICE 14-pin header
•USB cable
For information about hardware components of the EZ-Board, refer to
“ADSP-21479 EZ-Board Hardware Reference” on page 2-1.
viiiADSP-21479 EZ-Board Evaluation System Manual
Page 15
Preface
Purpose of This Manual
The ADSP-21479 EZ-Board Evaluation System Manual provides instructions for installing the product hardware (board). The text describes
operation and configuration of the board components and provides guidelines for running your own code on the ADSP-21479 EZ-Board. Finally, a
schematic and a bill of materials are provided for reference.
The product software installation is detailed in the VisualDSP++ Installa-tion Quick Reference Card.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual, but should supplement it with other texts
(such as the ADSP-214xx SHARC Processor Hardware Reference and SHARC Processor Instruction Set Reference) that describe your target
architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
ADSP-21479 EZ-Board Evaluation System Manualix
Page 16
Manual Contents
Manual Contents
The manual consists of:
•Chapter 1, “Using ADSP-21479 EZ-Board” on page 1-1
Describes EZ-Board functionality from a programmer’s perspective
and provides a simplified memory map.
•Chapter 2, “ADSP-21479 EZ-Board Hardware Reference” on
page 2-1
Provides information about the EZ-Board hardware components.
•Appendix A, “ADSP-21479 EZ-Board Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-Board.
•Appendix B, “ADSP-21479 EZ-Board Schematic” on page B-1
Provides resources for board-level debugging, can be used as a reference guide.
What’s New in This Manual
This is the first revision of the ADSP-21479 EZ-Board Evaluation System
Manual.
xADSP-21479 EZ-Board Evaluation System Manual
Page 17
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
•Visit the Embedded Processing and DSP products Web site at
•Contact your Analog Devices, Inc. local sales office or authorized
distributor
•Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-21479 SHARC
embedded processors. Functionality of the ADSP-21478 processors can be
evaluated using the same product because the processors have many
similarities.
ADSP-21479 EZ-Board Evaluation System Manualxi
Page 18
Product Information
Product Information
Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, MyAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
MyAnalog.com to sign up. If you are a registered user, just log on.
Visit
Your user name is your e-mail address.
xiiADSP-21479 EZ-Board Evaluation System Manual
Page 19
Preface
VisualDSP++ Online Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documentation. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.
For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
File Description
.chmHelp system files and manuals in Microsoft help format
.htm or
.html
.pdfVisualDSP++ and processor manuals in PDF format. Viewing and printing the
Dinkum Abridged C++ library and FLEXnet License Tools software documentation. Viewing and printing the .html files requires a browser, such as Internet
Explorer 6.0 (or higher).
.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).
Technical Library CD
The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals, VisualDSP++ software manuals, and hardware tools manuals for the following
processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and
ADSP-219x.
To order the technical library CD, go to http://www.analog.com/proces-
sors/technical_library
processor, click the request CD check mark, and fill out the order form.
Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
, navigate to the manuals page for your
ADSP-21479 EZ-Board Evaluation System Manualxiii
Page 20
Product Information
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.
EngineerZone
EngineerZone is a technical support forum from Analog Devices. It allows
you direct access to ADI technical support engineers. You can search
FAQs and technical information to get quick answers to your embedded
processing and DSP design questions.
Use EngineerZone to connect with other DSP developers who face similar
design challenges. You can also use this open forum to share knowledge
and collaborate with the ADI support team and your peers. Visit
http://ez.analog.com to sign up.
Social Networking Web Sites
You can now follow Analog Devices processor development on Twitter
and LinkedIn. To access:
•Twitter:http://twitter.com/ADIsharc and
http://twitter.com/blackfin
•LinkedIn: Network with the LinkedIn group, Analog Devices
SHARC or Analog Devices Blackfin: http://www.linkedin.com
xivADSP-21479 EZ-Board Evaluation System Manual
Page 21
Preface
Related Documents
For information on product related development software, see the following publications.
Table 1. Related Processor Publications
TitleDescription
ADSP-21478/ADSP-21479 SHARC Processor Data
Sheet
ADSP-214xx SHARC Processor Hardware Reference Description of internal processor architecture
SHARC Processor Programming Reference
Table 2. Related VisualDSP++ Publications
General functional description, pinout, and
timing of the processor.
and all register functions.
Description of all allowed processor assembly
instructions.
TitleDescription
VisualDSP++ Assembler and Preprocessor ManualsDescription of the assembler function and
commands.
VisualDSP++ C/C++ Compiler Manual for SHARC
Processors
VisualDSP++ Run-Time Library Manual for
SHARC Processors
VisualDSP++ Linker and Utilities ManualDescription of the linker function and com-
VisualDSP++ Loader and Utilities ManualDescription of the loader/splitter function
Description of the complier functions and
commands for SHARC processors.
Description of the run-time library functions
for SHARC processors.
mands.
and commands.
ADSP-21479 EZ-Board Evaluation System Manualxv
Page 22
Notation Conventions
L
a
[
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
ExampleDescription
Close command
(File menu)
{this | that}Alternative required items in syntax descriptions appear within curly
[this | that]Optional items in syntax descriptions appear within brackets and sepa-
[this,…]Optional item lists in syntax descriptions appear within brackets delim-
.SECTIONCommands, directives, keywords, and feature names are in text with
filenameNon-keyword placeholders appear in text with italic style format.
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu).
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
rated by vertical bars; read the example as an optional
ited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
letter gothic font.
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
this or that.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Wa rn in g
appears instead of this symbol.
xviADSP-21479 EZ-Board Evaluation System Manual
Page 23
1USING ADSP-21479
EZ-BOARD
This chapter provides information to assist you with development of programs for the ADSP-21479 EZ-Board evaluation system.
The following topics are covered.
•“Package Contents” on page 1-2
•“Default Configuration” on page 1-3
•“EZ-Board Installation” on page 1-5
•“EZ-Board Session Startup” on page 1-6
•“Evaluation License Restrictions” on page 1-8
•“Memory Map” on page 1-8
•“SDRAM Interface” on page 1-10
•“SRAM Interface” on page 1-10
•“Parallel Flash Memory Interface” on page 1-11
•“SPI Interface” on page 1-11
•“Watch Dog Timer Interface” on page 1-12
•“Real-Time Clock Interface” on page 1-13
•“Shift Register Interface” on page 1-14
•“S/PDIF Interface” on page 1-15
ADSP-21479 EZ-Board Evaluation System Manual1-1
Page 24
Package Contents
•“Audio Interface” on page 1-15
•“UART Interface” on page 1-17
•“LEDs and Push Buttons” on page 1-18
•“JTAG Interface” on page 1-19
•“Expansion Interface II” on page 1-21
•“Power Measurements” on page 1-21
•“Power-On-Self Test” on page 1-22
•“Example Programs” on page 1-22
•“Background Telemetry Channel” on page 1-23
•“Reference Design Information” on page 1-23
For information about VisualDSP++, including the boot loading, target
options, and other facilities, refer to the online Help.
For more information about the ADSP-21479 SHARC processor, see documents referred to as “Related Documents”.
Package Contents
Your ADSP-21479 EZ-Board package contains the following items.
•ADSP-21479 EZ-Board
•VisualDSP++ Installation Quick Reference Card
•CD containing:
•VisualDSP++ software
•ADSP-21479 EZ-Board debug software
1-2ADSP-21479 EZ-Board Evaluation System Manual
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Using ADSP-21479 EZ-Board
•USB driver files
•Example programs
•Universal 5.0V DC power supply
•3.5 mm stereo headphones
•6-foot RCA audio cable
•6-foot 3.5 mm/RCA x 2 Y-cable
•3.5 mm stereo female to RCA male Y-cable
Contact the vendor where you purchased your EZ-Board or contact Analog Devices, Inc. If any item is missing.
Default Configuration
The EZ-Board evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body
and equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-Boards in the protective shipping package.
The ADSP-21479 EZ-Board board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
When removing the EZ-Board from the package, handle the board carefully to avoid the discharge of static electricity, which can damage some
components. Figure 1-1 shows the default jumper and switch settings,
ADSP-21479 EZ-Board Evaluation System Manual1-3
Page 26
Default Configuration
connector locations, and LEDs used in installation. Confirm that your
board is in the default configuration before using the board.
Figure 1-1. Default EZ-Board Hardware Setup
1-4ADSP-21479 EZ-Board Evaluation System Manual
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Using ADSP-21479 EZ-Board
EZ-Board Installation
For correct operation, install the software in the order presented in the
VisualDSP++ Installation Quick Reference Card. Substitute instructions in
step 3 with instructions in this section.
There are two options to connect the EZ-Board hardware to a personal
computer (PC) running VisualDSP++ 5.0: via an Analog Devices emulator or via a standalone debug agent module. The standalone debug agent
allows a debug agent to interface to the ADSP-21479 EZ-Board. The
standalone debug agent is shipped with the kit.
To connect the EZ-Board to a PC via an emulator:
1. Plug the 5V adaptor into connector P5 (labeled 5.0V).
2. Attach the emulator header to connector P1 (labeled JTAG) on the
back side of the EZ-Board.
To connect the EZ-Board to a PC via a standalone debug agent:
a
ADSP-21479 EZ-Board Evaluation System Manual1-5
The debug agent can be used only when power is supplied from the
wall adaptor.
1. Attach the standalone debug agent to connectors P1 (labeled JTAG)
and ZP1 on the backside of the EZ-Board, watching for the keying
pin of
2. Plug the 5V adaptor into connector
3. Plug one side of the provided USB cable into a USB connector of
the standalone debug agent. Plug the other side of the cable into
a USB port of the PC running VisualDSP++ 5.0 update 8 or later.
4. Verify that the yellow USB monitor LED on the standalone debug
agent (
fies that the board is communicating properly with the host PC
and ready to run VisualDSP++.
P1 to connect correctly.
P5 (labeled 5.0V).
LED4, located on the back side of the board) is lit. This signi-
Page 28
EZ-Board Session Startup
EZ-Board Session Startup
1. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start–>Programs menu. The
main window appears. Note that VisualDSP++ is not connected to
any session. Skip the rest of this step to step 2.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 3.
2. To connect to a new EZ-Board session, start Session Wizard by
selecting one of the following.
•From the Session menu, New Session.
•From the Session menu, Session List. Then click New Ses-
sion from the Session List dialog box.
•From the Session menu, Connect to Target.
3. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target processor, select ADSP-21479. Click Next.
4. The Select Connection Type page of the wizard appears on the
screen. For standalone debug agent connections, select EZ-KIT Lite and click Next. For emulator connections, select Emulator
and click Next.
5. The Select Platform page of the wizard appears on the screen.
For standalone debug agent connections, ensure that the selected
platform is ADSP-21479 EZ-KIT Lite via Debug Agent. For emulator connections, choose the type of emulator that is connected.
1-6ADSP-21479 EZ-Board Evaluation System Manual
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Using ADSP-21479 EZ-Board
Specify your own Session name for the session or accept the default
name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session.
Click Next.
6. The Finish page of the wizard appears on the screen. The page dis-
plays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
creates the new session and connects to the EZ-Board. Once connected, the main window’s title is changed to include the session
name set in step 5.
L
ADSP-21479 EZ-Board Evaluation System Manual1-7
To disconnect from a session, click the disconnect button
or select Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the session name from the list and click Delete. Click OK.
Page 30
Evaluation License Restrictions
Evaluation License Restrictions
The ADSP-21479 EZ-Board installation is part of the VisualDSP++ 5.0
update 8. The EZ-Board is a licensed product that offers an unrestricted
evaluation license for the first 90 days. Once the initial unrestricted
90-day evaluation license expires:
•VisualDSP++ restricts a connection to the ADSP-21479 EZ-Board
via the USB port of the standalone debug agent interface only.
Connections to simulators and emulation products are no longer
allowed.
•The linker restricts a user program to 27306 PM words for code
space with no restrictions for data space.
•The EZ-Board hardware must be connected and powered up to use
VisualDSP++ with a valid evaluation or permanent license.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
Memory Map
The ADSP-21479 processor has internal static random access memory
(SRAM) for instructions and data storage. See Table 1-1. The internal
memory details can be found in the ADSP-214xx SHARC Processor Hard-
ware Reference.
The EZ-Board includes four types of external memory: SRAM, synchronous dynamic random access memory (SDRAM), serial peripheral
interconnect (SPI) flash, and parallel flash. See Table 1-2. For more infor-
1-8ADSP-21479 EZ-Board Evaluation System Manual
Page 31
Using ADSP-21479 EZ-Board
mation about a specific memory type, go to the respective section in this
chapter.
~MS2) for non-SDRAM addresses
~MS2) for SDRAM addresses
~MS3) for 16-bit address space
~MS3) for 32-bit address space
ADSP-21479 EZ-Board Evaluation System Manual1-9
Page 32
SDRAM Interface
SDRAM Interface
The ADSP-21479 processor connects to a 32 MB Micron
MT48LC16M16A2P-6A chip through the SDRAM controller. The
SDRAM memory controller on the processor and SDRAM memory chip
are powered by the on-board 3.3V regulator. The SDRAM controller and
memory on the EZ-Board can operate at a maximum clock frequency of
133 MHz.
With a VisualDSP++ session running and connected to the EZ-Board via
the USB standalone debug agent, the SDRAM registers are configured
automatically each time the processor is reset. The values are used whenever SDRAM is accessed through the debugger (for example, when
viewing memory windows or loading a program).
To disable the automatic setting of SDRAM registers, select Target
Options from the Settings menu in VisualDSP++ and uncheck Use XML
reset values. For more information on changing reset values, refer to the
online Help.
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the SDRAM interface. For more
information on how to initialize the registers after a reset, search the VisualDSP++ online Help for “reset values”.
SRAM Interface
The board has a 1M x 16-bit flash memory connected to the processor’s
asynchronous memory interface (AMI). The SRAM can be accessed via
the asynchronous memory select 3 pin. It allows access to 16 bits of data
and interfaces to address line 0 through 19 of the processor.
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the SRAM interface. For more infor-
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Using ADSP-21479 EZ-Board
mation on how to initialize the registers after a reset, search the
VisualDSP++ online Help for “reset values”.
Parallel Flash Memory Interface
The parallel flash memory interface of the ADSP-21479 EZ-Board contains a 4 MB (4M x 8 bits) Numonyx M29W320EB chip. Flash memory
is connected to the 8-bit data bus and address lines 0 through 21. Chip
enable is decoded by the MS1 select line (default) through switch SW13
position 2. See “External Port Enable Switch (SW13)” on page 2-12. The
address range for flash memory is 0x0400 0000 to 0x043F FFFF.
Flash memory is pre-loaded with boot code for the power-on-self test
(POST) program. For more information, refer to “Power-On-Self Test”
on page 1-22.
By default, the EZ-Board boots from the 8-bit parallel flash memory. The
processor boots from flash memory if the boot mode select switch (SW4) is
set to position 2; see “Boot Mode Select Switch (SW4)” on page 2-10.
Flash memory code can be modified. For instructions, refer to the online
Help and example program included in the EZ-Board installation
directory.
For more information about the parallel flash device, refer to the Numonyx Web site:
http://www.numonyx.com.
SPI Interface
The ADSP-21479 processor has two SPI ports, which can be accessed via
the digital peripheral interface (DPI) pins.
ADSP-21479 EZ-Board Evaluation System Manual1-11
Page 34
Watch Dog Timer Interface
The SPI flash memory, a 16 Mb ST M25P16 device, connects to the SPI
port of the processor and designates:
•DPI pin 5 (
•DPI pin 3 (DPI_P3) as the SPI clock
•DPI pin 1 (DPI_P1) as the master out slave in (MOSI) pin
•DPI pin 2 (DPI_P2) as the master in slave out (MISO) pin
The same SPI port and DPI pins are connected to the serial flash memory
and audio codec via switch SW3. See “DPI [1–8] Enable Switch (SW3)” on
page 2-9. The DPI pins also are available on the expansion interface II.
By default, the EZ-Board boots from the 8-bit flash parallel memory. SPI
flash can be selected as the boot source by setting the boot mode select
switch (SW4) to position 1. See “Boot Mode Select Switch (SW4)” on
page 2-10.
The audio codec is set up to use DPI pin 4 as the SPI chip select. For more
information, refer to “Audio Interface” on page 1-15.
DPI_P5) as a chip select
Watch Dog Timer Interface
The ADSP-21479 processor includes a 32-bit watch dog timer (WDT)
that can be used to implement a software watch dog function. A software
watch dog can improve system reliability by forcing the processor to a
known state through generation of a system reset if the timer expires
before being reloaded by software. Software initializes the count value of
the timer and then enables the timer.
The watch dog timer resets both the core and internal peripherals. After
an external reset, the WDT must be disabled by default. Software must be
able to determine if the watch dog has been the source of the hardware
reset by interrogating a status bit in the watch dog timer control register.
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Using ADSP-21479 EZ-Board
Be default, the watch timer interface is turned off. In order to use the feature, a user needs to turn switch
watch dog reset out pin to the ADM708 system reset circuit. See “External
Port Enable Switch (SW13)” on page 2-12. Special attention must be paid
to this function because it can cause the processor and EZ-Board to
remain in a permanent reset.
Example programs are included in the EZ-Board installation directory to
demonstrate watch dog timer functionality.
SW13 position 8 ON. SW13 connects the
Real-Time Clock Interface
The real-time clock (RTC) of the ADSP-21479 processor provides a
robust set of digital watch features, including current time, stopwatch, and
alarm. The RTC is clocked by a 32.768 kHz crystal external to the processor. The RTC peripheral has dedicated power supply pins so that it can
remain powered up and clocked even when the rest of the processor is in a
low power state. The RTC provides several programmable interrupt
options, including interrupt per second, minute, hour, or day clock ticks,
interrupt on programmable stopwatch countdown, or interrupt at a programmed alarm time. An RTCLKOUT signal that operates at 1 Hz is also
provided for calibration.
The 32.768 kHz input clock frequency is divided down to a 1 Hz signal
by a prescaler. The counter function of the timer consists of four counters:
a 60-second counter, a 60-minute counter, a 24-hour counter, and an
32,768-day counter. When the alarm interrupt is enabled, the alarm function generates an interrupt when the output of the timer matches the
programmed value in the alarm control register. There are two alarms:
The first alarm is for a time of day. The second alarm is for a day and time
of that day.
The stopwatch function counts down from a programmed value, with
one-second resolution. When the stopwatch interrupt is enabled and the
counter underflows, an interrupt is generated.
ADSP-21479 EZ-Board Evaluation System Manual1-13
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Shift Register Interface
Example programs are included in the EZ-Board installation directory to
demonstrate RTC functionality.
Shift Register Interface
The shift register (SR) of the ADSP-21479 processor can be used as a
serial to parallel data converter. The shift register module consists of an
18-stage serial shift register, 18-bit latch, and three-state output buffers.
The shift register and latch have separate clocks. Data is shifted into the
serial shift register on the positive-going transitions of the shift register
serial clock (SR_SCLK) input. The data in each flip-flop is transferred to the
respective latch on a positive-going transition of the shift register latch
clock (SR_LAT) input.
The shift register’s signals can be configured as follows.
•The SR_SCLK can come from any of the SPORT0–7SCLK outputs,
PCGA/B clock, any of the DAI pins (1–8), and one dedicated pin
(SR_SCLK).
•The SR_LAT can come from any of SPORT0–7 frame sync outputs,
PCGA/B frame sync, any of the DAI pins (1–8), and one dedicated
pin (SR_LAT).
•The SR_SDI input can from any of SPORT0–7 serial data outputs,
any of the DAI pins (1–8), and one dedicated pin (
SR_SDI).
Note that the SR_SCLK, SR_LAT, and SR_SDI inputs must come from the
same source, except in case of where SR_SCLK comes from PCGA/B or
SR_SCLK and SR_LAT come from PCGA/B.
SR_SCLK comes from PCGA/B, then SPORT0–7 generate SR_LAT and
If
SR_SDI signals. If SR_SCLK and SR_LAT come from PCGA/B, then SPORT0–7
generate
SR_SDI signal.
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Using ADSP-21479 EZ-Board
Access to the shift register of the processor is available via the shift register
interface connector (
they require off-board capabilities. For more information, see “Shift Reg-
ister Interface Connector (P4)” on page 2-27.
P4). Users can use a standard 2 mm ribbon cable if
S/PDIF Interface
The ADSP-21479 processor has a built-in S/PDIF transmitter and
receiver for digital audio applications. The EZ-Board supports the S/PDIF
interface and brings out both the transmitter and receiver via RCA connectors J6 and J7, respectively. The S/PDIF’s in and out pins are
connected by DAI pins via switches SW1 and SW7:
•DAI pin 1 (DAI_P1) as SPDIF_OUT
•DAI pin 18 (DPI_P18) as SPDIF_IN
SW1 and SW7 can be turned OFF to disconnect the DAI pins from the RCA
connectors if the pins are used on the expansion II interface. See “DAI [1–
8] Enable Switch (SW1)” on page 2-8 and “DAI [17–20] Enable Switch
(SW7)” on page 2-11 for more information.
Audio Interface
The AD1939 device is a high-performance, single-chip codec featuring
eight digital-to-analog converters (DACs) for audio output and four analog-to-digital converters (ADCs) for audio input. This translates to four
stereo channels of audio out and two stereo channels of audio in.
The codec can input and output data at a sample rate of up to 192 kHz on
all channels.
The analog audio channels are available via single-ended RCA connectors
(J4 and J5) or differential DB25 connectors (P8 and P9). By default, the
EZ-Board is shipped with the RCA connectors used by the AD1939 codec
ADSP-21479 EZ-Board Evaluation System Manual1-15
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Audio Interface
for audio in and out. To use the differential connectors, change DIP
switches
SW15–18. A standard, off the shelf DB25 connector to XLR cables
is required to operate in this mode.
For more information, see “Audio In1 Left Selection Switch (SW15)” on
page 2-14 through “Audio In2 Left Selection Switch (SW18)” on
page 2-16, and “ADSP-21479 EZ-Board Schematic” on page B-1.
The processor interfaces with the codec via DAI and DPI pins. The DAI
pins can be configured to transfer serial data from the codec in Time-Divi-
sion Multiplexing (TDM) or Integrated Interchip Sound (I2S) mode. See
“DAI Interface” on page 2-3 for more information about the AD1939
connection to the DAI. The DPI interface pins can be configured to use
the SPI interface of the processor to set up the codec’s control registers.
See “DPI Interface” on page 2-4 for more information about the AD1939
connection to the DPI.
The master input clock (MCLK) of the codec is generated by the on-board
12.288 MHz oscillator. The internal PLL of the codec is used to generate
varying sample rates. The codec can be set up for 48 KHz, 96 KHz, or
192 KHz frequencies. The codec can run at these frequencies in both
TDM and I2S modes with all ADCs inputs and DACs outputs. To run
192 KHz with all ADCs and DACs in TDM mode, the codec must run in
dual-line TDM mode.
For information on how to configure the multi-channel codec, refer to the
product datasheet at:
The EZ-Board is connected to the AD1939 codec in master mode. The
internal PLL drives the
are driven back to the codec’s
ABCLK and ALRCLK clock signals out. Both clocks
DBCLK and DLRCLK pins via the R257 and R258
resistors. The ABCLK and ALRCLK clocks that are driven by the codec also
connect to the processor’s serial ports via the DAI pins. Resistors
R263 are used to feed the bit clock and frame sync signals of the processor’s
R262 and
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Using ADSP-21479 EZ-Board
serial ports. Connecting the codec in this manner enables a flexible audio
sample rate and allows the processor to run at the maximum core
frequency.
The audio interface also has a 3.5 mm connector (
headphones share the output with the external DAC5 and DAC6 circuits of
the analog audio interface. Switch SW23 must be enabled for the headphones. A volume control potentiometer (R493) is used to increase or
decrease the headphone’s volume. For more information, see “Headphone
Enable Switch (SW23)” on page 2-18.
Example programs are included in the EZ-Board installation directory to
demonstrate how to configure and use the board’s analog audio interface.
The DAI and DPI pins going to the AD1939 device can be disabled, then
used again on the expansion II interface. Refer to “DAI Interface” on
page 2-3 and “DPI Interface” on page 2-4 for more information about the
DAI and DPI switches.
J8) for headphones. The
UART Interface
The ADSP-21479 processor features a built-in universal asynchronous
receiver and transmitter (UART). The UART interface supports full
RS-232 functionality via the Analog Devices 3.3V ADM3202 line driver
and receiver (
DIP switch (SW14). The UART signals routed through the DIP switch can
be disconnected from the respective DPI interface and used on the expansion II interface. The following DPI pins are used for the RS-232
interface.
U8). The UART signals are available on the EZ-Board via a
•DPI pin 9 (DPI_P9) as UART_TX
•DPI pin 10 (DPI_P10) as UART_RX
ADSP-21479 EZ-Board Evaluation System Manual1-17
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LEDs and Push Buttons
•DPI pin 11 (
DPI_P11) as UART_RTS
•DPI pin 12 (DPI_P12) as UART_CTS
Example programs are included in the EZ-Board installation directory to
demonstrate UART and RS-232 operations.
For more information about the UART interface, refer to the
ADSP-214xx SHARC Processor Hardware Reference.
LEDs and Push Buttons
The EZ-Board has eight general-purpose user LEDs connected directly to
the processor, one EZ-Board power LED, and one board reset LED. The
EZ-board also has five push buttons: four general-purpose push buttons
connected directly to the processor and one push button for a board reset.
Table 1-3 summarizes LED connections to the processor. To use the
LEDs connected to DAI or DPI, configure the respective registers of the
processor. For more information, refer to the ADSP-214xx SHARC Proces-sor Hardware Reference.
Table 1-3. LED Connections
LED Reference DesignatorProcessor PinConnected via Switch
LED1DPI_P6SW3.6
LED2DPI_P13SW14.5
LED3DPI_P14SW14.6
LED4DAI_P3SW1.3
LED5DAI_P4SW1.4
LED6DAI_P15SW2.7
LED7DAI_P16SW2.8
LED8DAI_P17SW7.1
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Using ADSP-21479 EZ-Board
Two general-purpose push buttons are attached to the flag pins of the processor, while the other two are attached to the DAI pins. All of the push
buttons and LEDs are connected to the processor through DIP switches.
The DIP switches can disconnect the processor pins, which in turn are
connected to the push buttons and LEDs. See the respective switch section
in “ADSP-21479 EZ-Board Hardware Reference” on page 2-1.
The state of the push buttons connected to the flag pins can be determined by reading the
FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-3 shows the push
button and processor connections.
Table 1-4. Push Button Connections
PB Reference DesignatorProcessor PinConnected via Switch
SW8 (PB1)FLAG1/IRQ1SW13.4
SW9 (PB2)FLAG2/IRQ2/MS2SW13.5
SW10 (PB3)DAI_P19SW7.3
SW11 (PB4)DAI_P20SW7.4
An example program is included in the ADSP-21479 installation directory
to demonstrate functionality of the LEDs and push buttons.
JTAG Interface
The JTAG connector (P1) allows the standalone debug agent module to
connect a VisualDSP++ debug session to the ADSP-21479 processor. The
debug agent operates only when the external 5V wall adaptor (
The standalone debug agent can be replaced by an external emulator, such
as the Analog Devices high-performance USB-based emulator. Be careful
not to damage the connectors when removing the debug agent. The emu-
ADSP-21479 EZ-Board Evaluation System Manual1-19
P5) is used.
Page 42
JTAG Interface
lator is connected to
P1 on the back side of the board. See “EZ-Board
Installation” on page 1-5 for more information.
The ADSP-21479 EZ-Board can be set up as a single- or multi-processor
system. By default, the board is set up in single-processor mode. In single-processor mode, create a VisualDSP++ session based on a standalone
debug agent or an external emulator. To use the EZ-Board in multi-processor mode, install an external emulator. Only one external emulator is
required for the main EZ-Board; other EZ-Boards in the JTAG chain do
not require an emulator. In this mode, create a VisualDSP++ platform
based on the number of JTAG devices in the JTAG chain using the VisualDSP++ Configurator. Then create a session in VisualDSP++ based on
the newly created platform.
For a dual ADSP-21479 EZ-Board session, connect two EZ-Boards via
connectors J3 and P10. Flip one of the two EZ-Boards by 180 degrees to
allow the boards to mate. To switch between single- and multi-processor
modes, use DIP switches SW19–22. For more information, see “JTAG
Switches (SW19–22)” on page 2-16.
For three or more ADSP-21479 EZ-Board sessions, connect each of the
EZ-Board with JTAG cables. The cables connect JTAG pins of each
EZ-Board. By using the cables, you put the EZ-Board in a JTAG serial
chain. For three EZ-Boards, three JTAG cables are required. Similarly, for
four EZ-Boards, four JTAG cables are required. Note that each respective
EZ-board also requires its own power supply.
Part numbers for Samtec standard, off the shelf link port cables can be
found in “MP JTAG Out Connector (P10)” on page 2-29.
For more information about emulators, contact Analog Devices or go to:
The expansion interface II allows an Analog Devices EZ-Extender or a
custom-design daughter board to be tested across various hardware platforms with identical expansion interfaces.
The expansion interface II implemented on the ADSP-21479 EZ-Board
consists of two connectors: a 0.1 in. shrouded header (P2) and a Samtec
QMS series header (J1). The connectors contain a majority of the
ADSP-21479 processor’s signals.
For pinout information, go to “ADSP-21479 EZ-Board Schematic” on
page B-1. The mechanical dimensions of the expansion connectors can be
obtained by contacting Technical or Customer Support.
For more information about daughter boards, visit the Analog Devices
Web site at:
Limits to current and interface speed must be taken into consideration
when using the expansion interface II. Current for the expansion
interface II is sourced from the EZ-Board; therefore, the current should be
limited to 1A for 5V and 500 mA for the 3.3V planes. If more current is
required, then a separate power connector and a regulator must be
designed on a daughter card. Additional circuitry can add extra loading to
signals, decreasing their maximum effective speed.
L
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
Power Measurements
Several locations are provided for measuring the current draw from various power planes. Precision 0.05 ohm shunt resistors are available on the
ADSP-21479 EZ-Board Evaluation System Manual1-21
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Power-On-Self Test
VDDRTC, VDDEXT, and VDDINT voltage domains. The associated
jumper on connectors
draw. Once the jumper is removed, voltage across the resistor can be measured using an oscilloscope. Once voltage is measured, current can be
calculated by dividing voltage by 0.05. For the highest accuracy, a differential probe should be used for measuring voltage across the resistor.
For more information, see “VDDRTC Power Connector (P3)” on
page 2-27, “VDDEXT Power Connector (P6)” on page 2-28, and
“VDDINT Power Connector (P7)” on page 2-28.
P3, P6, or P7 must be removed to measure current
Power-On-Self Test
The power-on-self-test program (POST) tests all EZ-Board peripherals
and validates functionality as well as connectivity to the processor. Once
assembled, each EZ-Board is fully tested for an extended period of time
with a POST. All EZ-Boards are shipped with the POST preloaded into
one of their on-board flash memories. The POST is executed by resetting
the board and pressing the proper push button(s). The POST also can be
used for reference in custom software designs or hardware troubleshooting. Note that the source code for the POST program is included in the
VisualDSP++ installation directory along with the readme text file, which
describes how the board is configured to run a POST.
Example Programs
Example programs are provided with the ADSP-21479 EZ-Board to demonstrate various capabilities of the product. The programs are installed
with the VisualDSP++ software and can be found in the
to the readme file provided with each example for more information.
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Using ADSP-21479 EZ-Board
Background Telemetry Channel
The USB debug agent supports the background telemetry channel (BTC),
which facilitates data exchange between VisualDSP++ and the processor
without interrupting processor execution.
The BTC allows you to read and write data in real time while the processor continues to execute. For increased performance of the BTC,
including faster reading and writing, please check our latest line of processor emulators at:
A reference design info package is available for download on the Analog
Devices Web site. The package provides information on the design, layout, fabrication, and assembly of the EZ-KIT Lite and EZ-Board
products.
This chapter describes the hardware design of the ADSP-21479
EZ-Board.
The following topics are covered.
•“System Architecture” on page 2-2
Describes the board’s configuration and explains how the board
components interface with the processor.
•“Flags and Memory Selects” on page 2-6
Shows the locations and describes the DAI pins, DPI pins, general
purpose flags, and asynchronous memory select lines.
•“Push Buttons and Switches” on page 2-7
Shows the locations and describes the push buttons and switches.
•“Jumpers” on page 2-19
Shows the locations and describes the configuration jumpers.
•“LEDs” on page 2-21
Shows the locations and describes the LEDs.
•“Connectors” on page 2-23
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-21479 EZ-Board Evaluation System Manual2-1
Page 48
System Architecture
ADSP-21479
Processor
266 MHz
196-BGA
JTAG
Port
32 MB
SDRAM
(16Mb x 16)
16.625 MHz
Oscillator
DPI
Power
Regulation
AD1939
CODEC
Mic
In
Aud
In
(4)
Head
Out
Aud
Out
(8)
Ext. Port
4 MB
Flash
(4M x 16 )
DAI
CLK
MP
JTAG
IN
JTAG
CONN
Stand
Alone
Debug
Agent
SPI
Flash
16Mb
ADM3202
RS232
CONN
SPDIF
CIRC
SPDIF
IN
SPDIF
OUT
5V
PWR
IN
3.3V (Adjustable)
1.2V (Adjustable)
Sharc Expansion Interface II.
DAI = 0.1" Header
DPI = 0.1" Header
Ext. Port = High Speed Conn.
AMI
DAI
DPI
PBs/
LEDs
MP
JTAG
OUT
WDT
DSP
Reset
ADM708
Reset
Supervisor
32.768KHz
Oscillator
RTC
3.0 LI-ION
RTC Battery
SR
SR
Header
2 MB
SRAM
(1M x 16)
3.3V
Jumper
System Architecture
This section describes the processor’s configuration on the EZ-Board
(Figure 2-1).
Figure 2-1. EZ-Board Block Diagram
The EZ-Board is designed to demonstrate the ADSP-21479 SHARC processor capabilities. The processor runs at 266 MHz and has an I/O voltage
of 3.3V. The core voltage of the processor is 1.2V.
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ADSP-21479 EZ-Board Hardware Reference
The input clock is 16.625 MHz. The default boot mode of the processor
is external parallel flash boot. See “Boot Mode Select Switch (SW4)” on
page 2-10 for information on how to change the default boot mode.
DAI Interface
The digital application interface (DAI) pins are connected to the signal
routing unit (SRU) of the processor. The SRU is a flexible routing system
providing a large system of signal flows within the processor. The SRU
allows you to route the DAI pins to different internal peripherals in various combinations.
The DAI connects various peripherals on the EZ-Board. Table 2-1 shows
the DAI pin names, associated peripheral and net names, switch designators through which the pins are connected to the peripherals, and default
switch settings.
Table 2-1. DAI Connections
DAI Pin Peripheral Peripheral Net Connected via
Switch
DAI_P1S/PDIFSPDIF_OUTSW1.1ON
DAI_P2AD1939SOFT_RESETSW1.2ON
DAI_P3LEDsLED4SW1.3ON
DAI_P4
DAI_P5AD1939ASDATA1SW1.5ON
DAI_P6AD1939ASDATA2SW1.6ON
DAI_P7
DAI_P8
DAI_P9AD1939DSDATA4SW2.1ON
DAI_P10
DAI_P11
DAI_P12
LEDsLED5SW1.4ON
AD1939ABCLKSW1.7ON
AD1939ALRCLKSW1.8ON
AD1939DSDATA3SW2.2ON
AD1939DSDATA2SW2.3ON
AD1939DSDATA1SW2.4ON
Switch Setting
(Default)
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System Architecture
Table 2-1. DAI Connections (Cont’d)
DAI Pin Peripheral Peripheral Net Connected via
Switch
DAI_P13AD1939DBCLKSW2.5OFF
DAI_P14AD1939DLRCLKSW2.6OFF
DAI_P15LEDsLED6SW2.7ON
DAI_P16LEDsLED7SW2.8ON
DAI_P17LEDsLED8SW7.1ON
DAI_P18S/PDIFSPDIF_INSW7.2ON
DAI_P19Push buttonsPB3SW7.3ON
DAI_P20Push buttonsPB4SW7.4ON
Switch Setting
(Default)
To use the DAI on the expansion II interface, disable any signal driving a
DAI pin with the associated switch. The pinout of the expansion connectors can be found in “ADSP-21479 EZ-Board Schematic” on page B-1.
DPI Interface
The digital peripheral interface (DPI) pins are connected to a second signal routing unit of the processor (SRU2). The SRU2 unit, similar to the
SRU, is a flexible routing system providing a large system of signal flows
within the processor. The SRU2 allows you to route the DPI pins to different internal peripherals in various combinations.
The DPI connects various peripherals on the EZ-Board. Table 2-2 shows
the DPI pin names, associated peripheral and net names, switch designa-
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ADSP-21479 EZ-Board Hardware Reference
tors through which the pins are connected to the peripherals, and default
switch settings.
Table 2-2. DPI Connections
DPI Pin Peripheral Peripheral Net Connected via
Switch
DPI_P1SPI memory/
SPI_MOSISW3.1ON
Switch Setting
(Default)
AD1939
DPI_P2SPI memory/
SPI_MISOSW3.2ON
AD1939
DPI_P3SPI memory/
SPI_CLKSW3.3ON
AD1939
DPI_P4AD1939AD1939_CSSW3.4ON
DPI_P5SPI memorySPI_CSSW3.5ON
DPI_P6LEDsLED1SW3.6ON
DPI_P7Internal testing Not usedSW3.7OFF
DPI_P8Not usedNot usedSW3.8OFF
DPI_P9UARTUART_TXSW14.1ON
DPI_P10UARTUART_RXSW14.2ON
DPI_P11UARTUART_RTSSW14.3OFF
DPI_P12UARTUART_CTSSW14.4OFF
DPI_P13
DPI_P14UARTLED3SW14.6ON
UARTLED2SW14.5ON
To use the DPI on the expansion II interface, disable any signal driving a
DPI pin with the associated switch. The pinout of the expansion connectors can be found in “ADSP-21479 EZ-Board Schematic” on page B-1.
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Flags and Memory Selects
Flags and Memory Selects
The processor has four asynchronous memory selects, four flag pins, three
interrupt request pins, and one timer expired pin. All flag/memory pins
are multi-functional and depend on the ADSP-21479 processor setup.
Table 2-3 shows the pin names, corresponding peripheral and net names,
switch designators through which the pins are connected to the peripherals, and default switch settings.
To use the flags or memory selects on the expansion II interface, disable
any signal driving a flag or memory pin with the associated switch. The
pinout of the expansion connectors can be found in “ADSP-21479
EZ-Board Schematic” on page B-1.
Table 2-3. Flags and Memory Select Connections
Flag/Memory Pin Peripheral Peripheral Net Connected via
Switch
MS0SDRAMSDRAM_CSSW13.1ON
MS1Parallel flash memoryFLASH_CSSW13.2ON
FLAG1/IRQ1Push buttonsPB1SW13.3ON
FLAG2/IRQ2/MS2Push buttonsPB2SW13.4ON
FLAG3/MS3SRAMSRAM_CSSW13.5ON
WDTRSTO_Z
Reset Supervisory ICWDTRSTOSW13.6OFF
Switch
Setting
(Default)
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ADSP-21479 EZ-Board Hardware Reference
Push Buttons and Switches
This section describes operation of the push buttons and switches. The
push button and switch locations are shown in Figure 2-2.
Figure 2-2. Push Button and Switch Locations
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Push Buttons and Switches
DAI [1–8] Enable Switch (SW1)
The DAI [1–8] enable switch (SW1) disconnects DAI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DAI signals to be used on the expansion II interface. See
Table 2-4.
Table 2-4. DAI [1–8] Enable Switch (SW1)
SW1 PositionDAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW1.1DAI_P1S/PDIFSPDIF_OUTON
SW1.2DAI_P2AD1939AD1939_SOFT_RESETON
SW1.3DAI_P3LEDsLED4ON
SW1.4DAI_P4LEDsLED5ON
SW1.5DAI_P5AD1939ASDATA1ON
SW1.6DAI_P6AD1939ASDATA2ON
SW1.7DAI_P7AD1939ABCLKON
SW1.8DAI_P8AD1939ALRCLKON
DAI [9–16] Enable Switch (SW2)
The DAI [9–16] enable switch (SW2) disconnects DAI pins nine
through 16 on the processor from the associated peripherals on the
EZ-Board and allows the DAI signals to be used on the expansion II interface. See Table 2-5.
Table 2-5. DAI [9–16] Enable Switch (SW2)
SW2 PositionDAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW2.1DAI_P9AD1939DSDATA4ON
SW2.2DAI_P10AD1939DSDATA3ON
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ADSP-21479 EZ-Board Hardware Reference
Table 2-5. DAI [9–16] Enable Switch (SW2) (Cont’d)
SW2 PositionDAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW2.3DAI_P11AD1939DSDATA2ON
SW2.4DAI_P12AD1939DSDATA1ON
SW2.5DAI_P13AD1939DBCLKOFF
SW2.6DAI_P14AD1939DLRCLKOFF
SW2.7DAI_P15LEDsLED6ON
SW2.8DAI_P16LEDsLED7ON
DPI [1–8] Enable Switch (SW3)
The DPI [1–8] enable switch (SW3) disconnects DPI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DPI signals to be used on the expansion II interface. See
Table 2-6.
Table 2-6. DPI [1–8] Enable Switch (SW3)
SW3 PositionDPI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW3.1DPI_P1SPI memory
AD1939
SW3.2DPI_P2
SW3.3DPI_P3SPI memory
SW3.4DPI_P4AD1939AD1939_CSON
SW3.5DPI_P5SPI memorySPI_CSON
SW3.6DPI_P6
SW3.7DPI_P7
SW3.8DPI_P8
SPI memory
AD1939
AD1939
LEDsLED1ON
Internal testingNot usedOFF
Not usedNot usedOFF
SPI_MOSION
SPI_MISOON
SPI_CLKON
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Push Buttons and Switches
Boot Mode Select Switch (SW4)
The boot mode select switch (SW4) determines the boot mode of the processor. Table 2-7 shows the available boot mode settings. By default, the
processor boots from the on-board parallel flash memory.
The selected position of
SW4 is marked by the notch down the entire rotat-
ing portion of the switch, not the small arrow.
Table 2-7. Boot Mode Select Switch (SW4)
SW4 Position Processor Boot Mode
0SPI slave boot
1Boot from SPI flash memory (SPI master boot)
2Boot from 8-bit external parallel flash memory (default)
3Reserved
4Reserved
5Reserved
6Reserved
7Reserved
DSP Clock Configuration Switch (SW5)
The clock configuration switch (SW5) controls the core frequency of the
processor at power up. The core to clock-in ratio is multiplied by the
16.625 MHz oscillator (
Table 2-8 shows the switch settings.
U42) to produce the power up core frequency.
The core clock frequency can be increased or decreased via software by
writing to the PMCTL register. For more information on changing the core
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ADSP-21479 EZ-Board Hardware Reference
clock frequency and other settings, refer to the ADSP-214xx SHARC Processor Hardware Reference.
The DAI [17–20] enable switch (SW7) disconnects DAI pins 17 through
20 on the processor from the associated peripherals on the EZ-Board and
allows the DAI signals to be used on the expansion II interface. See
Table 2-9.
Table 2-9. DAI [17–20] Enable Switch (SW7)
SW7 PositionDAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW7.1DAI_P17LEDsLED8ON
SW7.2DAI_P18
SW7.3DAI_P19Push buttonsPB3ON
S/PDIFSPDIF_INON
SW7.4DAI_P20
Push buttonsPB4ON
Programmable Flag Push Buttons (SW8–11)
Four momentary push buttons (SW8–11) are provided for general-purpose
user input. The buttons are connected to the GPIO pins of the processor.
The push buttons are active high and, when pressed, send a high (1) to the
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Push Buttons and Switches
processor. Switches
SW7 and SW13 disconnect the push buttons from the
responding signals. Refer to “DAI [17–20] Enable Switch (SW7)” on
page 2-11 and “External Port Enable Switch (SW13)” on page 2-12 for
more information.
Reset Push Button (SW12)
The reset push button (SW12) resets the following ICs:
•ADSP-21479 processor (
•AD1939 audio codec (U19)
•Parallel flash memory (U4)
The reset also is linked to the expansion II interface; any daughter card
connected to the expansion interface that requires a reset can use SW12.
The reset push button does not reset the standalone debug agent once the
debug agent is connected to a personal computer (PC). After communication between the debug agent and PC is initialized, pushing a reset button
does not reset the USB chip on the debug agent. The only way to reset the
USB chip on the debug agent is to power down the EZ-Board.
U1)
External Port Enable Switch (SW13)
The external port enable switch (SW13) disconnects the control pins of the
processor from the associated peripherals on the EZ-Board and allows the
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ADSP-21479 EZ-Board Hardware Reference
respective control signals to be used on the expansion II interface. See
Table 2-10.
Table 2-10. External Port Enable Switch (SW13)
SW13
Position
SW13.1MS0SDRAMSDRAM_CSON
SW13.2MS1Parallel flash
SW13.3FLAG1/IRQ1Push buttonsPB1ON
SW13.4FLAG2/IRQ2/MS2Push buttonsPB2ON
SW13.5FLAG3/MS3SRAMSRAM_CSON
SW13.6WDTRSTO (Watch Dog
Processor Pin Peripheral Peripheral Net Switch Setting
(Default)
FLASH_CSON
memory
Rest Out)
Reset Supervisory IC
WDTRSTOOFF
DPI [9–14] Enable Switch (SW14)
The DPI [9–14] enable switch (SW14) disconnects DPI pins nine through
14 on the processors from the associated peripherals on the EZ-Board and
allows the DPI signals to be used on the expansion II interface. See
Table 2-11.
Table 2-11. DPI [9–14] Enable Switch (SW14)
SW14
Position
SW14.1DPI_P9UARTUART_TXON
SW14.2DPI_P10
DPI Pin Peripheral Peripheral Net Switch Setting
(Default)
UARTUART_RXON
SW14.3DPI_P11
SW14.4DPI_P12UARTUART_CTSOFF
SW14.5DPI_P13
SW14.6DPI_P14
UARTUART_RTSOFF
LEDsLED2ON
LEDsLED3ON
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Push Buttons and Switches
Audio In1 Left Selection Switch (SW15)
The audio selection switch (SW15) connects the left channel of the In1 line,
connected to the AD1939’s ADC1 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, SW15 is set up
to use the RCA connectors. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to the differential setting. See
Table 2-12. For more information, see “Differential In/Out Connectors
(P8–9)” on page 2-28.
Table 2-12. Audio In1 Left Selection Switch (SW15)
SW15 PositionSingle-Ended RCA IN (Default)Differential DB25 IN (P8)
SW15.1ONOFF
SW15.2OFFON
SW15.3ONOFF
SW15.4OFFON
SW15.5ONOFF
SW15.6OFFON
Audio In1 Right Selection Switch (SW16)
The audio selection switch (SW16) connects the right channel of the In1
line, connected to the AD1939’s ADC2 circuit, to either the single-ended
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to
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ADSP-21479 EZ-Board Hardware Reference
the differential setting. See Table 2-13. For more information, see “Dif-
ferential In/Out Connectors (P8–9)” on page 2-28.
Table 2-13. Audio In1 Right Selection Switch (SW16)
SW16 PositionSingle-Ended RCA IN (Default)Differential DB25 IN (P8)
SW16.1ONOFF
SW16.2OFFON
SW16.3ONOFF
SW16.4OFFON
SW16.5ONOFF
SW16.6OFFON
Audio In2 Right Selection Switch (SW17)
The audio selection switch (SW17) connects the right channel of the In2
line, connected to the AD1939’s ADC4 circuit, to either the single-ended
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to
the differential setting. See Table 2-14. For more information, see “Dif-
ferential In/Out Connectors (P8–9)” on page 2-28.
Table 2-14. Audio In2 Right Selection Switch (SW17)
SW17 PositionSingle Ended Use RCA IN (Default)Differential DB25 IN (P8)
SW17.1ONOFF
SW17.2OFFON
SW17.3ONOFF
SW17.4OFFON
SW17.5ONOFF
SW17.6OFFON
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Push Buttons and Switches
Audio In2 Left Selection Switch (SW18)
The audio selection switch (SW18) connects the left channel of the In2 line,
connected to the AD1939’s ADC3 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, the switch is
set up to use the RCA connectors for audio in. To use the standard, off
the shelf DB25 connector to XLR cables, change the switch to the differential setting. See Table 2-15. For more information, see “Differential
In/Out Connectors (P8–9)” on page 2-28.
Table 2-15. Audio In2 Left Selection Switch (SW18)
SW18 PositionSingle Ended RCA IN (Default)Differential DB25 IN (P8)
SW18.1ONOFF
SW18.2OFFON
SW18.3ONOFF
SW18.4OFFON
SW18.5ONOFF
SW18.6OFFON
JTAG Switches (SW19–22)
The JTAG switches (SW19, SW20, SW21, and SW22) select between a single-processor (one EZ-Board) and multi-processor (more than one
EZ-Board) configurations. By default, the four DIP switches are set up for
a single EZ-Board configuration. See Table 2-16.
The default configuration applies to either a debug agent or an external
emulator, such as the Analog Devices high-performance USB-based emulator (HP-USB ICE for short). To use an external emulator and multiple
EZ-Boards simultaneously in one VisualDSP++ multi-processor session,
set up the boards as shown in Table 2-17. Attach the boards to each other
via connectors J3 and P10. For two EZ-Boards, no external cables are
required. For three or more EZ-Boards, obtain Samtec JTAG cables
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ADSP-21479 EZ-Board Hardware Reference
described in “MP JTAG Connector (J3)” on page 2-24 and “MP JTAG
The headphone enable switch (SW23) connects the AD1939’s OUT3 circuit
to the 3.5 mm headphone connector (J8). By default, the headphone
enable switch is disabled. To use the headphones, set SW23 to all ON. For
more information, see “Headphone Out Connector (J8)” on page 2-26.
Audio Loopback Switches (SW24–25)
The audio loopback switches (SW24 and SW25) are used for testing only.
The switches loop back any analog signal generated from the AD1939’s
digital-to-analog converter (DAC) circuit to analog-to-digital converter
(ADC) circuit.
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ADSP-21479 EZ-Board Hardware Reference
Jumpers
This section describes functionality of the configuration jumpers.
Figure 2-3 shows the jumper locations.
Figure 2-3. Configuration Jumper Locations
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Jumpers
Flash WP Jumper (JP1)
The flash WP jumper (JP1) write-protects block 0 of the parallel flash
chip. Block 0 is located at address range 0x0400 0000–0x0400 1FFF. The
POST begins at block 0 and continues on to other blocks in flash memory. When the jumper is installed on JP1, and the parallel flash driver
from Analog Devices is used, block 0 is read-only. By default, JP1 is not
installed.
S/PDIF Loopback Jumper (JP2)
The S/PDIF loop back jumper (JP2) is used for internal testing only. The
jumper loops back any digital audio signal from the S/PDIF’s Data Out
pin to the S/PDIF’s Data In pin. By default, JP2 is not installed.
UART RTS/CTS Jumper (JP3)
The UART RTS/CTS jumper (JP3) connects the RTS and CTS pins of the
RS-232 interface. By default, JP3 is installed.
UART Loopback Jumper (JP4)
The UART loop back jumper (JP4) is used for internal testing only. The
jumper loops back UART receive data from UART transmit data. By
default,
JP4 is not installed.
DSP Audio Oscillator Jumper (JP5)
The processor audio oscillator jumper (JP5) connects a 24.576 MHz
oscillator to the
make the processor the master and the AD1939 device—the slave. By
default,
and the processor being the slave.
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JP5 is not installed, resulting in the AD1939 being the master,
DAI_P17 pin of the processor. The jumper can be used to
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ADSP-21479 EZ-Board Hardware Reference
LEDs
This section describes the on-board LEDs. Figure 2-4 shows the LED
locations.
Figure 2-4. LED Locations
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LEDs
GPIO LEDs (LED1–8)
Eight LEDs (LED1–8) are connected to DAI and DPI pins of the processor.
See Table 2-18. The LEDs are active high and lit by writing a ‘1’ to the
correct DAI or DPI pin.
Table 2-18. GPIO LEDs
LED Reference DesignatorProcessor Pin
LED1DPI_P6
LED2DPI_P13
LED3DPI_14
LED4DAI_P3
LED5DAI_P4
LED6DAI_P15
LED7DAI_P16
LED8DAI_P17
Power LED (LED9)
When LED9 is lit solid, it indicates that the board is powered.
Reset LED (LED10)
When LED10 is lit, it indicates that a master reset of all major ICs is active.
The reset LED is controlled by the Analog Devices ADM708 supervisory
reset circuit. You can assert the reset push button (SW12) to assert a master
reset and activate LED10. The reset also is controlled by the watch dog reset
out pin of the processor. Switch
watch dog reset. For more information, see “Watch Dog Timer Interface”
on page 1-12.
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SW13 position 8 must be enabled for the
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ADSP-21479 EZ-Board Hardware Reference
Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in
Figure 2-5.
Figure 2-5. Connector Locations
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Connectors
Expansion Interface II Connector (J1)
J1 is a board-to-board connector providing signals from the asynchronous
memory interface (AMI) of the processor. The connector is located on the
right edge of the board. For more information, see “Expansion Interface
II” on page 1-21. For availability and pricing of the connector, contact
The VDDRTC power connector (P3) is used to measure the processor’s
I/O voltage and current. By default, P3 is ON, and the power flows through
the two-pin IDC header. To measure power, remove the jumper on P3
and measure voltage across the 0.1 ohm resistor. Once voltage is measured, power can be calculated. For more information, refer to “Power
Measurements” on page 1-21.
Shift Register Interface Connector (P4)
The shift register interface connector (P4) provides signals for the shift
register interface of the processor. A user can use this connector to probe
the signals or can purchase a standard 2 mm ribbon cable if the signals are
needed off the board. For more information, refer to “Shift Register Inter-
face” on page 1-14.
Part DescriptionManufacturerPart Number
2 mm 13 x 2 maleSAMTEC ETMM-113-02-L-D-SM
Mating Cable
6” 2 mm cable 13 x 2SAMTECTCSD-13-D-06.00-01
Power Connector (P5)
The power connector (P5) provides all of the power necessary to operate
the EZ-Board.
Part DescriptionManufacturerPart Number
0.65 mm power jack CUI045-0883R
Mating Power Supply (shipped with the EZ-Board and EZ-KIT Lite)
5.0VDC@3.6A power supplyGLOBTEKGS-1750(R)
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Connectors
VDDEXT Power Connector (P6)
The VDDEXT power connector (P6) is used to measure the processor’s I/O
voltage and current. By default, P6 is ON, and the power flows through the
two-pin IDC header. To measure power, remove the jumper on P7 and
measure voltage across the 0.1 ohm resistor. Once voltage is measured,
power can be calculated. For more information, refer to “Power Measure-
ments” on page 1-21.
VDDINT Power Connector (P7)
The VDDINT power connector (P7) is used to measure voltage and current
supplied to the processor core. By default, P7 is ON, and the power flows
through the two-pin IDC header. To measure power, remove the jumper
on P7 and measure voltage across the 0.1 ohm resistor. Once voltage is
measured, power can be calculated. For more information, refer to “Power
Measurements” on page 1-21.
Differential In/Out Connectors (P8–9)
The differential in and out connectors (P8–9) are intended for an evaluation of the AD1939 codec via XLR connectors. A standard, off the shelf
DB25 connector to XLR cables is required; the cable details can be found
in the following table.
Part DescriptionManufacturerPart Number
25-position DB25 socketTYCO1734350-2
Mating Cables
Snake (8)XLRF-25P 9.9’ HOSADTF-803
Snake (8)XLRM-25P 9.9’ HOSADTM-803
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MP JTAG Out Connector (P10)
Part DescriptionManufacturerPart Number
ERM8 10 x 2, RA male SAMTECERM8-010-01-S-D-RA
Mating Cable
6” cable ERF8 to ERM8 10 x 2SAMTECERCD-010-06.00-TBL-SBR-1
Standalone Debug Agent Connector (ZP1)
ZP1 connects the standalone debug agent to the EZ-Board. The standalone
debug agent requires two connectors, ZP1 and P1. For more information,
see “JTAG Connector (P1)” on page 2-26.
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Connectors
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AADSP-21479 EZ-BOARD BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-21479 EZ-Board Schematic”