Page 1
ADSP-21469 EZ-Board
a
TM
Evaluation System Manual
Revision 1.0, April 2009
Part Number
82-000221-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
Page 2
Copyright Information
© 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, SHARC, EZ-KIT Lite, and
EZ-Extender are registered trademarks of Analog Devices, Inc.
EZ-Board is a trademark of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Page 3
Regulatory Compliance
The ADSP-21469 EZ-Board is designed to be used solely in a laboratory
environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-21469 EZ-Board is currently being processed for certification
that it complies with the essential requirements of the European EMC
directive 89/336/EEC amended by 93/68/EEC and therefore carries the
“CE” mark.
The EZ-Board evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-Board boards in the protective shipping package.
Page 4
Page 5
CONTENTS
PREFACE
Product Overview .......................................................................... xii
Purpose of This Manual .................................................................. xv
Intended Audience .......................................................................... xv
Manual Contents ........................................................................... xvi
What’s New in This Manual ........................................................... xvi
Technical or Customer Support ..................................................... xvii
Supported Processors ..................................................................... xvii
Product Information .................................................................... xviii
Analog Devices Web Site ........................................................ xviii
VisualDSP++ Online Documentation ....................................... xix
Technical Library CD ............................................................... xix
Related Documents ................................................................... xx
Notation Conventions .................................................................... xxi
USING ADSP-21469 EZ-BOARD
Package Contents .......................................................................... 1-2
Default Configuration ................................................................... 1-3
EZ-Board Installation ................................................................... 1-5
ADSP-21469 EZ-Board Evaluation System Manual v
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CONTENTS
EZ-Board Session Startup ............................................................. 1-6
Evaluation License Restrictions ..................................................... 1-8
Memory Map ............................................................................... 1-8
DDR2 Interface ........................................................................... 1-9
Parallel Flash Memory Interface .................................................. 1-10
SPI Interface .............................................................................. 1-11
Link Port Interface ..................................................................... 1-12
Temperature Sensor Interface ...................................................... 1-13
S/PDIF Interface ........................................................................ 1-14
Audio Interface ........................................................................... 1-14
UART Interface .......................................................................... 1-16
LEDs and Push Buttons .............................................................. 1-17
JTAG Interface ........................................................................... 1-18
Land Grid Array ......................................................................... 1-20
Expansion Interface II ................................................................. 1-20
Power Measurements .................................................................. 1-21
Power-On-Self Test ..................................................................... 1-21
Example Programs ...................................................................... 1-22
Background Telemetry Channel .................................................. 1-22
Reference Design Information ..................................................... 1-23
ADSP-21469 EZ-BOARD HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
DAI Interface .......................................................................... 2-3
DPI Interface .......................................................................... 2-4
vi ADSP-21469 EZ-Board Evaluation System Manual
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CONTENTS
Flags and Memory Selects .............................................................. 2-6
Push Button and Switch Settings ................................................... 2-7
DAI [1–8] Enable Switch (SW1) .............................................. 2-8
DAI [9–16] Enable Switch (SW2) ............................................ 2-8
DPI [1–8] Enable Switch (SW3) .............................................. 2-9
Boot Mode Select Switch (SW4) ............................................ 2-10
DSP Clock Configuration Switch (SW5) ................................ 2-11
DAI [17–20] Enable Switch (SW7) ........................................ 2-11
Programmable Flag Push Buttons (SW8–11) .......................... 2-12
Reset Push Button (SW12) .................................................... 2-12
Asynchronous Control Enable Switch (SW13) ........................ 2-13
DPI [9–14] Enable Switch (SW14) ........................................ 2-13
Audio In1 Left Selection Switch (SW15) ................................ 2-14
Audio In1 Right Selection Switch (SW16) .............................. 2-15
Audio In2 Right Selection Switch (SW17) .............................. 2-15
Audio In2 Left Selection Switch (SW18) ................................ 2-16
JTAG Switches (SW19–22) .................................................... 2-17
Headphone Enable Switch (SW23) ........................................ 2-19
Audio Loopback Switches (SW24–25) ................................... 2-19
Jumpers ...................................................................................... 2-20
Flash WP Jumper (JP1) ......................................................... 2-21
S/PDIF Loopback Jumper (JP2) ............................................ 2-21
UART RTS/CTS Jumper (JP3) .............................................. 2-21
UART Loopback Jumper (JP4) .............................................. 2-21
ADSP-21469 EZ-Board Evaluation System Manual vii
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CONTENTS
LEDs ......................................................................................... 2-22
GPIO LEDs (LED1–8) ......................................................... 2-23
Power LED (LED9) .............................................................. 2-23
Reset LED (LED10) ............................................................. 2-23
Thermal Limit LED (LED11) ............................................... 2-24
Connectors ................................................................................. 2-25
Expansion Interface II Connector (J1) ................................... 2-26
RS-232 Connector (J2) ......................................................... 2-26
Link Port 1 Connector (J3) ................................................... 2-26
RCA Audio Connector (J4) ................................................... 2-27
RCA Audio Connector (J5) ................................................... 2-27
S/PDIF IN Connector (J6) .................................................... 2-27
S/PDIF OUT Connector (J7) ............................................... 2-27
Headphone Out Connector (J8) ............................................ 2-28
JTAG Connector (P1) ........................................................... 2-28
Expansion Interface II Connector (P2) .................................. 2-28
DMAX Land Grid Array Connectors (P5–7) ......................... 2-29
Differential In/Out Connectors (P8–9) .................................. 2-29
MLB Connector (P10) .......................................................... 2-29
Link Port 0 Connector (P12) ................................................. 2-30
VDD_DDR2 Power Connector (P13) ................................... 2-30
VDDINT Power Connector (P14) ........................................ 2-30
VDDEXT Power Connector (P15) ........................................ 2-30
Power Connector (P16) ......................................................... 2-31
viii ADSP-21469 EZ-Board Evaluation System Manual
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CONTENTS
Standalone Debug Agent Connector (ZP1) ............................ 2-31
ADSP-21469 EZ-BOARD BILL OF MATERIALS
ADSP-21469 EZ-BOARD SCHEMATIC
Title Page .................................................................................... B-1
Processor - DDR2 Interface .......................................................... B-2
Processor - ASYNC Interface ........................................................ B-3
Processor - DAI, DPI, Link Port Interfaces .................................. B-4
Processor - Power ......................................................................... B-5
S/PDIF, RS-232, JTAG Interfaces ................................................. B-6
Reset Circuit, Push Buttons, LEDs ............................................... B-7
Audio Page 1 ................................................................................ B-8
Audio Page 2 ................................................................................ B-9
Audio Page 3 .............................................................................. B-10
Audio Page 4 .............................................................................. B-11
Audio Page 5 .............................................................................. B-12
Audio Page 6 .............................................................................. B-13
Audio Page 7 .............................................................................. B-14
Expansion II Interface / L. A. Connectors ................................... B-15
Power ........................................................................................ B-16
INDEX
ADSP-21469 EZ-Board Evaluation System Manual ix
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CONTENTS
x ADSP-21469 EZ-Board Evaluation System Manual
Page 11
PREFACE
Thank you for purchasing the ADSP-21469 EZ-Board™, Analog
Devices, Inc. evaluation system for SHARC® processors.
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated IO processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today’s de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation board is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the
ADSP-21469 SHARC processors. The VisualDSP++ development environment aids advanced application code development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21469 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-21469 processor from a personal computer (PC) is
achieved through a USB port or an external JTAG emulator. The USB
interface of the standalone debug agent gives unrestricted access to the
ADSP-21469 processor and evaluation board’s peripherals. Analog
ADSP-21469 EZ-Board Evaluation System Manual xi
Page 12
Product Overview
Devices JTAG emulators offer faster communication between the host PC
and target hardware. To learn more about Analog Devices emulators and
processor development tools, go to
http://www.analog.com/dsp/tools/.
The ADSP-21469 EZ-Board provides example programs to demonstrate
the capabilities of the product.
L
alDSP++ installation. As an EZ-KIT Lite, an EZ-Board is a
licensed product that offers an unrestricted evaluation license for
the first 90 days. For details about evaluation license restrictions
after the 90 days, refer to “Evaluation License Restrictions” on
page 1-8 and the VisualDSP++ Installation Quick Reference Card.
Product Overview
The board features:
• Analog Devices ADSP-21469 SHARC processor
D Core performance up to 450 MHz
D 324-pin PBGA package
D 25 MHz oscillator
D 5 Mb of internal RAM memory
• Double data rate synchronous dynamic random access memory
(DDR2)
The ADSP-21469 EZ-Board installation is part of the Visu-
D Micron MT47H64M16HR-3 – 128 MB (64M x 16 bits)
D Performance of up to 225 MHz clock rate
• Parallel flash memory
D Numonyx M29W320EB – 4 MB (4M x 8 bits)
xii ADSP-21469 EZ-Board Evaluation System Manual
Page 13
• SPI flash memory
D Numonyx M25P16 – 16 Mb
• Analog audio interface
D Analog Devices AD1939 audio codec
D Eight DAC outputs for four channels of stereo output
D Four ADC inputs for two channels of stereo input
D Two DB25 connectors for differential inputs/outputs
D 3.5 mm headphone jack with volume control connected to
one of the stereo outputs
D Supports all eight DACs and four ADCs in TDM and I
modes at 48 KHz, 96 KHz, and 192 KHz sample rates
• Digital audio interface (S/PDIF)
Preface
2
S
• RCA phono jack output
• RCA phono jack input
• Link port interface
D Two Samtec ERF8/ERM8 series connectors
D Link ports performance up to 166 MHz
D Two EZ-Boards can mate with no cables required
• Temperature monitor
D ON Semiconductor ADM1032
D Local and remote temperature sensing
ADSP-21469 EZ-Board Evaluation System Manual xiii
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Product Overview
• Universal asynchronous receiver/transmitter (UART)
D ADM3202 RS-232 line driver/receiver
D DB9 female connector
•LEDs
D Eleven LEDs: one board reset (red), eight general-purpose
(amber), one temperature sensor LED (amber), and one
power (green)
• Push buttons
D Five push buttons: one reset, two connected to DAI, two
connected to FLAG pins of the processor
• Expansion interface II
D Next generation of the expansion interface design, provides
access to most of the ADSP-21469 processor signals
• Land grid array
D Easy probing of all port pins and most asynchronous
memory interface (AMI) signals
• Other features
D JTAG ICE 14-pin header
D SHARC power measurement jumpers
For information about the hardware components of the EZ-Board, refer
to “ADSP-21469 EZ-Board Hardware Reference” on page 2-1.
xiv ADSP-21469 EZ-Board Evaluation System Manual
Page 15
Preface
Purpose of This Manual
The ADSP-21469 EZ-Board Evaluation System Manual provides instructions for installing the product hardware (board). The text describes
operation and configuration of the board components and provides guidelines for running your own code on the ADSP-21469 EZ-Board. Finally, a
schematic and a bill of materials are provided for reference.
The product software installation is detailed in the VisualDSP++ Installa-
tion Quick Reference Card.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual, but should supplement it with other texts
(such as the ADSP-2146x SHARC Processor Hardware Reference for
ADSP-21467/8/9 Processors and SHARC Processor Instruction Set Reference)
that describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
ADSP-21469 EZ-Board Evaluation System Manual xv
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Manual Contents
Manual Contents
The manual consists of:
• Chapter 1, “Using ADSP-21469 EZ-Board” on page 1-1
Describes EZ-Board functionality from a programmer’s perspective
and provides an easy-to-access memory map.
• Chapter 2, “ADSP-21469 EZ-Board Hardware Reference” on
page 2-1
Provides information on the EZ-Board hardware components.
• Appendix A, “ADSP-21469 EZ-Board Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-Board.
• Appendix B, “ADSP-21469 EZ-Board Schematic” on page B-1
Provides the resources to allow EZ-Board board-level debugging or
to use as a reference. Appendix B is part of the online Help.
What’s New in This Manual
This is the first revision of the ADSP-21469 EZ-Board Evaluation System
Manual.
xvi ADSP-21469 EZ-Board Evaluation System Manual
Page 17
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technical_support
• E-mail tools questions to
processor.tools.support@analog.com
• E-mail processor questions to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Phone questions to 1-800-ANALOGD
Preface
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-21462,
ADSP-21465, ADSP-21467, and ADSP-21469 SHARC embedded
processors.
ADSP-21469 EZ-Board Evaluation System Manual xvii
Page 18
Product Information
Product Information
Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, MyAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
MyAnalog.com to sign up. If you are a registered user, just log on.
Visit
Your user name is your e-mail address.
xviii ADSP-21469 EZ-Board Evaluation System Manual
Page 19
Preface
VisualDSP++ Online Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documentation. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.
For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
File Description
.chm Help system files and manuals in Microsoft help format
.htm or
.html
.pdf VisualDSP++ and processor manuals in PDF format. Viewing and printing the
Dinkum Abridged C++ library and FLEXnet License Tools software documentation. Viewing and printing the .html files requires a browser, such as Internet
Explorer 6.0 (or higher).
.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).
Technical Library CD
The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals, VisualDSP++ software manuals, and hardware tools manuals for the following
processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and
ADSP-219x.
To order the technical library CD, go to http://www.analog.com/proces-
sors/technical_library
processor, click the request CD check mark, and fill out the order form.
, navigate to the manuals page for your
ADSP-21469 EZ-Board Evaluation System Manual xix
Page 20
Product Information
Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.
Related Documents
For information on product related development software, see the following publications.
Table 1. Related Processor Publications
Title Description
ADSP-21462/ADSP-21465/ADSP-21467/ADSP21469 SHARC Processor Preliminary Data Sheet
ADSP-2146x SHARC Processor Hardware Reference for ADSP-21467/8/9 Processors
SHARC Processor Programming Reference Description of all allowed processor assem-
General functional description, pinout, and
timing of the processor.
Description of internal processor architecture and all register functions.
bly instructions.
Table 2. Related VisualDSP++ Publications
Title Description
ADSP-21469 EZ-Board Evaluation System Manual
VisualDSP++ User’s Guide Description of VisualDSP++ features and
VisualDSP++ Assembler and Preprocessor Manuals Description of the assembler function and
VisualDSP++ C/C++ Complier and Library Manual for SHARC Processors
Description of the hardware capabilities of
the evaluation system; description of how to
access these capabilities in the VisualDSP++
environment.
usage.
commands.
Description of the complier function and
commands for SHARC processors.
xx ADSP-21469 EZ-Board Evaluation System Manual
Page 21
Table 2. Related VisualDSP++ Publications (Cont’d)
Title Description
VisualDSP++ Linker and Utilities Manual Description of the linker function and com-
mands.
VisualDSP++ Loader and Utilities Manual Description of the loader/splitter function
and commands.
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example Description
Preface
Close command
(File menu)
{this | that} Alternative required items in syntax descriptions appear within curly
[this | that] Optional items in syntax descriptions appear within brackets and sepa-
[this,…] Optional item lists in syntax descriptions appear within brackets delim-
.SECTION Commands, directives, keywords, and feature names are in text with
filename Non-keyword placeholders appear in text with italic style format.
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu).
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
rated by vertical bars; read the example as an optional this or that.
ited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of
letter gothic font.
this.
ADSP-21469 EZ-Board Evaluation System Manual xxi
Page 22
Notation Conventions
L
a
[
Example Description
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Wa rn in g
appears instead of this symbol.
xxii ADSP-21469 EZ-Board Evaluation System Manual
Page 23
1 USING ADSP-21469
EZ-BOARD
This chapter provides specific information to assist you with development
of programs for the ADSP-21469 EZ-Board evaluation system.
The following topics are covered.
• “Package Contents” on page 1-2
• “Default Configuration” on page 1-3
• “EZ-Board Installation” on page 1-5
• “EZ-Board Session Startup” on page 1-6
• “Evaluation License Restrictions” on page 1-8
• “Memory Map” on page 1-8
• “DDR2 Interface” on page 1-9
• “Parallel Flash Memory Interface” on page 1-10
• “SPI Interface” on page 1-11
• “Link Port Interface” on page 1-12
• “Temperature Sensor Interface” on page 1-13
• “S/PDIF Interface” on page 1-14
• “Audio Interface” on page 1-14
• “UART Interface” on page 1-16
ADSP-21469 EZ-Board Evaluation System Manual 1-1
Page 24
Package Contents
• “LEDs and Push Buttons” on page 1-17
• “JTAG Interface” on page 1-18
• “Land Grid Array” on page 1-20
• “Expansion Interface II” on page 1-20
• “Power Measurements” on page 1-21
• “Power-On-Self Test” on page 1-21
• “Example Programs” on page 1-22
• “Background Telemetry Channel” on page 1-22
• “Reference Design Information” on page 1-23
For information about VisualDSP++, including the boot loading, target
options, and other facilities, refer to the online Help.
For more information about the ADSP-21469 SHARC processor, see documents referred to as “Related Documents”.
Package Contents
Your ADSP-21469 EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-21469 EZ-Board
• VisualDSP++ Installation Quick Reference Card
1-2 ADSP-21469 EZ-Board Evaluation System Manual
Page 25
• CD containing:
D VisualDSP++ software
D ADSP-21469 EZ-Board debug software
D USB driver files
D Example programs
D ADSP-21469 EZ-Board Evaluation System Manual
• Universal 5.0V DC power supply
• 3.5 mm stereo headphones
• 6-foot RCA audio cable
• 6-foot 3.5 mm/RCA x 2 Y-cable
Using ADSP-21469 EZ-Board
• 3.5 mm stereo female to RCA male Y-cable
If any item is missing, contact the vendor where you purchased your
EZ-Board or contact Analog Devices, Inc.
Default Configuration
The ADSP-21469 EZ-Board board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
The EZ-Board evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
Store unused EZ-Board in the protective shipping package.
ADSP-21469 EZ-Board Evaluation System Manual 1-3
Page 26
Default Configuration
When removing the EZ-Board from the package, handle the board carefully to avoid the discharge of static electricity, which can damage some
components. Figure 1-1 shows the default jumper and switch settings,
connector locations, and LEDs used in installation. Confirm that your
board is in the default configuration before using the board.
Figure 1-1. Default EZ-Board Hardware Setup
1-4 ADSP-21469 EZ-Board Evaluation System Manual
Page 27
Using ADSP-21469 EZ-Board
EZ-Board Installation
For correct operation, install the software in the order presented in the
VisualDSP++ Installation Quick Reference Card. Substitute instructions in
step 3 with instructions in this section.
There are two options to connect the EZ-Board hardware to a personal
computer (PC) running VisualDSP++ 5.0: via an Analog Devices emulator or via a standalone debug agent module. The standalone debug agent
allows a debug agent to interface to the ADSP-21469 EZ-Board. The
standalone debug agent is shipped with the kit.
To connect the EZ-Board to a PC via an emulator:
1. Plug the 5V adaptor into connector P16 (labeled 5.0V).
2. Attach the emulator header to connector P1 (labeled JTAG) on the
back side of the EZ-Board.
To connect the EZ-Board to a PC via a standalone debug agent:
a
ADSP-21469 EZ-Board Evaluation System Manual 1-5
The debug agent can be used only when power is supplied from the
wall adaptor.
1. Attach the standalone debug agent to connectors P1 (labeled JTAG)
and ZP1 on the backside of the EZ-Board, watching for the keying
pin of
2. Plug the 5V adaptor into connector
3. Plug one side of the provided USB cable into a USB connector of
the standalone debug agent. Plug the other side of the cable into
a USB port of the PC running VisualDSP++ 5.0 update 7 or later.
4. Verify that the yellow USB monitor LED on the standalone debug
agent (
fies that the board is communicating properly with the host PC
and ready to run VisualDSP++.
P1 to connect correctly.
P16 (labeled 5.0V).
LED4, located on the back side of the board) is lit. This signi-
Page 28
EZ-Board Session Startup
EZ-Board Session Startup
1. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start–>Programs menu. The
main window appears. Note that VisualDSP++ is not connected to
any session. Skip the rest of this step to step 2.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 3.
2. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Ses-
sion from the Session List dialog box.
• From the Session menu, Connect to Target.
3. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target
processor, select ADSP-21469. Click Next.
4. The Select Connection Type page of the wizard appears on the
screen. For standalone debug agent connections, select EZ-KIT
Lite and click Next. For emulator connections, select Emulator,
and click Next.
5. The Select Platform page of the wizard appears on the screen.
For standalone debug agent connections, ensure that the selected
platform is ADSP-21469 EZ-KIT Lite via Debug Agent. For emu-
lator connections, choose the type of emulator that is connected.
1-6 ADSP-21469 EZ-Board Evaluation System Manual
Page 29
Using ADSP-21469 EZ-Board
Specify your own Session name for the session or accept the default
name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session.
Click Next.
6. The Finish page of the wizard appears on the screen. The page dis-
plays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
creates the new session and connects to the EZ-Board. Once connected, the main window’s title is changed to include the session
name set in step 5.
L
ADSP-21469 EZ-Board Evaluation System Manual 1-7
To disconnect from a session, click the disconnect button
or select Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the ses-
sion name from the list and click Delete. Click OK.
Page 30
Evaluation License Restrictions
Evaluation License Restrictions
The ADSP-21469 EZ-Board installation is part of the VisualDSP++
installation. The EZ-Board is a licensed product that offers an unrestricted
evaluation license for the first 90 days. Once the initial unrestricted
90-day evaluation license expires:
• VisualDSP++ restricts a connection to the ADSP-21469 EZ-Board
via the USB port of the standalone debug agent interface only.
Connections to simulators and emulation products are no longer
allowed.
• The linker restricts a user program to 27306 words of memory for
code space with no restrictions for data space.
• The EZ-Board hardware must be connected and powered up to use
VisualDSP++ with a valid evaluation or permanent license.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
Memory Map
The ADSP-21469 processor has internal static random access memory
(SRAM) for instructions and data storage; see Table 1-1. The internal
memory details can be found in the ADSP-2146x SHARC Processor Hard-
ware Reference for ADSP-21467/8/9 Processors.
The EZ-Board includes three types of external memory: double data rate
two synchronous dynamic random access memory (DDR2 SDRAM),
serial peripheral interconnect (SPI) flash, and parallel flash. See Table 1-2.
For more information about a specific memory type, go to the respective
section in this chapter.
1-8 ADSP-21469 EZ-Board Evaluation System Manual
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Using ADSP-21469 EZ-Board
Table 1-1. Processor Internal Memory Space
Start Address End Address Contents
0x0000 0000 0x0003 FFFF IOP Registers
0x0009 2000 0x0009 DFFF BLOCK 0 RAM
0x0009 E000 0x000B 1FFF Reserved
0x000B 2000 0x000B DFFF BLOCK 1 RAM
0x000B E000 0x000B FFFF Reserved
0x000C 0000 0x000C 7FFF BLOCK 2 RAM
0x000C 8000 0x000D FFFF Reserved
0x000E 0000 0x000E 7FFF BLOCK 3 RAM
Table 1-2. EZ-Board External Memory Map
Start Address End Address Content
0x0020 0000 0x021F FFFF DDR2 (
0x0400 0000 0x043F FFFF Flash memory (
0x0800 0000
0x0800 0000
0x0C00 0000
0x0C00 0000
0x08FF FFFF
0x0BFF FFFF
0x0CFF FFFF
0x0FFF FFFF
Unused chip select (
Unused chip select (
Unused chip select (
Unused chip select (~DDR2_CS3) for DDR2 addresses
~DDR2CS0)
~MS1)
~MS2) for non-DDR2 addresses
~DDR2_CS2) for DDR2 addresses
~MS3) for non-DDR2 addresses
DDR2 Interface
The ADSP-21469 processor connects to a 128 MB Micron
MT47H64M16HR-3 chip through the DDR2 SDRAM controller. The
DDR2 memory controller on the processor and DDR2 memory chip are
powered by an on-board 1.8V regulator. Data is transferred between the
processor and DDR2 on both the rising and falling edges of the DDR2
ADSP-21469 EZ-Board Evaluation System Manual 1-9
Page 32
Parallel Flash Memory Interface
clock. The DDR2 controller on the processor can operate at a maximum
clock frequency of half the processor’s core clock. This equates to a DDR2
clock rate of 225 MHz, which is the ADSP-21469 processor limitation.
With a VisualDSP++ session running and connected to the EZ-Board via
the USB standalone debug agent, the DDR2 registers are configured automatically each time the processor is reset. The values are used whenever
DDR2 is accessed through the debugger (for example, when viewing
memory windows or loading a program).
To disable the automatic setting of the DDR2 registers, select Target
Options from the Settings menu in VisualDSP++ and uncheck Use XML
reset values. For more information on changing the reset values, refer to
the online Help.
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the DDR2 interface. For more information on how to initialize the registers after a reset, search the
VisualDSP++ online Help for “reset values”.
Parallel Flash Memory Interface
The parallel flash memory interface of the ADSP-21469 EZ-Board contains a 4 MB (4M x 8 bits) Numonyx M29W320EB chip. Flash memory
connects to the 8-bit data bus and address lines 0 through 21. Chip enable
is decoded by the
see “Asynchronous Control Enable Switch (SW13)” on page 2-13. To use
the
MS0 line instead of MS1 to interface to flash memory, make the respec-
tive change to
0x043F FFFF.
Flash memory is pre-loaded with boot code for the power-on-self test
(POST) program. For more information, refer to “Power-On-Self Test”
on page 1-21.
1-10 ADSP-21469 EZ-Board Evaluation System Manual
MS1 select line (default) through switch SW13 position 2;
SW13. The address range for flash memory is 0x0400 0000 to
Page 33
Using ADSP-21469 EZ-Board
By default, the EZ-Board boots from the 8-bit parallel flash memory. The
processor boots from flash memory if the boot mode select switch (
set to position 2; see “Boot Mode Select Switch (SW4)” on page 2-10.
Flash memory also is preloaded with configuration flash information, such
as board revision, BOM revision, and other data.
Flash memory code can be modified. For instructions, refer to the online
Help and example program included in the EZ-Board installation
directory.
For more information about the parallel flash device, refer to the Numonyx Web site: http://www.numonyx.com/.
SPI Interface
The ADSP-21469 processor has two SPI ports which can be accessed via
the digital peripheral interface (DPI) pins.
SW4) is
The SPI flash memory, a 16 Mb ST M25P16 device, connects to the SPI
port of the processor and designates:
• DPI pin 5 (DPI_P5) as a chip select
• DPI pin 3 (DPI_P3) as the SPI clock
• DPI pin 1 (
• DPI pin 2 (
DPI_P1) as the master out slave in (MOSI) pin
DPI_P2) as the master in slave out (MISO) pin
The same SPI port and DPI pins connect to the serial flash memory and
audio codec via switch
SW3. See “DPI [1–8] Enable Switch (SW3)” on
page 2-9. The DPI pins also are available on the expansion interface II.
By default, the EZ-Board boots from the 8-bit flash parallel memory. SPI
flash can be selected as the boot source by setting the boot mode select
switch (SW4) to position 1. See “Boot Mode Select Switch (SW4)” on
page 2-10.
ADSP-21469 EZ-Board Evaluation System Manual 1-11
Page 34
Link Port Interface
The audio codec is set up to use DPI pin 4 as the SPI chip select. For more
information, refer to “Audio Interface” on page 1-14.
Link Port Interface
The ADSP-21469 processor has two dedicated link ports. Each link port
has a clock pin, an acknowledge pin, and eight data pins. The ports can
operate at up to 166 MHz and act as either a receiver or a transmitter. The
ports can be used to interface gluelessly to other ADSP-21469 processors
that also have the link port pins brought out.
The EZ-Board enables access to link ports 0 and 1 via connectors P12 and
J3, respectively. Two ADSP-21469 EZ-Boards can mate gluelessly via the
link port connectors. The processors can communicate via the link ports,
all while performing independent tasks on each of the EZ-Boards. To
loopback the link port connectors on one EZ-Board or connect three or
more EZ-Boards, obtain a standard, off the shelf connector from Samtec.
For more information, see “Link Port 0 Connector (P12)” on page 2-30.
The EZ-Board design enables a multi-processor JTAG session using connectors J3 and P12. Two or more EZ-Boards can connect via the link ports
and JTAG interfaces and run in a single multi-processor debug session
using VisualDSP++. For more information, see “JTAG Interface” on
page 1-18.
By default, the EZ-Board boots from the 8-bit flash parallel memory. Link
port 0 can be selected as the boot source by setting the boot mode select
switch (SW4) to position 4. See “Boot Mode Select Switch (SW4)” on
page 2-10.
1-12 ADSP-21469 EZ-Board Evaluation System Manual
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Using ADSP-21469 EZ-Board
Temperature Sensor Interface
Two external pins (THD_P and THD_M) of the processor are connected to an
internal thermal diode. The EZ-Board uses ON Semiconductor’s
ADM1032 digital thermometer and under/over temperature alarm to
monitor the processor’s temperature as well as the thermal diode that
exists inside the ADM1032 device. The device uses the I2C bus, DPI pins,
and flag pins to communicate to the processor. The following DPI and
flag pins are used by the processor and temperature sensing monitor.
• DPI pin 8 (DPI_P8) as the serial clock signal (SCK)
• DPI pin 7 (DPI_P7) as the serial data signal (SDA)
• Flag 3 as the IRQ (not used by default)
• Flag 0 as the thermal limit (not used by default)
The two DPI pins are required; the pins are connected to the temperature
sensing monitor via a switch (SW3) and can be shut off if the pins are used
on the expansion II interface. The thermal limit flag is connected to a
LED (LED11) for a visual alarm if the limit is exceeded. The thermal limit
flag and ADM1032 IRQ connect to the flag pins of the processor, but are
nonessential for communications. Consequently, SW13 has both flag pins
defaulted in the OFF position.
See “DPI [1–8] Enable Switch (SW3)” on page 2-9 and “Asynchronous
Control Enable Switch (SW13)” on page 2-13 for more information.
Example programs are included in the EZ-Board installation directory to
demonstrate sensor operations.
ADSP-21469 EZ-Board Evaluation System Manual 1-13
Page 36
S/PDIF Interface
S/PDIF Interface
The ADSP-21469 processor has a built-in S/PDIF transmitter and
receiver for digital audio applications. The EZ-Board supports the S/PDIF
interface and brings out both the transmitter and receiver via RCA connectors J4 and J5, respectively. The S/PDIF’s in and out pins are
connected by DAI pins via switches SW1 and SW7:
• DAI pin 1 (DAI_P1) as SPDIF_OUT
• DAI pin 18 (DPI_P18) as SPDIF_IN
SW1
and SW7 can be turned off to disconnect the DAI pins from the RCA
connectors if the pins are used on the expansion II interface. See “DAI [1–
8] Enable Switch (SW1)” on page 2-8 and “DAI [17–20] Enable Switch
(SW7)” on page 2-11 for more information.
Audio Interface
The AD1939 device is a high-performance, single-chip codec featuring
eight digital-to-analog converters (DACs) for audio output and four analog-to-digital converters (ADCs) for audio input. This translates to four
stereo channels of audio out and two stereo channels of audio in.
The codec can input and output data at a sample rate of up to 192 kHz on
all channels.
The analog audio channels are available via single-ended RCA connectors
J4 and J5) or differential DB25 connectors (P8 and P9). By default, the
(
EZ-Board is shipped with the RCA connectors used by the AD1939 codec
for audio in and out. To use the differential connectors, change DIP
switches SW15–18. A standard, off the shelf DB25 connector to XLR cables
is required to operate in this mode.
1-14 ADSP-21469 EZ-Board Evaluation System Manual
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Using ADSP-21469 EZ-Board
For more information, see “Audio In1 Left Selection Switch (SW15)” on
page 2-14 through “Audio In2 Left Selection Switch (SW18)” on
page 2-16, and “ADSP-21469 EZ-Board Schematic” on page B-1.
The processor interfaces with the codec via the DAI and DPI pins. The
DAI pins can be configured to transfer serial data from the codec in
Time-Division Multiplexing (TDM) or Integrated Interchip Sound (I
2
S)
mode. See “DAI Interface” on page 2-3 for more information about the
AD1939 connection to the DAI. The DPI interface pins can be configured to use the SPI interface of the processor to set up the codec’s control
registers. See “DPI Interface” on page 2-4 for more information about the
AD1939 connection to the DPI.
The master input clock (MCLK) of the codec is generated by the on-board
12.288 MHz oscillator. The internal PLL of the codec is used to generate
varying sample rates. The codec can be set up for 48 KHz, 96 KHz, or
192 KHz frequencies. The codec can run at these frequencies in both
TDM and I2S modes with all ADCs inputs and DACs outputs. To run
192 KHz with all ADCs and DACs in TDM mode, the codec must run in
dual-line TDM mode.
For information on how to configure the multi-channel codec, refer to the
product datasheet at
http://www.analog.com/en/audiovideo-products/audio-codecs/ad1939/products/product.html
.
The EZ-Board is connected to the AD1939 codec in master mode. The
internal PLL drives the
ABCLK and ALRCLK clock signals out. Both clocks
are driven back to the codec’s DBCLK and DLRCLK pins via the R257 and R258
resistors. The ABCLK and ALRCLK clocks that are driven by the codec also
connect to the processor’s serial ports via the DAI pins. Resistors
R263 are used to feed the bit clock and frame sync signals of the processor’s
R262 and
serial ports. Connecting the codec in this manner enables a flexible audio
sample rate and allows the processor to run at the maximum core
frequency.
ADSP-21469 EZ-Board Evaluation System Manual 1-15
Page 38
UART Interface
The audio interface also has a 3.5 mm connector (
headphones share the output with the external DAC5 and DAC6 circuits of
the analog audio interface. Switch SW23 must be enabled for the headphones. A volume control potentiometer (R493) is used to increase or
decrease the headphone’s volume. For more information, see “Headphone
Enable Switch (SW23)” on page 2-19.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
The DAI and DPI pins going to the AD1939 device can be disabled, then
used on the expansion II interface. Refer to “DAI Interface” on page 2-3
and “DPI Interface” on page 2-4 for more information about the DAI and
DPI switches.
J8) for headphones. The
UART Interface
The ADSP-21469 processor features a built-in universal asynchronous
receiver and transmitter (UART). The UART interface supports full
RS-232 functionality via the Analog Devices 3.3V ADM3202 line driver
and receiver (U42). The UART signals are available on the EZ-Board via
DIP switch SW14. The UART signals are routed through a DIP switch, can
be disconnected from the respective DPI interface, and used on the expansion II interface. The following DPI pins are used for the RS-232
interface.
• DPI pin 9 (DPI_P9) as UART_TX
• DPI pin 10 (DPI_P10) as UART_RX
• DPI pin 11 (DPI_P11) as UART_RTS
• DPI pin 12 (DPI_P12) as UART_CTS
1-16 ADSP-21469 EZ-Board Evaluation System Manual
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Using ADSP-21469 EZ-Board
Example programs are included in the EZ-Board installation directory to
demonstrate UART and RS-232 operations.
For more information about the UART interface, refer to the
ADSP-2146x SHARC Processor Hardware Reference for ADSP-21467/8/9
Processors.
LEDs and Push Buttons
The EZ-Board has eight general-purpose user LEDs connected directly to
the processor, one LED connected to the temperature sensing monitor
(ADM1032), one EZ-Board power LED, and one board reset LED. The
EZ-board also has five push buttons: four general-purpose push buttons,
connected directly to the processor, and one push button for a board reset.
Table 1-3 summarizes the LED connections to the processor. To use the
LEDs connected to the DAI or DPI interface, configure the respective registers of the processor. For more information, refer to the ADSP-2146x
SHARC Processor Hardware Reference for ADSP-21467/8/9 Processors.
Table 1-3. LED Connections
LED Reference Designator Processor Pin Connected via Switch
LED1 DPI_P6 SW3.6
LED2 DPI_P13 SW14.5
LED3 DPI_P14 SW14.6
LED4 DAI_P3 SW1.3
LED5 DAI_P4 SW1.4
LED6 DAI_P15 SW2.7
LED7 DAI_P16 SW2.8
LED8 DAI_P17 SW7.1
ADSP-21469 EZ-Board Evaluation System Manual 1-17
Page 40
JTAG Interface
Two general-purpose push buttons are attached to the flag pins of the processor, while the other two are attached to the DAI pins. All of the push
buttons and LEDs connect to the processor through DIP switches. The
DIP switches can disconnect the processor pins, which, in turn, connect
to the push buttons and LEDs. See the respective switch section in
“ADSP-21469 EZ-Board Hardware Reference” on page 2-1.
The state of the push buttons, connected to the flag pins, can be determined by reading the
FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-3 shows the push
button and processor connections.
Table 1-4. Push Button Connections
PB Reference Designator Processor Pin Connected via Switch
SW8 (PB1) FLAG1/IRQ1 SW13.4
SW9 (PB2) FLAG2/IRQ2/MS2 SW13.5
SW10 (PB3) DAI_P19 SW7.3
SW11 (PB4) DAI_P20 SW7.4
An example program is included in the ADSP-21469 installation directory
to demonstrate functionality of the LEDs and push buttons.
JTAG Interface
The JTAG connector (P1) allows the standalone debug agent module to
connect a VisualDSP++ debug session to the ADSP-21469 processor. The
debug agent operates only when the external 5V wall adaptor (P16) is
used.
1-18 ADSP-21469 EZ-Board Evaluation System Manual
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Using ADSP-21469 EZ-Board
The standalone debug agent can be replaced by an external emulator, such
as the Analog Devices high-performance USB-based emulator. Be careful
not to damage the connectors when removing the debug agent. The emulator connects to
P1 on the back side of the board; see “EZ-Board
Installation” on page 1-5 for more information.
The ADSP-21469 EZ-Board can be set up as a single- or multi-processor
system. By default, the board is set up in single-processor mode. In single-processor mode, create a VisualDSP++ session based on a standalone
debug agent or an external emulator. To use the EZ-Board in multi-processor mode, install an external emulator. Only one external emulator is
required for the main EZ-Board; other EZ-Boards in the JTAG chain do
not require an emulator. In this mode, create a VisualDSP++ session based
on the number of JTAG devices that are in the JTAG chain.
For a dual ADSP-21469 EZ-Board session, connect two EZ-Boards via
connectors J3 and P12. Flip one of the two EZ-Boards by 180 degrees to
allow the boards to mate. To switch between single- and multi-processor
modes, use DIP switches SW19–22. For more information, see “JTAG
Switches (SW19–22)” on page 2-17.
For three or more ADSP-21469 EZ-Board sessions, connect each of the
EZ-Board with the link port cables. The cables connect the link ports and
JTAG pins of each EZ-Board. By using the link port cables, you put the
EZ-Board in a JTAG serial chain and the ADSP-21469 processors’ link
ports in a ring. For three EZ-Boards, three link port cables are required.
Similarly, for four EZ-Boards, four link port cables are required. Note
that each respective EZ-board also requires its own power supply.
Part numbers for Samtec standard, off the shelf link port cables can be
found in “Link Port 0 Connector (P12)” on page 2-30.
For more information about emulators, contact Analog Devices or go to:
http://www.analog.com/en/embedded-processing-dsp/sharc/content/sharc_development_tools/fca.html
.
ADSP-21469 EZ-Board Evaluation System Manual 1-19
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Land Grid Array
Land Grid Array
The ADSP-21469 EZ-Board has provisions for probing every DAI pin,
DPI pin, and the asynchronous memory interface pins of the processor on
connectors P5–7. The connector locations are designed to be used in conjunction with a Tektronix DMAX logic analyzer connector, but can be
probed with any oscilloscope or logic analyzer. For pinout information,
refer to “ADSP-21469 EZ-Board Schematic” on page B-1.
For more information on the Tektronix DMAX logic analyzer interface,
go to the Tektronix Web site.
Expansion Interface II
The expansion interface II allows an Analog Devices EZ-Extender or a
custom-design daughter board to be tested across various hardware platforms with identical expansion interfaces.
The expansion interface II implemented on the ADSP-21469 EZ-Board
consists of two connectors: a 0.1 in. shrouded header (P2) and a Samtec
QMS series header (J1). The connectors contain a majority of the
ADSP-21469 processor’s signals.
L
For pinout information, go to “ADSP-21469 EZ-Board Schematic” on
page B-1. The mechanical dimensions of the expansion connectors can be
obtained by contacting Technical or Customer Support.
For more information about daughter boards, visit the Analog Devices
Web site at:
http://www.analog.com/en/embedded-processing-dsp/sharc/content/sharc_development_tools/fca.html
1-20 ADSP-21469 EZ-Board Evaluation System Manual
DDR2 interface is not brought out to the expansion interface
because the interface layout and net length is critical.
.
Page 43
Using ADSP-21469 EZ-Board
Limits to current and interface speed must be taken into consideration
when using the expansion interface II. Current for the expansion
interface II is sourced from the EZ-Board; therefore, the current should be
limited to 1A for 5V and 500 mA for the 3.3V planes. If more current is
required, then a separate power connector and a regulator must be
designed on a daughter card. Additional circuitry can add extra loading to
signals, decreasing their maximum effective speed.
L
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
Power Measurements
Several locations are provided for measuring the current draw from various power planes. Precision 0.05 ohm shunt resistors are available on the
VDDINT, VDDEXT, and VDD_DDR2 voltage domains. For current
draw measuments, the associated jumper on connector P13—15 must be
removed. Once the jumper is removed, voltage across the resistor can be
measured using an oscilloscope. Once voltage is measured, current can be
calculated by dividing the voltage by 0.05. For the highest accuracy, a differential probe should be used for measuring voltage across the resistor.
For more information, see “VDD_DDR2 Power Connector (P13)” on
page 2-30, “VDDINT Power Connector (P14)” on page 2-30, and
“VDDEXT Power Connector (P15)” on page 2-30.
Power-On-Self Test
The power-on-self-test program (POST) tests all EZ-Board peripherals
and validates functionality as well as connectivity to the processor. Once
assembled, each EZ-Board is fully tested for an extended period of time
with a POST. All EZ-Boards are shipped with the POST preloaded into
one of its on-board flash memories. The POST is executed by resetting the
ADSP-21469 EZ-Board Evaluation System Manual 1-21
Page 44
Example Programs
board and pressing the proper push button(s). The POST also can be used
as a reference in custom software designs or hardware troubleshooting.
Note that the source code for the POST program is included in the VisualDSP++ installation directory along with the readme text file, which
describes how the EZ-Board is configured to run a POST.
Example Programs
Example programs are provided with the ADSP-21469 EZ-Board to demonstrate various capabilities of the product. The programs are installed
with the VisualDSP++ software and can be found in the
<install_path>\214xx\Examples\ADSP-21469 EZ-Board directory. Refer
to the readme file provided with each example for more information.
Background Telemetry Channel
The USB debug agent supports the background telemetry channel (BTC),
which facilitates data exchange between VisualDSP++ and the processor
without interrupting processor execution.
The BTC allows you to read and write data in real time while the processor continues to execute. For increased performance of the BTC,
including faster reading and writing, please check our latest line of processor emulators at:
http://www.analog.com/en/embedded-processing-dsp/sharc/USB-EMULATOR/products/product.html. For more information about BTC, see the
online help.
1-22 ADSP-21469 EZ-Board Evaluation System Manual
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Using ADSP-21469 EZ-Board
Reference Design Information
A reference design info package is available for download on the Analog
Devices Web site. The package provides information on the design, layout, fabrication, and assembly of the EZ-KIT Lite and EZ-Board
products.
The information can be found at:
http://www.analog.com/en/embedded-processing-dsp/sharc/processors/ez-kit-lite-design-database/recourses/index.html.
ADSP-21469 EZ-Board Evaluation System Manual 1-23
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Reference Design Information
1-24 ADSP-21469 EZ-Board Evaluation System Manual
Page 47
2 ADSP-21469 EZ-BOARD
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-21469 EZ-Board
board.
The following topics are covered.
• “System Architecture” on page 2-2
Describes the ADSP-21469 EZ-Board configuration and explains
how the board components interface with the processor.
• “Flags and Memory Selects” on page 2-6
Shows the locations and describes the DAI pins, DPI pins, general
purpose flags, and asynchronous memory select lines.
• “Push Button and Switch Settings” on page 2-7
Shows the locations and describes the push buttons and switches.
• “Jumpers” on page 2-20
Shows the locations and describes the configuration jumpers.
• “LEDs” on page 2-22
Shows the locations and describes the LEDs.
• “Connectors” on page 2-25
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-21469 EZ-Board Evaluation System Manual 2-1
Page 48
System Architecture
ADSP-21469
DSP
450 MHz
324-lead PBGA
JTAG
Port
128 MB
DDR2
(64M x 16)
25 MHz
Oscillator
DPI
Power
Regulation
AD1939
CODEC
HP
Out
Aud
In
(4)
Head
Out
Aud
Out
(8)
Link
Port 1
AMI
4 MB
Flash
(4M x 8 )
Link
Port 0
DAI
CLK
TEMP
Sensor
LINK
PORT
CONN
DDR2
JTAG
CONN
Stand
Alone
Debug
Agent
ADM1032
SPI
Flash
16Mb
ADM3202
RS232
CONN
SPDIF
CIRC
SPDIF
IN
SPDIF
OUT
I2C
5V
PWR
IN
3.3V
1.8V
1.1V
Sharc Expansion
Interface II.
DAI = 0.1" Header
DPI = 0.1" Header
AMI = High Speed Conn.
AMI
DAI
DPI
PBs/
LEDs
LINK
PORT
CONN
System Architecture
This section describes the processor’s configuration on the EZ-Board
(Figure 2-1).
Figure 2-1. System Architecture
2-2 ADSP-21469 EZ-Board Evaluation System Manual
Page 49
ADSP-21469 EZ-Board Hardware Reference
The EZ-Board is designed to demonstrate the ADSP-21469 SHARC processor capabilities. The processor has an I/O voltage of 3.3V. The core
voltage of the processor is 1.1V, and the double data rate (DDR2) voltage
is 1.8V.
The input clock is 25 MHz. The default boot mode of the processor is
external parallel flash boot. See “Boot Mode Select Switch (SW4)” on
page 2-10 for information on how to change the default boot mode.
DAI Interface
The digital application interface (DAI) pins are connected to the signal
routing unit (SRU) of the processor. The SRU is a flexible routing system
providing a large system of signal flows within the processor. The SRU
allows you to route the DAI pins to different internal peripherals in various combinations.
The DAI connects various peripherals on the EZ-Board. Table 2-1 shows
the DAI pin names, associated peripheral and net names, switch designators through which the pins connect to the peripherals, and default switch
settings.
Table 2-1. DAI Connections
DAI Pin Peripheral Peripheral Net Connected via
Switch
DAI_P1 S/PDIF SPDIF_OUT SW1.1 ON
DAI_P2
DAI_P3 LEDs LED4 SW1.3 ON
DAI_P4 LEDs LED5 SW1.4 ON
DAI_P5 AD1939 ASDATA1 SW1.5 ON
DAI_P6
DAI_P7 AD1939 ABCLK SW1.7 ON
AD1939 SOFT_RESET SW1.2 ON
AD1939 ASDATA2 SW1.6 ON
Switch Setting
(Default)
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System Architecture
Table 2-1. DAI Connections (Cont’d)
DAI Pin Peripheral Peripheral Net Connected via
Switch
DAI_P8 AD1939 ALRCLK SW1.8 ON
DAI_P9 AD1939 DSDATA4 SW2.1 ON
DAI_P10 AD1939 DSDATA3 SW2.2 ON
DAI_P11 AD1939 DSDATA2 SW2.3 ON
DAI_P12 AD1939 DSDATA1 SW2.4 ON
DAI_P13 AD1939 DBCLK SW2.5 ON
DAI_P14 AD1939 DLRCLK SW2.6 ON
DAI_P15 LEDs LED6 SW2.7 ON
DAI_P16 LEDs LED7 SW2.8 ON
DAI_P17 LEDs LED8 SW7.1 ON
DAI_P18 S/PDIF SPDIF_IN SW7.2 ON
DAI_P19 Push buttons PB3 SW7.3 ON
DAI_P20 Push buttons PB4 SW7.4 ON
Switch Setting
(Default)
To use the DAI on the expansion II interface, disable any signal driving a
DAI pin with the associated switch. The pinout of the expansion connectors can be found in “ADSP-21469 EZ-Board Schematic” on page B-1.
DPI Interface
The digital peripheral interface (DPI) pins are connected to a second signal routing unit of the processor (SRU2). The SRU2 unit, similar to the
SRU, is a flexible routing system providing a large system of signal flows
within the processor. The SRU2 allows you to route the DPI pins to different internal peripherals in various combinations.
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ADSP-21469 EZ-Board Hardware Reference
The DPI connects various peripherals on the EZ-Board. Table 2-2 shows
the DPI pin names, associated peripheral and net names, switch designators through which the pins connect to the peripherals, and default switch
settings.
Table 2-2. DPI Connections
DPI Pin Peripheral Peripheral Net Connected via
Switch
DPI_P1 SPI memory
AD1939
DPI_P2 SPI memory
AD1939
DPI_P3 SPI memory
AD1939
DPI_P4 AD1939 AD1939_CS SW3.4 ON
DPI_P5 SPI memory SPI_CS SW3.5 ON
DPI_P6 LEDs LED1 SW3.6 ON
DPI_P7 Temp sensor TEMP_SDA SW3.7 ON
DPI_P8 Temp sensor TEMP_SCK SW3.8 ON
DPI_P9 UART UART_TX SW14.1 ON
DPI_P10 UART UART_RX SW14.2 ON
DPI_P11
DPI_P12 UART UART_CTS SW14.4 OFF
DPI_P13
UART UART_RTS SW14.3 OFF
LEDs LED2 SW14.5 ON
SPI_MOSI SW3.1 ON
SPI_MISO SW3.2 ON
SPI_CLK SW3.3 ON
Switch Setting
(Default)
DPI_P14 LEDs LED3 SW14.6 ON
To use the DPI on the expansion II interface, disable any signal driving a
DPI pin with the associated switch. The pinout of the expansion connectors can be found in “ADSP-21469 EZ-Board Schematic” on page B-1.
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Flags and Memory Selects
Flags and Memory Selects
The processor has four asynchronous memory selects, four flag pins, three
interrupt request pins, and one timer expired pin. All flag/memory pins
are multi-functional and depend on the ADSP-21469 processor setup.
Table 2-3 shows the pin names, corresponding peripheral and net names,
switch designators through which the pins connect to the peripherals, and
default switch settings.
To use the flags or memory selects on the expansion II interface, disable
any signal driving a flag or memory pin with the associated switch. The
pinout of the expansion connectors can be found in “ADSP-21469
EZ-Board Schematic” on page B-1.
Table 2-3. Flags and Memory Select Connections
Flag/Memory Pin Peripheral Peripheral Net Connected via
Switch
MS0 Parallel flash memory FLASH_CS SW13.1 OFF
MS1 Parallel flash memory FLASH_CS SW13.2 ON
FLAG0/IRQ0 Temp sensor THERMAL_LIMIT SW13.3 OFF
FLAG1/IRQ1 Push buttons PB1 SW13.4 ON
FLAG2/IRQ2/MS2 Push buttons PB2 SW13.5 ON
FLAG3/TIMEXP/MS
3
Temp sensor TEMP_IRQ SW13.6 OFF
Switch
Setting
(Default)
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ADSP-21469 EZ-Board Hardware Reference
Push Button and Switch Settings
This section describes operation of the push buttons and switches. The
push button and switch locations are shown in Figure 2-2.
Figure 2-2. Push Button and Switch Locations
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Push Button and Switch Settings
DAI [1–8] Enable Switch (SW1)
The DAI [1–8] enable switch (SW1) disconnects the DAI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DAI signals to be used on the expansion II interface; see
Table 2-4.
Table 2-4. DAI [1–8] Enable Switch (SW1)
SW1 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW1.1 DAI_P1 S/PDIF SPDIF_OUT ON
SW1.2 DAI_P2 AD1939 SOFT_RESET ON
SW1.3 DAI_P3 LEDs LED4 ON
SW1.4 DAI_P4 LEDs LED5 ON
SW1.5 DAI_P5 AD1939 ASDATA1 ON
SW1.6 DAI_P6 AD1939 ASDATA2 ON
SW1.7 DAI_P7 AD1939 ABCLK ON
SW1.8 DAI_P8 AD1939 ALRCLK ON
DAI [9–16] Enable Switch (SW2)
The DAI [9–16] enable switch (SW2) disconnects the DAI pins nine
through 16 on the processor from the associated peripherals on the
EZ-Board and allows the DAI signals to be used on the expansion II interface; see Table 2-5.
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ADSP-21469 EZ-Board Hardware Reference
Table 2-5. DAI [9–16] Enable Switch (SW2)
SW2 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW2.1 DAI_P9 AD1939 DSDATA4 ON
SW2.2 DAI_P10 AD1939 DSDATA3 ON
SW2.3 DAI_P11 AD1939 DSDATA2 ON
SW2.4 DAI_P12 AD1939 DSDATA1 ON
SW2.5 DAI_P13 AD1939 DBCLK OFF
SW2.6 DAI_P14 AD1939 DLRCLK OFF
SW2.7 DAI_P15 LEDs LED6 ON
SW2.8 DAI_P16 LEDs LED7 ON
DPI [1–8] Enable Switch (SW3)
The DPI [1–8] enable switch (SW3) disconnects the DPI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DPI signals to be used on the expansion II interface; see
Table 2-6.
Table 2-6. DPI [1–8] Enable Switch (SW3)
SW3 Position DPI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW3.1 DPI_P1 SPI memory
AD1939
SW3.2 DPI_P2 SPI memory
AD1939
SW3.3 DPI_P3
SW3.4 DPI_P4
SW3.5 DPI_P5 SPI memory SPI_CS ON
SPI memory
AD1939
AD1939 AD1939_CS ON
SPI_MOSI ON
SPI_MISO ON
SPI_CLK ON
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Push Button and Switch Settings
Table 2-6. DPI [1–8] Enable Switch (SW3) (Cont’d)
SW3 Position DPI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW3.6 DPI_P6 LEDs LED1 ON
SW3.7 DPI_P7 Temp sensor TEMP_SDA ON
SW3.8 DPI_P8 Temp sensor TEMP_SCK ON
Boot Mode Select Switch (SW4)
The boot mode select switch (SW4) determines the boot mode of the processor. Table 2-7 shows the available boot mode settings. By default, the
processor boots from the on-board parallel flash memory.
The selected position of SW4 is marked by the notch down the entire rotating portion of the switch, not the small arrow.
Table 2-7. Boot Mode Select Switch (SW4)
SW4 Position Processor Boot Mode
0 SPI slave boot
1 Boot from SPI flash memory (SPI master boot)
2 Boot from 8 external parallel flash memory (default)
3Reserved
4 Link port 0 boot
5Reserved
6Reserved
7Reserved
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ADSP-21469 EZ-Board Hardware Reference
DSP Clock Configuration Switch (SW5)
The clock configuration switch (SW5) controls the core frequency of the
processor at power up. The core to clock-in ratio is multiplied by the
25 MHz oscillator (U41) to produce the power up core frequency.
Table 2-8 shows the switch settings.
The core clock frequency can be increased or decreased via software by
writing to the PMCTL register. For more information on changing the core
clock frequency and other settings, refer to the ADSP-2146x SHARC Pro-
cessor Hardware Reference for ADSP-21467/8/9 Processors.
Table 2-8. Processor Clock Configuration Switch (SW5)
Position 1
CLKCFG0
ON ON Reserved
ON OFF 32:1
OFF ON 16:1 (Default)
OFF OFF 6:1
Position 2
CLKCFG0
Clock Ratio
Core: Clock
DAI [17–20] Enable Switch (SW7)
The DAI [17–20] enable switch (SW7) disconnects the DAI pins 17
through 20 on the processor from the associated peripherals on the
EZ-Board and allows the DAI signals to be used on the expansion II interface; see Table 2-9.
Table 2-9. DAI [17–20] Enable Switch (SW7)
SW7 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW7.1 DAI_P17 LEDs LED8 ON
SW7.2 DAI_P18 S/PDIF SPDIF_IN ON
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Push Button and Switch Settings
Table 2-9. DAI [17–20] Enable Switch (SW7) (Cont’d)
SW7 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW7.3 DAI_P19 Push buttons PB3 ON
SW7.4 DAI_P20 Push buttons PB4 ON
Programmable Flag Push Buttons (SW8–11)
Four momentary push buttons (SW8–11) are provided for general-purpose
user input. The buttons are connected to the GPIO pins of the processor.
The push buttons are active high and, when pressed, send a high (1) to the
processor. Switches SW7 and SW13 disconnect the push buttons from the
responding signals. Refer to “DAI [17–20] Enable Switch (SW7)” on
page 2-11 and “Asynchronous Control Enable Switch (SW13)” on
page 2-13 for more information.
Reset Push Button (SW12)
The reset push button (SW12) resets the following ICs:
• ADSP-21469 processor (U1)
• AD1939 audio codec (U45)
• Parallel flash memory (U18)
The reset also is linked to the expansion II interface; any daughter card
connected to the expansion interface that requires a reset can use
The reset push button does not reset the standalone debug agent once the
debug agent is connected to a personal computer (PC). After communication between the debug agent and PC is initialized, pushing a reset button
does not reset the USB chip on the debug agent. The only way to reset the
USB chip on the debug agent is to power down the EZ-Board.
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ADSP-21469 EZ-Board Hardware Reference
Asynchronous Control Enable Switch (SW13)
The asynchronous control enable switch (SW13) disconnects the control
pins of the processor from the associated peripherals on the EZ-Board
and allows the respective control signals to be used on the expansion II
interface; see Table 2-10.
Table 2-10. Asynchronous Control Enable Switch (SW13)
SW13
Position
SW13.1 MS0 Parallel flash
SW13.2 MS1 Parallel flash
SW13.3 FLAG0/IRQ0 Temp sensor THERMAL
SW13.4 FLAG1/IRQ1 Push buttons PB1 ON
SW13.5 FLAG2/IRQ2/MS2 Push buttons PB2 ON
SW13.6 FLAG3/TIMEXP/MS3 Temp sensor TEMP_IRQ OFF
Processor Pin Peripheral Peripheral Net Switch Setting
(Default)
FLASH_CS OFF
memory
FLASH_CS ON
memory
OFF
LIMIT
DPI [9–14] Enable Switch (SW14)
The DPI [9–14] enable switch (SW14) disconnects the DPI pins nine
through 14 on the processors from the associated peripherals on the
EZ-Board and allows the DPI signals to be used on the expansion II interface; see Table 2-11.
Table 2-11. DPI [9–14] Enable Switch (SW14)
SW14
Position
SW14.1 DPI_P9 UART UART_TX ON
SW14.2 DPI_P10 UART UART_RX ON
DPI Pin Peripheral Peripheral Net Switch Setting
(Default)
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Push Button and Switch Settings
Table 2-11. DPI [9–14] Enable Switch (SW14) (Cont’d)
SW14
Position
SW14.3 DPI_P11 UART UART_RTS OFF
SW14.4 DPI_P12 UART UART_CTS OFF
SW14.5 DPI_P13 LEDs LED2 ON
SW14.6 DPI_P14 LEDs LED3 ON
DPI Pin Peripheral Peripheral Net Switch Setting
(Default)
Audio In1 Left Selection Switch (SW15)
The audio selection switch (SW15) connects the left channel of the In1 line,
connected to the AD1939’s ADC1 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, SW15 is set up
to use the RCA connectors. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to the differential setting; see
Table 2-12. For more information, see “Differential In/Out Connectors
(P8–9)” on page 2-29.
Table 2-12. Audio In1 Left Selection Switch (SW15)
SW15 Position Single-Ended RCA IN (Default) Differential DB25 IN (P8)
SW15.1 ON OFF
SW15.2 OFF ON
SW15.3 ON OFF
SW15.4 OFF ON
SW15.5 ON OFF
SW15.6 OFF ON
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ADSP-21469 EZ-Board Hardware Reference
Audio In1 Right Selection Switch (SW16)
The audio selection switch (SW16) connects the right channel of the In1
line, connected to the AD1939’s ADC2 circuit, to either the single-ended
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to
the differential setting; see Table 2-13. For more information, see “Differ-
ential In/Out Connectors (P8–9)” on page 2-29.
Table 2-13. Audio In1 Right Selection Switch (SW16)
SW16 Position Single-Ended RCA IN (Default) Differential DB25 IN (P8)
SW16.1 ON OFF
SW16.2 OFF ON
SW16.3 ON OFF
SW16.4 OFF ON
SW16.5 ON OFF
SW16.6 OFF ON
Audio In2 Right Selection Switch (SW17)
The audio selection switch (SW17) connects the right channel of the In2
line, connected to the AD1939’s
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the standard, off the shelf DB25 connector to XLR cables, change the switch to
the differential setting; see Table 2-14. For more information, see “Differ-
ential In/Out Connectors (P8–9)” on page 2-29.
ADSP-21469 EZ-Board Evaluation System Manual 2-15
ADC4 circuit, to either the single-ended
Page 62
Push Button and Switch Settings
Table 2-14. Audio In2 Right Selection Switch (SW17)
SW17 Position Single Ended Use RCA IN (Default) Differential DB25 IN (P8)
SW17.1 ON OFF
SW17.2 OFF ON
SW17.3 ON OFF
SW17.4 OFF ON
SW17.5 ON OFF
SW17.6 OFF ON
Audio In2 Left Selection Switch (SW18)
The audio selection switch (SW18) connects the left channel of the In2 line,
connected to the AD1939’s ADC3 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, the switch is
set up to use the RCA connectors for audio in. To use the standard, off
the shelf DB25 connector to XLR cables, change the switch to the differential setting; see Table 2-15. For more information, see “Differential
In/Out Connectors (P8–9)” on page 2-29.
Table 2-15. Audio In2 Left Selection Switch (SW18)
SW18 Position Single Ended RCA IN (Default) Differential DB25 IN (P8)
SW18.1 ON OFF
SW18.2 OFF ON
SW18.3 ON OFF
SW18.4 OFF ON
SW18.5 ON OFF
SW18.6 OFF ON
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ADSP-21469 EZ-Board Hardware Reference
JTAG Switches (SW19–22)
The JTAG switches (SW19–22) select between a single-processor (one
EZ-Board) and multi-processor (more than one EZ-Board) configurations. By default, the four DIP switches are set up for a single EZ-Board
configuration; see Table 2-16.
The default configuration applies to either a debug agent or an external
emulator, such as the Analog Devices high-performance USB-based emulator (HP-USB ICE for short). To use an external emulator and multiple
EZ-Boards simultaneously in one VisualDSP++ multi-processor session,
set up the boards as shown in Table 2-17. Attach the boards to each other
via connectors J3 and P12. For two EZ-Boards, no external cables are
required. For three or more EZ-Boards, obtain Samtec link port cables
described in “Link Port 1 Connector (J3)” on page 2-26 and “Link Port 0
Connector (P12)” on page 2-30.
Table 2-16. Single-Processor Configuration
Switch Position Single EZ-Board Use (Default)
SW19.1 ON
SW19.2 OFF
SW19.3 ON
SW19.4 OFF
SW19.5 ON
SW19.6 OFF
SW19.7 ON
SW19.8 OFF
SW20.1 ON
SW20.2 OFF
SW21.1 ON
SW21.2 OFF
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Push Button and Switch Settings
Table 2-16. Single-Processor Configuration (Cont’d)
Switch Position Single EZ-Board Use (Default)
SW22.1 OFF
SW22.2 OFF
Table 2-17. Multiple-Processor Configuration
Switch Position Main EZ-Board
Attached to Emulator
SW19.1 ON OFF
SW19.2 ON ON
SW19.3 ON OFF
SW19.4 ON ON
SW19.5 ON OFF
SW19.6 ON ON
SW19.7 ON OFF
SW19.8 ON ON
SW20.1 ON OFF
SW20.2 OFF OFF
SW21.1 OFF OFF
SW21.2 ON ON
SW22.1 OFF ON
SW22.2 ON OFF
EZ-Board(s)
Not Attached to Emulator
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ADSP-21469 EZ-Board Hardware Reference
Headphone Enable Switch (SW23)
The headphone enable switch (SW23) connects the AD1939’s OUT3 circuit
to the 3.5 mm headphone connector (J8). By default, the headphone
enable switch is disabled. To use the headphones, set SW23 to all ON. For
more information, see “Headphone Out Connector (J8)” on page 2-28.
Audio Loopback Switches (SW24–25)
The audio loopback switches (SW24 and SW25) are used for testing only.
The switches loop back any analog signal generated from the AD1939’s
digital-to-analog converter (DAC) circuit to analog-to-digital converter
(ADC) circuit.
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Jumpers
Jumpers
This section describes functionality of the configuration jumpers.
Figure 2-2 shows the jumper locations.
Figure 2-3. Configuration Jumper Locations
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ADSP-21469 EZ-Board Hardware Reference
Flash WP Jumper (JP1)
The flash WP jumper (JP1) write-protects block 0 of the parallel flash
chip. Block 0 is located at address range 0x0400 0000–0x0400 1FFF. The
POST begins at block 0 and continues on to other blocks in flash memory. When the jumper is installed on JP1, and the parallel flash driver
from Analog Devices is used, block 0 is read-only. By default, JP1 is not
installed.
S/PDIF Loopback Jumper (JP2)
The S/PDIF loop back jumper (JP2) is used for internal testing only. The
jumper loops back any digital audio signal from the S/PDIF’s Data Out
pin to the S/PDIF’s Data In pin. By default, JP2 is not installed.
UART RTS/CTS Jumper (JP3)
The UART RTS/CTS jumper (JP3) connects the RTS and CTS pins of the
RS-232 interface. By default, JP3 is installed.
UART Loopback Jumper (JP4)
The UART loop back jumper (JP4) is used for internal testing only. The
jumper loops back the UART receive data from the UART transmit data.
By default,
ADSP-21469 EZ-Board Evaluation System Manual 2-21
JP4 is not installed.
Page 68
LEDs
LEDs
This section describes the on-board LEDs. Figure 2-4 shows the LED
locations.
Figure 2-4. LED Locations
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ADSP-21469 EZ-Board Hardware Reference
GPIO LEDs (LED1–8)
Eight LEDs connect to the DAI and DPI pins of the processor; see
Table 2-18. The LEDs are active high and lit by writing a ‘1’ to the correct
DAI or DPI pin.
Table 2-18. GPIO LEDs
LED Reference Designator Processor Pin
LED1 DPI_P6
LED2 DPI_P13
LED3 DPI_14
LED4 DAI_P3
LED5 DAI_P4
LED6 DAI_P15
LED7 DAI_P16
LED8 DAI_P17
Power LED (LED9)
When LED9 is lit solid, it indicates that the board is powered.
Reset LED (LED10)
When LED10 is lit, it indicates that a master reset of all major ICs is active.
The reset LED is controlled by the Analog Devices ADM708 supervisory
reset circuit. You can assert the reset push button (
reset and activate
LED10. For more information, see “Reset Push Button
(SW12)” on page 2-12.
ADSP-21469 EZ-Board Evaluation System Manual 2-23
SW12) to assert a master
Page 70
LEDs
Thermal Limit LED (LED11)
The thermal limit LED (LED11) reports a status of the thermal sensor,
ADM1032 (U43). The thermal sensor monitors the processor’s temperature. When the high temperature limit set by the IC is violated, LED11 is
turned on as a visual indicator. The ADM1032 has built-in hysteresis,
which causes the LED to de-activate only when the temperature is significantly within the limit. For more information, see “Temperature Sensor
Interface” on page 1-13.
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ADSP-21469 EZ-Board Hardware Reference
Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in Figure 2-5.
Figure 2-5. Connector Locations
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Connectors
Expansion Interface II Connector (J1)
J1 is a board-to-board connector providing signals from the asynchronous
memory interface (AMI) of the processor. The connector is located on the
right edge of the board. For more information, see “Expansion Interface
II” on page 1-20. For availability and pricing of the connector, contact
Samtec.
Part Description Manufacturer Part Number
104-position 0.025”, SMT header SAMTEC QMS-052-06.75-L-D-A
Mating Connector
104-position 0.025”, SMT socket SAMTEC QFS-052-04.25-L-D-A
RS-232 Connector (J2)
Part Description Manufacturer Part Number
DB9, female, vertical mount NORCOMP 191-009-213-L-571
Mating Cable
2m female-to-female cable DIGI-KEY AE1020-ND
Link Port 1 Connector (J3)
Part Description Manufacturer Part Number
ERF8 10X2, RA female SAMTEC ERF8-010-01-S-D-RA-L
Mating Cable
6” cable ERF8 to ERM8 10X2 SAMTEC ERCD-010-06.00-TBL-SBR-1
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ADSP-21469 EZ-Board Hardware Reference
RCA Audio Connector (J4)
Part Description Manufacturer Part Number
RCA 2x3 KYOYAKU ENT WSP-256V1-09
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable CABLESTOGO 03171
RCA Audio Connector (J5)
Part Description Manufacturer Part Number
RCA 2x3 KYOYAKU ENT WSP-256V1-09
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable CABLESTOGO 03171
S/PDIF IN Connector (J6)
Part Description Manufacturer Part Number
RCA 1X1 SWITCHCRAFT PJRAN1X1U01X
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable CABLESTOGO 03171
S/PDIF OUT Connector (J7)
Part Description Manufacturer Part Number
RCA 1X1 SWITCHCRAFT PJRAN1X1U01X
Mating Cable (shipped with the EZ-KIT)
6' RCA audio cable CABLESTOGO 03171
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Connectors
Headphone Out Connector (J8)
Part Description Manufacturer Part Number
3.5mm stereo_jack CUI SJ1-3525NG
Mating Headphones (shipped with the EZ-KIT)
Stereo headphones KOSS 151225 UR5
JTAG Connector (P1)
The P1 connector provides access to the JTAG signals of the ADSP-21469
processor. The standalone debug agent requires two connectors, P1 and
ZP1. Pin 3 is missing to provide keying. Pin 3 in the mating connector
must have a plug. For more information, see “JTAG Interface” on
page 1-18.
Remove the standalone debug agent when an emulator is used with the
EZ-Board. Follow the installation instructions provided in “EZ-Board
Installation” on page 1-5, using P1 as the JTAG connection point.
Expansion Interface II Connector (P2)
P2 is a board-to-board connector providing signals for the DAI and DPI
interfaces and GPIO signals of the processor. The connector is located on
the right edge of the board. For more information, see “Expansion Inter-
face II” on page 1-20. For availability and pricing of the connectors,
contact Samtec.
Part Description Manufacturer Part Number
60-position 0.1”, SMT header SAMTEC TSSH-130-01-L-DV-A
Mating Connector
60-position 0.1”, SMT socket SAMTEC SSW-130-22-F-D-VS
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ADSP-21469 EZ-Board Hardware Reference
DMAX Land Grid Array Connectors (P5–7)
The land grid array areas (P5–7) are intended for probing of the processor
signals. The pads are exposed and designed to attach a Tektronix logic
analyzer to the connectors listed in the following table. For more information about the land grid array, consult the Tektronix Web site.
Part Description Manufacturer Part Number
Primary retention TEKTRONIX 020290800
Alternate retention TEKTRONIX 020291000
Differential In/Out Connectors (P8–9)
The differential in and out connectors (P8–9) are intended for an evaluation of the AD1939 codec via XLR connectors. A standard, off the shelf
DB25 connector to XLR cables is required; the cable details can be found
in the following table.
Part Description Manufacturer Part Number
25-position DB25 socket TYCO 1734350-2
Mating cables
Snake (8)XLRF-25P 9.9’ HOSA DTF-803
Snake (8)XLRM-25P 9.9’ HOSA DTM-803
MLB Connector (P10)
The media local bus (MLB) connector (P10) is intended for an evaluation
of the ADSP-21462 processor’s MLB interface.
ADSP-21469 EZ-Board because the ADSP-21469 processor does not support MLB.
ADSP-21469 EZ-Board Evaluation System Manual 2-29
P10 is not available on the
Page 76
Connectors
Link Port 0 Connector (P12)
Part Description Manufacturer Part Number
ERM8 10X2, RA Male SAMTEC ERM8-010-01-S-D-RA
Mating Cable
6” cable ERF8 to ERM8 10X2 SAMTEC ERCD-010-06.00-TBL-SBR-1
VDD_DDR2 Power Connector (P13)
The VDD_DDR2 power connector (P13) is used to measure voltage and current supplied to the DDR2 memory interface of the processor. By default,
P13 is ON, and the power flows through the two-pin IDC header. To mea-
sure power, remove the jumper on P13 and measure voltage across the
0.1 ohm resistor. Once voltage is measured, power can be calculated. For
more information, refer to “Power Measurements” on page 1-21.
VDDINT Power Connector (P14)
The VDDINT power connector (P14) is used to measure voltage and current
supplied to the processor core. By default, P14 is ON, and the power flows
through the two-pin IDC header. To measure power, remove the jumper
on P14 and measure voltage across the 0.1 ohm resistor. Once voltage is
measured, power can be calculated. For more information, refer to “Power
Measurements” on page 1-21.
VDDEXT Power Connector (P15)
The VDDEXT power connector (P15) is used to measure the processor’s I/O
voltage and current. By default,
two-pin IDC header. To measure power, remove the jumper on P15 and
measure voltage across the 0.1 ohm resistor. Once voltage is measured,
power can be calculated. For more information, refer to “Power Measure-
ments” on page 1-21.
2-30 ADSP-21469 EZ-Board Evaluation System Manual
P15 is ON, and the power flows through the
Page 77
ADSP-21469 EZ-Board Hardware Reference
Power Connector (P16)
The power connector (P16) provides all of the power necessary to operate
the EZ-Board.
Part Description Manufacturer Part Number
0.65 mm power jack CUI 045-0883R
Mating Power Supply (shipped with the EZ-Board and EZ-KIT)
5.0VDC@3.6A power supply GLOBTEK GS-1750(R)
Standalone Debug Agent Connector (ZP1)
ZP1 connects the standalone debug agent to the EZ-Board. The standalone
debug agent requires two connectors, ZP1 and P1. For more information,
see “JTAG Connector (P1)” on page 2-28.
ADSP-21469 EZ-Board Evaluation System Manual 2-31
Page 78
Connectors
2-32 ADSP-21469 EZ-Board Evaluation System Manual
Page 79
A ADSP-21469 EZ-BOARD BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-21469 EZ-Board Schematic” on
page B-1.
Ref. Qty. Description Reference Designator Manufacturer Part Number
11 74LVC14A
SOIC14
2 1 IDT74FCT3244A
PY SSOP20
3 1 12.288MHZ
OSC003
4 1 25MHZ OSC003 U41 EPSON SG-8002CA MP
5 3 SN74LVC1G08
SOT23-5
6 1 SN65LVDS2D
SOIC8
7 1 M25P16 SO8W U40 ST MICRO M25P16-VMW6G
8 1 MT47H64M16
FBGA84
9 1 ADM1032
SOIC_N8
10 2 SI7601DN
ICS010
11 1 21469
M29W320EB
"U18"
U14 TI 74LVC14AD
U17 IDT IDT74FCT3244APYG
U12 EPSON SG-8002CA MP
U48-50 TI SN74LVC1G08DBVR
U44 NATIONAL
SEMI
U2 MICRON MT47H64M16HR-3
U43 ON SEMI ADM1032ARZ
U15-16 VISHAY SI7601DN
U18 ST MICRO M29W320EB70ZE6E
DS90LV018ATM
ADSP-21469 EZ-Board Evaluation System Manual A-1
Page 80
Ref. Qty. Description Reference Designator Manufacturer Part Number
12 1 ADM708SARZ
SOIC8
13 1 ADM3202ARNZ
SOIC16
14 1 ADSP-21469
PBGA324
15 2 ADP1864AUJZ
SOT23-6
16 1 ADP1710 TSOT5 VR1 ANALOG
17 1 ADP1715
MSOP8
18 1 AD1939 LQFP64 U45 ANALOG
19 16 AD8652ARZ
SOIC_N8
20 1 AD8397
SOIC_N8_EP
21 1 ADM1085
SC70_6
U46 ANALOG
DEVICES
U42 ANALOG
DEVICES
U1 ANALOG
DEVICES
VR2-3 ANALOG
DEVICES
DEVICES
VR4 ANALOG
DEVICES
DEVICES
U20-26,U28-30,U3234,U36-38
U51 ANALOG
U52 ANALOG
ANALOG
DEVICES
DEVICES
DEVICES
ADM708SARZ
ADM3202ARNZ
ADSP-21469KBZ-ENG
ADP1864AUJZ-R7
ADP1710AUJZ-R7
ADP1715ARMZ-1.8-R7
AD1939YSTZ
AD8652ARZ
AD8397ARDZ
ADM1085AKSZ-REEL7
22 2 RCA 1X1
CON012
23 5 MOMENTARY
SWT013
24 4 DIP8 SWT016 SW1-3,SW19 C&K TDA08H0SB1
25 6 DIP6 SWT017 SW13-18 CTS 218-6LPST
26 3 DIP4 SWT018 SW7,SW24-25 ITT TDA04HOSB1
27 1 DB9 9PIN
CON038
28 5 DIP2 SWT020 SW5,SW20-23 C&K CKN9064-ND
J6-7 SWITCH-
CRAFT
SW8-12 PANASONIC EVQ-PAD04M
J2 NORCOMP 191-009-213-L-571
PJRAN1X1U01X
A-2 ADSP-21469 EZ-Board Evaluation System Manual
Page 81
ADSP-21469 EZ-Board Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
29 3 IDC 2X1
IDC2X1
30 4 IDC 2X1
IDC2X1
31 3 IDC
2PIN_JUMPER_
SHORT
32 1 3.5MM
STEREO_JACK
CON001
33 1 PWR .65MM
CON045
34 1 5A RESETABLE
FUS005
35 1 QMS 52x2
QMS52x2_SMT
36 1 IDC 7x2
IDC7x2_SMTA
37 1 ROTARY
SWT027
38 2 RCA 2x3
CON_RCA_6B
P13-15 FCI 90726-402HLF
JP1-4 FCI 90726-402HLF
SJ1-3 DIGI-KEY S9001-ND
J8 DIGI-KEY CP1-3525NG-ND
P16 CUI 045-0883R
F1 MOUSER 650-RGEF500
J1 SAMTEC QMS-052-06.75-L-D-A
P1 SAMTEC TSM-107-01-T-DV-A
SW4 COPAL S-8110
J4-5 KYOYAKU
ENT.
WSP-256V1-09
39 1 ERM8 10X2
ERM8_10X2_SM
T
40 1 ERF8 10X2
ERF8_10X2_SM
T
41 2 DB25 25PIN
DB25F
42 1 IDC 30x2
IDC30X2_SMTA
P12 SAMTEC ERM8-010-01-S-D-RA
J3 SAMTEC ERF8-010-01-S-D-RA-L
P8-9 TYCO 1734350-2
P2 SAMTEC TSSH-130-01-L-DV-A
ADSP-21469 EZ-Board Evaluation System Manual A-3
Page 82
Ref. Qty. Description Reference Designator Manufacturer Part Number
43 9 YELLOW
LED001
44 2 22PF 50V 5%
0805
45 2 0.22UF 25V 10%
0805
46 1 0.1UF 50V 10%
0805
47 1 600 100MHZ
200MA 0603
48 2 600 100MHZ
500MA 1206
49 2 10UF 16V 20%
CAP002
50 1 190 100MHZ 5A
FER002
51 8 10UF 6.3V 10%
0805
52 2 4.7UF 6.3V 10%
0805
LED1-8,LED11 PANASONIC LN1461C
C262-263 AVX 08055A220JAT
C126-127 AVX 08053C224KAT2A
C123 AVX 08055C104KAT
FER5 DIGI-KEY 490-1014-2-ND
FER7-8 STEWARD HZ1206B601R-10
CT59-60 PANASONIC EEE1CA100SR
FER9 MURATA DLW5BSN191SQ2
C97-98,C100-101,
C103-104,C254,
C257
C240,C246 AVX 08056D475KAT2A
AVX 08056D106KAT2A
53 35 0.1UF 10V 10%
0402
C26-27,C53,C117120,C148,C151-152,
C160,C162,C169170,C178,C188-189,
C191,C197,C199200,C211,C213-214,
C225,C227-228,
C237,C264,C267271,C273
AVX 0402ZD104KAT2A
A-4 ADSP-21469 EZ-Board Evaluation System Manual
Page 83
ADSP-21469 EZ-Board Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
54 94 0.01UF 16V 10%
0402
55 33 10K 1/16W 5%
0402
56 2 4.7K 1/16W 5%
0402
57 4 0 1/16W 5% 0402 R462,R485,R492,
58 1 22 1/16W 5%
0402
59 13 33 1/16W 5%
0402
60 1 100UF 10V 10% CCT61 AVX TPSC107K010R0075
C28,C30-43,C45-50,
C52,C54-96,C99,
C102,C105-116,
C121-122,C125,
C128-131,C136-142,
C266
R99,R190,R196-200,
R202,R205-210,R217,
R224-225,R233-239,
R256,R259-260,
R463-466,R469,R494
R185,R501 VISHAY CRCW04024K70JNED
R498
R230 PANASONIC ERJ-2GEJ220X
R191-192,R201,
R203-204,R211,
R257-258,R261-263,
R495-496
AVX 0402YC103KAT2A
VISHAY CRCW040210K0FKED
PANASONIC ERJ-2GE0R00X
VISHAY CRCW040233R0JNEA
61 2 2.2UF 10V 10%
0805
62 1 1000PF 50V 5%
0402
63 2 1A SK12
DO-214AA
64 1 107.0 1/10W 1%
0805
65 1 249.0 1/10W 1%
0805
C238-239 AVX 0805ZD225KAT2A
C51 AVX 04025C102JAT2A
D4-5 DIODES INC B120B-13-F
R228 DIGI-KEY 311-107CRTR-ND
R227 DIGI-KEY 311-249CRTR-ND
ADSP-21469 EZ-Board Evaluation System Manual A-5
Page 84
Ref. Qty. Description Reference Designator Manufacturer Part Number
66 2 0.1UF 16V 10%
0603
67 2 1UF 16V 10%
0603
68 2 68PF 50V 5%
0603
69 2 470PF 50V 5%
0603
70 1 220UF 6.3V 20%
D2E
71 11 330 1/10W 5%
0603
72 2 0 1/10W 5% 0603 R452,R458 PHYCOMP 232270296001L
73 4 10 1/10W 5%
0603
74 1 10.0K 1/16W 1%
0603
75 8 237.0 1/10W 1%
0603
C255-256 AVX 0603YC104KAT2A
C260-261 PANASONIC ECJ-1VB1C105K
C243,C249 AVX 06035A680JAT2A
C242,C248 AVX 06033A471JAT2A
CT45 SANYO 10TPE220ML
R248-255,R467-468,
R497
R244-247 VISHAY CRCW060310R0JNEA
R231 DALE CRCW060310K0FKEA
R267,R272,R280,
R285,R293,R298-299,
R304
VISHAY CRCW0603330RJNEA
DIGI-KEY 311-237HRTR-ND
76 24 49.9K 1/10W 1%
0603
77 1 75.0 1/10W 1%
0603
78 4 1UF 6.3V 20%
0402
79 4 100 1/16W 5%
0402
R265,R271,R282,
R284,R295,R297,
R300,R302,R310,
R336-337,R343-344,
R363-364,R369,R378,
R397-398,R403,R412,
R431-432,R437
R229 DALE CRCW060375R0FKEA
C132-135 PANASONIC ECJ-0EB0J105M
R240-243 DIGI-KEY 311-100JRTR-ND
DIGI-KEY 311-49.9KHRTR-ND
A-6 ADSP-21469 EZ-Board Evaluation System Manual
Page 85
ADSP-21469 EZ-Board Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
80 1 562.0 1/10W 1%
0603
81 1 390PF 25V 5%
0603
82 1 5600PF 16V 5%
0805
83 1 15.0K 1/16W 1%
0603
84 40 4.99K 1/16W 1%
0603
85 2 24.9K 1/10W 1%
0603
86 1 31.6K 1/16W 1%
0603
R461 VISHAY CRCW0603562RFKEA
C258 AVX 06033A391FAT2A
C259 AVX 0805YA562JAT2A
R232 DIGI-KEY 311-15.0KHRTR-ND
R264,R273,R278-279,
R291-292,R305-306,
R311,R313-314,R324,
R326-328,R342,
R349-350,R352-354,
R357,R366,R371,
R383-384,R386-388,
R391,R400,R405,
R417-418,R420-422,
R425,R434,R439
R448,R454 DIGI-KEY 311-24.9KHTR-ND
R473 PANASONIC ERJ-3EKF3162V
VISHAY CRCW06034K99FKEA
87 3 10UF 10V 10%
0805
88 8 5.76K 1/16W 1%
0603
89 3 0.05 1/2W 1%
1206
90 3 10UF 16V 10%
1210
91 1 GREEN LED001 LED9 PANASONIC LN1361CTR
92 1 RED LED001 LED10 PANASONIC LN1261CTR
C29,C161,C265 PANASONIC ECJ-2FB1A106K
R266,R269,R277,
R281,R290,R294,
R303,R307
R446,R459-460 SEI CSF 1/2 0.05 1%R
C244-245,C250 AVX 1210YD106KAT2A
PANASONIC ERJ-3EKF5761V
ADSP-21469 EZ-Board Evaluation System Manual A-7
Page 86
Ref. Qty. Description Reference Designator Manufacturer Part Number
93 2 1000PF 50V 5%
1206
94 1 255.0K 1/10W
1% 0603
95 2 80.6K 1/10W 1%
0603
96 3 5A
MBRS540T3G
SMC
97 2 2.5UH 30%
IND013
98 3 1.0K 1/16W 1%
0402
99 1 8.20K 1/10W 1%
0603
100 6 10.0K 1/16W 1%
0402
101 10 100K 1/16W 5%
0402
102 1 30.9K 1/16W 1%
0402
C236,C251 AVX 12065A102JAT2A
R447 VISHAY CRCW06032553FK
R449,R455 DIGI-KEY 311-80.6KHRCT-ND
D1-3 ON SEMI MBRS540T3G
L1-2 COILCRAFT MSS1038-252NLB
R194-195,R287 PANASONIC ERJ-2RKF1001X
R502 DIGI-KEY 541-8.20KHCT-ND
R474,R486-488,R491,
R499
R475-484 DIGI-KEY 541-100KJTR-ND
R453 DIGI-KEY 541-30.9KLCT-ND
DIGI-KEY 541-10.0KLCT-ND
103 25 33 1/32W 5%
RNS005
104 4 51.1 1/16W 1%
0402
105 16 2.67K 1/16W 1%
0402
RN1-14,RN18,RN22,
RN26-34
R218-221 DIGI-KEY 541-51.1LCT-ND
R316,R318,R322,
R338,R367-368,R373,
R377,R401-402,R407,
R411,R435-436,R441,
R445
PANASONIC EXB-28V330JX
PANASONIC ERJ-2RKF2671X
A-8 ADSP-21469 EZ-Board Evaluation System Manual
Page 87
ADSP-21469 EZ-Board Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
106 31 100.0 1/16W 1%
0402
107 2 47UF 16V 20%
ELEC_6MM
108 4 37.4K 1/16W 1%
0402
109 8 1000PF 50V 5%
0402
110 4 100pF 50V 5%
0402
111 8 300PF 100V 5%
0603
112 16 2.43K 1/16W 1%
0402
R193,R274-275,R288,
R309,R331-335,R340,
R351,R358-362,R385,
R392-396,R419,
R426-430,R489-490
CT57-58 PANASONIC EEE-FC1C470P
R268,R276,R289,
R308
C144,C150,C154,
C159,C164,C168,
C171,C176
C147,C155,C165,
C175
C143,C145,C153,
C157,C163,C173,
C177,C179
R315,R319,R323,
R325,R346-347,
R374-375,R380-381,
R408-409,R414-415,
R442-443
DIGI-KEY 541-100LCT-ND
DIGI-KEY 541-37.4KLCT-ND
DIGI-KEY 490-3244-1-ND
MURATA GCM1555C1H101JZ13
D
DIGI-KEY 490-1362-1-ND
DIGI-KEY 541-2.43KLCT-ND
113 16 750.0 1/16W 1%
0402
114 16 620PF 50V 5%
0402
R317,R320-321,R341,
R345,R348,R372,
R376,R379,R382,
R406,R410,R413,
R416,R440,R444
C181,C186-187,
C192,C194-195,
C201,C204,C208209,C215,C218,
C222-223,C229,C232
DIGI-KEY 541-750LCT-ND
DIGI-KEY 490-3239-1-ND
ADSP-21469 EZ-Board Evaluation System Manual A-9
Page 88
Ref. Qty. Description Reference Designator Manufacturer Part Number
115 16 680PF 50V 5%
0402
116 4 0.036 1/2W 1%
1206
117 1 470UF 2.5V 20%
D2E
118 40 22UF 6.3V 20%
ELEC_4MM
119 8 22UF 6.3V 20%
ELEC_5MM
120 1 5K 1/20W 20%
RES_POT_DUA
L
121 4 51 1/32W 5%
RNS005
C182-183,C185,
C193,C202-203,
C206-207,C216-217,
C220-221,C230-231,
C234-235
R450-451,R456-457 SUSUMU RL1632S-R036-F
CT47 SANYO 2R5TPE470MF
CT1,CT3,CT5-6,
CT8-11,CT14,CT16,
CT18-19,CT23-24,
CT27-28,CT31-32,
CT35-36,CT39-40,
CT43-44,CT49-56,
CT62-69
C180,C184,C196,
C205,C210,C219,
C224,C233
R493 PANASONIC EVJ-Y15F03A53
RN35-38 DIGI-KEY EXB-28V510JX
DIGI-KEY 490-3240-1-ND
PANASONIC EEE-FC0J220R
MOUSER 647-UWP0J220MCL
122 9 10 1/32W 5%
RNS005
123 9 82 1/32W 5%
RNS005
124 9 47PF 50V 10%
CNS001
125 16 6.81K 1/10W 1%
0603
RN15-17,RN19-21,
RN23-25
RN40-48 PANASONIC EXB-28V820JX
CN1-9 TDK CORP CKCL44C0G1H470K
R312,R329-330,R339,
R355-356,R365,R370,
R389-390,R399,R404,
R423-424,R433,R438
PANASONIC EXB-28V100JX
DIGI-KEY 311-6.81KHRTR-ND
A-10 ADSP-21469 EZ-Board Evaluation System Manual
Page 89
ADSP-21469 EZ-Board Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
126 1 806 1/10W 1%
0402
127 1 30A GSOT05
SOT23-3
128 2 30A GSOT03
SOT23-3
129 1 40A ESD5Z2.5T1
SOD-523
130 1 7A
VESD01-02V-GS
08 SOD-52
131 1 16.9K 1/16W 1%
0402
R286 VISHAY CRCW0402806RFKED
D6 VISHAY GSOT05-GS08
D7,D10 VISHAY GSOT03-GS08
D8 ON SEMI ESD5Z2.5T1G
D9 VISHAY VESD01-02V-GS08
R500 VISHAY CRCW040216K9FKED
ADSP-21469 EZ-Board Evaluation System Manual A-11
Page 90
A-12 ADSP-21469 EZ-Board Evaluation System Manual
Page 91
A B C
D
1
1
2
2
ADSP-21469 EZ-BOARD
SCHEMATIC
3
ANALOG
4
DEVICES
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
3
4
Title
ADSP-21469 EZ-BOARD
TITLE
Size Board No.
C
Date Sheet of
A B C D
3-13-2009_14:36
A0221-2008
Rev
0.2
1 16
Page 92
A B C
VDD_DDR2
U1
D13
DDR2_ADDR0_Z DDR2_DATA0_Z
DDR2_ADDR1_Z
DDR2_ADDR2_Z
DDR2_ADDR3_Z
DDR2_ADDR4_Z
1
DDR2_ADDR5_Z
DDR2_ADDR6_Z
DDR2_ADDR7_Z
DDR2_ADDR8_Z
DDR2_ADDR9_Z
DDR2_ADDR10_Z
DDR2_ADDR11_Z
DDR2_ADDR12_Z
DDR2_ADDR13_Z
DDR2_ADDR14_Z
DDR2_ADDR15_Z
DDR2_CS0_Z
DDR2_BA0_Z
DDR2_BA1_Z
DDR2_BA2_Z
DDR2_ADDR0
C13
DDR2_ADDR1
D14
DDR2_ADDR2
C14
DDR2_ADDR3
B14
DDR2_ADDR4
A14
DDR2_ADDR5
D15
DDR2_ADDR6
C15
DDR2_ADDR7
B15
DDR2_ADDR8
A15
DDR2_ADDR9
D16
DDR2_ADDR10
C16
DDR2_ADDR11
B16
DDR2_ADDR12
A16
DDR2_ADDR13
B17
DDR2_ADDR14
A17
DDR2_ADDR15
C1
DDR2_CS0
D1
DDR2_CS1
C2
DDR2_CS2
D2
DDR2_CS3
C18
DDR2_BA0
C17
DDR2_BA1
B18
DDR2_BA2
2
ADSP-21469
PBGA324
DDR2_DATA0
DDR2_DATA1
DDR2_DATA2
DDR2_DATA3
DDR2_DATA4
DDR2_DATA5
DDR2_DATA6
DDR2_DATA7
DDR2_DATA8
DDR2_DATA9
DDR2_DATA10
DDR2_DATA11
DDR2_DATA12
DDR2_DATA13
DDR2_DATA14
DDR2_DATA15
DDR2_DQS0
DDR2_DQS0
DDR2_DQS1
DDR2_DQS1
DDR2_DM0
DDR2_DM1
DDR2_CLK0
DDR2_CLK0
DDR2_CLK1
DDR2_CLK1
DDR2_CKE
DDR2_CAS
DDR2_RAS
DDR2_WE
DDR2_ODT
VREF1
VREF2
B2
A2
B3
A3
B5
A5
B6
A6
B8
A8
B9
A9
A11
B11
A12
B12
A4
B4
A10
B10
C3
C11
B7
A7
B13
A13
E1
C7
C9
C10
B1
D4
D11
DDR2_DATA1_Z
DDR2_DATA2_Z
DDR2_DATA3_Z
DDR2_DATA4_Z
DDR2_DATA5_Z
DDR2_DATA6_Z
DDR2_DATA7_Z
DDR2_DATA8_Z
DDR2_DATA9_Z
DDR2_DATA10_Z
DDR2_DATA11_Z
DDR2_DATA12_Z
DDR2_DATA13_Z
DDR2_DATA14_Z
DDR2_DATA15_Z
DDR2_DQS0_Z
DDR2_DQS0_Z
DDR2_DQS1_Z
DDR2_DQS1_Z
DDR2_DM0_Z
DDR2_DM1_Z
DDR2_CLK0_Z
DDR2_CLK0_Z
DDR2_CKE_Z
DDR2_CAS_Z
DDR2_RAS_Z
DDR2_WE_Z
DDR2_ODT_Z
DDR2_VREF
DDR2_ADDR0
DDR2_ADDR1
DDR2_ADDR2
DDR2_ADDR3
DDR2_ADDR4
DDR2_ADDR5
DDR2_ADDR6
DDR2_ADDR7
DDR2_ADDR8
DDR2_ADDR9
DDR2_ADDR10
DDR2_ADDR11
DDR2_ADDR12
DDR2_ADDR13
DDR2_ADDR14
DDR2_ADDR15
DDR2_BA0
DDR2_BA1
DDR2_BA2
DDR2_DM0
DDR2_DM1
DDR2_ODT
DDR2_CKE
DDR2_CS0
DDR2_RAS
DDR2_CAS
DDR2_WE
U2
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10/AP
P7
A11
R2
A12
R8
RFU/A13
R3
RFU/A14
R7
RFU/A15
L2
BA0
L3
BA1
L1
BA2
F3
LDM
B3
UDM
K9
K2
CKE
L8
CS
K7
RAS
L7
CAS CK
K3
WE
MT47H64M16
FBGA84
A9
VDDQ1
C3
C1
VDDQ2
C9
C7
VDDQ3
VDDQ4
VDDQ5
GNDQ1
A7
E9G1G3
VDDQ6
VDDQ7
GNDQ2
GNDQ3
B8
B2
D2
G9
G7
VDDQ8
VDDQ9
VDDQ10
GNDQ4
GNDQ5
GNDQ6
E7
D8
A1E1J9M9R1
VDD1
VDD2
GNDQ7
GNDQ8
GNDQ9
F2
F8
H2
VDD3
VDD4
GNDQ10
A3
H8
J1
VDD5
GND1
GND2
J3
E3
VDDL
GND3
GND4
P9
N1
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS
UDQS
UDQS
VREF
GND5
J7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
NC1
NC2ODT
CK
GNDL
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
F7
E8
B7
A8
A2
E2
J2
J8
K8
DDR2_DATA0
DDR2_DATA1
DDR2_DATA2
DDR2_DATA3
DDR2_DATA4
DDR2_DATA5
DDR2_DATA6
DDR2_DATA7
DDR2_DATA8
DDR2_DATA9
DDR2_DATA10
DDR2_DATA11
DDR2_DATA12
DDR2_DATA13
DDR2_DATA14
DDR2_DATA15
DDR2_DQS0
DDR2_DQS0
DDR2_DQS1
DDR2_DQS1
DDR2_CLK0
R193
100.0
0402
DDR2_CLK0
DDR2 end of line terminators and VTT tracking circuit have been
omitted since overall trace length is less than 2.5" for each net.
For a custom design, please adhere to any EE-note from ADI
and any recommendations by the memory manufacturer.
VDD_DDR2
R194
1.0K
0402
R195
1.0K
0402
C26
0.1UF
0402
C27
0.1UF
0402
DDR2_VREF
D
1
2
RN3
81
R1BR1A
2
R2A
3
R3A
4
R4A
33
RNS005
3
DDR2_ADDR4_Z
DDR2_ADDR6_Z
DDR2_ADDR12_Z
DDR2_ADDR14_Z
RN4
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN5
2
R2A
3
R3A
4
R4A
33
RNS005
RN6
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
7
6
5
7
6
5
81
7
6
5
7
6
5
DDR2_ADDR2DDR2_ADDR2_Z
DDR2_ADDR3DDR2_ADDR3_Z
DDR2_ADDR0DDR2_ADDR0_Z
DDR2_ADDR1DDR2_ADDR1_Z
DDR2_ADDR5DDR2_ADDR5_Z
DDR2_ADDR4
DDR2_ADDR7DDR2_ADDR7_Z
DDR2_ADDR6
DDR2_ADDR10DDR2_ADDR10_Z
DDR2_ADDR11DDR2_ADDR11_Z
DDR2_ADDR8DDR2_ADDR8_Z
DDR2_ADDR9DDR2_ADDR9_Z
DDR2_ADDR13DDR2_ADDR13_Z
DDR2_ADDR12
DDR2_ADDR15DDR2_ADDR15_Z
DDR2_ADDR14
DDR2_DATA6_Z
DDR2_DATA7_Z
DDR2_DATA4_Z
DDR2_DATA5_Z
DDR2_DATA10_Z
DDR2_DATA11_Z
DDR2_DATA8_Z
DDR2_DATA9_Z
DDR2_DATA12_Z
DDR2_DATA13_Z
DDR2_DATA14_Z DDR2_DATA14
DDR2_DATA15_Z
4
RN1
81
2
R2A
3
R3A
4
R4A
33
RNS005
R1BR1A
R2B
R3B
R4B
7
6
5
DDR2_BA2DDR2_BA2_Z
DDR2_BA0DDR2_BA0_Z
DDR2_BA1DDR2_BA1_Z
DDR2_DM0_Z DDR2_CKE_Z
DDR2_DM1_Z
RN7
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN8
2
R2A
3
R3A
4
R4A
33
RNS005
RN9
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN10
2
R2A
3
R3A
4
R4A
33
RNS005
R191
33
0402
R192
33
0402
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
7
6
5
81
7
6
5
7
6
5
81
7
6
5
DDR2_DATA3DDR2_DATA3_Z
DDR2_DATA2DDR2_DATA2_Z
DDR2_DATA1DDR2_DATA1_Z
DDR2_DATA0DDR2_DATA0_Z
DDR2_DATA6
DDR2_DATA7
DDR2_DATA4
DDR2_DATA5
DDR2_DATA10
DDR2_DATA11
DDR2_DATA8
DDR2_DATA9
DDR2_DATA12
DDR2_DATA13
DDR2_DATA15
DDR2_DM0
DDR2_DM1
DDR2_DQS1_Z
DDR2_DQS1_Z
DDR2_CLK0_Z
DDR2_CLK0_Z
DDR2_CAS_Z
DDR2_RAS_Z
DDR2_WE_Z
DDR2_CS0_Z
RN14
2
R2A
3
R3A
4
R4A
33
RNS005
RN13
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN12
2
R2A
3
R3A
4
R4A
33
RNS005
RN11
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN2
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
81
7
6
5
7
6
5
81
7
6
5
7
6
5
DDR2_DQS0DDR2_DQS0_Z
DDR2_DQS0DDR2_DQS0_Z
DDR2_DQS1
DDR2_DQS1
DDR2_CLK0
DDR2_CLK0
DDR2_CAS
DDR2_RAS
DDR2_WE
C28
0.01UF
0402
C29
10UF
0805
C30
0.01UF
0402
0.01UF
0402
C31
0.01UF
0402 0402
C37C43
0.01UF
ANALOG
VDD_DDR2
C32 C36
0.01UF
VDD_DDR2
0.01UF
04020402
C33
0.01UF
C42
0.01UF
0402 0402
0.01UF
04020402
C41 C40
0.01UF
C35C34
0.01UF
0.01UF
0402 0402
20 Cotton Road
0.01UF
04020402
C39C38
0.01UF
3
Nashua, NH 03063
DEVICES
7
6
5
DDR2_CKE
DDR2_CS0
DDR2_ODTDDR2_ODT_Z
Title
Size Board No.
C
Date Sheet of
ADSP-21469 EZ-BOARD
DSP - DDR2 INTERFACE
PH: 1-800-ANALOGD
A0221-2008
Rev
0.2
2 163-31-2009_10:10
4
A B C D
Page 93
A B C
D
U1
V16
AMI_ADDR0
U16
ADDR1_Z
ADDR2_Z
ADDR3_Z
ADDR4_Z
ADDR5_Z
ADDR6_Z
ADDR7_Z
ADDR8_Z
1
2
3.3V
3
ADDR9_Z
ADDR10_Z
ADDR11_Z
ADDR12_Z
ADDR13_Z
ADDR14_Z
ADDR15_Z
ADDR16_Z
ADDR17_Z
ADDR18_Z
ADDR19_Z
ADDR20_Z
ADDR21_Z
ADDR22_Z
ADDR23_Z
BOOT_CFG0
BOOT_CFG1
BOOT_CFG2
CLK_CFG0
CLK_CFG1
DSP_CLKIN
C
RESET
SW4
1
0
7
SWT027
ROTARY
C44
0.1UF
0402
DNP
2
3
4
5
6
AMI_ADDR1
T16
AMI_ADDR2
R16
AMI_ADDR3
V15
AMI_ADDR4
U15
AMI_ADDR5
T15
AMI_ADDR6
R15
AMI_ADDR7
V14
AMI_ADDR8
U14
AMI_ADDR9
T14
AMI_ADDR10
R14
AMI_ADDR11
V13
AMI_ADDR12
U13
AMI_ADDR13
T13
AMI_ADDR14
R13
AMI_ADDR15
V12
AMI_ADDR16
U12
AMI_ADDR17
T12
AMI_ADDR18
R12
AMI_ADDR19
V11
AMI_ADDR20
U11
AMI_ADDR21
T11
AMI_ADDR22
R11
AMI_ADDR23
J2
BOOT_CFG0
J3
BOOT_CFG1
H3
BOOT_CFG2
G1
CLK_CFG0
G2
CLK_CFG1
M1
RESET
K1
XTAL
L1 M2
CLKIN CLKOUT
ADSP-21469
PBGA324
FLAG2/IRQ2/AMI_MS2
FLAG3/TIMEXP/AMI_MS3
XTAL PIN TEST POINT
DO NOT POPULATE C44
P10
1
3 4
5
7 8
9
1
2
4
R198
10K
0402
2
6
10
MLB_DEVICE
5X2_2MM
DNP
R197
10K
0402
R196
10K
0402
MLBCLK
MLBSIG
MLBDAT
MLBSO
MLBDO
BOOT_CFG0
BOOT_CFG1
BOOT_CFG2
AMI_DATA0
AMI_DATA1
AMI_DATA2
AMI_DATA3
AMI_DATA4
AMI_DATA5
AMI_DATA6
AMI_DATA7
AMI_MS0
AMI_MS1
AMI_WR
AMI_ACK
FLAG0/IRQ0
FLAG1/IRQ1
MLBCLK
MLBDAT
SW4: BOOT MODE SELECT
POSITION BOOT MODE
0
1
2
4 Link Port 0 Boot
3,5,6 or 7
3.3V
SW5
1 2
DIP2
SWT020
ON
4
3
SW5: DSP CLOCK CONFIG
CLKCFG021CLKCFG1
CLK_CFG0
CLK_CFG1
1
2
4
R200
10K
0402 0402
R199
10K
ON
OFF
OFF OFF
U18
AM_RD
MLBSIG
MLBSO
MLBD0
EMU
TRST
TCK
TMS
TDI
TDO
THD_P
THD_M
T18
R18
P18
V17
U17
T17
R17
T10
U10
J4
V10
R10
R8
V7
U7
T7
K3
K4
L2
L3
L4
K2
N15
K15
K16
L15
M15
N11
N12
R211
0402
R462
0402
R203
0402
R204
0402
DATA1_Z
DATA2_Z
DATA3_Z
DATA4_Z
DATA5_Z
DATA6_Z
DATA7_Z
MS0_Z
MS1_Z
RD_Z
WR_Z
ACK
FLAG0/IRQ0_Z
FLAG1/IRQ1_Z
FLAG2/IRQ2/MS2_Z
FLAG3/TIMEXP/MS3_Z
33
MLBDAT_Z
MLBSIG_Z
MLBSO_Z
MLBDO_Z
0
TRST
TCK
TMS
TDI
33
TEMP_PLUS
TEMP_MINUS
33
MLB NOT SUPPORTED ON 21469 DSP
P10 UNPOPULATED BY DEFAULT
P10 CAN BE USED WITH A 21462 DSP
SPI Slave Boot
SPI Master Boot
AMI Boot (Parallel Flash)
DEFAULT
Reserved
CLOCK RATIO
CORE:CLKIN
ON
OFFON
ON
Reserved
32:1
16:1
DEFAULT
6:1
MLBCLK
EMU
TDO
DSP_CLKOUT
ADDR1
ADDR3
ADDR2
ADDR0
ADDR7
ADDR6
ADDR5
ADDR4
ADDR11
ADDR9
ADDR10
ADDR8
ADDR12
ADDR14
ADDR13
ADDR15
ADDR0_Z ADDR0
ADDR2_Z
ADDR3_Z
ADDR7_Z
ADDR6_Z
ADDR5_Z
ADDR4_Z ADDR4
ADDR8_Z
ADDR9_Z
ADDR10_Z
ADDR11_Z
ADDR15_Z ADDR15
ADDR14_Z ADDR14
ADDR13_Z ADDR13
ADDR12_Z ADDR12
ADDR16_Z
ADDR17_Z
ADDR18_Z
ADDR19_Z
ADDR23_Z ADDR23
ADDR22_Z ADDR22
ADDR21_Z
ADDR20_Z ADDR20
RN41
1 8
2
R2A
3
R3A
4
R4A
82
RNS005
RN42
2
R2A
3
R3A
4
R4A
82
RNS005
RN43
1 8
2
R2A
3
R3A
4
R4A
82
RNS005
RN44
2
R2A
3
R3A
4
R4A
82
RNS005
RN24
81
R1BR1A
2
R2A
3
R3A
4
R4A
10 5
RNS005
RN25
1 8
2
R2A
3
R3A
4
R4A
10
RNS005
RN15
2
R2A
3
R3A
4
R4A
10
RNS005
RN16
1 8
2
R2A
3
R3A
4
R4A
10
RNS005
RN17
2
R2A
3
R3A
4
R4A
10
RNS005
RN19
1 8
2
R2A
3
R3A
4
R4A
10
RNS005
R1BR1A
7
R2B
6
R3B
5
R4B
81
R1BR1A
7
R2B
6
R3B
5
R4B
R1BR1A
7
R2B
6
R3B
5
R4B
81
R1BR1A
7
R2B
6
R3B
5
R4B
7
R2B
6
R3B
5
R4B
R1BR1A
7
R2B
6
R3B
5
R4B
81
R1BR1A
7
R2B
6
R3B
5
R4B
R1BR1A
7
R2B
6
R3B
5
R4B
81
R1BR1A
7
R2B
6
R3B
5
R4B
R1BR1A
7
R2B
6
R3B
5
R4B
CN2
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
CN3
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
CN4
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
CN5
1 8
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
ADDR1ADDR1_Z
ADDR2
ADDR3
ADDR7
ADDR6
ADDR5
ADDR8
ADDR9
ADDR10
ADDR11
ADDR16
ADDR17
ADDR18
ADDR19
ADDR21
81
7
6
5
81
7
6
5
81
7
6
5
7
6
5
DATA1_Z DATA1
DATA2_Z
DATA3_Z
3.3V
3.3V 3.3V
R202
10K
0402
4U41
VDD
1 3
OE OUT
GND
2
25MHZ
OSC003
ADDR18
ADDR19
ADDR16
ADDR17
ADDR22
ADDR20
ADDR23
ADDR21
DATA3
DATA1
DATA2
DATA0
DATA4
DATA6
DATA7
DATA5
RN20
2
R2A
3
R3A
4
R4A
10
RNS005
RN21
1 8
2
R2A
3
R3A
4
R4A
10
RNS005
RN23
2
R2A
3
R3A
4
R4A
10
RNS005
RN18
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN22
2
R2A
3
R3A
4
R4A
33
RNS005
DSP OSC
RN45
1 8
2
R2A
3
R3A
4
R4A
82
RNS005
RN40
2
R2A
3
R3A
4
R4A
82
RNS005
RN48
1 8
2
R2A
3
R3A
4
R4A
82
RNS005
RN47
2
R2A
3
R3A
4
R4A
82
RNS005
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R201
33
0402
7
6
5
81
7
6
5
7
6
5
81
7
6
5
81
7
6
5
7
6
5
81
7
6
5
7
6
5
81
7
6
5
DATA0DATA0_ZDATA0_ZADDR0_Z
DATA2
DATA3
DATA7DATA7_Z
DATA6DATA6_Z
DATA5DATA5_Z
DATA4DATA4_Z
WRWR_Z
MS1MS1_Z
MS0MS0_Z
RDRD_Z
FLAG3/TIMEXP/MS3FLAG3/TIMEXP/MS3_Z
FLAG2/IRQ2/MS2FLAG2/IRQ2/MS2_Z
FLAG1/IRQ1FLAG1/IRQ1_Z
FLAG0/IRQ0FLAG0/IRQ0_Z
MLBDOMLBDO_Z
MLBSOMLBSO_Z
MLBSIGMLBSIG_Z
MLBDATMLBDAT_Z
DSP_CLKIN
CN6
1 8
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
CN7
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
CN8
1 8
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
CN9
C1A C1B
2
C2A C2B
3
C3A C3B
4
C4A C4B
SW13: ASYNC CONTROL ENABLE
DEFAULT: OFF ON OFF ON ON OFF
MS0
MS1
FLAG0/IRQ0
FLAG1/IRQ1
FLAG2/IRQ2/MS2
C45
0.01UF
0402
OSC
7
6
5
81
7
6
5
7
6
5
81
7
6
5
2
3
4
3.3V
G4
VDD
R208
10K
04020402
TEMP_IRQ
TEMP_THERM
CN1
C1A C1B
C2A C2B
C3A C3B
C4A C4B
E2
D0
H2
D1
E3
D2
H3
D3
H4
D4
E4
D5
H5
D6
E5
D7
F2
D8
G2
D9
F3
D10
G3
D11
F4
D12
G5
D13
F5
D14
G6
D15/A-1
C4
NC
GND1
GND2
H6
H1
81
7
6
3.3V
SW13
1 2 4 5 6
3
DIP6
SWT017
3.3V
JP1
1 2
IDC2X1
ON
12
11
10
9
8
R206
10K
0402
C46
0.01UF
0402
FLASH_CS
1
2
3
4
5
6 7
JP1 DEFAULT: OFF
TEMP_SCK
TEMP_SDA
TEMP_PLUS
TEMP_MINUS
ANALOG
FLASH_CS
TEMP_THERM
PB1
PB2
TEMP_IRQFLAG3/TIMEXP/MS3
3.3V
3.3V
10K
0402
C47
0.01UF
0402
3.3V
R209R210
10K
0402
U43
8
SCK
7
SI
2
D_PLUS
3
D_MINUS
ADM1032
SOIC_N8
MS0
MS1
R217
10K
0402
RD
WR
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
ADDR8
ADDR9
ADDR10
ADDR11
ADDR12
ADDR13
ADDR14
ADDR15
ADDR16
ADDR17
ADDR18
ADDR19
ADDR20
ADDR21
RESET
RDY/BSY
RD
WR
WP
C48
0.01UF
0402
3.3V
1
VCC
ALERT
THERM
GND
5
20 Cotton Road
RN46
1 8
2
R2A
3
R3A
4
R4A
82
RNS005
E1
D1
C1
A1
B1
D2
C2
A2
B5
A5
C5
D5
B6
A6
C6
D6
E6
B2
C3
D4
D3
B4
F6
TP1
A3
F1
G1
A4
B3
R205
10K
0402
3.3V
R207
10K
6
4
R1BR1A
7
R2B
6
R3B
5
R4B
U18
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
RESET
BYTE
RY/BY~
CE
OE
WE
VPP/WP~
M29W320EB
TFBGA48
Nashua, NH 03063
PH: 1-800-ANALOGD
Title
DEVICES
ADSP-21469 EZ-BOARD
DSP - ASYNC INTERFACE
Size Board No.
C
Date Sheet of
A0221-2008
3 164-14-2009_10:36
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
ADDR0
C49
0.01UF
0402
Rev
0.2
1
2
3
4
A B C D
Page 94
A B C
D
RN26
U1
R6
DAI_P1_Z
DAI_P2_Z
DAI_P3_Z
DAI_P4_Z
DAI_P5_Z
DAI_P6_Z
1
LCLK_0 LCLK_1
LACK_0
2
DAI_P10_Z
DAI_P11_Z
DAI_P12_Z
DAI_P13_Z
DAI_P14_Z
DAI_P15_Z
DAI_P16_Z
DAI_P17_Z
DAI_P18_Z
DAI_P19_Z
DAI_P20_Z
R219
0402
R220
0402
LDAT0_1_Z
LDAT0_2_Z
LDAT0_3_Z
LDAT0_4_Z
LDAT0_5_Z
LDAT0_6_Z
LDAT0_7_Z
DAI_P7_Z
DAI_P8_Z
DAI_P9_Z
51.1
51.1
DAI_P1
V5
DAI_P2
R7
DAI_P3
R3
DAI_P4
U5
DAI_P5
T5
DAI_P6
V6
DAI_P7
V2
DAI_P8
R5
DAI_P9
V4
DAI_P10
U4
DAI_P11
T4
DAI_P12
U6
DAI_P13
U2
DAI_P14
R4
DAI_P15
V3
DAI_P16
U3
DAI_P17
T3
DAI_P18
T6
DAI_P19
T2
DAI_P20
LCLK_0 LCLK_1
K17
LACK_0 LACK_1
E18 K18
LDAT0_0
F17
LDAT0_1
F18
LDAT0_2
G17
LDAT0_3
G18
LDAT0_4
H16
LDAT0_5
H17
LDAT0_6
J16
LDAT0_7
ADSP-21469
PBGA324
LDAT1_0
LDAT1_1
LDAT1_2
LDAT1_3
LDAT1_4
LDAT1_5
LDAT1_6
LDAT1_7
DPI_P1
DPI_P2
DPI_P3
DPI_P4
DPI_P5
DPI_P6
DPI_P7
DPI_P8
DPI_P9
DPI_P10
DPI_P11
DPI_P12
DPI_P13
DPI_P14
R2
U1
T1
R1
P1
P2
P3
P4
N1
N2
N3
N4
M3
M4
N18J18
P17
L16
L17
L18
M16
M17
N16
P16
R218
0402
R221
0402
DPI_P1_Z
DPI_P2_Z
DPI_P3_Z
DPI_P4_Z
DPI_P5_Z
DPI_P6_Z
DPI_P7_Z
DPI_P8_Z
DPI_P9_Z
DPI_P10_Z
DPI_P11_Z
DPI_P12_Z
DPI_P13_Z
DPI_P14_Z
LDAT1_0_ZLDAT0_0_Z
LDAT1_1_Z
LDAT1_2_Z
LDAT1_3_Z
LDAT1_4_Z
LDAT1_5_Z
LDAT1_6_Z
LDAT1_7_Z
51.1
51.1
LACK_1
DPI_P2_Z
DPI_P3_Z
DPI_P4_Z
DPI_P1_Z
DPI_P5_Z
DPI_P6_Z
DPI_P7_Z
DPI_P8_Z
DPI_P9_Z
DPI_P10_Z
DPI_P11_Z
DPI_P12_Z
DPI_P13_Z
DPI_P14_Z
2
R2A
3
R3A
4
R4A
33
RNS005
RN27
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN28
2
R2A
3
R3A
4
R4A
33
RNS005
RN29
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
81
7
6
5
7
6
5
81
7
6
5
7
6
5
DPI_P2
DPI_P3
DPI_P4
DPI_P1
DPI_P5
DPI_P6
DPI_P7
DPI_P8
DPI_P9
DPI_P10
DPI_P11
DPI_P12
DPI_P13
DPI_P14
DAI_P2_Z
DAI_P3_Z
DAI_P4_Z
DAI_P7_Z DAI_P7
DAI_P9_Z
DAI_P10_Z
DAI_P11_Z
DAI_P12_Z
DAI_P17_Z
RN30
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN31
2
R2A
3
R3A
4
R4A
33
RNS005
RN32
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
RN33
2
R2A
3
R3A
4
R4A
33
RNS005
RN34
1 8
2
R2A
3
R3A
4
R4A
33
RNS005
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
7
6
5
81
7
6
5
7
6
5
81
7
6
5
7
6
5
DAI_P1DAI_P1_Z
DAI_P2
DAI_P3
DAI_P4
DAI_P8DAI_P8_Z
DAI_P6DAI_P6_Z
DAI_P5DAI_P5_Z
DAI_P9
DAI_P10
DAI_P11
DAI_P12
DAI_P16DAI_P16_Z
DAI_P15DAI_P15_Z
DAI_P14DAI_P14_Z
DAI_P13DAI_P13_Z
DAI_P17
DAI_P20DAI_P20_Z
DAI_P19DAI_P19_Z
DAI_P18DAI_P18_Z
LDAT0_3_Z
LDAT0_2_Z LDAT0_2
LDAT0_7_Z
LDAT1_2_Z LDAT1_2
LDAT1_1_Z LDAT1_1
SW3: DPI [1-8] ENABLE
LINK PORT 1 / JTAG IN
J3
2
TCK_LINKPORT
TDO_IN
TMS_LINKPORT
EMU_LINKPORT
TRST_LINKPORT
DA_SOFT_RESET_LINKPORT
3
MSC1
4
GND1
6
MSC2
8
GND2
10
MSC3
12
MSC4
14
MSC5
16
MSC6
18
GND3
20
GND4
LINKPORT_EDGE_F
ERF8_10X2_SMT
LINK PORT 0 / JTAG OUT
P12
2
TCK_LINKPORT
TDO_OUT
TMS_LINKPORT
EMU_LINKPORT
TRST_LINKPORT
DA_SOFT_RESET
4
MSC1
4
GND1
6
MSC2
8
GND2
10
MSC3
12
MSC4
14
MSC5
16
MSC6
18
GND3
20
GND4
LINKPORT_EDGE_M
ERM8_10X2_SMT
D7
D6
D5
D4
D3
D2
D1
D0
ACK
CLK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
CLK
1
3
5
7
9
11
13
15
17
19
R463
10K
0402
1
3
5
7
9
11
13
15
17
19
R466
10K
R464
10K
0402
R465
10K
04020402
LDAT1_7
LDAT1_6
LDAT1_5
LDAT1_4
LDAT1_3
LDAT1_2
LDAT1_1
LDAT1_0
LACK_1
LCLK_1
LDAT0_7
LDAT0_6
LDAT0_5
LDAT0_4
LDAT0_3
LDAT0_2
LDAT0_1
LDAT0_0
LACK_0
LCLK_0
SPI_MOSI
SPI_CLK
SPI_CS
3.3V
R225
10K
0402
R224
10K
0402
5
SI SO
6
SCK
1
CS
3
WP
7
HOLD
M25P16
SO8W
R223
10K
0402
DNP
3.3V
8U40
VCC
GND
4
3.3V
R222
10K
0402
DNP
2
3.3V
SPI_MISO
C50
0.01UF
0402
DPI_P1
DPI_P2
DPI_P3
DPI_P4
DPI_P5
DPI_P6
DPI_P7
DPI_P8
DEFAULT: ALL ON EXCEPT POS 3 & 4 OFF
DPI_P9
DPI_P10
DPI_P11
DPI_P12
DPI_P13
DPI_P14
DEFAULT: ALL ON
SW3
3
81 2 4 5 6 7
DIP8
SWT016
ON
16
15
14
13
12
11
10
9
SPI_MOSI
SPI_MISO
SPI_CLK
AD1939_CS
SPI_CS
LED1
TEMP_SDA
TEMP_SCK
1
2
3
4
5
6
7
8
SW14: DPI [9-14] ENABLE
SW14
1 2 4 5 6
3
DIP6
SWT017
ON
12
11
10
9
8
UART_TX
UART_RX
UART_RTS
UART_CTS
LED2
LED3
1
2
3
4
5
6 7
NOTE: SHUTTING OFF DIP SWITCHES SW1, SW2, SW3
SW7, OR SW14 ALLOWS A USER TO USE THESE DAI OR
DPI PINS VIA THE EXPANSION II INTERFACE.
Title
ANALOG
DEVICES
ADSP-21469 EZ-BOARD
RN38
81
2
R2A
3
R3A
4
R4A
51
RNS005
RN37
1 8
2
R2A
3
R3A
4
R4A
51
RNS005
RN36
2
R2A
3
R3A
4
R4A
51
RNS005
RN35
1 8
2
R2A
3
R3A
4
R4A
51
RNS005
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
R1BR1A
R2B
R3B
R4B
7
6
5
7
6
5
81
7
6
5
7
6
5
LDAT0_3
LDAT0_1LDAT0_1_Z
LDAT0_0LDAT0_0_Z
LDAT0_7
LDAT0_6LDAT0_6_Z
LDAT0_5LDAT0_5_Z
LDAT0_4LDAT0_4_Z
LDAT1_3LDAT1_3_Z
LDAT1_0LDAT1_0_Z
LDAT1_7LDAT1_7_Z
LDAT1_6LDAT1_6_Z
LDAT1_5LDAT1_5_Z
LDAT1_4LDAT1_4_Z
SW1: DAI [1-8] ENABLE
DEFAULT: ALL ON
SW1
3
81 2 4 5 6 7
DIP8
SWT016
ON
16
15
14
13
12
11
10
9
SPDIF_OUT
AD1939_SOFT_RESET
LED4
LED5
ASDATA1
ASDATA2
ABCLK
ALRCLK
DAI_P1
DAI_P2
DAI_P3
DAI_P4
DAI_P5
DAI_P6
DAI_P7
DAI_P8
1
2
3
4
5
6
7
8
SW2: DPI [9-16] ENABLE
DEFAULT: ALL ON EXCEPT POS. 5 & 6 OFF
SW2
3
81 2 4 5 6 7
DIP8
SWT016
ON
16
15
14
13
12
11
10
9
DSDATA4
DSDATA3
DSDATA2
DSDATA1
DBCLK
DLRCLK
LED6
LED7
DAI_P9
DAI_P10
DAI_P11
DAI_P12
DAI_P13
DAI_P14
DAI_P15
DAI_P16
1
2
3
4
5
6
7
8
SW7: DPI [17-20] ENABLE
DEFAULT: ALL ON
SW7
DAI_P17
DAI_P18
DAI_P19
DAI_P20
1
2
3
4 5
1 2 3 4
DIP4
SWT018
ON
8
7
6
LED8
SPDIF_IN
PB3
PB4
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
1
2
3
4
DSP - DAI, DPI, LINK PORT INTERFACES
Size Board No.
C
Date Sheet of
A B C D
A0221-2008
Rev
0.2
4 163-31-2009_14:34
Page 95
A B C
D
VDD_DDR2
U1
C5
VDD_DDR2_1
C12
VDD_DDR2_2
D3
VDD_DDR2_3
D6
VDD_DDR2_4
D8
VDD_DDR2_5
D18
VDD_DDR2_6
E2
1
VDDEXT
2
VDDINT
FER5
600
0603
C53
0.1UF
0402
C52
0.01UF
0402
C51
1000PF
0402
VDD_DDR2_7
E4
VDD_DDR2_8
E7
VDD_DDR2_9
E10
VDD_DDR2_10
E11
VDD_DDR2_11
E17
VDD_DDR2_12
F3
VDD_DDR2_13
F5
VDD_DDR2_14
F15
VDD_DDR2_15
G14
VDD_DDR2_16
G16
VDD_DDR2_17
H15
VDD_EXT1
H18
VDD_EXT2
J5
VDD_EXT3
J15
VDD_EXT4
K14
VDD_EXT5
L5
VDD_EXT6
M14
VDD_EXT7
M18
VDD_EXT8
N5
VDD_EXT9
P6
VDD_EXT10
P8
VDD_EXT11
P10
VDD_EXT12
P12
VDD_EXT13
P14
VDD_EXT14
P15
VDD_EXT15
V8
VDD_EXT16
U8
VDD_EXT17
T8
VDD_EXT18
V9
VDD_EXT19
U9
VDD_EXT20
T9
VDD_EXT21
H1
VDD_A
H2
VSS_A
ADSP-21469
PBGA324
VDD_INT1
VDD_INT2
VDD_INT3
VDD_INT4
VDD_INT5
VDD_INT6
VDD_INT7
VDD_INT8
VDD_INT9
VDD_INT10
VDD_INT11
VDD_INT12
VDD_INT13
VDD_INT14
VDD_INT15
VDD_INT16
VDD_INT17
VDD_INT18
VDD_INT19
VDD_INT20
VDD_INT21
VDD_INT22
VDD_INT23
VDD_INT24
VDD_INT25
VDD_INT26
VDD_INT27
VDD_INT28
VDD_INT29
VDD_INT30
VDD_INT31
VDD_INT32
VDD_INT33
VDD_THD
VDDINT
D12
E6
E8
E9
E14
E15
F6
F7
F8
F9
F10
F11
F12
F13
G6
G13
H5
H6
H13
H14
J6
J13
K6
K13
L6
L13
M6
M13
N6
N7
N8
N9
N13
N10
VDDEXT
C116
0.01UF
0402
U1
A1
VSS1
A18
VSS2
C4
VSS3
C6
VSS4
C8
VSS5
D5
VSS6
D7
VSS7
D9
VSS8
D10
VSS9
D17
VSS10
E3
VSS11
E5
VSS12
E12
VSS13
E13
VSS14
E16
VSS15
F2
VSS16
F4
VSS17
F14
VSS18
F16
VSS19
G7
VSS20
G8
VSS21
G9
VSS22
G10
VSS23
G11
VSS24
G12
VSS25
G15
VSS26
H4
VSS27
H7
VSS28
H8
VSS29
H9
VSS30
H10
VSS31
H11
VSS32
H12
VSS33
J1
VSS34
J7
VSS35
J8
VSS36
J9
VSS37
J10
VSS38
ADSP-21469
PBGA324
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
J11
J12
J14
J17
K5
K7
K8
K9
K10
K11
K12
L7
L8
L9
L10
L11
L12
L14
M5
M7
M8
M9
M10
M11
M12
N14
N17
P5
P7
P9
P11
P13
V1
V18
F1
G3
G4
G5
R9
C88
0402
0.01UF0.01UF
0402
C87
0402
C64
0402
C54C55
0402
VDDINT
0.01UF0.01UF
0402
C63
0.01UF0.01UF
0402
0.01UF0.01UF
0402
VDDINT
C71C86
0402
C62 C61
0402
C90C96
0402
0.01UF0.01UF
0402
VDDINT
0.01UF 0.01UF
0402
C89
0.01UF0.01UF
0402
C69C70
0402
C60 C59
0402
C94
0402
0.01UF0.01UF
0402
0.01UF 0.01UF
0402
C95
0.01UF0.01UF
0402
C67C68
0402
C58
0402
C93 C92
0.01UF
0402
0.01UF0.01UF
0402
C91
0.01UF
0402
0.01UF
0402
C65C66
0402
C57
0.01UF
0402
0.01UF0.01UF
0402
C73
0.01UF0.01UF
0402
C102C72
0.01UF
0402
C56
0.01UF
0402
VDDINT
C97
0805
C98
10UF10UF
0805
1
2
3
C79 C78
0.01UF
0402
0.01UF
0402
0.01UF 0.01UF
0402
C114C113
0402
C77 C76
0402
VDD_DDR2
0.01UF0.01UF
0402
VDDEXT
0.01UF 0.01UF
0402
C105C115
0.01UF
0402
C75
0402
C111
0.01UF 0.01UF
0402
C85
0.01UF
0402
C112 C107
0402
C74
0.01UF
0402
0.01UF 0.01UF
0402
C99
0.01UF
0402
C106 C108
0402
0.01UF 0.01UF
0402
C84
0.01UF
0402
VDDEXT
C83
0.01UF 0.01UF
0402
C109 C110
0402
0.01UF
0402
C82 C81
0402
0.01UF 0.01UF
0402
VDD_DDR2
10UF
0805
C80
0402
C103C104
10UF
0805
VDDEXT
C100
0805
C101
10UF10UF
0805
ANALOG
20 Cotton Road
3
Nashua, NH 03063
4
DEVICES
PH: 1-800-ANALOGD
4
Title
ADSP-21469 EZ-BOARD
DSP - POWER
Size Board No.
C
Date Sheet of
A B C D
A0221-2008
Rev
0.2
5 163-19-2009_12:57
Page 96
A B C
3.3V
D
3.3V
R232
J7
SPDIF
COAX
1
INPUT
SPDIF_OUT
CON012
1
SPDIF_COAX_IN
2
2
C126
0.22UF
0805
C127
0.22UF
0805
U48
2
SN74LVC1G08
SOT23-5
U47
1
2
SN74LVC1G08
SOT23-5
DNP
4
4
15.0K
0603
R229
75.0
0603
R231
10.0K
0603
U44
1
RIN-
2
RIN+
3
NC1
4
NC2
SN65LVDS2D
SOIC8
C123 R227
0.1UF
0805
249.0
0805
8
VCC
7
ROUT
6
NC3
5
GND
SPDIF_COAX_OUT
R228
107.0
0805
SPDIF_COAX_OUT
J6
CON012
2
1
R230
22
0402
SPDIF_IN
LOOPBACK HEADER
FOR TESTING PURPOSES ONLY
JP2 DEFAULT: OFF
JP2
SPDIF_COAX_IN
1
2
IDC2X1
SPDIF
COAX
OUT
3.3V 3.3V 3.3V
C125
0.01UF
0402
65LVDS2D
SN74LVC1G08
C122
0.01UF
0402
C124
0.01UF
0402
DNP1
SN74LVC1G08
ADM3202
C121
0.01UF
0402
UART_TX
UART_CTS
UART_RX
UART_RTS
C119
0.1UF
0402
C117
0.1UF
0402
SERIAL PORT
U42
1
C1+
3
C1-
4
C2+
5
C2-
11
T1IN T1OUT
10 7
T2IN T2OUT
ADM3202ARNZ
SOIC16
JP3
1
2
IDC2X1
JP3 DEFAULT: ON
V+
V-
R1INR1OUT
R2INR2OUT
TX_OUT
3.3V
C118
2
6
14
1312
89
RX_IN
0.1UF
0402
TX_OUT
RX_IN
C120
0.1UF
0402
1
2
IDC2X1
JP4
J2
1
2
3
4
5
LOOPBACK HEADER
FOR TESTING PURPOSES ONLY
JP4 DEFAULT: OFF
1
6
7
8
9
CON038
2
SINGLE PROCESSOR JTAG SETTINGS
VIA HP-USB EMUALTOR OR DEBUG AGENT (DEFAULT)
BOARD ATTACHED
SWITCH
SW19.1
SW19.2
SW19.3
SW19.4
SW19.5
SW19.6
SW19.7
SW19.8
SW20.1
SW20.2
3
SW21.1
SW21.2
SW22.1
SW22.2
MULTI PROCESSOR JTAG SETTINGS VIA HP-USB EMUALTOR
USING TWO OR MORE EZ-BOARDS (LINK PORT CABLES
REQUIRED FOR MORE THAN TWO BOARDS)
SWITCH
SW19.1
SW19.2
SW19.3
SW19.4
SW19.5
SW19.6
SW19.7
SW19.8
SW20.1
4
SW20.2
TO EMULATOR
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
OFF
BOARD ATTACHED
TO EMULATOR
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
BOARD(S) NOT ATTACHED
TO EMULATOR
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
JTAG SWITCHES
SW19
3
81 2 4 5 6 7
DIP8
SWT016
SW20
1 2
DIP2
SWT020
SW21
1 2
DIP2
SWT020
SW22
1 2
DIP2
SWT020
ON
16
15
14
13
12
11
10
9
ON
4
3
ON
4
3
ON
4
3
TRST
EMU
TMS
TCK
TDI
TDI TDO_IN
1
2
3
4
5
6
7
8
1
2
1
2
1
2
TRST_LOCAL
TRST_LINKPORT
EMU_LOCAL
EMU_LINKPORT
TMS_LOCAL
TMS_LINKPORT
TCK_LOCAL
TCK_LINKPORT
TDI_LOCAL
DA_SOFT_RESET_LINKPORTDA_SOFT_RESET
TDO_LOCALTDO
TDO_OUT
TDO_INTDO_LOCAL
10K
0402
3.3V3.3V
R190R99
10K
0402
"JTAG"
P1
1
3
5
7
9
11
13
IDC7X2_SMTA
All USB interface circuitry is considered proprietary and has
been omitted from this schematic.
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
2
4
6
8
10
12
14
R185
4.7K
0402
EMU_LOCAL
TMS_LOCAL
TCK_LOCAL
TRST_LOCAL
TDI_LOCAL
TDO_LOCAL
DA_SOFT_RESET
RESET
5V 3.3V
DA_PWR VDD_EXT_DSP
RESET
DA_SOFT_RESET
DA_STANDALONE
ANALOG
DEVICES
GND
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
3
4
SW21.1
SW21.2
SW22.1
SW22.2
OFF
ON
OFF
ON
OFF
Title
ADSP-21469 EZ-BOARD
ON
SPDIF, RS-232, JTAG INTERFACES
ON
OFF
A B C D
Size Board No.
C
A0221-2008
Date Sheet of
Rev
0.2
6 164-1-2009_17:04
Page 97
A B C
3.3V
D
DSP PIN
COMPONENT
R233
10K
0402
LABEL "PB1"
1
SW8
MOMENTARY
SWT013
R240
100
0402
C132
1UF
0402
U14
74LVC14A
SOIC14
R244
10
0603
21
PB1
PB1
PB2
PB3
PB4
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
R234
10K
0402
LABEL "PB2"
SW9
MOMENTARY
SWT013
R241
100
0402
C133
1UF
0402
U14
3 4
74LVC14A
SOIC14
R245
10
0603
PB2
CONNECTED TO
FLAG1/IRQ1
FLAG2/IRQ2/MS2
DAI_P19
DAI_P20
DPI_P6
DPI_P13
DPI_P14
DAI_P3
DAI_P4
DAI_P15
DAI_P16
DAI_P17
CONNECTED
VIA SWITCH
SW13.4
SW13.5
SW7.3
SW7.4
SW3.6
SW14.5
SW14.6
SW1.3
SW1.4
SW2.7
SW2.8
SW7.1
1
3.3V 3.3V
RESET
LED10
RED
LED001
R469
10K
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
0402
18
16
14
12
9
7
5
3
R235
2
LABEL "PB3"
SW10
MOMENTARY
SWT013
LABEL "PB4"
SW11
MOMENTARY
SWT013
R242
100
0402
R243
100
0402
3
3.3V
10K
0402
C134
1UF
0402
R236
10K
0402
C135
1UF
0402
U14
74LVC14A
SOIC14
U14
9 8
74LVC14A
SOIC14
RESET
R246
10
0603
65
R247
10
0603
PB3
PB4
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
SW12
MOMENTARY
SWT013
DA_SOFT_RESET
11
13
15
17
19
U17
2
1A1
4
1A2
6
1A3
8
1A4
2A1
2A2
2A3
2A4
1
OE1
OE2
IDT74FCT3244APY
SSOP20
R256
10K
0402
1
2
LED8
YELLOW
LED001
U49
SN74LVC1G08
SOT23-5
4
R239
10K
0402
YELLOW
LED001
U46
4
PFI
ADM708SARZ
SOIC8
LED6
YELLOW
LED001
RESETMR
RESET
PFO
81
7
5
LED5LED7
YELLOW
LED001
R255
330
0603
RESET
LED4
YELLOW
LED001
LED3
YELLOW
LED001
TEMP_THERM
LED2
YELLOW
LED001
LED11
YELLOW
LED001
R497
330
0603
LED1
YELLOW
LED001
3.3V
POWER
LED9
GREEN
LED001
2
3
C129
0.01UF
R238
10K10K
0402
U14
13 12
74LVC14A
SOIC14
C130
0.01UF
04020402
C128
0.01UF
0402
330
0603
R468R467
330
0603
R248 R249
330
0603
330
0603
Title
R250
330
R252R251
330
06030603
330
ANALOG
DEVICES
ADSP-21469 EZ-BOARD
330
06030603
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
R254R253
330
0603
4
R237
0402
U14
1011
74LVC14A
SOIC14
3.3V
C131
0.01UF
0402
4
RESET CIRCUIT, PUSHBUTTONS, LEDS
ADM70874LVC14A
IDT74FCT3244
SN74LVC1G08
Size Board No.
C
Date Sheet of
A0221-2008
7 163-31-2009_14:34
Rev
0.2
A B C D
Page 98
A B C
D
J4 J5
RED (RIGHT)WHITE (LEFT)
3.3V
A3V
OUT3 (L) OUT3 (R)
109
A3V
OUT1 (R)
6
C258
390PF
0603
U45
28
1
RESET
2
AD1939_SOFT_RESET
ABCLK_Z
ALRCLK_Z
ASDATA1_Z
ASDATA2_Z
DBCLK
DLRCLK
DSDATA1
DSDATA2
DSDATA3
DSDATA4
SPI_CLK
SPI_MOSI
SPI_MISO
AD1939_CS
AD1939_CLKIN
1
2
3.3V
C266
0.01UF
0402
TP9
U50
4
SN74LVC1G08
SOT23-5
ABCLK ADC1LN
29
ALRCLK
27
ASDATA1
26
ASDATA2
21
DBCLK
22
DLRCLK
20
DSDATA1
19
DSDATA2
18
DSDATA3
15
DSDATA4
34
CCLK
30
CIN
31
COUT
35
CLATCH
2
MCLKI_XI
3
MCLKO_XO
14
RESET
49
NC1
50
NC2
63
NC3
64
NC4
23
VSUPPLY
24
VSENSE
25
VDRIVE
AD1939
LQFP64
DVDD1
DGND1
16 17
32
DVDD2
DGND2
33
5
AVDD1
45
AVDD2
AGND1
1
51
AVDD3
AGND2
4
62
AVDD4
AGND3
44
ADC1LP
ADC1RN
ADC1RP
ADC2LN
ADC2LP
ADC2RN
ADC2RP
OL1N
OL1P
OR1N
OR1P
OL2N
OL2P
OR2N
OR2P
OL3N
OL3P
OR3N
OR3P
OL4N
OL4P
OR4N
OR4P
FILTR
AGND4
48
46
54
53
56
55
58
57
60
59
37
36
39
38
41
40
43
42
7
6
9
8
11
10
13
12
61
LF
52
CM
47
AGND5
ADC1LN
ADC1LP
ADC2LN
ADC2LP
ADC3LN
ADC3LP
ADC4LN
ADC4LP
DAC1N
DAC1P
DAC2N
DAC2P
DAC3N
DAC3P
DAC4N
DAC4P
DAC5N
DAC5P
DAC6N
DAC6P
DAC7N
DAC7P
DAC8N
DAC8P
C257
10UF
0805 0603
C256 C255
0.1UF
AD1939_LF
AD1939_CM
OUT1 (L)
4
IN1 (L) IN1 (R)
3
NOTE: THE NUMBER INSIDE EACH OF THE CIRCLES IS THE ACTUAL
PIN NUMBER FOR THE RESPECTIVE CONNECTOR.
R461
562.0
0603
C259
5600PF
0805
C254
10UF
0.1UF
06030805
WHITE (LEFT) RED (RIGHT)
OUT4 (L) OUT4 (R)
9 10
OUT2 (L) OUT2 (R)
4
6
IN2 (L) IN2 (R)
3
55
IN4P
IN4N
IN3P
IN3N
IN2P
IN2N
IN1P
IN1N
DB25 Female Connectors for Conversion to XLR Connectors
P8
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
DB25F
27
26
OUT8P
OUT8N
OUT7P
OUT7N
OUT6P
OUT6N
OUT5P
OUT5N
OUT4P
OUT4N
OUT3P
OUT3N
OUT2P
OUT2N
OUT1P
OUT1N
P9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
16
17
18
19
20
21
22
23
24
25
DB25F
2
27
26
C262
22PF
0805
R486
10.0K
3.3V
3
AD1939_CS
AD1939_SOFT_RESET
3.3V
3.3V
R260
10K
0402
U12
1
OE OUT
12.288MHZ
OSC003
VDD
GND
AD1939 OSC
4
3
2
4
3.3V
R259
10K
0402
3.3V
C142
0.01UF
0402
AD1939 OSC
R494
10K
0402
R261
33
0402
ABCLK_Z
ALRCLK_Z
AD1939_CLKIN
R262
33
0402
R257
33
0402
R263
33
0402
R258
33
0402
3.3V
C136
0.01UF 0.01UF
0402
C137
0402
ABCLK
DBCLK
ALRCLK
DLRCLK
C138 C139
0.01UF
0402
ASDATA1_Z
ASDATA2_Z
A3V
0.01UF 0.01UF
0402
R496
33
0402
R495
33
0402
C140 C141
0402
0.01UF
0402
ASDATA1
RES_POT_DUAL
ASDATA2
SW23: HEAD PHONE ENABLE
DEFAULT: ALL OFF
SW23
OUT3_SE_L
OUT3_SE_R
1
2
1 2
DIP2
SWT020
ON
4
3
NOTE: A USER NEEDS TO TURN SWITCH SW23
ON IN ORDER TO USE THE HEAD PHONE CONNECTOR.
RES_POT_DUAL
LOOPBACK CONNECTOR
FOR TESTING PURPOSES ONLY
DEFAULT: ALL OFF
SW24
1 2 3 4
DIP4
SWT018
SW25
1 2 3 4
DIP4
SWT018
ON
8
7
6
ON
8
7
6
54
OUT1_SE_L
OUT1_SE_R
OUT3_SE_L
OUT3_SE_R
OUT2_SE_R
OUT4_SE_L
OUT4_SE_R
IN1_SE_L
IN1_SE_R
IN2_SE_L OUT2_SE_L
IN2_SE_R
1
2
3
4 5
1
2
3
R493
5K
R493
5K
CT59
6
1
2
5
4
3
AD1939_VREF
10UF
CAP002
AD1939_VREF
CT60
10UF
CAP002
AD1939_VREF
C271
0.1UF
0402
5V
R488
10.0K
0402
R489
100.0
0402
R491
10.0K
0402
R490
100.0
0402
C264
0.1UF
0402
5V
C265
10UF
0805
0402
6
5
2
3
U51
AD8397
SOIC_N8_EP
C263
22PF
0805
R487
10.0K
0402
U51
AD8397
SOIC_N8_EP
7
1
Title
Size Board No.
C
Date Sheet of
HEADPHONE OUT (SHARED WITH OUT3/DAC5&6)
R485
0
0402
R492
0
0402
ANALOG
DEVICES
CT58
47UF
ELEC_6MM
CT57
47UF
ELEC_6MM
R484
100K
0402
R483
100K
0402
20 Cotton Road
Nashua, NH 03063
PH: 1-800-ANALOGD
J8
1
5
4
3
2
CON001
ADSP-21469 EZ-BOARD
AUDIO PAGE 1
A0221-2008
8 163-31-2009_14:45
3
4
Rev
0.2
A B C D
Page 99
A B C
D
IN1
C143
300PF
0603
Bottom Left (White)
J4
1
CON_RCA_6B
3
IN1_SE_L
CT1
22UF
ELEC_4MM
R266
5.76K
0603
R264
4.99K
0603
1
1
SW15
ON
1
1 2 4 5 6
2
3
IN1_R
IN1_C
IN1P
CT3
22UF
R271
49.9K
0603
ELEC_4MM
2
IN1N
ADC1_DIFF-
3
4
5
DIP6
SWT017
12
11
10
9
8
76
AD1939_VREF
R265
49.9K
0603
R268
37.4K
0402
R269
5.76K
0603
IN1_R IN1_C
R274
100.0
0402
C148
0.1UF
0402
2
3
6
5
U20
AD8652ARZ
SOIC_N8
C145
300PF
0603
R273
4.99K
0603
U20
AD8652ARZ
SOIC_N8
1
7
ADC1_DIFF-
R267
237.0
0603
R272
237.0
0603
5V
C151
0.1UF
0402
C147
100PF
0402
C150
1000PF
0402
C144
1000PF
0402
CT62
22UF
ELEC_4MM
CT63
22UF
ELEC_4MM
ADC1LN
ADC1LP
AD1939_VREF
5V
R286
806
0402
R287
1.0K
0402
C161
10UF
0805
CT61
100UF
C
2
C157
300PF
0603
Bottom Right (Red)
J4
CON_RCA_6B
5
2
3
IN2P
IN2N
IN1_SE_R
R284
49.9K
0603
CT6
22UF
ELEC_4MM
IN2_R
IN2_C
ADC2_DIFF-
SW16
1
2
3
4
5
6 7
ON
1 2 4 5 6
3
DIP6
SWT017
AD1939_VREF
12
11
10
9
8
CT5
22UF
ELEC_4MM
R282
49.9K
0603
R276
37.4K
0402
R277
5.76K
0603
R275
100.0
0402
R281
5.76K
0603
IN2_CIN2_R
C152
0.1UF
0402
2
3
6
5
R279
4.99K
0603
U21
AD8652ARZ
SOIC_N8
C153
300PF
0603
R278
4.99K
0603
U21
AD8652ARZ
SOIC_N8
1
7
ADC2_DIFF-
R280
237.0
0603
R285
237.0
0603
5V
C160
0.1UF
0402
C155
100PF
0402
C159
1000PF
0402
C154
1000PF
0402
CT65
22UF
ELEC_4MM
CT64
22UF
ELEC_4MM
ADC2LN
ADC2LP
4
IN1 (LEFT) SETTINGS
SW15.1
SW15.2
SW15.3
SW15.4
SW15.5
SW15.6
SINGLE ENDED USE
RCA IN (DEFAULT)
OFF
ON
OFF
ON
OFF
DIFFERENTIAL USE
DB25 IN (P8)SWITCH
OFFON
ON
OFF
ON
OFF
ON
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
IN1 (RIGHT) SETTINGS
SWITCH
SW16.1
SW16.2
SW16.3
SW16.4
SW16.5
SW16.6
SINGLE ENDED USE
RCA IN (DEFAULT)
ON
OFF
ON
OFF
ON
OFF
DIFFERENTIAL USE
DB25 IN (P8)
OFF
ON
OFF
ON
OFF
ON
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
ANALOG
20 Cotton Road
Nashua, NH 03063
DEVICES
PH: 1-800-ANALOGD
3
4
Title
ADSP-21469 EZ-BOARD
AUDIO PAGE 2
Size Board No.
C
Date Sheet of
A B C D
3-31-2009_14:34
A0221-2008
Rev
0.2
9 16
Page 100
A B C
D
IN2
C173
300PF
0603
Bottom Left (White)
J5
CON_RCA_6B
3
IN2_SE_L
1
1
SW18
ON
12
11
10
9
8
76
IN3P
IN3_R
IN3_C
ADC3_DIFF-
1
1 2 4 5 6
2
3
3
4
5
DIP6
SWT017
CT11
22UF
ELEC_4MM
R302
49.9K
0603
R308
37.4K
0402
R303
5.76K
0603
IN3_R IN3_C
R305
4.99K
0603
1
2
3
U22
AD8652ARZ
SOIC_N8
C177
300PF
0603
1
ADC3_DIFF-
R304
237.0
0603
C175
100PF
0402
C176
1000PF
0402
CT66
22UF
ELEC_4MM
ADC3LN
R307
5.76K
0603
CT10
22UF
ELEC_4MM
C178
0.1UF
0402
6
5
IN3N
2
R300
49.9K
0603
AD1939_VREF
R309
100.0
0402
R306
4.99K
0603
U22
AD8652ARZ
SOIC_N8
R299
237.0
0603
C171
1000PF
7
5V
C170
0.1UF
0402
0402
CT67
22UF
ELEC_4MM
ADC3LP
IN2 (LEFT) SETTINGS
SINGLE ENDED USE
RCA IN (DEFAULT)
SW18.1
SW18.2
SW18.3
SW18.4
SW18.5
SW18.6
OFF
ON
OFF
ON
OFF
DIFFERENTIAL USE
DB25 IN (P8)SWITCH
OFFON
ON
OFF
ON
OFF
ON
2
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
C179
300PF
0603
Bottom Right (Red)
J5
CON_RCA_6B
5
2
3
IN4P
IN2_SE_R
IN4_R
IN4_C
ADC4_DIFF-
SW17
1 2 4 5 6
3
DIP6
SWT017
ON
1
2
3
4
5
6 7
12
11
10
9
8
CT8
22UF
ELEC_4MM
R295
49.9K
0603
R289
37.4K
0402
R294
5.76K
0603
R292
4.99K
0603
2
3
IN4_CIN4_R
U23
AD8652ARZ
SOIC_N8
C163
300PF
0603
1
ADC4_DIFF-
R293
237.0
0603
C165
100PF
0402
C164
1000PF
0402
CT68
22UF
ELEC_4MM
IN2 (RIGHT) SETTINGS
SWITCH
SW17.1
SW17.2
SW17.3
SW17.4
SW17.5
SW17.6
SINGLE ENDED USE
RCA IN (DEFAULT)
ON
OFF
ON
OFF
ON
OFF
DIFFERENTIAL USE
DB25 IN (P8)
OFF
ON
OFF
ON
OFF
ON
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
ADC4LN
3
CT69
22UF
ELEC_4MM
ADC4LP
ANALOG
20 Cotton Road
IN4N
R297
49.9K
0603
CT9
22UF
ELEC_4MM
AD1939_VREF
R290
5.76K
0603
R288
100.0
0402
C162
0.1UF
0402
R291
4.99K
0603
6
5
U23
AD8652ARZ
SOIC_N8
7
R298
237.0
0603
5V
C169
0.1UF
0402
C168
1000PF
0402
Nashua, NH 03063
4
Title
DEVICES
ADSP-21469 EZ-BOARD
PH: 1-800-ANALOGD
4
AUDIO PAGE 3
Size Board No.
C
Date Sheet of
A0221-2008
10 163-31-2009_14:34
Rev
0.2
A B C D
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