Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, SHARC, EZ-KIT Lite, and
EZ-Extender are registered trademarks of Analog Devices, Inc.
EZ-Board is a trademark of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Page 3
Regulatory Compliance
The ADSP-21369 EZ-KIT Lite is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end
product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-21369 EZ-KIT Lite has been certified to comply with the
essential requirements of the European EMC directive 2004/108/EC and
therefore carries the “CE” mark.
The ADSP-21369 EZ-KIT Lite has been appended to Analog Devices,
Inc. EMC Technical File (EMC TF) referenced DSPTOOLS1, issue 2
dated June 4, 2008 and was declared CE compliant by an appointed
Notified Body (No.0673) as listed below.
Notified Body Statement of Compliance: Z600ANA1.025 dated
December 19, 2005
Issued by: Technology International (Europe) Limited
60 Shrivenham Hundred Business Park
Shrivenham, Swindon, SN6 8TY, UK
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards in the protective
shipping package.
Page 4
Page 5
CONTENTS
PREFACE
Product Overview ............................................................................ x
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents ........................................................................... xiv
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ....................................................... xv
Supported Processors ....................................................................... xv
Product Information ...................................................................... xvi
Analog Devices Web Site .......................................................... xvi
VisualDSP++ Online Documentation ...................................... xvii
Technical Library CD .............................................................. xvii
Related Documents ...................................................................... xviii
Notation Conventions .................................................................... xix
Power ......................................................................................... B-13
INDEX
viiiADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 9
PREFACE
Thank you for purchasing the ADSP-21369 EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for SHARC® processors.
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated I/O processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today’s de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation system is designed to be used in conjunction with the
VisualDSP++® development environment to test capabilities of the
ADSP-21369 SHARC processors. The VisualDSP++ development environment aides advanced application code development and debug,
such as:
•Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21369 assembly
•Load, run, step, halt, and set breakpoints in application programs
•Read and write data and program memory
•Read and write core and peripheral registers
•Plot memory
Access to the ADSP-21369 processor from a personal computer (PC) is
achieved through a USB port or an external JTAG emulator. The USB
interface provides unrestricted access to the ADSP-21369 processor and
ADSP-21369 EZ-KIT Lite Evaluation System Manualix
Page 10
Product Overview
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools/.
L
The ADSP-21369 EZ-KIT Lite provides example programs to demonstrate the product capabilities.
The ADSP-21369 EZ-KIT Lite installation is part of the VisualDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
to “Evaluation License Restrictions” on page 1-7 and the Visu-alDSP++ Installation Quick Reference Card.
Product Overview
The board features:
•Analog Devices ADSP-21369 SHARC processor
D 256-pin SBGA package
D 400 MHz core clock speed
•Synchronous dynamic random access memory (SDRAM)
D 1M x 32-bit x 4 banks
•Synchronous random access memory (SRAM)
D 512 Kbit x 8-bit
•Flash memory
D 1M x 8-bit
xADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 11
• Serial peripheral interface (SPI) flash memory
D 2Mbit
•Analog audio interface
D AD1835A codec
D 4 x 2 RCA phono jack for 4 channels of stereo output
D 2 x 1 RCA phono jack for 1 channel of stereo input
D 3.5 mm headphone jack for 1 channel stereo output
•National Instruments Educational Laboratory Virtual Instrumentation Suite (ELVIS) Interface
D LabVIEW™-based virtual instruments
D Multifunction data acquisition device
D Bench-top workstation and prototype board
•LEDs
D Eleven LEDs: one power (green), one board reset (red), one
USB monitor (amber), and eight general-purpose (amber)
ADSP-21369 EZ-KIT Lite Evaluation System Manualxi
Page 12
Product Overview
•Push buttons
D Five push buttons: one reset, two connected to DAI, and
two connected to the FLAG pins of the processor
•Expansion interface (Type A)
D Parallel port, FLAG pins, DPI, DAI
•Other features
D JTAG ICE 14-pin header
D Test points for processor current measurement
D DPI header
D DAI header
The EZ-KIT Lite board has a total of 1 MB of parallel flash memory and
2 Mbit of SPI flash memory. Flash memories can store user-specific boot
code and allow the board to run as a stand-alone unit. For more information, see “External Memory” on page 1-7 and “Boot Mode and Clock
Ratio Select Switch (SW2)” on page 2-10. The board also has 512 KB of
SRAM and 16 MB of SDRAM, which can be used at runtime.
The DAI port of the processor is connected to the AD1835A audio codec,
Sony/Philips Digital Interface (S/PDIF), and an external phase lock loop
(PLL). The DAI interface facilitates development of digital and analog
audio signal-processing applications. See “Analog Audio” on page 1-10
and “S/PDIF Coax Connectors (J7 and J8)” on page 2-24 for more
information.
The DPI port of the processor is connected to the UART and SPI interfaces. The UART interface can connect to a standard RS-232 connector,
while the SPI connects to 2 Mbit of serial flash memory.
xiiADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 13
Preface
Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector
expansion interface. See “Expansion Interface” on page 2-7 for details.
Purpose of This Manual
The ADSP-21369 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-21369 EZ-KIT
Lite. Finally, a schematic and a bill of materials are provided for reference.
The product software component is detailed in the VisualDSP++ Installa-tion Quick Reference Card.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-2136x SHARC Processor Programming Reference and
ADSP-21368 SHARC Processor Hardware Reference) that describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxiii
Page 14
Manual Contents
Manual Contents
The manual consists of:
•Chapter 1, “Using ADSP-21369 EZ-KIT Lite” on page 1-1
Describes EZ-KIT Lite operation from a programmer’s perspective
and provides an easy-to-access memory map.
•Chapter 2, “ADSP-21369 EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the EZ-KIT Lite hardware components
•Appendix A, “ADSP-21369 EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
•Appendix B, “ADSP-21369 EZ-KIT Lite Schematic” on page B-1
Provides the resources to allow board-level debugging or to use as a
reference guide. Appendix B is part of the online Help.
What’s New in This Manual
The ADSP-21369 EZ-KIT Lite Evaluation System Manual has been
updated to reflect the latest board revision. In addition, modifications and
corrections based on errata reports against the previous manual revision
have been made.
xivADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 15
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
•Visit the Embedded Processing and DSP products Web site at
•Contact your Analog Devices, Inc. local sales office or authorized
distributor
•Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
The ADSP-21369 EZ-KIT Lite evaluation system supports Analog
Devices ADSP-21369 SHARC processors.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxv
Page 16
Product Information
Product Information
Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, MyAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
MyAnalog.com to sign up. If you are a registered user, just log on.
Visit
Your user name is your e-mail address.
xviADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 17
Preface
VisualDSP++ Online Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documentation. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.
For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
File Description
.chmHelp system files and manuals in Microsoft help format
.htm or
.html
.pdfVisualDSP++ and processor manuals in PDF format. Viewing and printing the
Dinkum Abridged C++ library and FLEXnet License Tools software documentation. Viewing and printing the .html files requires a browser, such as Internet
Explorer 6.0 (or higher).
.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).
Technical Library CD
The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals, VisualDSP++ software manuals, and hardware tools manuals for the following
processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and
ADSP-219x.
To order the technical library CD, go tohttp://www.analog.com/proces-
sors/technical_library
processor, click the request CD check mark, and fill out the order form.
, navigate to the manuals page for your
ADSP-21369 EZ-KIT Lite Evaluation System Manualxvii
Page 18
Related Documents
Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.
Related Documents
For information on product related development software and hardware,
see these publications:
General functional description, pinout, and
timing of the processor
Description of the internal processor architecture, registers, and all peripheral functions
Description of all allowed processor assembly
instructions
Table 2. Related VisualDSP++ Publications
VisualDSP++ User’s GuideDetailed description of the VisualDSP++ fea-
tures and usage
VisualDSP++ Assembler and Preprocessor Manual
VisualDSP++ C/C++ Complier Manual for
SHARC Processors
VisualDSP++ Run-Time Library Manual for
SHARC Processors
Description of the assembler function and
commands
Description of the complier function and commands for SHARC processors
Description of the run-time library functions
for SHARC processors
xviiiADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 19
Table 2. Related VisualDSP++ Publications (Cont’d)
VisualDSP++ Linker and Utilities Manual Description of the linker function and com-
mands
VisualDSP++ Loader and Utilities ManualDescription of the loader function and com-
mands
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
ExampleDescription
Preface
Close command
(File menu)
{this | that}Alternative required items in syntax descriptions appear within curly
[this | that]Optional items in syntax descriptions appear within brackets and sepa-
[this,…]Optional item lists in syntax descriptions appear within brackets
.SECTIONCommands, directives, keywords, and feature names are in text with
filenameNon-keyword placeholders appear in text with italic style format.
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
rated by vertical bars; read the example as an optional this or that.
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of
letter gothic font.
this.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxix
Page 20
Notation Conventions
L
a
[
ExampleDescription
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Wa rn in g
appears instead of this symbol.
xxADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 21
1USING ADSP-21369 EZ-KIT
LITE
This chapter provides information to assist you with development of programs for the ADSP-21369 EZ-KIT Lite evaluation system.
The information appears in the following sections.
•“Package Contents” on page 1-2
Lists the items contained in your EZ-KIT Lite package.
•“Default Configuration” on page 1-3
Shows the default configuration of the EZ-KIT Lite board.
•“Installation and Session Startup” on page 1-5
Instructs how to start a new or open an existing EZ-KIT Lite session using VisualDSP++.
•“Evaluation License Restrictions” on page 1-7
Describes the VisualDSP++ license restrictions; the Visual DSP++
licence is shipped with the EZ-KIT Lite.
•“External Memory” on page 1-7
Describes the memory map of the EZ-KIT Lite; describes how to
access external memory.
•“ELVIS Interface” on page 1-9
Describes the on-board National Instruments Educational Laboratory Virtual Instrumentation Suite (NI ELVIS) interface.
•“Analog Audio” on page 1-10·
Describes how to set up and communicate with the on-board audio
codec.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-1
Page 22
Package Contents
•“LEDs and Push Buttons” on page 1-12
Describes the board’s general-purpose I/O pins and buttons.
•“Example Programs” on page 1-13
Provides information about example programs included in the
evaluation system.
•“Background Telemetry Channel” on page 1-13
Highlights the advantages of the Background Telemetry Channel
feature of VisualDSP++.
•“Reference Design Information” on page 1-14
Highlights the available technical resources for the design, layout,
fabrication, and assembly of the EZ-KIT Lite.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For detailed information on how to program the ADSP-21369 SHARC
processor, refer to the documents referenced in “Related Documents”.
Package Contents
Your ADSP-21369 EZ-KIT Lite evaluation system package contains the
following items.
•ADSP-21369 EZ-KIT Lite board
•VisualDSP++ Installation Quick Reference Card
•CD containing:
D VisualDSP++ software
D ADSP-21369 EZ-KIT Lite debug software
D USB driver files
1-2ADSP-21369 EZ-KIT Lite Evaluation System Manual
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Using ADSP-21369 EZ-KIT Lite
D Example programs
D ADSP-21369 EZ-KIT Lite Evaluation System Manual (this
document)
•Universal 7V DC power supply
•USB 2.0 cable
•3.5 mm stereo headphones
•6-foot RCA audio cable
•6-foot 3.5 mm/RCA x 2 Y-cable
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards in the protective
shipping package.
The ADSP-21369 EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-3
Page 24
Default Configuration
To connect the EZ-KIT Lite board:
1. Remove the EZ-KIT Lite board from the package. Be careful when
handling the board to avoid the discharge of static electricity,
which may damage some components.
2. Figure 1-1 shows the default jumper settings, DIP switch, connector locations, and LEDs used in installation. Confirm that your
board is set up in the default configuration before continuing.
Figure 1-1. EZ-KIT Lite Hardware Setup
1-4ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 25
Using ADSP-21369 EZ-KIT Lite
3. Plug the provided power supply into
Visually verify that the green power LED (LED9) is on. Also verify
that the red reset LED (LED10) goes on for a moment and then goes
off, and, finally, LED1 through LED8 are sequentially blinking.
4. Connect one end of the USB cable to an available full speed USB
port on your PC and the other end to ZJ1 on the ADSP-21369
EZ-KIT Lite board.
J4 on the EZ-KIT Lite board.
Installation and Session Startup
L
For correct operation, install the software and hardware in the
order presented in the VisualDSP++ Installation Quick Reference Card.
1. Verify that the yellow USB monitor LED (ZLED3, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start –> Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 3.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 4.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-5
Page 26
Installation and Session Startup
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
•From the Session menu, New Session.
•From the Session menu, Session List. Then click New Ses-
sion from the Session List dialog box.
•From the Session menu, Connect to Target.
4. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target processor, select ADSP-21369. Click Next.
5. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen.
Ensure that the selected platform is ADSP-21369 EZ-KIT Lite via Debug Agent. Specify your own Session name for your session or
accept the default name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session.
Click Next.
7. The Finish page of the wizard appears on the screen. The page dis-
plays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
1-6ADSP-21369 EZ-KIT Lite Evaluation System Manual
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Using ADSP-21369 EZ-KIT Lite
creates the new session and connects to the EZ-KIT Lite. Once
connected, the main window’s title is changed to include the session name set in step 6.
L
To disconnect from a session, click the disconnect button
or select Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the ses-
sion name from the list and click Delete. Click OK.
Evaluation License Restrictions
The ADSP-21369 EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
1. VisualDSP++ allows a connection to the ADSP-21369 EZ-KIT
Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed.
2. The linker restricts a user program to 7281 words of memory for
code space with no restrictions for data space.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
External Memory
The EZ-KIT Lite contains four types of memory: parallel flash (1 MB),
SPI flash (2 Mbit), SRAM (512 Kbit), and SDRAM (128 Mbit). Flash
memories can store user-specific boot code and allow the board to run as a
stand-alone unit. For more information on how to select a boot device for
the processor, see “Boot Mode and Clock Ratio Select Switch (SW2)” on
page 2-10.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-7
Page 28
External Memory
Table 1-1 provides start and end addresses of the on-board external
memories.
Table 1-1. EZ-KIT Lite Evaluation Board External Memory
Start AddressEnd AddressContent
0x0020 00000x0027 FFFFSRAM memory (~MS0)
0x0400 00000x040F FFFFFlash memory (~MS1)
0x0800 00000x083F 0000SDRAM memory (~MS2)
0x0C00 0000
0x0C00 0000
0x0CFF FFFF
0x0FFF FFFF
Unused chip select (~MS3) for non-SDRAM addresses
Unused chip select (~MS3) for SDRAM addresses
Parallel flash memory, SDRAM, and SRAM are connected to the external
memory of the processor. To access SRAM and flash memories, use memory addressing via the respective memory bank or use the DMA controller.
SDRAM memory is connected to the SDRAM controller of the processor.
A set of programmable timing parameters is available to configure the
SDRAM banks to support slower memory accesses. Care must be taken
when configuring the SDRAM control registers. For more information
regarding the setup of the SDRAM controller, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).
An example program is included in the EZ-KIT Lite installation directory
to demonstrate the controller setup.
SPI flash memory is connected to the SPI port of the processor; SPI flash
designates:
•DPI pin5 (DPI5) as a chip select
•DPI pin3 (
DPI3) as the SPI clock
•DPI pin1 (
DPI1) as the MOSI
•DPI pin2 (DPI2) as the MISO
1-8ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 29
Using ADSP-21369 EZ-KIT Lite
By default, the DPI is set up for the SPI flash, and any required changes to
the SPI flash can be made by modifying the DPI of the processor. An
example program is included in the EZ-KIT Lite installation directory to
demonstrate the SPI flash memory reads and writes.
Asynchronous SRAM memory and parallel flash memory are connected to
the asynchronous memory controller of the processor. Each of their
respective memory banks can be programmed independently with different timing parameters. For more information on changing wait states to
speed up or slow down the asynchronous controller and other setup information, refer to the ADSP-21368 SHARC Processor Hardware Reference
(includes ADSP-21369).
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate flash memory reads and writes.
ELVIS Interface
The ADSP-21369 EZ-KIT Lite board contains the National Instruments
Educational Laboratory Virtual Instrumentation Suite interface. The
interface features the DC voltage and current measurement modules,
oscilloscope and bode analyzer modules, function generator, arbitrary
waveform generator, and digital I/O.
The ELVIS interface is a LabVIEW-based design and prototype environment for university science and engineering laboratories. The ELVIS
interface consists of LabVIEW-based virtual instruments, a multifunction
data acquisition (DAQ) device, and a custom-designed bench-top workstation and prototype board. This combination provides a ready-to-use
suite of instruments found in most educational laboratories. Because the
interface is based on LabVIEW and provides complete data acquisition
and prototyping capabilities, the system is ideal for academic coursework
that range from lower-division classes to advanced project-based
curriculums.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-9
Page 30
Analog Audio
For more information on ELVIS and example demonstration programs,
visit National Instruments Web site at
www.ni.com.
Analog Audio
The AD1835A device is a high-performance, single-chip codec featuring
four stereo digital-to-analog converters (DACs) for audio output and one
stereo analog-to-digital converters (ADCs) for audio input. The codec can
input and output data with a sample rate of up to 96 kHz on all channels.
A 192 kHz sample rate can be used with one of the DAC channels.
The processor is interfaced with the AD1835A codec via the DAI port.
The DAI pins can be configured to transfer serial data from the codec in
either time-division multiplexed (TDM) or 2-wire interface mode (TWI).
For more information on the AD1835A connection to the DAI, see “DAI
Interface” on page 2-4.
The master input clock (MCLK) for the AD1835A codec can be generated
by the on-board 12.288 MHz oscillator or supplied by one of the DAI
pins of the processor. Using a DAI pin to generate the MCLK, as opposed to
the on-board oscillator, allows synchronization of multiple devices in the
system. This is done on the EZ-KIT Lite when data is coming from the
Sony/Philips Digital Interface (S/PDIF) receiver and being output
through the codec. The S/PDIF
the processor’s signal routing unit (SRU). It is possible to disable the
on-board audio oscillator from driving the audio codec and the processor’s
input pin. For instructions on how to configure the clock, refer to “Codec
Setup Switch (SW3)” on page 2-11.
The AD1835A codec can be configured as a master or a slave, depending
on the DIP switch settings. In master mode, the codec drives the serial
port clock and frame sync signals to the processor. In slave mode, the processor must generate and drive all of the serial port clock and frame sync
signals. For more information, refer to “Codec Setup Switch (SW3)” on
page 2-11.
1-10ADSP-21369 EZ-KIT Lite Evaluation System Manual
MCLK is routed to the AD1835A’s MCLK in
Page 31
Using ADSP-21369 EZ-KIT Lite
The internal configuration registers of the codec are configured using the
SPI port of the processor. The DPI pin 4 (
DPI4 register) is used as the
select for the device. For information on how to configure the multichannel codec, refer to the product datasheet at
http://www.analog.com/en/prod/0,2877,AD1835A,00.html.
The RCA connector (J10) is used to input analog audio. When using an
electret microphone on this connector, configure switch SW4 according to
the instructions in “Electret Microphone Select Switch (SW4)” on
page 2-12. The four output channels connect to the RCA connector ( J5).
Channel 4 of the codec connects to the headphone jack (J9). For more
information, see “Connectors” on page 2-21.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-11
Page 32
LEDs and Push Buttons
LEDs and Push Buttons
The EZ-KIT Lite has eight general-purpose user LEDs and four general-purpose push buttons.
Two general-purpose push buttons are attached to the FLAG pins of the
processor, while the other two are attached to the DAI pins. All of the
push buttons are connected to the processor through a DIP switch (SW7).
The DIP switch can disconnect the processor pins connected to the push
buttons. See “Push Button Enable Switch (SW7)” on page 2-13 for
instructions on how to disable a push button from driving its corresponding processor pin.
The state of the push buttons connected to the FLAG pins can be determined by reading the FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-2 shows the push
button and processor connections. Refer to the related example program
shipped with the EZ-KIT Lite for more information.
Table 1-3 summarizes the LED connections to the processor. To use the
LEDs connected to the DAI or DPI pins, configure the respective registers
of the processor. For more information, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).
1-12ADSP-21369 EZ-KIT Lite Evaluation System Manual
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Using ADSP-21369 EZ-KIT Lite
Table 1-3. LED Connections
LED Reference Designator Processor Pin
LED1DPI6
LED2DPI7
LED3DPI8
LED4DPI13
LED5DPI14
LED6DAI15
LED7DAI16
LED8FLAG3/~MS3/~IRQ3
An example program is included in the EZ-KIT Lite installation directory
to demonstrate functionality of the LEDs and push buttons.
Example Programs
Example programs are provided with the ADSP-21369 EZ-KIT Lite to
demonstrate various capabilities of the product. The programs are
installed with the VisualDSP++ software and can be found in the
<install_path>\213xx\Examples\ADSP-21369 EZ-KIT Lite directory.
Refer to a readme file provided with each example for more information.
Background Telemetry Channel
The ADSP-21369 USB debug agent supports the background telemetry
channel (BTC), which facilitates data exchange between VisualDSP++ and
the processor without interrupting processor execution.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-13
Page 34
Reference Design Information
The BTC allows the user to view a variable as it is updated or changed, all
while the processor continues to execute. For increased performance of the
BTC, including faster reading and writing, please check our latest line of
SHARC processor emulators at
sors/sharc/evaluationDevelopment/crosscore/index.html. For more
http://www.analog.com/proces-
information about the background telemetry channel, see the VisualDSP++ User’s Guide or online Help.
Reference Design Information
A reference design info package is available for download on the Analog
Devices Web site. The package provides information on the design, layout, fabrication, and assembly of the EZ-KIT Lite and EZ-Board
products.
1-14ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 35
2ADSP-21369 EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-21369 EZ-KIT
Lite board.
The following topics are covered.
•“System Architecture” on page 2-2
Describes the ADSP-21369 board configuration and explains how
the board components interface with the processor.
•“Switches” on page 2-9
Shows the locations and describes the on-board switches.
•“LEDs and Push Buttons” on page 2-15
Shows the locations and describes the on-board LEDs and push
buttons.
•“Jumpers” on page 2-18
Shows the locations and describes the on-board configuration
jumpers.
•“Connectors” on page 2-21
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-1
Page 36
System Architecture
ADSP-21369
DSP
JTAG
Header
Power Regulation
PBs (4)
JTAG Port
A5V
+7.0V
Connector
Expansion
Connectors
Type A
1M x 8
Flash
24.576 MHz
Oscillator
External
Port
3.3V
Stereo Out RCA
Jacks (4x2)
Stereo In RCA
Jacks (2x1)
DAI
1.3V
AD1835
CODEC
DPI
SPI FLASH
512k x 8
SRAM
SPDIF Out
Phono
FLAGs
0,1, and 3
22
Headphone
Jack
Reset PB
SPDIF In
Phono
4M x 32
SDRAM
LEDs
(8)
5
DPI
Conn
DAI
Conn
RS
232
Conn
ADM3202
ELVIS
Conn
1
2
USB
Connector
Debug
Agent
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (Figure 2-1).
2-2ADSP-21369 EZ-KIT Lite Evaluation System Manual
Figure 2-1. System Architecture Block Diagram
The EZ-KIT Lite is designed to demonstrate the ADSP-21369 processor
capabilities. The processor core is powered at 1.3V, and the I/O is powered at 3.3V.
Page 37
ADSP-21369 EZ-KIT Lite Hardware Reference
The
CLKIN pin of the processor connects to a 24.576 MHz oscillator. The
core frequency of the processor is derived by multiplying the frequency at
the CLKIN pin by a value determined by the state of the processor pins
CLKCFG1 and CLKCFG0. The value at these pins is determined by the state of
switch SW2 state (see “Boot Mode and Clock Ratio Select Switch (SW2)”
on page 2-10). By default, the EZ-KIT Lite provides a core frequency of
393.216 MHz. It is possible to change the speed of the processor by
changing the value of the PMCTL register.
The SW2 switch also configures the boot mode of the processor. The
EZ-KIT Lite is capable of EPROM/flash boot and SPI boot. By default,
the EZ-KIT Lite boots from flash memory. For details, see “Boot Mode
and Clock Ratio Select Switch (SW2)” on page 2-10.
External Port
The external port of the ADSP-21369 processor consists of a 24-bit
address bus, 32-bit data memory bus, and control lines. The control lines
are used to select, read, and write to external memory devices.
The external port connects to an 8-bit parallel flash memory, an 8-bit
SRAM memory, and a 32-bit SDRAM memory. See “External Memory”
on page 1-7 for more information about accessing flash memory and
SDRAM memory.
All of the external port signals are available externally via the expansion
interface connectors (J1—3). The pinout of the connectors can be found in
“ADSP-21369 EZ-KIT Lite Schematic” on page B-1.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-3
The digital application interface (DAI) pins are connected to the signal
routing unit (SRU) of the processor. The SRU is a flexible routing system,
providing a large system of signal flows within the processor. In general,
the SRU allows to route the DAI pins to different internal peripherals in
various combinations.
The DAI pins are connected to the AD1835A audio codec, a 26-pin
header, two RCA connectors, audio oscillator output, an external phase
lock loop (PLL) circuit, two LEDs, and two push buttons. Figure 2-2 illustrates the EZ-KIT Lite’s connections to the DAI.
Figure 2-2. DAI Connections Block Diagram
2-4ADSP-21369 EZ-KIT Lite Evaluation System Manual
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ADSP-21369 EZ-KIT Lite Hardware Reference
DPI1 (MOSI)
DPI2 (MISO)
DPI3 (SPICLK)
DPI4 (SPI_AD1835CS)
DPI5 (SPI_FLASHCS)
DPI6 (LED1)
DPI7 (LED2)
DPI8 (LED3)
DPI13 (LED4)
DPI14 (LED5)
DPI9 (UART TX)
DPI10 (UART RX)
DPI12 (UART CTS)
DPI11 (UART RTS)
LED1
LED2
LED3
LED4
LED5
AD1835
SPI
FLASH
CLATCH
CCLK
COUT
CIN
CS/
SCK
SO
SI
ADSP-21369
T2IN
R2OUT
R1OUT
T1IN
T2OUT
R2IN
R1IN
T1OUT
ADM3202
To use the DAI for a different purpose, disable any signal driving the DAI
pin with a switch (see “Codec Setup Switch (SW3)” on page 2-11). In
addition,
SW3 enables flexible routing of the 12.288 MHz audio oscilla-
tor’s output signal. By default, the SW3 signal is used as the master clock
(MCLK) for the AD1835A codec.
All of the DAI signals are available externally via the expansion interface
connectors (J1—3) and 0.1” spaced header (P4). The pinout of the connectors can be found in “ADSP-21369 EZ-KIT Lite Schematic” on page B-1.
DPI Interface
The digital peripheral interface (DPI) pins are connected to a second signal routing unit of the processor (SRU2). The SRU2 unit, similar to the SRU,
is a flexible routing system, providing a large system of signal flows within
the processor. In general, the SRU2 can route the DPI pins to different
internal peripherals in various combinations.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-5
Figure 2-3. DPI Connections Block Diagram
Page 40
System Architecture
The DPI pins are connected to the SPI flash memory, SPI of the
AD1835A codec, a UART, a 20-pin header, and five LEDs. Figure 2-3
illustrates the EZ-KIT Lite’s connections to the DPI.
To use the DPI for a different purpose, disable any signal driving a DPI
pin with a switch (see “UART Enable Switch (SW5)” on page 2-12). Any
DPI pin connected to a LED can be used without having to disconnect
the pin. You can, however, see the respective LED turn
ON and OFF when
the signal is used elsewhere on the board.
All of the DPI signals are available externally via the expansion interface
connectors (J1—3) and 0.1” spaced header (P3). The pinout of the connectors can be found in “ADSP-21369 EZ-KIT Lite Schematic” on page B-1.
FLAG Pins
The processor has four general-purpose I/O flag pins. Table 2-1 describes
the flag pin connections.
Table 2-1. I/O FLAG Pins
Processor FLAG PinEZ-KIT Lite Function
FLAG0Push button (SW2) input
FLAG1Push button (SW2) input
FLAG2SDRAM chip select
FLAG3LED8
For information on how to disable a push button from driving its corresponding flag pin, see “Push Button Enable Switch (SW7)” on page 2-13.
FLAG signals are available externally via the expansion interface con-
The
nectors (
J1—3). The pinout of the connectors can be found in
“ADSP-21369 EZ-KIT Lite Schematic” on page B-1.
2-6ADSP-21369 EZ-KIT Lite Evaluation System Manual
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ADSP-21369 EZ-KIT Lite Hardware Reference
External PLL
The ADSP-21369 EZ-KIT Lite contains an external phase lock loop to
help generate a faster and more stable master input clock, MCLK. The PLL
uses DAI pin 3 as an input clock from the ADSP-21369 processor. The
new clock generated by PLL connects to the processor via DAI pin 2.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s external PLL.
Expansion Interface
The expansion interface consists of three 90-pin connectors. Table 2-2
shows the interfaces each connector provides. For the exact pinout of the
connectors, refer to “ADSP-21369 EZ-KIT Lite Schematic” on page B-1.
The mechanical dimensions of the connectors can be obtained from Tech-
nical or Customer Support.
Table 2-2. Expansion Interface Connectors
ConnectorInterfaces
J15V, ADDR23–0, DATA31–0
J23.3V, FLAG3–0, DAIP20–1, DPI14–1, SDRAM control signals
J35V, 3.3V, reset, parallel port control signals
Limits to the current and interface speed must be taken into consideration
when using the expansion interface. The maximum current limit is dependent on the capabilities of the used regulator. Additional circuitry also can
add extra loading to signals, decreasing their maximum effective speed.
[
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-7
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
Page 42
System Architecture
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the internal and
external memory of the processor through a 6-pin interface. The JTAG
emulation port of the processor also connects to the USB debugging interface. When an emulator connects to the board at ZP4, the USB debugging
interface is disabled. This is not a standard connection of the JTAG
interface.
For information about the standard connection of the interface, see EE-68
published on the Analog Devices Web site. For more information about
the JTAG connector, see “JTAG Header (ZP4)” on page 2-25. To learn
more about available SHARC emulators, go to Analog Devices Web site:
2-8ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 43
ADSP-21369 EZ-KIT Lite Hardware Reference
Switches
This section describes operation of the on-board switches. The switch
locations and default settings are shown in Figure 2-4.
Figure 2-4. Switch Locations and Default Settings
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-9
Page 44
Switches
Boot Mode and Clock Ratio Select Switch (SW2)
The SW2 switch sets the boot mode and clock multiplier ratio of the processor. Table 2-3 shows how to set up the boot mode using SW2
positions 1 and 2. By default, the EZ-KIT Lite boots in external port
mode from flash memory.
Table 2-4 shows how to set up the clock multiply ratio using SW2
positions 3 and 4. By default, the processor increases the clock multiply
ratio by sixteen, setting the core clock to 393.216 MHz.
Table 2-4. Core Clock Rate Configuration
CLKCFG0 (Position 3)CLKCFG1 (Position 4)Core to CLKIN Ratio
ON ON6:1
ONOFF16:1 (default)
OFFON32:1
OFF
OFFReserved
The core clock frequency can be increased or decreased via software by
writing to the PMCTL register. For more information on changing the core
clock frequency and other setup information, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).
2-10ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 45
ADSP-21369 EZ-KIT Lite Hardware Reference
ADSP-21369 ProcessorAD1835A Codec
DAI_P6
DAI_P17
MCLK
12.288 MHz
OSC
SW3.1
SW3.2
Codec Setup Switch (SW3)
The codec setup switch (SW3) can be used to change the routing of some
signals going to the AD1835A codec and to set up the communication
protocol of the codec.
SW3 positions 1 and 2 determine the clock routing for the audio oscillator
to the codec and to the processor. Figure 2-5 illustrates how the switch
positions 1 and 2 connect on the board. In the default position, route the
DAI_P17 pin to DAI_P6 (in software) to clock the AD1835A codec.
Figure 2-5. Audio Clock Routing
SW3 position 3 determines if the AD1835A device is a master or a slave. If
the AD1835A is a master, the device’s serial interface generates the frame
sync and clock signals necessary to transfer data. When the device is a
slave, the processor must generate the frame sync and clock signals. By
default, position 3 is
ON, and the AD1835A codec generates the control
signals.
SW3 position 4 disconnects the AD1835A codec’s ADC_DATA pin from the
DAI. This is useful when the DAI is connected to another device.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-11
Page 46
Switches
Electret Microphone Select Switch (SW4)
To connect an electret microphone to audio input, place all positions of
SW4 ON. The default switch position is all OFF. When SW4 is all ON, a DC
offset of 2.5V is added to the signal, and gain of the input amplifiers is
changed from 1x to 10x.
UART Enable Switch (SW5)
The UART enable switch (SW5) disconnects the UART signals from the
DPI pins of the processor. When SW5 is OFF, its associated DPI signal (see
Table 2-5) can be used on the expansion interface.
Table 2-5. UART Enable Switch (SW5)
Switch PositionEZ-KIT Lite SignalProcessor Signal
1 (OFF
1
)
CTSDPI12
2 (ON)RXDPI10
3 (OFF)RTSDPI11
4 (ON)T2IN tied to R2OUTN/A
1 Bold typeface denotes the default setting.
Loopback Test Switches (SW6 and SW14)
The loopback test switch (SW6) is located at the top left side of the board.
The second loopback test switch,
the board. These switches are used for testing only; all switch positions
should remain
OFF.
2-12ADSP-21369 EZ-KIT Lite Evaluation System Manual
SW14, is located at the top right side of
Page 47
ADSP-21369 EZ-KIT Lite Hardware Reference
Push Button Enable Switch (SW7)
The push button enable switch (SW7) disconnects the push buttons from
the respective processor pins. This allows the signals to be used elsewhere
on the board. Table 2-6 shows switch SW7 connections. By default, all
positions of SW7 are ON, and the push buttons function as designed.
The SPI interface switch (SW15) disables the SPI chip select lines connected to SPI flash memory and AD1835A audio codec. The switch allows
you to re-use the same pins on the SPI interface and expansion interface.
By default, SW15 positions 1–3 are ON and position 4 is OFF unless any of
the SPI interface signals are used on the expansion connector or via an
EZ-Extender®.
ELVIS Oscilloscope Configuration Switch (SW1)
The oscilloscope configuration switch (SW1) determines which audio circuit signals connect to channels A and B of the oscilloscope. The switch is
used only when the board is connected to the Educational Laboratory Virtual Instrumentation Suite (ELVIS) station (see “ELVIS Interface” on
page 1-9). Each channel must have only one signal selected at a time, as
described in Table 2-7.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-13
ELVIS Function Generator Configuration Switch
(SW13)
The function generator configuration switch (SW13) controls which signals
connect to the left and right input signals of the audio interface. The SW13
switch is used only when the board is connected to the ELVIS station (see
“ELVIS Interface” on page 1-9). Each channel must have only one signal
selected at a time, as described in Table 2-8.
Table 2-8. ELVIS Function Generator Configuration Switch (SW13)
ChannelSwitch PositionAudio Signal
AMP_LEFT_IN
AMP_RIGHT_IN2 (ON)RIGHT_IN
AMP_LEFT_IN3 (OFF)DAC0
AMP_RIGHT_IN4 (OFF)DAC1
1 (ON1)
2-14ADSP-21369 EZ-KIT Lite Evaluation System Manual
LEFT_IN
Page 49
ADSP-21369 EZ-KIT Lite Hardware Reference
Table 2-8. ELVIS Function Generator Configuration Switch (SW13)
ChannelSwitch PositionAudio Signal
AMP_LEFT_IN5 (OFF)FUNCT_OUT
AMP_RIGHT_IN6 (OFF)FUNCT_OUT
1 Bold typeface denotes the default settings.
LEDs and Push Buttons
This section describes the on-board LEDs and push buttons. The LED
and push button locations are shown in Figure 2-6.
Figure 2-6. LED and Push Button Locations
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-15
Page 50
LEDs and Push Buttons
General Purpose LEDs (LED1–8)
There are eight general-purpose LEDs on the board. Five LEDs are connected to the DPI interface, two LEDs are connected to the DAI interface,
and one LED is connected to FLAG3 of the processor. “LEDs and Push
Buttons” on page 1-12 summarizes the LED connections. To use an LED
connected to the DAI or DPI, program its respective register on the processor. For more information on how to program the registers, refer to the
ADSP-21368 SHARC Processor Hardware Reference (includes
ADSP-21369).
Power LED (LED9)
When LED9 is lit (green), it indicates that power is being supplied to the
board properly.
Reset LEDs (LED10)
When LED10 is lit (red), a master reset of all the major ICs is active.
USB Monitor LED (ZLED3)
The USB monitor LED (ZLED3) indicates that USB communication has
been initialized successfully, and you can connect to the processor using a
VisualDSP++ EZ-KIT Lite session. Once the USB cable is plugged into
the board, it takes approximately 15 seconds for the USB monitor LED to
light. If the LED does not light, try cycling power on the board and/or
reinstalling the USB driver (see the VisualDSP++ Installation Quick Refer-ence Card).
L
2-16ADSP-21369 EZ-KIT Lite Evaluation System Manual
When VisualDSP++ is actively communicating with the EZ-KIT
Lite target board, the LED can flicker, indicating communications
handshake.
Page 51
ADSP-21369 EZ-KIT Lite Hardware Reference
Push Buttons (SW8–11)
Four push buttons (SW8—11) are provided for general-purpose user input.
Two push buttons are connected to the FLAG pins of the processor, while
the other two are connected to the DAI of the processor. The push buttons are active high and, when pressed, send a high (1) to the processor.
Refer to “LEDs and Push Buttons” on page 1-12 for more information.
The push button enable switch (SW7) is capable of disconnecting the push
buttons from the corresponding processor pins. Refer to “Push Button
Enable Switch (SW7)” on page 2-13 for more information.
The push buttons and corresponding processor signals are summarized in
The RESET push button (SW12) resets all of the ICs on the board. The only
exception is the USB interface chip (
push button is pressed after the USB cable has been plugged in and communication initialized correctly with the PC. After USB communication
has been initialized, the only way to reset the USB is by powering down
the board.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-17
U4). The chip is not reset when the
Page 52
Jumpers
Jumpers
This section describes functionality of the configuration jumpers. The
jumper locations are shown in Figure 2-7.
Figure 2-7. Jumper Locations
2-18ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 53
ADSP-21369 EZ-KIT Lite Hardware Reference
VCO Select Jumper (JP1)
The voltage-controlled oscillator (VCO) select jumper (JP1) configures
the frequency selection of the on-board external PLL (U39). When JP1 is
installed, the VCO output frequency is multiplied by a factor of 1.0. Conversely, when uninstalled, the VCO output frequency is multiplied by a
factor of 0.5 or divided in half. The jumper settings are shown in
Table 2-10.
Table 2-10. VCO Select Jumper (JP1)
JP1 SettingMode
OFFVCO output frequency x ½ (default)
ONVCO output frequency x 1.0
ELVIS Select Jumper (JP2)
TheELVIS select jumper (JP2) configures the EZ-KIT Lite’s connection
to an ELVIS station (see “ELVIS Interface” on page 1-9). When JP2 is
installed, the connections to the push buttons and LED are re-directed to
the ELVIS station instead of the processor. The jumper settings are shown
in Table 2-11.
Table 2-11. ELVIS Select Jumper (JP2)
JP2 SettingMode
OFFNot connected to an ELVIS station (default)
ONConnected to an ELVIS station
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-19
Page 54
Jumpers
ELVIS Voltage Selection Jumper (JP3)
The ELVIS voltage selection jumper (JP3) is used to select the power
source for the EZ-KIT Lite. In a standard mode of operation, the board
receives its power from an external power supply. When JP3 is installed,
the board is powered from an ELVIS station, and no external power supply is required. The jumper settings are shown in Table 2-12.
Table 2-12. ELVIS Voltage Selection Jumper (JP3)
JP3 SettingMode
OFFPowered from an external power supply (default)
ONPowered from an ELVIS station
[
when JP3 is installed to avoid potential damage to the EZ-KIT Lite
board and ELVIS unit.
ELVIS Programmable Flag Jumper (JP4)
The ELVIS programmable flag jumper (JP4) connects the ADSP-21369
processor’s DAI4 pin to the ELVIS trigger pin. When JP4 is installed, DAI4
connects to the ELVIS TRIG1_2 pin directly. Conversely, when JP4 is
The external power supply must be disconnected from the board
uninstalled,
operation. The jumper settings are shown in Table 2-13.
Table 2-13. ELVIS Select Jumper (JP4)
JP4 SettingMode
OFFDAI4 disconnected from the ELVIS TRIG pin (default)
ONDAI4 connected to the ELVIS TRIG pin
DAIP4 is disconnected and can be used for another non-ELVIS
2-20ADSP-21369 EZ-KIT Lite Evaluation System Manual
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ADSP-21369 EZ-KIT Lite Hardware Reference
Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in
Figure 2-8.
Figure 2-8. Connector Locations
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-21
Page 56
Connectors
Expansion Interface Connectors (J1–3)
Three board-to-board connectors (J1—3) provide signals for most peripheral interfaces of the processor. The connectors are located at the bottom
of the board. For more information about the expansion interface, see
“Expansion Interface” on page 2-7. For the connectors availability and
The power connector (J4) provides all of the power necessary to operate
the EZ-KIT Lite board.
Part DescriptionManufacturerPart Number
2.5 mm power jackSWITCHCRAFT
DIGI-KEY
Mating Power Supply (shipped with EZ-KIT Lite)
7V power supplyCUI INC.DMS070214-P6P-SZ
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-23
RAPC712X-ND
Page 58
Connectors
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-14 shows the power supply specifications.
Table 2-14. Power Supply Specifications
TerminalConnection
Center pin+7 VDC@2.14A
Outer ringGND
RS-232 Connector (J6)
Part DescriptionManufacturerPart Number
DB9, female, right angleAMP/TYCO5745781-4
Mating Cable
Cable DB9M to DB9F 6 feetDIGI-KEY45-0308-0000-ND
S/PDIF Coax Connectors (J7 and J8)
Part DescriptionManufacturerPart Number
Coaxial SWITCHCRAFTPJRAN1X1U01
Mating Cable
Two-channel RCA interconnect
cable
MONSTER CABLEBI100-1M
DPI Header (P3)
The DPI connector (P3) provides access to all of the DPI signals in the
from of a .1” spacing header. When using the header to access the DPI
pins of the processor, ensure that signals, which normally drive the DPI
pins, are disabled. For more information, see “DPI Interface” on page 2-5.
2-24ADSP-21369 EZ-KIT Lite Evaluation System Manual
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ADSP-21369 EZ-KIT Lite Hardware Reference
Part DescriptionManufacturerPart Number
20-pin IDC headerFCI68737-420HLF
DAI Header (P4)
The DAI connector (P4) provides access to all of the DAI signals in the
from of a .1” spacing header. When using the header to access the DAI
pins of the processor, ensure that signals, which normally drive the DAI
pins, are disabled. Refer to “Codec Setup Switch (SW3)” on page 2-11 for
more information on how to disable signals already being driven from
elsewhere on the EZ-KIT Lite.
Part DescriptionManufacturerPart Number
26-pin IDC header BERG4102-T08-13LF
JTAG Header (ZP4)
The JTAG header (ZP4) is the connecting point for a JTAG in-circuit
emulator pod. When an emulator connects to the JTAG header, the USB
debug interface is disabled.
L
L
Part DescriptionManufacturerPart Number
14-pin IDC headerFCI68737-414HLF
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-25
Pin 3 is missing to provide keying. Pin 3 in the mating connector
should have a plug.
When using an emulator with the EZ-KIT Lite board, follow the
connection instructions provided with the emulator.
Page 60
Connectors
2-26ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 61
AADSP-21369 EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-21369 EZ-KIT Lite Sche-
matic” on page B-1.
Ref.Qty. DescriptionReference DesignatorManufacturerPart Number
1174LVC14A
SOIC14
21IDT74FCT3244
APY SSOP20
3112.288MHZ
OSC003
41LT1765 SOIC8VR1LINEAR
51MT48LC4M32B
2 TSOP86
61GTL2002
TSSOP8
71IS61LV5128AL
TSOP44
82SN74LVC1G08
SOT23-5
91TLC2932
TSSOP14
10124.576MHZ
OSC003
U40TI 74LVC14AD
U37IDTIDT74FCT3244APYG
U1EPSONSG-8002CA MP
TECH
U36DIGI-KEY557-1196-1-ND
U39PHILIPSGTL2002DP-T
U30ISSIIS61LV5128AL-10TLI
U16,U18TISN74LVC1G08DBVR
U38TITLC2932IPWG4
U28EPSONSG-8002CA MP
LT1765ES8#PBF
ADSP-21369 EZ-KIT Lite Evaluation System ManualA-1
Page 62
Ref.Qty. DescriptionReference DesignatorManufacturerPart Number
11121369
AM29LV081B
"U35"
121SN65LVDS2D
SOIC8
131FDC658P
SOT23-6
14121369 M25P20
“U29”
151SI7601DN
ICS010
161ADM708SARZ
SOIC8
171AD8532ARZ
SOIC8
182ADP3336ARMZ
MSOP8
191ADM3202ARN
Z SOIC16
208AD8606ARZ
SOIC8
U35ANDAM29LV081-120ED
U2NATIONAL
SEMI
U3FAIRCHILDFDC658P
U29ST MICROM25P20-VMN6TP
U45VISHAYSI7601DN
U23ANALOG
DEVICES
U19ANALOG
DEVICES
VR3-4ANALOG
DEVICES
U32ANALOG
DEVICES
U8-15ANALOG
DEVICES
DS90LV018ATM
ADM708SARZ
AD8532ARZ
ADP3336ARMZ-REEL7
ADM3202ARNZ
AD8606ARZ
211AD1835AASZ
MQFP52
222AD623ARMZ
USOIC8
232AD820ARZ
SOIC8
241ADSP-21369
SBGA256
252ADG774ABRQ
ZQSOP16
U31ANALOG
DEVICES
U5-6ANALOG
DEVICES
U33-34ANALOG
DEVICES
U44ANALOG
DEVICES
U24-25ANALOG
DEVICES
AD1835AASZ
AD623ARMZ
AD820ARZ
ADSP-21369KBPZ-3A
ADG774ABRQZ
A-2ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 63
ADSP-21369 EZ-KIT Lite Bill Of Materials
Ref.Qty. DescriptionReference DesignatorManufacturerPart Number
262ADP1864AUJZ
SOT23-6
275RUBBER FOOT M1-5MOUSER517-SJ-5018BK
281PWR
2.5MM_JACK
CON005
291RCA 4X2
CON011
302RCA 1X1
CON012
315MOMENTARY
SWT013
323.05 45X2
CON019
332DIP8 SWT016SW1,SW14C&KTDA08H0SB1
341DIP6 SWT017SW13CTS218-6LPST
357DIP4 SWT018SW2-7,SW15ITTTDA04HOSB1
361DB9 9PIN
DB9F
371RCA RCA_1X2
CON031
VR2,VR5ANALOG
DEVICES
J4SWITCH-
CRAFT
J5SWITCH-
CRAFT
J7-8SWITCH-
CRAFT
SW8-12PANASONICEVQ-PAD04M
J1-3SAMTECSFC-145-T2-F-D-A
J6TYCO5747844-4
J10SWITCH-
CRAFT
ADP1864AUJZ-R7
RAPC712X
PJRAS4X2U01X
PJRAN1X1U01X
PJRAS1X2S02X
384IDC 2X1
IDC2X1
391IDC 10X2
IDC10X2
401IDC 2X2
IDC2X2
4113.5MM
STEREO_JACK
CON001
JP1-4FCI90726-402HLF
P3BURG-FCI54102-T08-10LF
P11FCI68737-404HLF
J9DIGI-KEYCP1-3525NG-ND
ADSP-21369 EZ-KIT Lite Evaluation System ManualA-3
Page 64
Ref.Qty. DescriptionReference DesignatorManufacturerPart Number