Datasheet ADSP-21369 Datasheet (ANALOG DEVICES)

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ADSP-21369 EZ-KIT Lite
®
Evaluation System Manual
Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106
Revision 2.2, September 2009
Part Number
82-000196-01
a
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Copyright Information
© 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu­ment may not be reproduced in any form without prior, express written consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by impli­cation or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, SHARC, EZ-KIT Lite, and EZ-Extender are registered trademarks of Analog Devices, Inc.
EZ-Board is a trademark of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of their respective owners.
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Regulatory Compliance
The ADSP-21369 EZ-KIT Lite is designed to be used solely in a labora­tory environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in close proximity. This board should not be used in or near any medical equipment or RF devices.
The ADSP-21369 EZ-KIT Lite has been certified to comply with the essential requirements of the European EMC directive 2004/108/EC and therefore carries the “CE” mark.
The ADSP-21369 EZ-KIT Lite has been appended to Analog Devices, Inc. EMC Technical File (EMC TF) referenced DSPTOOLS1, issue 2 dated June 4, 2008 and was declared CE compliant by an appointed Notified Body (No.0673) as listed below.
Notified Body Statement of Compliance: Z600ANA1.025 dated December 19, 2005
Issued by: Technology International (Europe) Limited
60 Shrivenham Hundred Business Park Shrivenham, Swindon, SN6 8TY, UK
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.
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CONTENTS

PREFACE
Product Overview ............................................................................ x
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents ........................................................................... xiv
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ....................................................... xv
Supported Processors ....................................................................... xv
Product Information ...................................................................... xvi
Analog Devices Web Site .......................................................... xvi
VisualDSP++ Online Documentation ...................................... xvii
Technical Library CD .............................................................. xvii
Related Documents ...................................................................... xviii
Notation Conventions .................................................................... xix
USING ADSP-21369 EZ-KIT LITE
Package Contents .......................................................................... 1-2
Default Configuration ................................................................... 1-3
Installation and Session Startup ..................................................... 1-5
ADSP-21369 EZ-KIT Lite Evaluation System Manual v
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CONTENTS
Evaluation License Restrictions ..................................................... 1-7
External Memory .......................................................................... 1-7
ELVIS Interface ............................................................................ 1-9
Analog Audio ............................................................................. 1-10
LEDs and Push Buttons .............................................................. 1-12
Example Programs ...................................................................... 1-13
Background Telemetry Channel .................................................. 1-13
Reference Design Information ..................................................... 1-14
ADSP-21369 EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
External Port ........................................................................... 2-3
DAI Interface .......................................................................... 2-4
DPI Interface .......................................................................... 2-5
FLAG Pins .............................................................................. 2-6
External PLL ........................................................................... 2-7
Expansion Interface ................................................................. 2-7
JTAG Emulation Port ............................................................. 2-8
Switches ....................................................................................... 2-9
Boot Mode and Clock Ratio Select Switch (SW2) .................. 2-10
Codec Setup Switch (SW3) ................................................... 2-11
Electret Microphone Select Switch (SW4) .............................. 2-12
UART Enable Switch (SW5) ................................................. 2-12
Loopback Test Switches (SW6 and SW14) ............................. 2-12
Push Button Enable Switch (SW7) ........................................ 2-13
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CONTENTS
SPI Disable Switch (SW15) ................................................... 2-13
ELVIS Oscilloscope Configuration Switch (SW1) ................... 2-13
ELVIS Function Generator Configuration Switch (SW13) ...... 2-14
LEDs and Push Buttons .............................................................. 2-15
General Purpose LEDs (LED1–8) .......................................... 2-16
Power LED (LED9) ............................................................... 2-16
Reset LEDs (LED10) ............................................................. 2-16
USB Monitor LED (ZLED3) ................................................. 2-16
Push Buttons (SW8–11) ........................................................ 2-17
Board Reset Push Button (SW12) .......................................... 2-17
Jumpers ...................................................................................... 2-18
VCO Select Jumper (JP1) ...................................................... 2-19
ELVIS Select Jumper (JP2) .................................................... 2-19
ELVIS Voltage Selection Jumper (JP3) ................................... 2-20
ELVIS Programmable Flag Jumper (JP4) ................................ 2-20
Connectors ................................................................................. 2-21
Expansion Interface Connectors (J1–3) .................................. 2-22
Audio In RCA Connector (J10) ............................................. 2-23
Audio Out RCA Connector (J5) ............................................ 2-23
Headphone Out Jack (J9) ...................................................... 2-23
Power Jack (J4) ...................................................................... 2-23
RS-232 Connector (J6) .......................................................... 2-24
S/PDIF Coax Connectors (J7 and J8) .................................... 2-24
DPI Header (P3) ................................................................... 2-24
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CONTENTS
DAI Header (P4) .................................................................. 2-25
JTAG Header (ZP4) .............................................................. 2-25
ADSP-21369 EZ-KIT LITE BILL OF MATERIALS
ADSP-21369 EZ-KIT LITE SCHEMATIC
Title Page ..................................................................................... B-1
ADSP-21369 Processor ................................................................. B-2
ADSP-21369 Processor 2 .............................................................. B-3
Memory ....................................................................................... B-4
Analog Audio ............................................................................... B-5
Audio Out 1 ................................................................................. B-6
Audio Out 2 ................................................................................. B-7
Audio In and Headphone Out ...................................................... B-8
External PLL, S/PDIF, and RS-232 ............................................... B-9
ELVIS Interface .......................................................................... B-10
Push Buttons, LEDs, and RESET ............................................... B-11
Expansion Interface .................................................................... B-12
Power ......................................................................................... B-13
INDEX
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PREFACE

Thank you for purchasing the ADSP-21369 EZ-KIT Lite®, Analog Devices, Inc. evaluation system for SHARC® processors.
SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large on-chip, dual-ported SRAM blocks coupled with a sophisticated I/O processor, which gives a SHARC processor the bandwidth for sustained high-speed computations. SHARC processors represents today’s de facto standard for floating-point processing, targeted toward premium audio applications.
The evaluation system is designed to be used in conjunction with the VisualDSP++® development environment to test capabilities of the ADSP-21369 SHARC processors. The VisualDSP++ development envi­ronment aides advanced application code development and debug, such as:
Create, compile, assemble, and link application programs written in C++, C, and ADSP-21369 assembly
Load, run, step, halt, and set breakpoints in application programs
Read and write data and program memory
Read and write core and peripheral registers
Plot memory
Access to the ADSP-21369 processor from a personal computer (PC) is achieved through a USB port or an external JTAG emulator. The USB interface provides unrestricted access to the ADSP-21369 processor and
ADSP-21369 EZ-KIT Lite Evaluation System Manual ix
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Product Overview

evaluation board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emulation products. To learn more about Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools/.
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The ADSP-21369 EZ-KIT Lite provides example programs to demon­strate the product capabilities.
The ADSP-21369 EZ-KIT Lite installation is part of the Visu­alDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. For details about evaluation license restrictions after the 90 days, refer to “Evaluation License Restrictions” on page 1-7 and the Visu- alDSP++ Installation Quick Reference Card.
Product Overview
The board features:
Analog Devices ADSP-21369 SHARC processor
D 256-pin SBGA package
D 400 MHz core clock speed
Synchronous dynamic random access memory (SDRAM)
D 1M x 32-bit x 4 banks
Synchronous random access memory (SRAM)
D 512 Kbit x 8-bit
Flash memory
D 1M x 8-bit
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Serial peripheral interface (SPI) flash memory
D 2Mbit
Analog audio interface
D AD1835A codec
D 4 x 2 RCA phono jack for 4 channels of stereo output
D 2 x 1 RCA phono jack for 1 channel of stereo input
D 3.5 mm headphone jack for 1 channel stereo output
Digital audio interface
D RCA phono jack output
D RCA phono jack input
Universal asynchronous receiver/transmitter (UART)
Preface
D ADM3202 RS-232 driver/receiver
D DB9 female connector
National Instruments Educational Laboratory Virtual Instrumen­tation Suite (ELVIS) Interface
D LabVIEW™-based virtual instruments
D Multifunction data acquisition device
D Bench-top workstation and prototype board
•LEDs
D Eleven LEDs: one power (green), one board reset (red), one
USB monitor (amber), and eight general-purpose (amber)
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Product Overview
Push buttons
D Five push buttons: one reset, two connected to DAI, and
two connected to the FLAG pins of the processor
Expansion interface (Type A)
D Parallel port, FLAG pins, DPI, DAI
Other features
D JTAG ICE 14-pin header
D Test points for processor current measurement
D DPI header
D DAI header
The EZ-KIT Lite board has a total of 1 MB of parallel flash memory and 2 Mbit of SPI flash memory. Flash memories can store user-specific boot code and allow the board to run as a stand-alone unit. For more informa­tion, see “External Memory” on page 1-7 and “Boot Mode and Clock
Ratio Select Switch (SW2)” on page 2-10. The board also has 512 KB of
SRAM and 16 MB of SDRAM, which can be used at runtime.
The DAI port of the processor is connected to the AD1835A audio codec, Sony/Philips Digital Interface (S/PDIF), and an external phase lock loop (PLL). The DAI interface facilitates development of digital and analog audio signal-processing applications. See “Analog Audio” on page 1-10 and “S/PDIF Coax Connectors (J7 and J8)” on page 2-24 for more information.
The DPI port of the processor is connected to the UART and SPI inter­faces. The UART interface can connect to a standard RS-232 connector, while the SPI connects to 2 Mbit of serial flash memory.
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Preface
Additionally, the EZ-KIT Lite board provides access to all of the proces­sor’s peripheral ports. Access is provided in the form of a three-connector expansion interface. See “Expansion Interface” on page 2-7 for details.

Purpose of This Manual

The ADSP-21369 EZ-KIT Lite Evaluation System Manual provides instructions for installing the product hardware (board). The text describes operation and configuration of the board components and pro­vides guidelines for running your own code on the ADSP-21369 EZ-KIT Lite. Finally, a schematic and a bill of materials are provided for reference.
The product software component is detailed in the VisualDSP++ Installa- tion Quick Reference Card.

Intended Audience

The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts (such as the ADSP-2136x SHARC Processor Programming Reference and ADSP-21368 SHARC Processor Hardware Reference) that describe your tar­get architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the VisualDSP++ online Help and user’s or getting started guides. For the locations of these documents, see “Related Documents”.
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Manual Contents

Manual Contents
The manual consists of:
Chapter 1, “Using ADSP-21369 EZ-KIT Lite” on page 1-1 Describes EZ-KIT Lite operation from a programmer’s perspective and provides an easy-to-access memory map.
Chapter 2, “ADSP-21369 EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the EZ-KIT Lite hardware components
Appendix A, “ADSP-21369 EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT Lite board.
Appendix B, “ADSP-21369 EZ-KIT Lite Schematic” on page B-1 Provides the resources to allow board-level debugging or to use as a reference guide. Appendix B is part of the online Help.

What’s New in This Manual

The ADSP-21369 EZ-KIT Lite Evaluation System Manual has been updated to reflect the latest board revision. In addition, modifications and corrections based on errata reports against the previous manual revision have been made.
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Technical or Customer Support

You can reach Analog Devices, Inc. Customer Support in the following ways:
Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
E-mail tools questions to
processor.tools.support@analog.com
E-mail processor questions to
processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)
Phone questions to 1-800-ANALOGD
Preface
Contact your Analog Devices, Inc. local sales office or authorized distributor
Send questions by mail to:
Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA

Supported Processors

The ADSP-21369 EZ-KIT Lite evaluation system supports Analog Devices ADSP-21369 SHARC processors.
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Product Information

Product Information
Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD.

Analog Devices Web Site

The Analog Devices Web site, www.analog.com, provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a link to the previous revisions of the manuals. When locating your manual title, note a possible errata check mark next to the title that leads to the current correction report against the manual.
Also note, MyAnalog.com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest infor­mation about products you are interested in. You can choose to receive weekly e-mail notifications containing updates to the Web pages that meet your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
MyAnalog.com to sign up. If you are a registered user, just log on.
Visit Your user name is your e-mail address.
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Preface

VisualDSP++ Online Documentation

Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documenta­tion. You can search easily across the entire VisualDSP++ documentation set for any topic of interest.
For easy printing, supplementary Portable Documentation Format (.pdf) files for all manuals are provided on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
File Description
.chm Help system files and manuals in Microsoft help format
.htm or .html
.pdf VisualDSP++ and processor manuals in PDF format. Viewing and printing the
Dinkum Abridged C++ library and FLEXnet License Tools software documenta­tion. Viewing and printing the .html files requires a browser, such as Internet Explorer 6.0 (or higher).
.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).

Technical Library CD

The technical library CD contains seminar materials, product highlights, a selection guide, and documentation files of processor manuals, Visu­alDSP++ software manuals, and hardware tools manuals for the following processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and ADSP-219x.
To order the technical library CD, go to http://www.analog.com/proces-
sors/technical_library
processor, click the request CD check mark, and fill out the order form.
, navigate to the manuals page for your
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Related Documents

Data sheets, which can be downloaded from the Analog Devices Web site, change rapidly, and therefore are not included on the technical library CD. Technical manuals change periodically. Check the Web site for the latest manual revisions and associated documentation errata.
Related Documents
For information on product related development software and hardware, see these publications:

Table 1. Related Processor Publications

Title Description
ADSP-21367/ADSP-21368/ADSP-21369
SHARC Processors Data Sheet
ADSP-21368 SHARC Processor Hardware Refer­ence (Includes ADSP-21367, ADSP-21368, ADSP-21369, ADSP-21371, ADSP-21375)
ADSP-2136x SHARC Processor Programming Reference
General functional description, pinout, and timing of the processor
Description of the internal processor architec­ture, registers, and all peripheral functions
Description of all allowed processor assembly instructions

Table 2. Related VisualDSP++ Publications

VisualDSP++ User’s Guide Detailed description of the VisualDSP++ fea-
tures and usage
VisualDSP++ Assembler and Preprocessor Man­ual
VisualDSP++ C/C++ Complier Manual for SHARC Processors
VisualDSP++ Run-Time Library Manual for SHARC Processors
Description of the assembler function and commands
Description of the complier function and com­mands for SHARC processors
Description of the run-time library functions for SHARC processors
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Table 2. Related VisualDSP++ Publications (Cont’d)
VisualDSP++ Linker and Utilities Manual Description of the linker function and com-
mands
VisualDSP++ Loader and Utilities Manual Description of the loader function and com-
mands

Notation Conventions

Text conventions used in this manual are identified and described as follows.
Example Description
Preface
Close command (File menu)
{this | that} Alternative required items in syntax descriptions appear within curly
[this | that] Optional items in syntax descriptions appear within brackets and sepa-
[this,…] Optional item lists in syntax descriptions appear within brackets
.SECTION Commands, directives, keywords, and feature names are in text with
filename Non-keyword placeholders appear in text with italic style format.
Titles in reference sections indicate the location of an item within the VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu).
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
rated by vertical bars; read the example as an optional this or that.
delimited by commas and terminated with an ellipse; read the example as an optional comma-separated list of
letter gothic font.
this.
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Notation Conventions
L
a
[
Example Description
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ... Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol.
Warn in g: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Wa rn in g appears instead of this symbol.
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1 USING ADSP-21369 EZ-KIT
LITE
This chapter provides information to assist you with development of pro­grams for the ADSP-21369 EZ-KIT Lite evaluation system.
The information appears in the following sections.
“Package Contents” on page 1-2 Lists the items contained in your EZ-KIT Lite package.
“Default Configuration” on page 1-3 Shows the default configuration of the EZ-KIT Lite board.
“Installation and Session Startup” on page 1-5 Instructs how to start a new or open an existing EZ-KIT Lite ses­sion using VisualDSP++.
“Evaluation License Restrictions” on page 1-7 Describes the VisualDSP++ license restrictions; the Visual DSP++ licence is shipped with the EZ-KIT Lite.
“External Memory” on page 1-7 Describes the memory map of the EZ-KIT Lite; describes how to access external memory.
“ELVIS Interface” on page 1-9 Describes the on-board National Instruments Educational Labora­tory Virtual Instrumentation Suite (NI ELVIS) interface.
“Analog Audio” on page 1-10· Describes how to set up and communicate with the on-board audio codec.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 1-1
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Package Contents

“LEDs and Push Buttons” on page 1-12 Describes the board’s general-purpose I/O pins and buttons.
“Example Programs” on page 1-13 Provides information about example programs included in the evaluation system.
“Background Telemetry Channel” on page 1-13 Highlights the advantages of the Background Telemetry Channel feature of VisualDSP++.
“Reference Design Information” on page 1-14 Highlights the available technical resources for the design, layout, fabrication, and assembly of the EZ-KIT Lite.
For information on the graphical user interface, including the boot load­ing, target options, and other facilities of the EZ-KIT Lite system, refer to the online Help.
For detailed information on how to program the ADSP-21369 SHARC processor, refer to the documents referenced in “Related Documents”.
Package Contents
Your ADSP-21369 EZ-KIT Lite evaluation system package contains the following items.
ADSP-21369 EZ-KIT Lite board
VisualDSP++ Installation Quick Reference Card
CD containing:
D VisualDSP++ software
D ADSP-21369 EZ-KIT Lite debug software
D USB driver files
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Using ADSP-21369 EZ-KIT Lite
D Example programs
D ADSP-21369 EZ-KIT Lite Evaluation System Manual (this
document)
Universal 7V DC power supply
USB 2.0 cable
3.5 mm stereo headphones
6-foot RCA audio cable
6-foot 3.5 mm/RCA x 2 Y-cable
If any item is missing, contact the vendor where you purchased your EZ-KIT Lite or contact Analog Devices, Inc.

Default Configuration

The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.
The ADSP-21369 EZ-KIT Lite board is designed to run outside your per­sonal computer as a stand-alone unit. You do not have to open your computer case.
When removing the EZ-KIT Lite board from the package, handle the board carefully to avoid the discharge of static electricity, which may dam­age some components.
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Default Configuration
To connect the EZ-KIT Lite board:
1. Remove the EZ-KIT Lite board from the package. Be careful when handling the board to avoid the discharge of static electricity, which may damage some components.
2. Figure 1-1 shows the default jumper settings, DIP switch, connec­tor locations, and LEDs used in installation. Confirm that your board is set up in the default configuration before continuing.

Figure 1-1. EZ-KIT Lite Hardware Setup

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Using ADSP-21369 EZ-KIT Lite
3. Plug the provided power supply into Visually verify that the green power LED (LED9) is on. Also verify that the red reset LED (LED10) goes on for a moment and then goes off, and, finally, LED1 through LED8 are sequentially blinking.
4. Connect one end of the USB cable to an available full speed USB port on your PC and the other end to ZJ1 on the ADSP-21369 EZ-KIT Lite board.
J4 on the EZ-KIT Lite board.

Installation and Session Startup

L
For correct operation, install the software and hardware in the order presented in the VisualDSP++ Installation Quick Reference Card.
1. Verify that the yellow USB monitor LED (ZLED3, located near the USB connector) is lit. This signifies that the board is communicat­ing properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the VisualDSP++ environment via the Start –> Programs menu. The main window appears. Note that VisualDSP++ does not connect to any session. Skip the rest of this step to step 3.
If you have run VisualDSP++ previously, the last opened session appears on the screen. You can override the default behavior and force VisualDSP++ to start a new session by pressing and holding down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step 4.
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Installation and Session Startup
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
From the Session menu, New Session.
From the Session menu, Session List. Then click New Ses-
sion from the Session List dialog box.
From the Session menu, Connect to Target.
4. The Select Processor page of the wizard appears on the screen. Ensure SHARC is selected in Processor family. In Choose a target processor, select ADSP-21369. Click Next.
5. The Select Connection Type page of the wizard appears on the screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen. Ensure that the selected platform is ADSP-21369 EZ-KIT Lite via Debug Agent. Specify your own Session name for your session or accept the default name.
The session name can be a string of any length; although, the box displays approximately 32 characters. The session name can include space characters. If you do not specify a session name, VisualDSP++ creates a session name by combining the name of the selected platform with the selected processor. The only way to change a session name later is to delete the session and open a new session.
Click Next.
7. The Finish page of the wizard appears on the screen. The page dis- plays your selections. Check the selections. If you are not satisfied, click Back to make changes; otherwise, click Finish. VisualDSP++
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Using ADSP-21369 EZ-KIT Lite
creates the new session and connects to the EZ-KIT Lite. Once connected, the main window’s title is changed to include the ses­sion name set in step 6.
L
To disconnect from a session, click the disconnect button or select Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the ses- sion name from the list and click Delete. Click OK.

Evaluation License Restrictions

The ADSP-21369 EZ-KIT Lite installation is part of the VisualDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unre­stricted evaluation license for the first 90 days. Once the initial unrestricted 90-day evaluation license expires:
1. VisualDSP++ allows a connection to the ADSP-21369 EZ-KIT Lite via the USB Debug Agent interface only. Connections to sim­ulators and emulation products are no longer allowed.
2. The linker restricts a user program to 7281 words of memory for code space with no restrictions for data space.
Refer to the VisualDSP++ Installation Quick Reference Card for details.

External Memory

The EZ-KIT Lite contains four types of memory: parallel flash (1 MB), SPI flash (2 Mbit), SRAM (512 Kbit), and SDRAM (128 Mbit). Flash memories can store user-specific boot code and allow the board to run as a stand-alone unit. For more information on how to select a boot device for the processor, see “Boot Mode and Clock Ratio Select Switch (SW2)” on
page 2-10.
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External Memory
Table 1-1 provides start and end addresses of the on-board external
memories.

Table 1-1. EZ-KIT Lite Evaluation Board External Memory

Start Address End Address Content
0x0020 0000 0x0027 FFFF SRAM memory (~MS0)
0x0400 0000 0x040F FFFF Flash memory (~MS1)
0x0800 0000 0x083F 0000 SDRAM memory (~MS2)
0x0C00 0000 0x0C00 0000
0x0CFF FFFF 0x0FFF FFFF
Unused chip select (~MS3) for non-SDRAM addresses Unused chip select (~MS3) for SDRAM addresses
Parallel flash memory, SDRAM, and SRAM are connected to the external memory of the processor. To access SRAM and flash memories, use mem­ory addressing via the respective memory bank or use the DMA controller.
SDRAM memory is connected to the SDRAM controller of the processor. A set of programmable timing parameters is available to configure the SDRAM banks to support slower memory accesses. Care must be taken when configuring the SDRAM control registers. For more information regarding the setup of the SDRAM controller, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).
An example program is included in the EZ-KIT Lite installation directory to demonstrate the controller setup.
SPI flash memory is connected to the SPI port of the processor; SPI flash designates:
•DPI pin5 (DPI5) as a chip select
•DPI pin3 (
DPI3) as the SPI clock
•DPI pin1 (
DPI1) as the MOSI
•DPI pin2 (DPI2) as the MISO
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Using ADSP-21369 EZ-KIT Lite
By default, the DPI is set up for the SPI flash, and any required changes to the SPI flash can be made by modifying the DPI of the processor. An example program is included in the EZ-KIT Lite installation directory to demonstrate the SPI flash memory reads and writes.
Asynchronous SRAM memory and parallel flash memory are connected to the asynchronous memory controller of the processor. Each of their respective memory banks can be programmed independently with differ­ent timing parameters. For more information on changing wait states to speed up or slow down the asynchronous controller and other setup infor­mation, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).
Example programs are included in the EZ-KIT Lite installation directory to demonstrate flash memory reads and writes.

ELVIS Interface

The ADSP-21369 EZ-KIT Lite board contains the National Instruments Educational Laboratory Virtual Instrumentation Suite interface. The interface features the DC voltage and current measurement modules, oscilloscope and bode analyzer modules, function generator, arbitrary waveform generator, and digital I/O.
The ELVIS interface is a LabVIEW-based design and prototype environ­ment for university science and engineering laboratories. The ELVIS interface consists of LabVIEW-based virtual instruments, a multifunction data acquisition (DAQ) device, and a custom-designed bench-top work­station and prototype board. This combination provides a ready-to-use suite of instruments found in most educational laboratories. Because the interface is based on LabVIEW and provides complete data acquisition and prototyping capabilities, the system is ideal for academic coursework that range from lower-division classes to advanced project-based curriculums.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 1-9
Page 30

Analog Audio

For more information on ELVIS and example demonstration programs, visit National Instruments Web site at
www.ni.com.
Analog Audio
The AD1835A device is a high-performance, single-chip codec featuring four stereo digital-to-analog converters (DACs) for audio output and one stereo analog-to-digital converters (ADCs) for audio input. The codec can input and output data with a sample rate of up to 96 kHz on all channels. A 192 kHz sample rate can be used with one of the DAC channels.
The processor is interfaced with the AD1835A codec via the DAI port. The DAI pins can be configured to transfer serial data from the codec in either time-division multiplexed (TDM) or 2-wire interface mode (TWI). For more information on the AD1835A connection to the DAI, see “DAI
Interface” on page 2-4.
The master input clock (MCLK) for the AD1835A codec can be generated by the on-board 12.288 MHz oscillator or supplied by one of the DAI pins of the processor. Using a DAI pin to generate the MCLK, as opposed to the on-board oscillator, allows synchronization of multiple devices in the system. This is done on the EZ-KIT Lite when data is coming from the Sony/Philips Digital Interface (S/PDIF) receiver and being output through the codec. The S/PDIF the processor’s signal routing unit (SRU). It is possible to disable the on-board audio oscillator from driving the audio codec and the processor’s input pin. For instructions on how to configure the clock, refer to “Codec
Setup Switch (SW3)” on page 2-11.
The AD1835A codec can be configured as a master or a slave, depending on the DIP switch settings. In master mode, the codec drives the serial port clock and frame sync signals to the processor. In slave mode, the pro­cessor must generate and drive all of the serial port clock and frame sync signals. For more information, refer to “Codec Setup Switch (SW3)” on
page 2-11.
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MCLK is routed to the AD1835A’s MCLK in
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Using ADSP-21369 EZ-KIT Lite
The internal configuration registers of the codec are configured using the SPI port of the processor. The DPI pin 4 (
DPI4 register) is used as the
select for the device. For information on how to configure the multichan­nel codec, refer to the product datasheet at http://www.analog.com/en/prod/0,2877,AD1835A,00.html.
The RCA connector (J10) is used to input analog audio. When using an electret microphone on this connector, configure switch SW4 according to the instructions in “Electret Microphone Select Switch (SW4)” on
page 2-12. The four output channels connect to the RCA connector ( J5).
Channel 4 of the codec connects to the headphone jack (J9). For more information, see “Connectors” on page 2-21.
Example programs are included in the EZ-KIT Lite installation directory to demonstrate how to configure and use the board’s analog audio interface.
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Page 32

LEDs and Push Buttons

LEDs and Push Buttons
The EZ-KIT Lite has eight general-purpose user LEDs and four gen­eral-purpose push buttons.
Two general-purpose push buttons are attached to the FLAG pins of the processor, while the other two are attached to the DAI pins. All of the push buttons are connected to the processor through a DIP switch (SW7). The DIP switch can disconnect the processor pins connected to the push buttons. See “Push Button Enable Switch (SW7)” on page 2-13 for instructions on how to disable a push button from driving its correspond­ing processor pin.
The state of the push buttons connected to the FLAG pins can be deter­mined by reading the FLAG register. The push buttons connected to the DAI pins must be configured as interrupts. It is necessary to set up an interrupt routine to determine each pin’s state. Table 1-2 shows the push button and processor connections. Refer to the related example program shipped with the EZ-KIT Lite for more information.

Table 1-2. Push Button Connections

Push Button Label Push Button Reference Designator Processor Pin
PB1 SW8 FLAG1/~IRQ1
PB2 SW11 FLAG0/~IRQ0
PB3 SW10 DAI19
PB4 SW9 DAI20
Table 1-3 summarizes the LED connections to the processor. To use the
LEDs connected to the DAI or DPI pins, configure the respective registers of the processor. For more information, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).
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Using ADSP-21369 EZ-KIT Lite

Table 1-3. LED Connections

LED Reference Designator Processor Pin
LED1 DPI6
LED2 DPI7
LED3 DPI8
LED4 DPI13
LED5 DPI14
LED6 DAI15
LED7 DAI16
LED8 FLAG3/~MS3/~IRQ3
An example program is included in the EZ-KIT Lite installation directory to demonstrate functionality of the LEDs and push buttons.

Example Programs

Example programs are provided with the ADSP-21369 EZ-KIT Lite to demonstrate various capabilities of the product. The programs are installed with the VisualDSP++ software and can be found in the
<install_path>\213xx\Examples\ADSP-21369 EZ-KIT Lite directory.
Refer to a readme file provided with each example for more information.

Background Telemetry Channel

The ADSP-21369 USB debug agent supports the background telemetry channel (BTC), which facilitates data exchange between VisualDSP++ and the processor without interrupting processor execution.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 1-13
Page 34

Reference Design Information

The BTC allows the user to view a variable as it is updated or changed, all while the processor continues to execute. For increased performance of the BTC, including faster reading and writing, please check our latest line of SHARC processor emulators at
sors/sharc/evaluationDevelopment/crosscore/index.html. For more
http://www.analog.com/proces-
information about the background telemetry channel, see the Visu­alDSP++ User’s Guide or online Help.
Reference Design Information
A reference design info package is available for download on the Analog Devices Web site. The package provides information on the design, lay­out, fabrication, and assembly of the EZ-KIT Lite and EZ-Board products.
The information can be found at:
http://www.analog.com/en/embedded-processing-dsp/sharc/proces­sors/ez-kit-lite-design-database/resources/index.html
.
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2 ADSP-21369 EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-21369 EZ-KIT Lite board.
The following topics are covered.
“System Architecture” on page 2-2 Describes the ADSP-21369 board configuration and explains how the board components interface with the processor.
“Switches” on page 2-9 Shows the locations and describes the on-board switches.
“LEDs and Push Buttons” on page 2-15 Shows the locations and describes the on-board LEDs and push buttons.
“Jumpers” on page 2-18 Shows the locations and describes the on-board configuration jumpers.
“Connectors” on page 2-21 Shows the locations and provides part numbers for the on-board connectors. In addition, the manufacturer and part number infor­mation is provided for the mating parts.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-1
Page 36

System Architecture

ADSP-21369
DSP
JTAG
Header
Power Regulation
PBs (4)
JTAG Port
A5V
+7.0V
Connector
Expansion
Connectors
Type A
1M x 8
Flash
24.576 MHz Oscillator
External
Port
3.3V
Stereo Out RCA
Jacks (4x2)
Stereo In RCA
Jacks (2x1)
DAI
1.3V
AD1835 CODEC
DPI
SPI FLASH
512k x 8
SRAM
SPDIF Out
Phono
FLAGs
0,1, and 3
2 2
Headphone
Jack
Reset PB
SPDIF In
Phono
4M x 32 SDRAM
LEDs
(8)
5
DPI
Conn
DAI
Conn
RS
232
Conn
ADM3202
ELVIS
Conn
1
2
USB
Connector
Debug
Agent
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite board (Figure 2-1).
2-2 ADSP-21369 EZ-KIT Lite Evaluation System Manual

Figure 2-1. System Architecture Block Diagram

The EZ-KIT Lite is designed to demonstrate the ADSP-21369 processor capabilities. The processor core is powered at 1.3V, and the I/O is pow­ered at 3.3V.
Page 37
ADSP-21369 EZ-KIT Lite Hardware Reference
The
CLKIN pin of the processor connects to a 24.576 MHz oscillator. The
core frequency of the processor is derived by multiplying the frequency at the CLKIN pin by a value determined by the state of the processor pins
CLKCFG1 and CLKCFG0. The value at these pins is determined by the state of
switch SW2 state (see “Boot Mode and Clock Ratio Select Switch (SW2)”
on page 2-10). By default, the EZ-KIT Lite provides a core frequency of
393.216 MHz. It is possible to change the speed of the processor by changing the value of the PMCTL register.
The SW2 switch also configures the boot mode of the processor. The EZ-KIT Lite is capable of EPROM/flash boot and SPI boot. By default, the EZ-KIT Lite boots from flash memory. For details, see “Boot Mode
and Clock Ratio Select Switch (SW2)” on page 2-10.

External Port

The external port of the ADSP-21369 processor consists of a 24-bit address bus, 32-bit data memory bus, and control lines. The control lines are used to select, read, and write to external memory devices.
The external port connects to an 8-bit parallel flash memory, an 8-bit SRAM memory, and a 32-bit SDRAM memory. See “External Memory”
on page 1-7 for more information about accessing flash memory and
SDRAM memory.
All of the external port signals are available externally via the expansion interface connectors (J1—3). The pinout of the connectors can be found in
“ADSP-21369 EZ-KIT Lite Schematic” on page B-1.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-3
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System Architecture
PB_3
PB_4
4x2
RCA
Phono
Jack OUT
Head­phone
Jack
1X2 RCA
Phono
Jack IN
12.288MHz
AD1835
DAC_LRCLK DAC_BCLK DAC_SDATA1 DAC_SDATA2 DAC_SDATA3 DAC_SDATA4
ADC_LRCLK ADC_BCLK ADC_SDATA1
MCLK
ADC
DAC1 DAC2 DAC3 DAC4
DSP
DAI1 (SD0A)
DAI2 (SD0B)
DAI3 (SCLK0)
DAI4 (SFS0)
DAI6 (SD1B)
DAI5 (SD1A)
DAI7 (SCLK1)
DAI8 (SFS1)
DAI9 (SD2A)
DAI10 (SD2B)
DAI11 (SD3A)
DAI12 (SD3B)
DAI15 (SD4A)
DAI16 (SD4B)
DAI17 (SD5A)
DAI18 (SD5B)
DAI20 (SFS45)
DAI14 (SFS23)
DAI13 (SCLK23)
DAI19 (SCLK45)
AUDIO OSC
SPDIF IN
LED7
LED6
ELVIS_TRIG PLLMCLK IN PLLMCLK OUT
SPDIF OUT

DAI Interface

The digital application interface (DAI) pins are connected to the signal routing unit (SRU) of the processor. The SRU is a flexible routing system, providing a large system of signal flows within the processor. In general, the SRU allows to route the DAI pins to different internal peripherals in various combinations.
The DAI pins are connected to the AD1835A audio codec, a 26-pin header, two RCA connectors, audio oscillator output, an external phase lock loop (PLL) circuit, two LEDs, and two push buttons. Figure 2-2 illus­trates the EZ-KIT Lite’s connections to the DAI.
Figure 2-2. DAI Connections Block Diagram
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ADSP-21369 EZ-KIT Lite Hardware Reference
DPI1 (MOSI)
DPI2 (MISO)
DPI3 (SPICLK)
DPI4 (SPI_AD1835CS)
DPI5 (SPI_FLASHCS)
DPI6 (LED1)
DPI7 (LED2)
DPI8 (LED3)
DPI13 (LED4)
DPI14 (LED5)
DPI9 (UART TX)
DPI10 (UART RX)
DPI12 (UART CTS) DPI11 (UART RTS)
LED1
LED2
LED3
LED4
LED5
AD1835
SPI
FLASH
CLATCH CCLK COUT CIN
CS/ SCK SO SI
ADSP-21369
T2IN R2OUT R1OUT T1IN
T2OUT
R2IN R1IN
T1OUT
ADM3202
To use the DAI for a different purpose, disable any signal driving the DAI pin with a switch (see “Codec Setup Switch (SW3)” on page 2-11). In addition,
SW3 enables flexible routing of the 12.288 MHz audio oscilla-
tor’s output signal. By default, the SW3 signal is used as the master clock (MCLK) for the AD1835A codec.
All of the DAI signals are available externally via the expansion interface connectors (J1—3) and 0.1” spaced header (P4). The pinout of the connec­tors can be found in “ADSP-21369 EZ-KIT Lite Schematic” on page B-1.

DPI Interface

The digital peripheral interface (DPI) pins are connected to a second sig­nal routing unit of the processor (SRU2). The SRU2 unit, similar to the SRU, is a flexible routing system, providing a large system of signal flows within the processor. In general, the SRU2 can route the DPI pins to different internal peripherals in various combinations.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-5
Figure 2-3. DPI Connections Block Diagram
Page 40
System Architecture
The DPI pins are connected to the SPI flash memory, SPI of the AD1835A codec, a UART, a 20-pin header, and five LEDs. Figure 2-3 illustrates the EZ-KIT Lite’s connections to the DPI.
To use the DPI for a different purpose, disable any signal driving a DPI pin with a switch (see “UART Enable Switch (SW5)” on page 2-12). Any DPI pin connected to a LED can be used without having to disconnect the pin. You can, however, see the respective LED turn
ON and OFF when
the signal is used elsewhere on the board.
All of the DPI signals are available externally via the expansion interface connectors (J1—3) and 0.1” spaced header (P3). The pinout of the connec­tors can be found in “ADSP-21369 EZ-KIT Lite Schematic” on page B-1.

FLAG Pins

The processor has four general-purpose I/O flag pins. Table 2-1 describes the flag pin connections.
Table 2-1. I/O FLAG Pins
Processor FLAG Pin EZ-KIT Lite Function
FLAG0 Push button (SW2) input
FLAG1 Push button (SW2) input
FLAG2 SDRAM chip select
FLAG3 LED8
For information on how to disable a push button from driving its corre­sponding flag pin, see “Push Button Enable Switch (SW7)” on page 2-13.
FLAG signals are available externally via the expansion interface con-
The nectors (
J1—3). The pinout of the connectors can be found in
“ADSP-21369 EZ-KIT Lite Schematic” on page B-1.
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ADSP-21369 EZ-KIT Lite Hardware Reference

External PLL

The ADSP-21369 EZ-KIT Lite contains an external phase lock loop to help generate a faster and more stable master input clock, MCLK. The PLL uses DAI pin 3 as an input clock from the ADSP-21369 processor. The new clock generated by PLL connects to the processor via DAI pin 2.
Example programs are included in the EZ-KIT Lite installation directory to demonstrate how to configure and use the board’s external PLL.

Expansion Interface

The expansion interface consists of three 90-pin connectors. Table 2-2 shows the interfaces each connector provides. For the exact pinout of the connectors, refer to “ADSP-21369 EZ-KIT Lite Schematic” on page B-1. The mechanical dimensions of the connectors can be obtained from Tech-
nical or Customer Support.
Table 2-2. Expansion Interface Connectors
Connector Interfaces
J1 5V, ADDR23–0, DATA31–0
J2 3.3V, FLAG3–0, DAIP20–1, DPI14–1, SDRAM control signals
J3 5V, 3.3V, reset, parallel port control signals
Limits to the current and interface speed must be taken into consideration when using the expansion interface. The maximum current limit is depen­dent on the capabilities of the used regulator. Additional circuitry also can add extra loading to signals, decreasing their maximum effective speed.
[
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-7
Analog Devices does not support and is not responsible for the effects of additional circuitry.
Page 42
System Architecture

JTAG Emulation Port

The JTAG emulation port allows an emulator to access the internal and external memory of the processor through a 6-pin interface. The JTAG emulation port of the processor also connects to the USB debugging inter­face. When an emulator connects to the board at ZP4, the USB debugging interface is disabled. This is not a standard connection of the JTAG interface.
For information about the standard connection of the interface, see EE-68 published on the Analog Devices Web site. For more information about the JTAG connector, see “JTAG Header (ZP4)” on page 2-25. To learn more about available SHARC emulators, go to Analog Devices Web site:
http://www.analog.com/processors/sharc/evaluationDevelop­ment/crosscore/index.html
.
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ADSP-21369 EZ-KIT Lite Hardware Reference

Switches

This section describes operation of the on-board switches. The switch locations and default settings are shown in Figure 2-4.

Figure 2-4. Switch Locations and Default Settings

ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-9
Page 44
Switches

Boot Mode and Clock Ratio Select Switch (SW2)

The SW2 switch sets the boot mode and clock multiplier ratio of the pro­cessor. Table 2-3 shows how to set up the boot mode using SW2 positions 1 and 2. By default, the EZ-KIT Lite boots in external port mode from flash memory.
Table 2-3. Boot Mode Configuration Switch (SW2)
BOOTCFG0 Pin (Position 1) BOOTCFG1 Pin (Position 2) Boot Mode
ON ON SPI slave boot
ON OFF Parallel flash boot (default)
OFF ON SPI master boot
OFF
OFF Reserved
Table 2-4 shows how to set up the clock multiply ratio using SW2
positions 3 and 4. By default, the processor increases the clock multiply ratio by sixteen, setting the core clock to 393.216 MHz.
Table 2-4. Core Clock Rate Configuration
CLKCFG0 (Position 3) CLKCFG1 (Position 4) Core to CLKIN Ratio
ON ON 6:1
ON OFF 16:1 (default)
OFF ON 32:1
OFF
OFF Reserved
The core clock frequency can be increased or decreased via software by writing to the PMCTL register. For more information on changing the core clock frequency and other setup information, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).
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ADSP-21369 EZ-KIT Lite Hardware Reference
ADSP-21369 Processor AD1835A Codec
DAI_P6
DAI_P17
MCLK
12.288 MHz OSC
SW3.1
SW3.2

Codec Setup Switch (SW3)

The codec setup switch (SW3) can be used to change the routing of some signals going to the AD1835A codec and to set up the communication protocol of the codec.
SW3 positions 1 and 2 determine the clock routing for the audio oscillator
to the codec and to the processor. Figure 2-5 illustrates how the switch positions 1 and 2 connect on the board. In the default position, route the
DAI_P17 pin to DAI_P6 (in software) to clock the AD1835A codec.
Figure 2-5. Audio Clock Routing
SW3 position 3 determines if the AD1835A device is a master or a slave. If
the AD1835A is a master, the device’s serial interface generates the frame sync and clock signals necessary to transfer data. When the device is a slave, the processor must generate the frame sync and clock signals. By default, position 3 is
ON, and the AD1835A codec generates the control
signals.
SW3 position 4 disconnects the AD1835A codec’s ADC_DATA pin from the
DAI. This is useful when the DAI is connected to another device.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-11
Page 46
Switches

Electret Microphone Select Switch (SW4)

To connect an electret microphone to audio input, place all positions of
SW4 ON. The default switch position is all OFF. When SW4 is all ON, a DC
offset of 2.5V is added to the signal, and gain of the input amplifiers is changed from 1x to 10x.

UART Enable Switch (SW5)

The UART enable switch (SW5) disconnects the UART signals from the DPI pins of the processor. When SW5 is OFF, its associated DPI signal (see
Table 2-5) can be used on the expansion interface.
Table 2-5. UART Enable Switch (SW5)
Switch Position EZ-KIT Lite Signal Processor Signal
1 (OFF
1
)
CTS DPI12
2 (ON) RX DPI10
3 (OFF) RTS DPI11
4 (ON) T2IN tied to R2OUT N/A
1 Bold typeface denotes the default setting.

Loopback Test Switches (SW6 and SW14)

The loopback test switch (SW6) is located at the top left side of the board. The second loopback test switch, the board. These switches are used for testing only; all switch positions should remain
OFF.
2-12 ADSP-21369 EZ-KIT Lite Evaluation System Manual
SW14, is located at the top right side of
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ADSP-21369 EZ-KIT Lite Hardware Reference

Push Button Enable Switch (SW7)

The push button enable switch (SW7) disconnects the push buttons from the respective processor pins. This allows the signals to be used elsewhere on the board. Table 2-6 shows switch SW7 connections. By default, all positions of SW7 are ON, and the push buttons function as designed.
Table 2-6. Push Button Enable Switch (SW7)
Switch Position Push Button Label Push Button Reference Designator Processor Pin
1
2 PB2 SW11 FLAG0/~IRQ0
3 PB3 SW10 DAI19
4 PB4 SW9 DAI20
PB1 SW8 FLAG1/~IRQ

SPI Disable Switch (SW15)

The SPI interface switch (SW15) disables the SPI chip select lines con­nected to SPI flash memory and AD1835A audio codec. The switch allows you to re-use the same pins on the SPI interface and expansion interface. By default, SW15 positions 1–3 are ON and position 4 is OFF unless any of the SPI interface signals are used on the expansion connector or via an EZ-Extender®.

ELVIS Oscilloscope Configuration Switch (SW1)

The oscilloscope configuration switch (SW1) determines which audio cir­cuit signals connect to channels A and B of the oscilloscope. The switch is used only when the board is connected to the Educational Laboratory Vir­tual Instrumentation Suite (ELVIS) station (see “ELVIS Interface” on
page 1-9). Each channel must have only one signal selected at a time, as
described in Table 2-7.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-13
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Switches
Table 2-7. Oscilloscope Configuration Switch (SW1)
Channel Switch Position Audio Circuit Signal
A
A2 (OFF) AMP_RIGHT_IN
A3 (OFF) LEFT_OUT
A4 (OFF) RIGHT_OUT
B5 (OFF) AMP_LEFT_IN
B6 (OFF) AMP_RIGHT_IN
B7 (OFF) LEFT_OUT
B8 (OFF) RIGHT_OUT
1 Bold typeface denotes the default settings.
1 (OFF
1
)
AMP_LEFT_IN

ELVIS Function Generator Configuration Switch (SW13)

The function generator configuration switch (SW13) controls which signals connect to the left and right input signals of the audio interface. The SW13 switch is used only when the board is connected to the ELVIS station (see
“ELVIS Interface” on page 1-9). Each channel must have only one signal
selected at a time, as described in Table 2-8.
Table 2-8. ELVIS Function Generator Configuration Switch (SW13)
Channel Switch Position Audio Signal
AMP_LEFT_IN
AMP_RIGHT_IN 2 (ON) RIGHT_IN
AMP_LEFT_IN 3 (OFF) DAC0
AMP_RIGHT_IN 4 (OFF) DAC1
1 (ON1)
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LEFT_IN
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ADSP-21369 EZ-KIT Lite Hardware Reference
Table 2-8. ELVIS Function Generator Configuration Switch (SW13)
Channel Switch Position Audio Signal
AMP_LEFT_IN 5 (OFF) FUNCT_OUT
AMP_RIGHT_IN 6 (OFF) FUNCT_OUT
1 Bold typeface denotes the default settings.

LEDs and Push Buttons

This section describes the on-board LEDs and push buttons. The LED and push button locations are shown in Figure 2-6.

Figure 2-6. LED and Push Button Locations

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LEDs and Push Buttons
General Purpose LEDs (LED1–8)
There are eight general-purpose LEDs on the board. Five LEDs are con­nected to the DPI interface, two LEDs are connected to the DAI interface, and one LED is connected to FLAG3 of the processor. “LEDs and Push
Buttons” on page 1-12 summarizes the LED connections. To use an LED
connected to the DAI or DPI, program its respective register on the pro­cessor. For more information on how to program the registers, refer to the ADSP-21368 SHARC Processor Hardware Reference (includes ADSP-21369).

Power LED (LED9)

When LED9 is lit (green), it indicates that power is being supplied to the board properly.

Reset LEDs (LED10)

When LED10 is lit (red), a master reset of all the major ICs is active.

USB Monitor LED (ZLED3)

The USB monitor LED (ZLED3) indicates that USB communication has been initialized successfully, and you can connect to the processor using a VisualDSP++ EZ-KIT Lite session. Once the USB cable is plugged into the board, it takes approximately 15 seconds for the USB monitor LED to light. If the LED does not light, try cycling power on the board and/or reinstalling the USB driver (see the VisualDSP++ Installation Quick Refer- ence Card).
L
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When VisualDSP++ is actively communicating with the EZ-KIT Lite target board, the LED can flicker, indicating communications handshake.
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ADSP-21369 EZ-KIT Lite Hardware Reference
Push Buttons (SW8–11)
Four push buttons (SW8—11) are provided for general-purpose user input. Two push buttons are connected to the FLAG pins of the processor, while the other two are connected to the DAI of the processor. The push but­tons are active high and, when pressed, send a high (1) to the processor. Refer to “LEDs and Push Buttons” on page 1-12 for more information. The push button enable switch (SW7) is capable of disconnecting the push buttons from the corresponding processor pins. Refer to “Push Button
Enable Switch (SW7)” on page 2-13 for more information.
The push buttons and corresponding processor signals are summarized in
Table 2-9.
Table 2-9. Push Button Connections
Push Button Label Push Button Reference Designator Processor Pin
PB1 SW8 FLAG1/~IRQ1
PB2 SW11 FLAG0/~IRQ0
PB3 SW10 DAI19
PB4 SW9 DAI20

Board Reset Push Button (SW12)

The RESET push button (SW12) resets all of the ICs on the board. The only exception is the USB interface chip ( push button is pressed after the USB cable has been plugged in and com­munication initialized correctly with the PC. After USB communication has been initialized, the only way to reset the USB is by powering down the board.
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-17
U4). The chip is not reset when the
Page 52

Jumpers

Jumpers
This section describes functionality of the configuration jumpers. The jumper locations are shown in Figure 2-7.

Figure 2-7. Jumper Locations

2-18 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 53
ADSP-21369 EZ-KIT Lite Hardware Reference

VCO Select Jumper (JP1)

The voltage-controlled oscillator (VCO) select jumper (JP1) configures the frequency selection of the on-board external PLL (U39). When JP1 is installed, the VCO output frequency is multiplied by a factor of 1.0. Con­versely, when uninstalled, the VCO output frequency is multiplied by a factor of 0.5 or divided in half. The jumper settings are shown in
Table 2-10.
Table 2-10. VCO Select Jumper (JP1)
JP1 Setting Mode
OFF VCO output frequency x ½ (default)
ON VCO output frequency x 1.0

ELVIS Select Jumper (JP2)

The ELVIS select jumper (JP2) configures the EZ-KIT Lite’s connection to an ELVIS station (see “ELVIS Interface” on page 1-9). When JP2 is installed, the connections to the push buttons and LED are re-directed to the ELVIS station instead of the processor. The jumper settings are shown in Table 2-11.
Table 2-11. ELVIS Select Jumper (JP2)
JP2 Setting Mode
OFF Not connected to an ELVIS station (default)
ON Connected to an ELVIS station
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-19
Page 54
Jumpers

ELVIS Voltage Selection Jumper (JP3)

The ELVIS voltage selection jumper (JP3) is used to select the power source for the EZ-KIT Lite. In a standard mode of operation, the board receives its power from an external power supply. When JP3 is installed, the board is powered from an ELVIS station, and no external power sup­ply is required. The jumper settings are shown in Table 2-12.
Table 2-12. ELVIS Voltage Selection Jumper (JP3)
JP3 Setting Mode
OFF Powered from an external power supply (default)
ON Powered from an ELVIS station
[
when JP3 is installed to avoid potential damage to the EZ-KIT Lite board and ELVIS unit.

ELVIS Programmable Flag Jumper (JP4)

The ELVIS programmable flag jumper (JP4) connects the ADSP-21369 processor’s DAI4 pin to the ELVIS trigger pin. When JP4 is installed, DAI4 connects to the ELVIS TRIG1_2 pin directly. Conversely, when JP4 is
The external power supply must be disconnected from the board
uninstalled, operation. The jumper settings are shown in Table 2-13.
Table 2-13. ELVIS Select Jumper (JP4)
JP4 Setting Mode
OFF DAI4 disconnected from the ELVIS TRIG pin (default)
ON DAI4 connected to the ELVIS TRIG pin
DAIP4 is disconnected and can be used for another non-ELVIS
2-20 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 55
ADSP-21369 EZ-KIT Lite Hardware Reference

Connectors

This section describes connector functionality and provides information about mating connectors. The connector locations are shown in
Figure 2-8.

Figure 2-8. Connector Locations

ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-21
Page 56
Connectors
Expansion Interface Connectors (J1–3)
Three board-to-board connectors (J1—3) provide signals for most periph­eral interfaces of the processor. The connectors are located at the bottom of the board. For more information about the expansion interface, see
“Expansion Interface” on page 2-7. For the connectors availability and
pricing, contact Samtec.
Part Description Manufacturer Part Number
90-position 0.05” spacing, SMT SAMTEC SFC-145-T2-F-D-A
Mating Connectors
90-position 0.05” spacing (through hole)
90-position 0.05” spacing (surface mount)
90-position 0.05” spacing (low cost)
SAMTEC TFM-145-x1 series
SAMTEC TFM-145-x2 series
SAMTEC TFC-145 series
2-22 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 57
ADSP-21369 EZ-KIT Lite Hardware Reference

Audio In RCA Connector (J10)

Part Description Manufacturer Part Number
Two-channel right angle RCA jack SWITCHCRAFT PJRAS1X2S02
Mating Cable
Two-channel RCA interconnect cable MONSTER CABLE BI100-1M

Audio Out RCA Connector (J5)

Part Description Manufacturer Part Number
Four-channel right angle RCA jack SWITCHCRAFT PJRAS4X2U01
Mating Cable
Two-channel RCA interconnect cable MONSTER CABLE BI100-1M

Headphone Out Jack (J9)

Part Description Manufacturer Part Number
3.5 mm stereo jack A/D ELECTRONICS ST-323-5

Power Jack (J4)

The power connector (J4) provides all of the power necessary to operate the EZ-KIT Lite board.
Part Description Manufacturer Part Number
2.5 mm power jack SWITCHCRAFT DIGI-KEY
Mating Power Supply (shipped with EZ-KIT Lite)
7V power supply CUI INC. DMS070214-P6P-SZ
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-23
RAPC712X-ND
Page 58
Connectors
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-14 shows the power supply specifications.
Table 2-14. Power Supply Specifications
Terminal Connection
Center pin +7 VDC@2.14A
Outer ring GND

RS-232 Connector (J6)

Part Description Manufacturer Part Number
DB9, female, right angle AMP/TYCO 5745781-4
Mating Cable
Cable DB9M to DB9F 6 feet DIGI-KEY 45-0308-0000-ND

S/PDIF Coax Connectors (J7 and J8)

Part Description Manufacturer Part Number
Coaxial SWITCHCRAFT PJRAN1X1U01
Mating Cable
Two-channel RCA interconnect cable
MONSTER CABLE BI100-1M

DPI Header (P3)

The DPI connector (P3) provides access to all of the DPI signals in the from of a .1” spacing header. When using the header to access the DPI pins of the processor, ensure that signals, which normally drive the DPI pins, are disabled. For more information, see “DPI Interface” on page 2-5.
2-24 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 59
ADSP-21369 EZ-KIT Lite Hardware Reference
Part Description Manufacturer Part Number
20-pin IDC header FCI 68737-420HLF

DAI Header (P4)

The DAI connector (P4) provides access to all of the DAI signals in the from of a .1” spacing header. When using the header to access the DAI pins of the processor, ensure that signals, which normally drive the DAI pins, are disabled. Refer to “Codec Setup Switch (SW3)” on page 2-11 for more information on how to disable signals already being driven from elsewhere on the EZ-KIT Lite.
Part Description Manufacturer Part Number
26-pin IDC header BERG 4102-T08-13LF

JTAG Header (ZP4)

The JTAG header (ZP4) is the connecting point for a JTAG in-circuit emulator pod. When an emulator connects to the JTAG header, the USB debug interface is disabled.
L L
Part Description Manufacturer Part Number
14-pin IDC header FCI 68737-414HLF
ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-25
Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug.
When using an emulator with the EZ-KIT Lite board, follow the connection instructions provided with the emulator.
Page 60
Connectors
2-26 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 61
A ADSP-21369 EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-21369 EZ-KIT Lite Sche-
matic” on page B-1.
Ref. Qty. Description Reference Designator Manufacturer Part Number
1174LVC14A
SOIC14
2 1 IDT74FCT3244
APY SSOP20
3 1 12.288MHZ
OSC003
4 1 LT1765 SOIC8 VR1 LINEAR
5 1 MT48LC4M32B
2 TSOP86
6 1 GTL2002
TSSOP8
7 1 IS61LV5128AL
TSOP44
8 2 SN74LVC1G08
SOT23-5
9 1 TLC2932
TSSOP14
10 1 24.576MHZ
OSC003
U40 TI 74LVC14AD
U37 IDT IDT74FCT3244APYG
U1 EPSON SG-8002CA MP
TECH
U36 DIGI-KEY 557-1196-1-ND
U39 PHILIPS GTL2002DP-T
U30 ISSI IS61LV5128AL-10TLI
U16,U18 TI SN74LVC1G08DBVR
U38 TI TLC2932IPWG4
U28 EPSON SG-8002CA MP
LT1765ES8#PBF
ADSP-21369 EZ-KIT Lite Evaluation System Manual A-1
Page 62
Ref. Qty. Description Reference Designator Manufacturer Part Number
11 1 21369
AM29LV081B "U35"
12 1 SN65LVDS2D
SOIC8
13 1 FDC658P
SOT23-6
14 1 21369 M25P20
“U29”
15 1 SI7601DN
ICS010
16 1 ADM708SARZ
SOIC8
17 1 AD8532ARZ
SOIC8
18 2 ADP3336ARMZ
MSOP8
19 1 ADM3202ARN
Z SOIC16
20 8 AD8606ARZ
SOIC8
U35 AND AM29LV081-120ED
U2 NATIONAL
SEMI
U3 FAIRCHILD FDC658P
U29 ST MICRO M25P20-VMN6TP
U45 VISHAY SI7601DN
U23 ANALOG
DEVICES
U19 ANALOG
DEVICES
VR3-4 ANALOG
DEVICES
U32 ANALOG
DEVICES
U8-15 ANALOG
DEVICES
DS90LV018ATM
ADM708SARZ
AD8532ARZ
ADP3336ARMZ-REEL7
ADM3202ARNZ
AD8606ARZ
21 1 AD1835AASZ
MQFP52
22 2 AD623ARMZ
USOIC8
23 2 AD820ARZ
SOIC8
24 1 ADSP-21369
SBGA256
25 2 ADG774ABRQ
ZQSOP16
U31 ANALOG
DEVICES
U5-6 ANALOG
DEVICES
U33-34 ANALOG
DEVICES
U44 ANALOG
DEVICES
U24-25 ANALOG
DEVICES
AD1835AASZ
AD623ARMZ
AD820ARZ
ADSP-21369KBPZ-3A
ADG774ABRQZ
A-2 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 63
ADSP-21369 EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
26 2 ADP1864AUJZ
SOT23-6
27 5 RUBBER FOOT M1-5 MOUSER 517-SJ-5018BK
28 1 PWR
2.5MM_JACK CON005
29 1 RCA 4X2
CON011
30 2 RCA 1X1
CON012
31 5 MOMENTARY
SWT013
32 3 .05 45X2
CON019
33 2 DIP8 SWT016 SW1,SW14 C&K TDA08H0SB1
34 1 DIP6 SWT017 SW13 CTS 218-6LPST
35 7 DIP4 SWT018 SW2-7,SW15 ITT TDA04HOSB1
36 1 DB9 9PIN
DB9F
37 1 RCA RCA_1X2
CON031
VR2,VR5 ANALOG
DEVICES
J4 SWITCH-
CRAFT
J5 SWITCH-
CRAFT
J7-8 SWITCH-
CRAFT
SW8-12 PANASONIC EVQ-PAD04M
J1-3 SAMTEC SFC-145-T2-F-D-A
J6 TYCO 5747844-4
J10 SWITCH-
CRAFT
ADP1864AUJZ-R7
RAPC712X
PJRAS4X2U01X
PJRAN1X1U01X
PJRAS1X2S02X
38 4 IDC 2X1
IDC2X1
39 1 IDC 10X2
IDC10X2
40 1 IDC 2X2
IDC2X2
41 1 3.5MM
STEREO_JACK CON001
JP1-4 FCI 90726-402HLF
P3 BURG-FCI 54102-T08-10LF
P11 FCI 68737-404HLF
J9 DIGI-KEY CP1-3525NG-ND
ADSP-21369 EZ-KIT Lite Evaluation System Manual A-3
Page 64
Ref. Qty. Description Reference Designator Manufacturer Part Number
42 1 IDC 13X2
IDC13X2
43 1 5A RESETABLE
FUS005
44 8 YELLOW
LED001
45 10 0.22UF 25V
10% 0805
46 2 0.1UF 50V 10%
0805
47 5 600 100MHZ
200MA 0603
48 1 2A S2A
DO-214AA
49 4 1UF 16V 10%
0805
50 1 10UF 25V
+80-20% 1210
51 2 68UF 25V 20%
CAP003
P4 BERG 54102-T08-13LF
F1 MOUSER 650-RGEF500
LED1-8 PANASONIC LN1461C
C77,C91-92,C118-11 9,C152-154,C185­186
C172,C216 AVX 08055C104KAT
FER1-5 DIGI-KEY 490-1014-2-ND
D4 VISHAY S2A-E3
C204,C207-209 KEMET C0805C105K4RAC TU
C215 DIGI-KEY 587-1393-2-ND
CT1-2 PANASONIC EEE-FC1E680P
AVX 08053C224KAT2A
52 1 2A SL22
DO-214AA
53 1 0 1/10W 5%
0805
54 1 190 100MHZ
5A FER002
55 20 10UF 6.3V 10%
0805
56 3 6.04K 1/10W
1% 0805
D1 DIGI-KEY SL22-E3/1GI-ND
R14 VISHAY CRCW08050000Z0EA
FER7 MURATA DLW5BSN191SQ2
C23-24,C57-58,C84­85,C111-114,C144­147,C151,C162-163, C176,C205-206
R28-30 DIGI-KEY 311-6.04KCRCT-ND
AVX 08056D106KAT2A
A-4 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 65
ADSP-21369 EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
57 1 4.7UF 6.3V 10%
0805
58 7 0.1UF 10V 10%
0402
59 89 0.01UF 16V
10% 0402
60 22 10K 1/16W 5%
0402
61 3 4.7K 1/16W 5%
0402
62 9 0 1/16W 5%
0402
63 2 22 1/16W 5%
0402
64 2 33 1/16W 5%
0402
65 1 1.5UH 20%
IND003
C225 AVX 08056D475KAT2A
C3,C75-76,C168-171 AVX 0402ZD104KAT2A
C4-22,C25-56,C59­74,C78-83,C173­175,C177-178,C183, C188,C190-196, C201-202
R5,R19-23,R25-26, R32-34,R132,R152­156,R161-162,R173­175
R4,R180,R202 VISHAY CRCW04024K70JNED
R1-3,R7-9,R107, R121,R138
R124,R133 PANASONIC ERJ-2GEJ220X
R6,R27 VISHAY CRCW040233R0JNEA
L2 COIL CRAFT DO1608C-152MLC
AVX 0402YC103KAT2A
VISHAY CRCW040210K0FKED
PANASONIC ERJ-2GE0R00X
66 1 100MA
CMDSH-3 SOD-323
67 1 0.18UF 25V
10% 0805
68 1 100UF 10V 10% CCT3 AVX TPSC107K010R0075
69 2 64.9K 1/10W
1% 0805
D2 GEN-
ERAL-SEMI
C218 AVX 08053C184KAT2A
R190,R194 VISHAY CRCW080564K9FKEA
CMDSH-3-E3
ADSP-21369 EZ-KIT Lite Evaluation System Manual A-5
Page 66
Ref. Qty. Description Reference Designator Manufacturer Part Number
70 2 210.0K 1/4W
1% 0805
71 1 107.0 1/10W 1%
0805
72 1 249.0 1/10W 1%
0805
73 2 0.1UF 16V
10%0603
74 1 1UF 16V 10%
0603
75 2 4.7UF 25V 20%
0805
76 2 68PF 50V 5%
0603
77 8 330PF 50V 5%
0603
78 2 470PF 50V 5%
0603
79 10 330 1/10W 5%
0603
R191,R193 VISHAY CRCW0805210KFKEA
R128 DIGI-KEY 311-107CRTR-ND
R127 DIGI-KEY 311-249CRTR-ND
C187,C189 AVX 0603YC104KAT2A
C179 PANASONIC ECJ-1VB1C105K
C217,C220 AVX 0805ZD475KAT2A
C93,C223 AVX 06035A680JAT2A
C95,C101,C107, C116,C123,C129, C134,C142
C90,C222 AVX 06033A471JAT2A
R163-164,R168-172, R176-178
AVX 06035A331JAT2A
VISHAY CRCW0603330RJNEA
80 8 0 1/10W 5%
0603
81 4 10 1/10W 5%
0603
82 3 10.0K 1/16W
1% 0603
83 1 75.0K 1/16W
1% 0603
84 1 200.0K 1/16W
1% 0603
R12,R31,R126,R143, R184,R186,R192, R200
R157-160 VISHAY CRCW060310R0JNEA
R125,R142,R148 DALE CRCW060310K0FKEA
R131 VISHAY CRCW060375K0FKEA
R134 VISHAY CRCW0603200KFKEA
PHYCOMP 232270296001L
A-6 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 67
ADSP-21369 EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
85 1 25.5K 1/16W
1% 0603
86 1 51.1K 1/16W
1% 0603
87 4 237.0 1/10W 1%
0603
88 2 750.0K 1/10W
1% 0603
89 11 11.0K 1/10W
1% 0603
90 20 5.49K 1/10W
1% 0603
91 9 3.32K 1/10W
1% 0603
92 8 1.65K 1/10W
1% 0603
93 10 49.9K 1/10W
1% 0603
R150 DIGI-KEY 311-25.5KHRTR-ND
R198 VISHAY CRCW060351K1FKEA
R108-109,R122-123 DIGI-KEY 311-237HRTR-ND
R110,R116 DIGI-KEY 311-750KHRTR-ND
R39-40,R50,R58, R73,R81,R86,R97, R102,R115,R144
R37,R41-42,R48, R51,R56,R59,R67, R72,R75,R80,R83­84,R87,R96,R99, R103-104,R113-114
R36,R43,R49,R57, R74,R82,R85,R94, R130
R44,R52,R60,R64, R71,R79,R88,R95
R46,R55,R63,R66, R68,R76,R91-92, R119-120
DIGI-KEY 311-11.0KHRTR-ND
DIGI-KEY 311-5.49KHRTR-ND
DIGI-KEY 311-3.32KHRTR-ND
DIGI-KEY 311-1.65KHRTR-ND
DIGI-KEY 311-49.9KHRTR-ND
94 8 604.0 1/10W 1%
0603
95 2 90.9K 1/10W
1% 0603
96 1 0.1 1/10W 1%
0603
97 3 10.0K 1/10W
1% 0603
R45,R54,R62,R65, R69,R77,R90,R93
R146,R151 DIGI-KEY 311-90.9KHRTR-ND
R149 PANASONIC ERJ-3RSFR10V
R145,R147,R182 DIGI-KEY 311-10.0KHRTR-ND
NIC COMPO­NENTS
NRC06F6040TRF
ADSP-21369 EZ-KIT Lite Evaluation System Manual A-7
Page 68
Ref. Qty. Description Reference Designator Manufacturer Part Number
98 4 5.76K 1/10W
1% 0603
99 12 100PF 50V 5%
0603
100 5 1000PF 50V 5%
0603
101 1 47.5K 1/10W
1% 0603
102 8 220PF 50V 5%
0603
103 12 680PF 50V 5%
0603
104 9 2200PF 50V 5%
0603
105 1 33.0 1/10W 1%
0603
R111-112,R117-118 DIGI-KEY 311-5.76KHRTR-ND
C94,C99,C105, C117,C125,C131­132,C140,C155, C161,C166-167
C2,C156-157,C164­165
R183 DIGI-KEY 311-47.5KHRTR-ND
C89,C97,C103, C109,C121,C127, C136,C139
C96,C102,C108, C115,C122,C128, C135,C141,C148­149,C158,C160
C88,C98,C104, C110,C120,C126, C137-138,C219
R195 DIGI-KEY 311-33.0HRTR-ND
AVX 06035A101JAT2A
PANASONIC ECJ-1VC1H102J
PANASONIC ECJ-1VC1H221J
PANASONIC ECJ-1VC1H681J
PANASONIC ECJ-1VB1H222K
106 8 2.74K 1/10W
1% 0603
107 1 75.0 1/10W 1%
0603
108 4 1UF 6.3V 20%
0402
109 4 100 1/16W 5%
0402
110 1 0.027UF 25V
5% 0603
R38,R47,R53,R61, R70,R78,R89,R98
R141 DALE CRCW060375R0FKEA
C197-200 PANASONIC ECJ-0EB0J105M
R165-167,R179 DIGI-KEY 311-100JRTR-ND
C181 AVX 06033C273JAT2A
DIGI-KEY 311-2.74KHRTR-ND
A-8 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 69
ADSP-21369 EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference Designator Manufacturer Part Number
111 2 0.27UF 16V
20% 0603
112 2 2.05K 1/16W
1% 0402
113 1 15.0K 1/16W
1% 0603
114 1 232.0 1/16W 1%
0603
115 2 301.0 1/16W 1%
0603
116 2 24.9K 1/10W
1% 0603
117 1 47UF 6.3V 10% BCT5 NIC COMPO-
118 1 511.0 1/16W 1%
0402
119 1 0.05 1/2W 1%
1206
120 2 10UF 16V 10%
1210
C180,C182 AVX 0603YG274ZAT2A
R100-101 VISHAY CRCW04022K05FKED
R140 DIGI-KEY 311-15.0KHRTR-ND
R129 DIGI-KEY 311-232HRTR-ND
R105-106 DIGI-KEY 311-301HRTR-ND
R11,R196 DIGI-KEY 311-24.9KHTR-ND
NENTS
R135 DIGI-KEY 311-511LCT-ND
R13 SEI CSF 1/2 0.05 1%R
C100,C224 AVX 1210YD106KAT2A
NTC-T476K6.3TRBF
121 1 GREEN
LED001
122 1 RED LED001 LED10 PANASONIC LN1261CTR
123 2 1000PF 50V 5%
1206
124 1 255.0K 1/10W
1% 0603
125 2 80.6K 1/10W
1% 0603
126 1 6.8UH 25%
IND009
LED9 PANASONIC LN1361CTR
C213-214 AVX 12065A102JAT2A
R16 VISHAY CRCW06032553FK
R15,R197 DIGI-KEY 311-80.6KHRCT-ND
L3 DIGI-KEY 308-1328-1-ND
ADSP-21369 EZ-KIT Lite Evaluation System Manual A-9
Page 70
Ref. Qty. Description Reference Designator Manufacturer Part Number
127 1 4A SSB43L
DO-214AA
128 5 5A
MBRS540T3G SMC
129 1 2.5UH 30%
IND013
130 1 470UF 2.5V
20% D2E
131 3 30A GSOT05
SOT23-3
132 1 30A GSOT03
SOT23-3
133 1 7A VESD01-
02V-GS08 SOD-52
134 2 0.03 1/2W 1%
1206
D5 VISHAY SSB43L
D3,D6-7,D13-14 ON SEMI MBRS540T3G
L1 COILCRAFT MSS1038-252NLB
CT7 SANYO 2R5TPE470MF
D9-11 VISHAY GSOT05-GS08
D12 VISHAY GSOT03-GS08
D8 VISHAY VESD01-02V-GS08
R199,R201 SEI CSF 1/2 0.03 1%R
A-10 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 71
A B C D
1
1
2
2
ADSP-21369 EZ-KIT Lite
Schematic
3
ANALOG
4
DEVICES
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
4

Title

Size Board No.
C
Date Sheet of
A B C D
5-28-2009_15:27 1 13
ADSP-21369 EZ-KIT Lite
TITLE
A0196-2005
Rev
2.2
Page 72
A B C D
ADDR[0:23]
1
R1 0
2
3
SDCLK0
MS2_FLAG2_IRQ2
MS3_FLAG3_IRQ3_LED8
FLAG1_~IRQ1_SW1 FLAG0_~IRQ0_SW2
DSP_CLKIN
0402
SDCLK1
SDCKE SDCAS SDRAS
SDWE
SDA10
MS0 MS1
RESET
RD
WE
ACK
CLKOUT
XTAL PIN TEST POINT
ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 ADDR9 ADDR10 ADDR11 ADDR12 ADDR13 ADDR14 ADDR15 ADDR16 ADDR17 ADDR18 ADDR19 ADDR20 ADDR21 ADDR22 ADDR23
C1
0.1UF 0402 DNP
DO NOT POPULATE C1
U44
W19
ADDR0
W17
ADDR1
W18
ADDR2
Y17
ADDR3
W16
ADDR4
W15
ADDR5
Y16
ADDR6
Y15
ADDR7
W14
ADDR8
Y14
ADDR9
W13
ADDR10
Y13
ADDR11
W12
ADDR12
W11
ADDR13
W8
ADDR14
W7
ADDR15
W6
ADDR16
W5
ADDR17
Y4
ADDR18
W3
ADDR19
W4
ADDR20
W2
ADDR21
V1
ADDR22
V2
ADDR23
N2
SDCLK0
B2
SDCLK1
T1
SDCKE
T2
SDCAS
R2
SDRAS
R1
SDWE
P1
SDA10
U1
MS0
U2
MS1
L1
MS2_FLAG2_IRQ2
M2
MS3_FLAG3_TIMEXP
L2
FLAG1_~IRQ1
K1
FLAG0_~IRQ0
B16
RESET
N1
RD
P2
WR
M1
ACK
Y7
XTAL
Y8
CLKIN
A17
CLKOUT ADSP-21369
SBGA256
DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8
DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31
TCK
TDI TDO TMS
TRST
EMU
BOOT_CFG0 BOOT_CFG1
CLK_CFG0 CLK_CFG1
U19 V19 U20 V20 T20 T19 R19 R20 P19 P20 N20 N19 M19 M20 L20 L19 K20 J20 H20 H19 G20 F20 G19 E20 D20 E19 D19 C19 B19 B18 B17 A18
B4 A2 B7 A3 B3 A6
B5 B6
A4 A5
DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31
DATA[0:31]
BOOT_CFG0 BOOT_CFG1
CLK_CFG0 CLK_CFG1
3.3V
R202
4.7K 0402
R4
4.7K 0402
DPI1_MOSI
TCK TDI TDO TMS TRST EMU
R2 0 0402
R3 0
DPI2_MISO
0402
DPI3_SPICLK
DPI4_SPI_AD1835_CS
DPI5_SPI_FLASH_CS
DPI6_LED1 DPI7_LED2 DPI8_LED3
DPI9_UART0_TX
DPI10_UART0_RX DPI11_UART0_RTS DPI12_UART0_CTS
DPI13_LED4 DPI14_LED5
When designing your JTAG interface please refer to the Engineer to Engineer Note EE-68 which can be found at http://www.analog.com
U44
B15
DPI1
A16
DPI2
A15
DPI3
B14
DPI4
B13
DPI5
A14
DPI6
A13
DPI7
B12
DPI8
A12
DPI9
A11
DPI10
B11
DPI11
A10
DPI12
B10
DPI13
A9
DPI14
A1
NC1
A19
NC2
A20
NC3
B20
NC4
W20
NC5
Y2
NC6
Y3
NC7
Y9
NC8
Y10
NC9
Y20
NC10
C20
NC11
Y05
NC12
Y06
NC13
Y11
NC14
Y12
NC15 ADSP-21369
SBGA256
BOOT_CFG0 BOOT_CFG1
CLK_CFG0 CLK_CFG1
R22 10K 0402
DAI1 DAI2 DAI3 DAI4 DAI5 DAI6 DAI7 DAI8
DAI9 DAI10 DAI11 DAI12 DAI13 DAI14 DAI15 DAI16 DAI17 DAI18 DAI19 DAI20
AVDD
AGND
3.3V
10K 0402
A8 B9 B8 A7 B1 D2 C2 E2 C1 D1 E1 F2 G2 F1 G1 H2 H1 J2 J1 K2
W9
W10
R21R20 10K 0402
DAIP1_SPDIF_OUT DAIP2_PLLMCLK_OUT DAIP3_PLLMCLK_IN DAIP4_ELVIS_TRIG DAIP5_ADC_DATA
DAIP7_ADC_BCLK DAIP8_ADC_LRCLK DAIP9_DAC_D4 DAIP10_DAC_D3 DAIP11_DAC_D2 DAIP12_DAC_D1 DAIP13_DAC_BCLK DAIP14_DAC_LRCLK DAIP15_LED6 DAIP16_LED7 DAIP17_AUDIO_OSC DAIP18_SPDIF_IN DAIP19_SW3 DAIP20_SW4
C2 1000PF 0603
R19 10K 0402
SW2
1
1 2 3 4
2 3 4 5
DIP4 SWT018
C5
0.01UF 0402
ON
8 7 6
R195
33.0 0603
DAIP6_AD1835_MCLK
VDDINT
FER1 600600
0603
C3
0.1UF 0402
SW2: BOOT/CLOCK RATIO SELECT (Default: 1=ON, 2=OFF, 3=ON, 4=OFF)
1 2
BOOTCFG1BOOTCFG0
ON ON
OFFON OFF ON OFF OFF
SPI SLAVE BOOT EPROM/FLASH BOOT SPI MASTER BOOT RESERVED
3 4
CLKCFG0 CLKCFG1
ONON
OFFON
OFF
ON
OFF OFF
BOOTMODE
CLOCK RATIO
CORE:CLKIN
6:1 16:1 32:1
RESERVED
1
2
DEFAULT
DEFAULT
Boot/Clk Config Switch
3.3V3.3V
OSC
C4
0.01UF 0402
ANALOG
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
Title
DEVICES
ADSP-21369 EZ-KIT Lite
DSP
Size Board No.
C
Date Sheet of
A0196-2005
4
Rev
2.2
1325-28-2009_15:27
R5 10K 0402
4
U28
1 3
OE OUT
24.576MHZ OSC003
DSP OSC
R6 33 0402
DSP_CLKIN
A B C D
Page 73
A B C D
VDDINT
U44
E3
VDDINT1
E4
VDDINT2
C7
VDDINT3
C10
VDDINT4
1
2
VDDEXT
3
C13
VDDINT5
C16
VDDINT6
C17
VDDINT7
C18
VDDINT8
G17
VDDINT9
G18
VDDINT10
L3
VDDINT11
L4
VDDINT12
D7
VDDINT13
D10
VDDINT14
D13
VDDINT15
H3
VDDINT16
H4
VDDINT17
U3
VDDINT18
U8
VDDINT19
U12
VDDINT20
U15
VDDINT21
U17
VDDINT22
U18
VDDINT23
K17
VDDINT24
K18
VDDINT25
P3
VDDINT26
P4
VDDINT27
P17
VDDINT28
P18
VDDINT29
V3
VDDINT30
V8
VDDINT31
V12
VDDINT32
V15
VDDINT33
L17
VDDINT34
L18
VDDINT35
F17
VDDIO1
K4
VDDIO2
C4
VDDIO3
G4
VDDIO4
D4
VDDIO5
D6
VDDIO6
D9
VDDIO7
D12
VDDIO8
D15
VDDIO9
D17
VDDIO10
H17
VDDIO11
N4
VDDIO12
U5
VDDIO13
U7
VDDIO14
U9
VDDIO15
U11
VDDIO16
U13
VDDIO17
U14
VDDIO18
U16
VDDIO19
V13
VDDIO20
R17
VDDIO21
M17
VDDIO22
T4
VDDIO23
ADSP-21369 SBGA256
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8
GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND34 GND35 GND36 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND54 GND55 GND56 GND57 GND58 GND59 GND60 GND61
E17 E18 J3 J4 F3 F4 F18 K3 C3 C5 C6 C8 C9 C11 C12 C14 C15 G3 D3 D5 D8 D11 D14 D16 D18 H18 M3 M4 J17 J18 N3 N17 N18 U4 U6 U10 V4 V5 V6 V7 V9 V10 V11 V14 V16 V17 V18 R3 R4 R18 W1 M18 T3 T17 T18 Y1 Y18 Y19 F19 J19 K19
DA_EMULATOR_SELECT
C63
0.01UF 0402
C47 C46
0.01UF 0402
C61
0.01UF 0402
3.3V
R180
4.7K 0402
C56
0.01UF 0402
0.01UF 0.01UF 0402
C37
0.01UF 0.01UF 0402
JTAG
HEADER
ZP4
1 3 5 7
9 11 13
IDC7X2
VDDINT
C55 C54 0402
C45 C44 0402
C36 0402
2 4 6 8 10 12 14
0.01UF 0.01UF 0402
VDDINT
0.01UF 0.01UF 0402
VDDINT
C35
0.01UF 0402
C53 C52 0402
C43 C42 0402
C34 C33
0.01UF 0402
DA_EMULATOR_SELECT
DA_SOFT_RESET
0.01UF 0.01UF 0402
0.01UF 0.01UF 0402
0.01UF 0.01UF 0402
VDDINT
C58 0805
RESET
C51 C50 0402
C41 0402
C32 0402
C57 10UF10UF 0805
DA_EMULATOR_SELECT DA_EMULATOR_EMU DA_EMULATOR_TMS DA_EMULATOR_TCK DA_EMULATOR_TRST DA_EMULATOR_TDI DA_EMULATOR_TDO
RESET DA_SOFT_RESET
0.01UF 0.01UF 0402
C40
0.01UF 0402
C31
0.01UF0.01UF 0402
C49 0402
C39
0.01UF 0402
C30 C62
0.01UF 0402
C59
0.01UF0.01UF 0402
C60
0.01UF 0402
0.01UF 0.01UF 0402
3.3V
3V
C48
0.01UF 0402
C38
0.01UF 0402
C29 0402
TMS
TCK
TRST
TDI
TDO
EMU
DA_GP0 DA_GP1 DA_GP2 DA_GP3
TMS TCK TRST TDI TDO EMU
C11 C10
0.01UF 0402
C17 C16
0.01UF 0402
C22 0402
0.01UF 0.01UF 0402
0.01UF 0.01UF 0402
C25
0.01UF0.01UF 0402
All USB interface circuitry is considered proprietary and has been omitted from this schematic.
When designing your JTAG interface please refer to the Engineer to Engineer Note EE-68 which can be found at http://www.analog.com
ANALOG
VDDEXT
C9 C8 0402
C15 C14 0402
C21 C20
0.01UF 0402
0.01UF 0.01UF 0402
VDDEXT
0.01UF 0.01UF 0402
VDDEXT
0.01UF 0.01UF 0402
C7 0402
C13 0402
C19 0402
VDDEXT
C24 0805
20 Cotton Road
C28
0.01UF 0402
C27
0.01UF 0402
C26
0.01UF 0402
C23 10UF10UF 0805
C6
0.01UF 0402
C12
0.01UF 0402
C18 0402
1
2
Nashua, NH 03063
4
DEBUG_AGENT
GND
SHGND
DEVICES
PH: 1-800-ANALOGD
4
Title
ADSP-21369 EZ-KIT Lite
DSP 2
SHGND
A B C D
Size Board No.
C
Date Sheet of
5-28-2009_15:27 3 13
A0196-2005
Rev
2.2
Page 74
A B C D
SDRAM
128Mb (1M x 32-bit x 4 Banks)
U36
ADDR[1:18]
1
SDA10
3.3V
DNP
2
R24 10K 0402
R25 10K 0402
MS2_FLAG2_IRQ2
SDCKE
SDCLK0
SDWE SDCAS SDRAS
DQM
DQM signals are either tied to GND or
ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 ADDR9 ADDR10
ADDR12
ADDR17 ADDR18
3.3V
driven by processor's FLAG pin. This
25 26 27 60 61 62 63 64 65 66 24 21
22 23
20 67 68
17 18 19
16 71 28 59
14 30 57 69 70 73
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
BA0 BA1
CS CKE CLK
WE CAS RAS
DQM0 DQM1 DQM2 DQM3
NC1 NC2 NC3 NC4 NC5 NC6
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
2
DATA0
4
DATA1
5
DATA2
7
DATA3
8
DATA4
10
DATA5
11
DATA6
13
DATA7
74
DATA8
76
DATA9
77
DATA10
79
DATA11
80
DATA12
82
DATA13
83
DATA14
85
DATA15
31
DATA16
33
DATA17
34
DATA18
36
DATA19
37
DATA20
39
DATA21
40
DATA22
42
DATA23
45
DATA24
47
DATA25
48
DATA26
50
DATA27
51
DATA28
53
DATA29
54
DATA30
56
DATA31
is SDRAM device specific and the
1
requirement is specified in SDRAM datasheets
3
VDD1
15
VDD2
29
VDD3
43
VDD4
3
VDDQ1
9
VDDQ2
35
VDDQ3
41
VDDQ4
49
VDDQ5
55
VDDQ6
75
VDDQ7
81
VDDQ8
VSS1 VSS2 VSS3 VSS4
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8
44 58 72 86
6 12 32 38 46 52 78 84
DATA[0:31]
ADDR[0:19]
MS0
RD
WE
ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 ADDR9 ADDR10 ADDR11 ADDR12 ADDR13 ADDR14 ADDR15 ADDR16 ADDR17 ADDR18
ADDR19
3.3V
3.3V
SPI Flash
Asynchronous SRAM 2Mb
4Mb (512K x 8-bit)
U30
3
A0
4
A1
5
A2
6
A3
7
A4
16
A5
17
A6
18
A7
19
A8
20
A9
26
A10
27
A11
28
A12
29
A13
30
A14
38
A15
39
A16
40
A17
41
A18
25
NC/A19
8
CE
37
OE
15
WE
IS61LV5128ALIS61LV5128AL TSOP44
D0 D1 D2 D3 D4 D5 D6 D7
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9
VDD1 VDD2
GND1 GND2
9
DATA0
10
DATA1
13
DATA2
14
DATA3
31
DATA4
32
DATA5
35
DATA6
36
DATA7
1 2 21 22 23 24 42 43 44
11 33
12 34
3.3V
DATA[0:7]
DPI3_SPICLK
DPI1_MOSI
FLASH_CS
RESET
ADDR[0:20]
MS1
RD
WE
R26 10K 0402
R23 10K 0402
ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 ADDR9 ADDR10 ADDR11 ADDR12 ADDR13 ADDR14 ADDR15 ADDR16 ADDR17 ADDR18 ADDR19
ADDR20
U29
7
HOLD
6
SCK
5
SI
1
CS
3
WP
M25P20 SOIC8
Flash
8Mb (1M x 8-bit)
U35
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
38
NC/A20
22
CE
24
OE
9
WE
VCC
SO
GND
D0 D1 D2 D3 D4 D5 D6 D7
NC1 NC2
RY/BY
RESET
VCC1 VCC2
VSS1 VSS2
3.3V
8
2
4
R7 0 0402
DPI2_MISO
1
2
25
DATA0
26
DATA1
27
DATA2
28
DATA3
32
DATA4
33
DATA5
34
DATA6
35
DATA7
11 29
12
10
31 30
39 23
RESET
DATA[0:7]
3.3V
C73
0.01UF 0402
MT48LC4M32B2MT48LC4M32B2 TSOP86
3.3V
C74 C72 0402
C65
0.01UF 0402
C64
0.01UF0.01UF 0402
0.01UF 0402
C71
0.01UF 0402
C66
0.01UF 0402
C67
0.01UF 0402
3.3V3.3V
C68
0.01UF 0402
3.3V
C69
0.01UF 0.01UF 0402
C70 0402
ANALOG
AM29LV081B TSOP40
20 Cotton Road Nashua, NH 03063
4
SDRAM
IS61LV5128
AM29LV081 AT25F512N
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
4

MEMORY

Size Board No.
C
Date Sheet of
5-28-2009_15:27 4 13
A0196-2005
Rev
2.2
A B C D
Page 75
A B C D
ADC
LEFT (WHITE)
DAC1
DAC2
DAC3
DAC4
DAC4
SPDIF IN
SPDIF OUT
RIGHT (RED)
3.3V 3.3V
IN (J10) OUT (J5) OUT (J9) IN (J8) OUT (J7)
1
AD1835 AUDIO
CODEC
R8 0 0402
DAIP7_ADC_BCLK
ADC_LRCLK
ADC_DATA
R9 0 0402
DAIP13_DAC_BCLK
DAIP14_DAC_LRCLK
DAIP12_DAC_D1 DAIP11_DAC_D2 DAIP10_DAC_D3
3.3V
2
R32 10K 0402
AD1835_CS
3.3V
5V
DAIP9_DAC_D4
DAIP6_AD1835_MCLK
DPI1_MOSI
DPI2_MISO
DPI3_SPICLK
MASTER_SLAVE
RESET
3
U31
45
ABCLK ADCLN
46
ALRCLK
49
ASDATA
38
DBCLK
37
DLRCLK
41
DSDATA1
42
DSDATA2
43
DSDATA3
44
DSDATA4
47
MCLK
3
CIN
50
COUT
51
CCLK
2
CLATCH
36
~M/S
4
PD/RST
48
ODVDD
1
DVDD1
39
DVDD2
40
DGND1
52
DGND2
ADCRN ADCRP
OUTRP1 OUTRN1
OUTLP1 OUTLN1
OUTRP2 OUTRN2
OUTLP2 OUTLN2
OUTRP3 OUTRN3
OUTLP3 OUTLN3
OUTRP4 OUTRN4
OUTLP4 OUTLN4
AGND1 AGND2 AGND3 AGND4 AGND5 AGND6
ADCLP
FILTD FILTR
AVDD1 AVDD2 AVDD3
20 21 22 23
9 8 7 6
15 14 13 12
28 27 26 25
34 33 32 31
17 18
11 19 29
5 10 16 24 30 35
A5V
ADCLN ADCLP ADCRN ADCRP
OUTRP1 OUTRN1 OUTLP1 OUTLN1
OUTRP2 OUTRN2 OUTLP2 OUTLN2
OUTRP3 OUTRN3 OUTLP3 OUTLN3
OUTRP4 OUTRN4 OUTLP4 OUTLN4
C84 10UF 0805 0402
AGND
ADC
DAC1
DAC2
DAC3
DAC4
C75
0.1UF
C85 10UF 0805
C76
0.1UF 0402
R28
6.04K 0805
R29
6.04K 0805
6
5
2
3
U8
AD8606ARZ SOIC8
R30
6.04K 0805
U8
AD8606ARZ SOIC8
7
1
AUDIO_VREF_ADC
AUDIO_VREF_DAC
AUDIO OSC
R33 10K 0402
U1
1 3
OE OUT
12.288MHZ OSC003
R27 33 0402
DAIP5_ADC_DATA
SW3: CODEC SETUP SWITCH (Default: 1=OFF, 2=ON, 3=ON, 4=ON)
Connects or disconnects the audio oscillator
1-2
depending on how the system is setup. See users manual for more information.
3
OFF = AD1835 is SLAVE ON = AD1835 is MASTER
Disconnects ADC_DATA signal from
4
driving the corresponding DAI signal. Useful if using this DAI pin for another purpose.
Disconnects Audio and SPI chip selects, also ALRCLK
SW15
1
DPI4_SPI_AD1835_CS
DAIP8_ADC_LRCLK
DPI5_SPI_FLASH_CS
1 2 3 4
2 3 4 5
DIP4 SWT018
SW3
1 2 3 4
DIP4 SWT018
ON
8 7 6
ON
1 2 3 4 5
8 7 6
AD1835_CS ADC_LRCLK FLASH_CS
R34 10K 0402
DAIP6_AD1835_MCLK DAIP17_AUDIO_OSC
MASTER_SLAVE ADC_DATA
1
2
AD1835AASZ MQFP52
AGND
Loopback Test Switch
3.3V
5V
5V_B
A5V3.3V A5V
A5V
(Default= All OFF)
For Test Purposes Only
FER2 600
C78
0.01UF 0402
C79
0.01UF 0402
C80
0.01UF 0402
C81
0.01UF 0402
600
0603
R31 0 0603
C82
0.01UF 0402
C83
0.01UF 0402
C77
0.22UF 0805
AIN_AMP_LEFT
AIN_AMP_RIGHT
4
OSC
AD1835 AD1835
AGND
AGND
AD1835
AGND
AD8606
SW14
1 2 3
3
4 5 6 7 8
81 2 4 5 6 7
DIP8 SWT016
ON
16 15 14 13 12 11 10 9
AOUT3_LEFT AOUT3_RIGHT AOUT4_LEFT AOUT4_RIGHT AOUT1_LEFT AOUT1_RIGHT AOUT2_LEFT AOUT2_RIGHT
Title
ANALOG DEVICES
ADSP-21369 EZ-KIT Lite
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
4

ANALOG AUDIO

Size Board No.
C
Date Sheet of
A B C D
5-28-2009_15:27 5 13
A0196-2005
Rev
2.2
Page 76
A B C D
1
OUTLN1
DAC1 LEFT
OUTLP1
AUDIO_VREF_DAC
R39
11.0K 0603
R37
5.49K 0603
R38
2.74K 0603
R67
5.49K 0603
C116 330PF 0603
C115 680PF 0603
R36
3.32K 0603
R64
1.65K 0603
C117 100PF 0603
2
3
C89 220PF 0603
U9
AD8606ARZ SOIC8
R50
11.0K 0603
OUTLN2
1
R65
604.0 0603
C111 10UF 0805
C88 2200PF 0603
AOUT1_LEFT
R66
49.9K 0603
2
J5 CON011
3
DAC2 LEFT
OUTLP2
AUDIO_VREF_DAC
R51
5.49K 0603
R53
2.74K 0603
R48
5.49K 0603
C101 330PF 0603
C102 680PF 0603
R49
3.32K 0603
R52
1.65K 0603
C99 100PF 0603
2
3
C103 220PF 0603
U10
AD8606ARZ SOIC8
1
R54
604.0 0603
C113 10UF 0805
C104 2200PF 0603
AOUT2_LEFT
R55
49.9K 0603
5
J5 CON011
6
1
2
AGNDAGND
R42
5.49K 0603
C95 330PF 0603
R43
3.32K 0603
OUTRN1
R40
11.0K 0603
DAC1 RIGHT DAC2 RIGHT
C96 680PF
3
OUTRP1
AUDIO_VREF_DAC
R41
5.49K 0603
R47
2.74K 0603
0603
R44
1.65K 0603
C94 100PF 0603
6
5
C97 220PF 0603
U9
AD8606ARZ SOIC8
R58
11.0K 0603
OUTRN2
7
R45
604.0 0603
C112 10UF 0805
C98 2200PF 0603
AOUT1_RIGHT
R46
49.9K 0603
1
J5 CON011
3
OUTRP2
AUDIO_VREF_DAC
R59
5.49K 0603
R61
2.74K 0603
R56
5.49K 0603
C107 330PF 0603
C108 680PF 0603
R57
3.32K 0603
R60
1.65K 0603
C105 100PF 0603
6
5
C109 220PF 0603
U10
AD8606ARZ SOIC8
7
R62
604.0 0603
C114 10UF 0805
C110 2200PF 0603
AOUT2_RIGHT
R63
49.9K 0603
4
J5 CON011
6
2
C91 0805
A5VA5V
C92
0.22UF0.22UF 0805
AGND AGND
ANALOG
20 Cotton Road Nashua, NH 03063
4
AGND
AD8606 AD8606
AGND
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
4

AUDIO OUT 1

Size Board No.
C
Date Sheet of
A B C D
5-28-2009_15:27 6 13
A0196-2005
Rev
2.2
Page 77
A B C D
1
R73
11.0K 0603
OUTLN3
DAC3 LEFT
R72
5.49K 0603
OUTLP3
R70
2.74K 0603
AUDIO_VREF_DAC
R75
5.49K 0603
C123 330PF 0603
C122 680PF 0603
R74
3.32K 0603
R71
1.65K 0603
C125 100PF 0603
2
3
C121 220PF 0603
U11
AD8606ARZ SOIC8
R86
11.0K 0603
OUTLN4
1
R69
604.0 0603
C144 10UF 0805
C120 2200PF 0603
AOUT3_LEFT
R68
49.9K 0603
8
J5 CON011
9
DAC4 LEFT
OUTLP4
AUDIO_VREF_DAC
R87
5.49K 0603
R89
2.74K 0603
R84
5.49K 0603
C134 330PF 0603
C135 680PF 0603
R85
3.32K 0603
R88
1.65K 0603
C132 100PF 0603
2
3
C136 220PF 0603
U12
AD8606ARZ SOIC8
1
R90
604.0 0603
AOUT4_LEFT_HP
C147 10UF 0805
C137 2200PF 0603
AOUT4_LEFT
R91
49.9K 0603
11
J5 CON011
12
1
2
AGNDAGND
R83
5.49K 0603
C129 330PF 0603
R82
3.32K 0603
OUTRN3
R81
11.0K 0603
DAC3 RIGHT DAC4 RIGHT
C128 680PF
R79
R80
5.49K
3
OUTRP3 OUTRP4
AUDIO_VREF_DAC
0603
R78
2.74K 0603
0603
1.65K 0603
C131 100PF 0603
6
5
C127 220PF 0603
U11
AD8606ARZ SOIC8
R97
11.0K 0603
OUTRN4
7
R77
604.0 0603
C145 10UF 0805
C126 2200PF 0603
AOUT3_RIGHT
R76
49.9K 0603
7
J5 CON011
9
AUDIO_VREF_DAC
R99
5.49K 0603
R98
2.74K 0603
R96
5.49K 0603
C142 330PF 0603
C141 680PF 0603
R94
3.32K 0603
R95
1.65K 0603
C140 100PF 0603
6
5
C139 220PF 0603
U12
AD8606ARZ SOIC8
AOUT4_RIGHT_HP
7
R93
604.0 0603
C146 10UF 0805
C138 2200PF 0603
AOUT4_RIGHT
R92
49.9K 0603
10
J5 CON011
12
2
A5V
C118 0805
A5V
C119
0.22UF0.22UF 0805
AGND AGND
ANALOG
20 Cotton Road Nashua, NH 03063
4
AGND
AD8606 AD8606
AGND
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
4

AUDIO OUT 2

Size Board No.
C
Date Sheet of
A B C D
5-28-2009_15:27 7 13
A0196-2005
Rev
2.2
Page 78
J10
CON031
A B C D
R105
301.0 0603
AIN_AMP_LEFT
FER4 600
600
2
AIN_LEFT
0603
C162 10UF 0805
VREF_MIC_L
11.0K 0603
R103R102
5.49K 0603
R104
5.49K 0603
1
3
AGND
AGND
C166 100PF 0603
AUDIO_VREF_ADC
R117
5.76K 0603
R116
750.0K 0603
AUDIO_VREF_ADC
C148 680PF 0603
2
3
6
5
U13
AD8606ARZ SOIC8
R118
5.76K 0603
C150 120PF 0603
U13
DNP
AD8606ARZ SOIC8
1
7
C149 680PF 0603
AGND
R123
237.0 0603
R122
237.0 0603
C165 1000PF 0603
C164 1000PF 0603
C167 100PF 0603
ADCLN
ADC LEFT
ADCLP
DAC4
HEADPHONE OUT
AOUT4_RIGHT_HP
AOUT4_LEFT_HP
1
2
3
6
5
U19
AD8532ARZ SOIC8
U19
AD8532ARZ SOIC8
1
7
CT2 68UF CAP003
CT1 68UF CAP003
R119
49.9K 0603
R120
49.9K 0603
J9
2 3 4 5 1
CON001
AGND
2
R106
301.0 0603
J10
CON031
3
AGND
1
AIN_AMP_RIGHT
AIN_RIGHT
FER3 600
600
0603
AGND
3
A5V
A5VA5V
VREF_MIC_R
C163 10UF 0805
C161 100PF 0603
R115
11.0K
AUDIO_VREF_ADC
R112
5.76K 0603
R110
750.0K 0603
AUDIO_VREF_ADC
R114
5.49K 06030603
C160 680PF 0603
2
3
6
5
U15
AD8606ARZ SOIC8
R111
5.76K 0603
C159 120PF 0603
U15
DNP
AD8606ARZ SOIC8
R113
5.49K 0603
C158 680PF 0603
R109
237.0
1
R108
237.0
7
0603
0603
AGND
C157 1000PF 0603
C156 1000PF 0603
C155 100PF 0603
ADCRN
ADC RIGHT
ADCRP
AUDIO_VREF_ADC
R121 0 0402
2
3
U14
AD8606ARZ SOIC8
1
R100
2.05K 0402
R101
2.05K 0402
AUDIO_VREF_ADC
ELECTRET MICROPHONE ENABLE SWITCH
(Default = All OFF)
SW4
1 2 3 4
DIP4 SWT018
ON
8 7 6
1 2 3 4 5
WHEN USING AN ELECTRET MICROPHONE PLACE ALL SWITCHES IN ON POSITION
AGND
AIN_RIGHT AIN_LEFT VREF_MIC_L VREF_MIC_R
A5V
AGND
AD8606
C151 10UF 0805
2
C154
0.22UF 0.22UF 0805
C153 C152 0805
0.22UF 0805
AGND
R107 0 0402
6
5
U14
AD8606ARZ SOIC8
7
ANALOG
20 Cotton Road Nashua, NH 03063
4
AGND
AGND
AD8606AD8532 AD8606
AGND
AGND
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
4
AUDIO IN & HEADPHONE OUT
Size Board No.
C
A0196-2005
Date Sheet of
A B C D
Rev
2.2
1385-28-2009_15:27
Page 79
A B C D
3.3V
3.3V
1
R140
15.0K 0603
SPDIF COAX
J8 CON012
2
SPDIF_COAX_IN
C185
0.22UF 0805
ADM3202
C173
0.01UF 0402
C169
0.1UF 0402
C168
0.1UF 0402
1 3
4 5
U32
C1+ C1-
C2+ C2-
V+
INPUT
11
1
C186
0.22UF RX_IN 0805
R141
75.0 0603
R125
10.0K 0603
U2
RIN­RIN+ NC1 NC2
SN65LVDS2D SOIC8
VCC
ROUT
NC3
GND
R124 22 0402
DAIP18_SPDIF_IN
DPI9_UART0_TX
DPI12_UART0_CTS
DPI10_UART0_RX
DPI11_UART0_RTS
SW5
1 2 3 4
DIP4 SWT018
ON
8 7 6
1 2 3 4 5
UART Enable Switch
T1IN T1OUT
10 7
T2IN T2OUT
R1INR1OUT
ADM3202ARNZ SOIC16
R2INR2OUT
3.3V
C170
0.1UF
0402 2 6
V-
14
1312 89
TX_OUT
C171
0.1UF
0402
J6
1
6
2
7
3
8
4
9
5
DB9F
1
SERIAL PORT (UART 0)
3.3V
2
C175
0.01UF 0402
R138 R133 0 0402
65LVDS2D
C172
U16
DAIP1_SPDIF_OUT
3
3.3V
3.3V
1 2
SN74LVC1G08 SOT23-5
U17
1 2
SN74LVC1G08 SOT23-5
DNP
4
4
0.1UF 0805
DAIP2_PLLMCLK_OUT
DAIP3_PLLMCLK_IN
R127
249.0 0805
SPDIF_COAX_OUT
R128
107.0 0805
J7
CON012
2
SPDIF COAX OUT
1
3.3V
R137 100 0402 DNP
R136 100 0402 DNP
3.3V
U39
GND GREF
2
SREF
3
S1
4
S2
GTL2002 TSSOP8
DREF
D1 D2
5V_B
2
5V_B
R139 330 0603 DNP
U38
5
FIN_B
4
FIN_A
8
NC
1
LOGIC_VDD
PFD_INH
7
LOGIC_GND TLC2932
TSSOP14
22 0402
VCO_OUT
SELECT
PFD_OUT
VCO_IN
VCO_VDD
BIAS
VCO_INH
VCO_GND
5V_PLL
5V_PLL
3
2
6
12
14 13 109 11
R130
3.32K 0603
R131
75.0K 0603
R132
VCO Selection Jumper
10K 0402
JP1
1 2
IDC2X1
R129
232.0 0603
C180
0.27UF 0603
AGND2
C181
0.027UF 0603
R134
200.0K
81 7 6 5
C183
0.01UF 0402
R135
511.0 04020603
AGND2
C182
0.27UF 0603
AGND2
C174
0.01UF 0402
SN74LVC1G08
C184
0.01UF 0402 DNP
SN74LVC1G08
FER5 600
600
0603
R126 0 0603
C176 10UF 0805
5V_B5V_B5V_B
C177
0.01UF 0402
5V_PLL5V_PLL 5V_PLL
C178 C179
0.01UF 0402
1UF 0603
AGND2
Loopback Test Switch
(Default= All OFF)
For Test Purposes Only
SW6
1 2 3 4
DIP4 SWT018
ON
8 7 6
SPDIF_COAX_OUT TX_OUT
SPDIF_COAX_IN
RX_IN
4
1 2 3 4 5
AGND2
TLC2932
AGND2AGND2
TLC2932TLC2932TLC2932
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
EXTERNAL PLL, SPDIF, & RS-232
Size Board No.
C
Date Sheet of
A B C D
5-28-2009_15:27 9 13
A0196-2005
Rev
2.2
Page 80
A B C D
VDDINT_SHUNT
VDDINT
1
R143 0 0603
DSP CORE CURRENT
2
3
NOTE: R143 needs to be replaced with 0.1 OHM resistor, if this circuit is to work for ELVIS power measurements.
TP14
VDDEXT_SHUNT
R149
0.1 0603
VDDEXT
C189
0.1UF 0603
TP13
R144
11.0K 0603
C187
0.1UF 0603
U6
3 7
IN+
2
IN-
8
RG+
1 5
RG­AD623ARMZ
USOIC8
R150
25.5K 0603
U5
IN+
2
IN-
8
RG+ RG-
AD623ARMZ USOIC8
V+
V-
OUT
REF
A5V
AGND
2
3
R142
10.0K 0603
2
3
73
V+
4
V-
6
OUT
51
REF
A5V
4 6
C188
0.01UF 0402
C192
0.01UF 0402
R147
10.0K 0603
R145
10.0K 0603
AGND
R148
10.0K 0603
R146
90.9K 0603
U33
AD820ARZ SOIC8
R151
90.9K 0603
U34
AD820ARZ SOIC8
A5V
A5V
AGND
6
6
C190
0.01UF 0402
C191
0.01UF 0402
ACH1+
ACH0+
ELVIS_PWR
JP3
1 2
IDC2X1
ELVIS Voltage Selection Jumper
RS_P2 RS_P0
WS_P4_1 WS_P2_1 WS_P0_1
ELVIS_5V
ELVIS_TRIGGER_S
ACH4+ ACH3+ ACH1+
ACH0+
FUNC_OUT
DAC0
JP2
21
IDC2X1
ELVIS Select Jumper ELVIS Programmable Flag Jumper
P11
ELVIS_5V
P6
DNP
A01
+15_P_1
A02
+15_P_2
A03
+5_P_1
A04
+5_P_2
A05
+5_P_3
A07 B07
RS_P[6] RS_P[7]
A08 B08
RS_P[4] RS_P[5]
A09 B09
RS_P[2] RS_P[3]
A10 B10
RS_P[0] RS_P[1]
A14 B14
WS_P[6]_1 WS_P[7]_1
A15
WS_P[4]_1 WS_P[5]_1
A16 B16
WS_P[2]_1 WS_P[3]_1
A17
WS_P[0]_1 WS_P[1]_1 ID6 ID7
ID4 ID5 ID2 ID3
A22
ID0 ID1
A24
NC1
A28
AS_P[0]_1
A29
PB_PRES_1
A30
UPDATE
A31 B31
CONVERT EXTSRTOBE
A32
SCANCLK
A33
TRIG1_2
A34
GATE1_1
A36
GPCTR0_OUT_1
A37 A38 B38
VH_1 VL_1
A40
ACH7_1
A41
ACH6_1
A42
ACH5_1
A43
ACH4
A45
ACH3
A46
ACH2
A47
ACH1
A48
ACH0
A49
AISENSE_1
A53 B53
FG_SYNC_1 FM_1
A54
FG_SIG_1
A55
GND14
A56
NC5
A57
ZL_1
A58
ZH_1
A60 B60
DAC0_2 DAC1_2
A62 B62
VDCA_1 VDCB_1
1 2 3 4
IDC2X2
GPCTR0_GATEGPCTR0_SOURCE
-15_P_1
-15_P_2 GND1 GND2 GND3 GND4GND5
GND6GND7
KEY1KEY2 KEY3KEY4
GND8GND9
GND10GND11 AS_P[7]_1 AS_P[5]_1AS_P[6]_1 AS_P[3]_1AS_P[4]_1 AS_P[1]_1AS_P[2]_1
+5V2
WFTRIG
STARTSCAN
TRIG2
SOURCE1_1
GPCRT1_OUT
FREQ_OUT
GND12GND13
AIGND1AIGND2 ACH15_1 ACH14_1 ACH13_1
ACH12
AIGND3AIGND4
ACH11 ACH10
ACH9 ACH8
NC2 KEY5KEY6 KEY7KEY8
NC3NC4
AM_1
+5V3
GND15
NC6 ZM_1
NC7NC8
GND16GND17
ELVIS_SELECT
B01 B02 B03 B04 B05 B06A06
B11A11 B12A12 B13A13
B15 B17
B18A18 B19A19 B20A20 B21A21 B22 B23A23 B24 B25A25 B26A26 B27A27 B28 B29 B30
B32 B33 B34 B35A35 B36 B37
B39A39 B40 B41 B42 B43 B44A44 B45 B46 B47 B48 B49 B50A50 B51A51 B52A52
B54 B55 B56 B57 B58 B59A59
B61A61
RS_P3 RS_P1
WS_P5_1 WS_P3_1 WS_P1_1
ELVIS_5V
AS_P3_1
DAC1
JP4
DAIP4_ELVIS_TRIG
AIN_LEFT AIN_AMP_LEFT
AIN_RIGHT
DAC0 DAC1
FUNC_OUT
1 2
IDC2X1
SW13
ON
1
1 2 3 4 5 6
2 3 4 5 6 7
DIP6 SWT017
12 11 10 9 8
ELVIS_TRIGGER_S
AIN_AMP_RIGHT
Function Generator Switch
SW1
3
81 2 4 5 6 7
DIP8 SWT016
ON
16 15 14 13 12 11 10 9
ACH3+
ACH4+
1 2 3 4 5 6 7 8
Oscilloscope Select Switch
1
2
AIN_AMP_LEFT AIN_AMP_RIGHT AOUT1_LEFT AOUT1_RIGHT
PCI32B
AGND
DSP IO CURRENT
AGND
ELVIS CONNECTOR
NI ELVIS ID 31 (0001 1111)
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
4

ELVIS INTERFACE

Size Board No.
C
Date Sheet of
5-28-2009_15:27 10 13
A0196-2005
Rev
2.2
A B C D
Page 81
A B C D
3.3V
R175 10K 0402
LABEL "PB1"
1
SW8 SWT013 MOMENTARY
LABEL "PB2"
SW11 SWT013 MOMENTARY
2
LABEL "PB3"
SW10 SWT013 MOMENTARY
R179 100 0402
R165 100 0402
R166 100 0402
C197 1UF 0402
R174 10K 0402
11 10
C198 1UF 0402
R173 10K 0402
C199 1UF 0402
U40
74LVC14A SOIC14
U40
74LVC14A SOIC14
U40
74LVC14A SOIC14
R157 10 0603
65
RS_P0
3.3V
1
RESET LED10 RED LED001
R178 330 0603
81 7 5
RESET
R158 10 0603
RS_P1
SW7
1 2 3 4
DIP4 SWT018
ON
1 2 3 4 5
R152
R162
10K10K 0402
0402
8 7 6
FLAG1_~IRQ1_SW1 FLAG0_~IRQ0_SW2 DAIP19_SW3 DAIP20_SW4
DA_SOFT_RESET
AS_P3_1
RESET
SW12 SWT013 MOMENTARY
U18
1 2
SN74LVC1G08 SOT23-5
R154 10K 0402
4
U23
4
RESETMR
PFI
RESET
ADM708SARZ SOIC8
PFO
2
R159 10 0603
89
Push Button Enable Switch
RS_P2
U24
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
1
S
15
E
LABEL "PB4"
SW9 SWT013 MOMENTARY
R167 100 0402
R161 10K 0402
13 12
C200 1UF 0402
U40
74LVC14A SOIC14
R160 10 0603
RS_P3
ELVIS_SELECT
3.3V
R153 10K 0402
WS_P0_1
DPI6_LED1
WS_P1_1
DPI7_LED2
WS_P2_1
DPI8_LED3
WS_P3_1
DPI13_LED4
3
ADG774ABRQZ QSOP16
3.3V
R155 0402
74LVC14A SOIC14
U40
WS_P4_1
DPI14_LED5
WS_P5_1
DAIP15_LED6
R156 10K10K 0402
U40
21
3 4
74LVC14A SOIC14
MS3_FLAG3_IRQ3_LED8
DAIP16_LED7
U25
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
1
S
15
E
YA
YB
YC
YD
YA
YB
YC
YD
4
7
9
12
4
7
9
12
U37
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
OE1
19
OE2 IDT74FCT3244APY
SSOP20
1Y1 1Y2 1Y3 1Y4
2Y1 2Y2 2Y3 2Y4
18 16 14 12
9 7 5 3
LED8 YELLOW
R164 330
YELLOW LED001LED001
330 06030603
LED6LED7 YELLOW LED001
R176R163 330
LED5 YELLOW LED001
330 06030603
LED4 YELLOW LED001
R172R177 330
LED3 YELLOW LED001
330 06030603
LED2 YELLOW LED001
R170R171 330
LED1 YELLOW LED001
330 06030603
3.3V
POWER LED9 GREEN LED001
R168R169 330 0603
3.3V
C193
0.01UF
4
0402
C202
0.01UF
C195
0.01UF 04020402
C196
0.01UF 0402
C194
0.01UF 0402
C201
0.01UF 0402
ADG774ABRQZ QSOP16
Title
ANALOG DEVICES
ADSP-21369 EZ-KIT Lite
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
4
PUSHBUTTONS, LEDS, & RESET
Size Board No.
ADM70874LVC14A
IDT74FCT3244
ADG774A ADG774A SN74LVC1G08
C
Date Sheet of
5-28-2009_15:27 11 13
A B C D
A0196-2005
Rev
2.2
Page 82
A B C D
5V
EXPANSION INTERFACE (TYPE A)
3.3V 5V
DATA[0:31]
VDDINTVDDEXT
1
ADDR[0:23]
ADDR1 ADDR3 ADDR5 ADDR7 ADDR9 ADDR11 ADDR13 ADDR15 ADDR17 ADDR19 ADDR21 ADDR23
2
DATA1 DATA3 DATA5 DATA7 DATA9 DATA11 DATA13 DATA15 DATA17 DATA19 DATA21 DATA23 DATA25 DATA27 DATA29 DATA31
3
J1
2 4 6 8
10
20
30
40
50
60
70
80
90
1 3 5 7 9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39 4142 4344 4546 4748 49 5152 5354 5556 5758 59 6162 6364 6566 6768 69 7172 7374 7576 7778 79 8182 8384 8586 8788 89
ADDR0 ADDR2 ADDR4 ADDR6 ADDR8 ADDR10 ADDR12 ADDR14 ADDR16 ADDR18 ADDR20 ADDR22
DATA0 DATA2 DATA4 DATA6 DATA8 DATA10 DATA12 DATA14 DATA16 DATA18 DATA20 DATA22 DATA24 DATA26 DATA28 DATA30
SDCLK1
SDCAS SDCKE
FLAG1_~IRQ1_SW1 FLAG0_~IRQ0_SW2
MS3_FLAG3_IRQ3_LED8 MS2_FLAG2_IRQ2
DAIP2_PLLMCLK_OUT
DAIP4_ELVIS_TRIG
DAIP6_AD1835_MCLK
DAIP8_ADC_LRCLK
DAIP10_DAC_D3 DAIP12_DAC_D1
DAIP14_DAC_LRCLK
DAIP16_LED7
DAIP18_SPDIF_IN
DAIP20_SW4
FLAG1_~IRQ1_SW1 FLAG0_~IRQ0_SW2
DPI2_MISO
DPI4_SPI_AD1835_CS
DPI6_LED1
DPI8_LED3
DPI10_UART0_RX
DPI14_LED5
J2
2 4 6 8
10
20
30
40
50
60
70
80
90
1 3 5 7 9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39 4142 4344 4546 4748 49 5152 5354 5556 5758 59 6162 6364 6566 6768 69 7172 7374 7576 7778 79 8182 8384 8586 8788 89
SDWE SDA10 SDRAS
DAIP1_SPDIF_OUT DAIP3_PLLMCLK_IN DAIP5_ADC_DATA DAIP7_ADC_BCLK DAIP9_DAC_D4 DAIP11_DAC_D2 DAIP13_DAC_BCLK DAIP15_LED6 DAIP17_AUDIO_OSC DAIP19_SW3
DPI1_MOSI DPI3_SPICLK DPI5_SPI_FLASH_CS
DPI7_LED2 DPI9_UART0_TX DPI11_UART0_RTSDPI12_UART0_CTS DPI13_LED4
RESET RESET
MS0 MS1
MS2_FLAG2_IRQ2
MS3_FLAG3_IRQ3_LED8
ACK
3.3V
VDDINT_SHUNT
1
J3
2 4 6 8
10
20
30
40
50
60
70
80
90
1 3 5 7 9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39 4142 4344 4546 4748 49 5152 5354 5556 5758 59 6162 6364 6566 6768 69 7172 7374 7576 7778 79 8182 8384 8586 8788 89
CLKOUT
RD
WE
DPI5_SPI_FLASH_CS
DAIP17_AUDIO_OSC
DPI1_MOSI
DPI3_SPICLK
DPI7_LED2
DPI9_UART0_TX
DPI11_UART0_RTS
DPI13_LED4
DAIP1_SPDIF_OUT
DAIP3_PLLMCLK_IN
DAIP5_ADC_DATA DAIP7_ADC_BCLK DAIP8_ADC_LRCLK
DAIP9_DAC_D4
DAIP11_DAC_D2
DAIP13_DAC_BCLK
DAIP19_SW3 DAIP20_SW4
3.3V
3.3V
DPI
HEADER
P3
1 3 5 7
9 11 13 15 17 19
2 4 6 8 10 12 14 16 18 20
IDC10X2
DAI
HEADER
P4
1
3
5
7
9 11 13 15 17 19 21 23 25
2 4 6 8 10 12 14 16 18 20 22 24 26
IDC13X2
DPI2_MISO DPI4_SPI_AD1835_CS DPI6_LED1
DPI8_LED3 DPI10_UART0_RX DPI12_UART0_CTS DPI14_LED5
2
DAIP2_PLLMCLK_OUT DAIP4_ELVIS_TRIG DAIP6_AD1835_MCLK
DAIP10_DAC_D3
DAIP12_DAC_D1 DAIP14_DAC_LRCLK DAIP16_LED7DAIP15_LED6 DAIP18_SPDIF_IN
CON019
CON019
CON019
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
4

EXPANSION INTERFACE

Size Board No.
C
Date Sheet of
5-28-2009_15:27 12 13
A0196-2005
Rev
2.2
A B C D
Page 83
A B C D
5V
UNREG_IN
POWER IN
J4
1
1
7_5V_POWER CON005
3
SHGND
2
C213 1000PF 1206
F1 5A FUS005
C214 1000PF 1206
D6 MBRS540T3G 5A SMC
FER7 190 FER002
4 1
3 2
D3 MBRS540T3G 5A SMC
GSOT05
SOT23-3
D9
C215 10UF 1210
C216
0.1UF 0805
C208 1UF 0805
7 8
VR3 IN1
IN2
SD
OUT1 OUT2 OUT3
GND
4
ADP3336ARMZ MSOP8
1 2 3 56
FB
UNREG_IN
R193
210.0K 0805
R194
64.9K
R192 0 0603
1UF 0805 0805
C206 C205 10UF
D10 GSOT05
D13 MBRS540T3G SMCSOT23-3
UNREG_INUNREG_IN
VR4
7
IN1
8
IN2
6 5
SD
GND
4
C209 1UF 0805
OUT1 OUT2 OUT3
ADP3336ARMZC207 MSOP8
FB
1 2 3
R191
210.0K 0805
R190
64.9K 08050805
C204 1UF
5V_B
10UF 08050805
GSOT05 SOT23-3
D14D11 MBRS540T3G SMC
1
PGND
C87 10UF 0805
DNP
GND
2
PGND
5
IN
4
CS
63
PGATEFB
ADP1864AUJZ SOT23-6
R12 0 0603
R13
0.05 1206
U3
3
FDC658P SOT23-6
3.3V VDDEXT_SHUNT
TP1
14 2 5 6
PGND
L3
6.8UH IND009
D5 SSB43L DO-214AA
CT5 47UF B
CT6
2.2UF B DNP
C86 1UF 0805
DNP
R14 0 0805
D12 GSOT03 SOT23-3
2
C100 10UF 1210
2
ELVIS_PWR
C220
4.7UF 0805
R184 0 0603
VR1
2
VIN
5
SHDN
8
SYNC
4
GND
LT1765 SOIC8
BOOST
SW
FB
VC
1
3
6
7
C219 2200PF 0603
C218
0.18UF 0805
D1 SL22
DO-214AA
D2 CMDSH-3
SOD-323
L2
1.5UH IND003
R182
10.0K 0603
R183
47.5K 0603
C217
4.7UF 0805
D4 S2A 2A DO-214AA
R186 0 0603
UNREG_IN
CT3 100UF C
C90 470PF 0603
R11
24.9K 0603
C93 68PF 0603
R15
80.6K 0603
R16
255.0K 0603
VR5
1
COMP
PGND
W3 COPPER
2A
PGND
3
R196
24.9K 0603
C222 470PF 0603
UNREG_IN
C223 68PF 0603
R197
80.6K 0603
R198
51.1K 0603
C224 10UF 1210
1
VR2
COMP
AGND3
AGND3
C221 10UF 0805
DNP
GND
2
5
IN
4
CS
63
PGATEFB
ADP1864AUJZ SOT23-6
R200 0 0603
0.03 1206
R199R201
0.03 1206
U45
1 2 3 4
SI7601DN ICS010
GND Test Points are scattered on PCB for Test Measurement Purposes.
LABEL "GND" ON ALL TPs
TP11 TP7 TP6 TP2TP4TP5TP8TP9TP10 TP3
TP12VDDINT_SHUNT
5 6 7 8
L1
2.5UH IND013
D7 MBRS540T3G SMC
CT7 470UF D2E
CT8
2.2UF B DNP
C225
4.7UF 0805
D8 VESD01-02V-GS08 SOD-523
RUBBER FOOT
MSC009
ANALOG
RUBBER FOOT
MSC009
RUBBER FOOT
MSC009
20 Cotton Road
M4M3M2M1 M5
RUBBER FOOT
MSC009
MH2 MH3 MH6MH4MH1
RUBBER FOOT
MSC009
Nashua, NH 03063
4
AGND3
AGND3
W2 COPPER
Title
DEVICES
ADSP-21369 EZ-KIT Lite
PH: 1-800-ANALOGD
4
4A

POWER

Size Board No.
AGND3
C
A0196-2005
Date Sheet of
A B C D
Rev
2.2
13 136-10-2009_11:05
Page 84

IINDEX

Numerics

2-wire interface (TWI) mode, 1-10
A
AD1835A, CAD and DAC
configuration registers, 1-11 DAI interface, 1-11 DPI interface, 2-6 master clock (MCLK), 2-5, 2-11 master/slave modes, 1-10, 2-11
setup switch (SW3), 2-11 ADC_DATA pins, 2-11 ADDR23-0 pins, 2-7 AMP_LEFT_IN signals, 2-14 AMP_RIGHT_IN signals, 2-14 analog audio, See audio, AD1835A analog-to-digital converters (ADCs), See
AD1835A architecture, of this EZ-KIT Lite, 2-2 async memory controller, 1-9 audio
codecs, See AD1835A in RCA connector (J10), 2-23 interface, xi, 1-10 oscillators, 2-4, 2-11 out RCA connector (J5), 2-23
board schematic (ADSP-21369), B-1 boot
configuration pins (BOOTCFG1-0), 2-10 modes, 2-3, 2-10
C
CLKCFG1-0 pins, 2-3, 2-10 CLKIN pins, 2-3, 2-10 clock
multiplier ratios, 2-10 routing signals, 2-11
codecs, See AD1835A codec setup switch (SW7), 2-11 configuration, of this EZ-KIT Lite, 1-4 connectors
diagram of locations, 2-21 J10 (audio in RCA), 1-11, 2-23 J1-3 (expansion), 2-3, 2-5, 2-6, 2-7, 2-22 J4 (power), 1-5, 2-23 J5 (audio out RCA), 1-11, 2-23 J6 (RS-232), xi, 2-2 J7-8 (S/P J9 (headphone out), 1-11, 2-23 P3 (DPI header), 2-24 P4 (DAI header), 2-25 ZP4 (JTAG), 2-8, 2-25
contents, of this EZ-KIT Lite package, 1-2
DIF coax), 2-24
4
B
background telemetry channel (BTC), 1-13 bill of materials, A-1
ADSP-21369 EZ-KIT Lite Evaluation System Manual I-1
Page 85
INDEX
core
clock rates, 2-10 frequency, 2-3 to CLKIN ratios, 2-10
voltage, 2-2 current limits, 2-7 customer support, -xv
D
DAC1-0 signals, 2-14 DAI
block diagram, 2-4
connections, 1-12, 1-13, 2-16
data transfer from codec, 1-10
disabling (SW3), 2-5, 2-11
header (P4), 2-4, 2-25 DAI16-15 pins, 1-13 DAI20-19 pins, 2-13, 2-17 DAI4 pins, 2-20 DAIP20-11 pins, 2-7 DATA31-0 pins, 2-7 data acquisition (DAQ) devices, 1-9 DB9 connectors, xi, 2-24 default configuration, of this EZ-KIT Lite, 1-3 digital
audio interface, See DAI
peripheral interface, See DPI digital-to-analog converters (DACs), See
AD1835A DIP switch (SW7), 1-4, 1-12, 2-13, 2-17 DMA controller, 1-8 DPI
block diagram, 2-5 connections, 1-8, 1-13, 2-16 disabling (SW2), 2-6
header (P3), 2-6, 2-24 DPI12-10 pins, 2-7, 2-12 DPI14-13 pins, 1-13, 2-7 DPI2-1 (MOSI-0) pins, 1-8, 2-7
DPI3 (SPI clock) pins, 1-8, 2-7 DPI4 pins, 1-11, 2-7 DPI5 (chip select) pins, 1-8, 2-7
, 2-7
DPI8-6 pins, 1-
13
E
electret microphone, 1-11, 2-12 ELVIS (Educational Laboratory Virtual
Instrumentation Suite) interface, 1-9 programmable flag jumper (JP4), 2-20 select jumper (JP2), 2-19 trigger pins, 2-20 voltage select jumper (JP3), 2-20
EPROM/flash boot mode, 2-3 example programs, 1-13 expansion interface, 2-3, 2-5, 2-6, 2-7, 2-22 external
memory, 1-8 phase lock loop, See PLL ports, 2-3, 2-10
F
features, of this EZ-KIT Lite, x FLAG0-1 pins, 1-12, 2-6, 2-7, 2-13, 2-17 FLAG2 pins, 2-6, 2-7 FLAG3 pins, 1-13, 2-6, 2-7, 2-16 FLAG registers, 1-12 flash memory
boot mode (default), 2-10 start/end addresses, 1-8 via external port, 1-7, 2-3
frame sync/clock signals, 1-10, 2-11 FUNCT_OUT signals, 2-15
G
general-purpose I/O pins, 1-12, 2-6, 2-16, 2-17
I-2 ADSP-21369 EZ-KIT Lite Evaluation System Manual
Page 86
INDEX
H
headphone out jack (J9), 2-23
I
installation, of this EZ-KIT Lite, 1-5 interrupts, config push buttons as, 1-12 I/O voltage, 2-2 ~IRQ0-1 pins, 1-12, 2-13, 2-17 ~IRQ3 pins, 1-13
J
JTAG
emulation port, 2-8 header (ZP4), 2-25
jumpers
JP1 (VCO select), 2-19 JP2 (ELVIS select), 2-19 JP3 (voltage select), 2-20 JP4 (ELVIS programmable flag), 2-20 JP6 (ELVIS voltage), 2-20
L
LabVIEW virtual instruments, -xi, 1-9 LEDs
diagram of locations, 2-15 LED10 (reset), 1-5, 2-16 LED1-7 (FLAGx I/O), 1-13, 2-16 LED8 (FLAG3), 1-13, 2-6, 2-16 LED9 (power), 1-5, 2-16
ZLED3 (USB monitor), 1-5, 2-16 LEFT_IN signals, 2-14 LEFT_OUT signals, 2-14 license restrictions, 1-7 loop-back test switches (SW6, SW14), 2-12
M
~M2-0 memory select pins, 1-8
master input clock (MCLK), 1-10 ~MS3 memory select pins, 1-8, 1-13
N
notation conventions, xix
O
oscilloscope config switch (SW1), 2-13
P
package contents, 1-2 parallel flash memory, See flash memory parallel port control signals, 2-7 phase lock loop (PLL), xii, 2-4, 2-19 PMCTL registers, 2-3 power
connector (J4), 2-23 LED (LED9), 2-16 specifications, 2-24 supply, 2-20, 2-24
push buttons
See also switches by name (SWx) diagram of locations, 2-15 enable switch (SW7), 1-4, 1-12, 2-13, 2-17
R
RCA
cables, 1-3
connectors, xi, 1-11, 2-4 reference design info, 1-14 reset
LED (LED10), 2-16
push button (SW12), 2-17 restrictions, of the evaluation license, 1-7 RIGHT_IN signals, 2-14 RIGHT_OUT signals, 2-14 RS-232 connector (J6), xi, 2-24
ADSP-21369 EZ-KIT Lite Evaluation System Manual I-3
Page 87
INDEX
S
schematic, of ADSP-21369 EZ-KIT Lite, B-1 SDRAM
chip select pin (FLAG8), 2-6 configuration, 1-8 controller, 1-8 control signals, 2-7 via external port, 2-3
serial peripheral interface, See SPI setup, of this EZ-KIT Lite, 1-3 signal routing units
SRU2 (DPI interface), 1-10, 2-5
SRU (DAI interface), 1-10, 2-4 spacing headers, 2-25 S/PDIF receivers, 1-10 SPI
disable switch (SW15), 2-13
flash memory, 1-7, 1-8, 2-6
master/slave boot modes, 2-3, 2-10
port, 1-8, 1-11 SRAM
async memory controller, 1-9
configuration, 1-7
via external port, 2-3 startup, of this EZ-KIT Lite, 1-5 SW12 (reset) push button, 2-17 SW13 (ELVIS station) switch, 2-14 SW14 (test) switch, 2-12 SW15 (SPI disable) switch, 2-13 SW1 (oscilloscope) switch, 2-13 SW2 (boot mode select) switch, 2-3, 2-6, 2-10 SW3 (AD1835A codec) switch, 2-5, 2-11 SW4 (microphone) switch, 1-11, 2-12
SW6 (test) switch, 2-12 SW7 (push button enable) DIP switch, 1-4,
1-12, 2-13, 2-17
SW8-11 (general input) push buttons, 2-17 synchronous dynamic random access memory,
See SDRAM synchronous random access memory, See SRAM system architecture, of this EZ-KIT Lite, 2-2
T
test switches (SW6, SW14), 2-12 time-division multiplexed (TDM) mode, 1-10
U
UART
interface, xi, 2-6 enable switch (SW5)
universal asynchronous receiver/transmitter, See
UART USB
interface, 2-8, 2-25 cable, 1-3, 1-5, 2-16, 2-17 interface chip (U34), 2-17 monitor LED (ZLED3), 1-5, 2-16
V
VisualDSP++
environment, 1-5
voltage-controlled oscillator select jumper (JP1),
2-19
I-4 ADSP-21369 EZ-KIT Lite Evaluation System Manual
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