Ultracompact SC70 and SOT-23-3 packages
Temperature coefficient: 40 ppm/°C (maximum)
2× the temperature coefficient improvement over the
LM4040
Pin compatible with the LM4040/LM4050
Initial accuracy: ±0.2%
Low output voltage noise: 14 μV p-p @ 2.5 V output
No external capacitor required
Operating current range: 50 μA to 15 mA
Industrial temperature range: −40°C to +85°C
APPLICATIONS
Portable, battery-powered equipment
Automotive
Power supplies
Data acquisition systems
Instrumentation and process control
Energy measurement
Figure 1. 3-Lead SC70 (KS) and 3-Lead SOT-23-3 (RT)
GENERAL DESCRIPTION
Designed for space-critical applications, the ADR520/ADR525/
ADR530/ADR540/ADR550 are high precision shunt voltage
references, housed in ultrasmall SC70 and SOT-23-3 packages.
These references feature low temperature drift of 40 ppm/°C,
an initial accuracy of better than ±0.2%, and ultralow output
noise of 14 μV p-p.
Available in output voltages of 2.048 V, 2.5 V, 3.0 V, 4.096 V,
and 5.0 V, the advanced design of the ADR520/ADR525/
ADR530/ADR540/ADR550 eliminates the need for compensation by an external capacitor, yet the references are stable with
any capacitive load. The minimum operating current increases
from a mere 50 μA to a maximum of 15 mA. This low operating
current and ease of use make these references ideally suited for
handheld, battery-powered applications.
A trim terminal is available on the ADR520/ADR525/ADR530/
ADR540/ADR550 to allow adjustment of the output voltage
over a ±0.5% range, without affecting the temperature coefficient
of the device. This feature provides users with the flexibility to
trim out any system errors.
TRIM
3
04501-001
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Change to Ordering Guide ............................................................ 14
11/03—Revision 0: Initial Version
Rev. E | Page 2 of 16
Page 3
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
SPECIFICATIONS
ADR520 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage V
OUT
Grade A 2.040 2.048 2.056 V
Grade B 2.044 2.048 2.052 V
Initial Accuracy V
OERR
Grade A ±0.4% −8 +8 mV
Grade B ±0.2% −4 +4 mV
Temperature Coefficient1 TCVO −40°C < TA < +85°C
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 4 mV
I
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.27 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise e
0.1 Hz to 10 Hz 14 μV p-p
N p-p
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆V
1
Guaranteed by design; not production tested.
I
OUT_HYS
= 1 mA to 15 mA
IN
= 1 mA 40 ppm
IN
ADR525 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage V
Grade A 2.490 2.500 2.510 V
Grade B 2.495 2.500 2.505 V
Initial Accuracy V
Grade A ±0.4% −10 +10 mV
Grade B ±0.2% −5 +5 mV
Temperature Coefficient
1
TCV
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 4 mV
I
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise e
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆V
1
Guaranteed by design; not production tested.
OUT
OERR
−40°C < TA < +85°C
O
= 1 mA to 15 mA
IN
0.1 Hz to 10 Hz 18 μV p-p
N p-p
IIN = 1 mA 40 ppm
OUT_HYS
Rev. E | Page 3 of 16
Page 4
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
ADR530 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage V
Grade A 2.988 3.000 3.012 V
Grade B 2.994 3.000 3.006 V
Initial Accuracy V
Grade A ±0.4% −12 +12 mV
Grade B ±0.2% −6 +6 mV
Temperature Coefficient
1
TCV
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 4 mV
I
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise e
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆V
1
Guaranteed by design; not production tested.
OUT
OERR
−40°C < TA < +85°C
O
= 1 mA to 15 mA
IN
0.1 Hz to 10 Hz 22 μV p-p
N p-p
IIN = 1 mA 40 ppm
OUT_HYS
ADR540 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 5.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage V
Grade A 4.080 4.096 4.112 V
Grade B 4.088 4.096 4.104 V
Initial Accuracy V
Grade A ±0.4% −16 +16 mV
Grade B ±0.2% −8 +8 mV
Temperature Coefficient
1
TCV
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 5 mV
I
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current I
Voltage Noise e
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆V
1
Guaranteed by design; not production tested.
OUT
OERR
−40°C < TA < +85°C
O
= 1 mA to 15 mA
IN
−40°C < TA < +85°C 50 μA
IN
0.1 Hz to 10 Hz 30 μV p-p
N p-p
I
OUT_HYS
= 1 mA 40 ppm
IN
Rev. E | Page 4 of 16
Page 5
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
ADR550 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 6.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage V
Grade A 4.980 5.000 5.020 V
Grade B 4.990 5.000 5.010 V
Initial Accuracy V
Grade A ±0.4% −20 +20 mV
Grade B ±0.2% −10 +10 mV
Temperature Coefficient1 TCVO −40°C < TA < +85°C
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 5 mV
I
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise e
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆V
1
Guaranteed by design; not production tested.
OUT
OERR
= 1 mA to 15 mA
IN
0.1 Hz to 10 Hz 38 μV p-p
N p-p
IIN = 1 mA 40 ppm
OUT_HYS
Rev. E | Page 5 of 16
Page 6
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Ratings apply at 25°C, unless otherwise noted.
THERMAL RESISTANCE
Table 7.
Parameter Rating
Reverse Current 25 mA
Forward Current 20 mA
Storage Temperature Range −65°C to +150°C
Industrial Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 8.
Package Type θ
3-Lead SC70 (KS) 580.5 177.4 °C/W
3-Lead SOT-23-3 (RT) 270 102 °C/W
1
θJA is specified for worst-case conditions, such as for devices soldered on
circuit boards for surface-mount packages.
1
θJC Unit
JA
ESD CAUTION
Rev. E | Page 6 of 16
Page 7
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
PARAMETER DEFINITIONS
TEMPERATURE COEFFICIENT
Temperature coefficient is defined as the change in output
voltage with respect to operating temperature changes and is
normalized by the output voltage at 25°C. This parameter is
expressed in ppm/°C and is determined by the following
equation:
where:
V
OUT(T2
V
OUT(T1
V
(25°C) = V
OUT
TCV
) = V
) = V
ppm
⎤
⎡
O
⎢
⎣
=
⎥
C
°TTV
⎦
at Temperature 2.
OUT
at Temperature 1.
OUT
at 25°C.
OUT
−
OUT
)()(
TVTV
12
OUTOUT
−×°
6
×
10
(1)
)(C)25(
12
THERMAL HYSTERESIS
Thermal hysteresis is defined as the change in output voltage
after the device is cycled through temperatures ranging from
+25°C to −40°C, then to +85°C, and back to +25°C. The
following equation expresses a typical value from a sample of
parts put through such a cycle:
−°=
C)25(
VVV
__
ENDOUTOUTHYSOUT
−°
C)25(
OUT
VV
°
C)25(
_
HYSOUT
[ppm]
V
V
=
where:
V
OUT
V
OUT_END
(25°C) = V
= V
at 25°C.
OUT
at 25°C after a temperature cycle from +25°C to
OUT
−40°C, then to +85°C, and back to +25°C.
_
ENDOUTOUT
(2)
6
×
10
Rev. E | Page 7 of 16
Page 8
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
TYPICAL PERFORMANCE CHARACTERISTICS
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
REVERSE VOLTAGE (V)
1.5
1.0
0.5
0
025
MINIMUM O PERATING CURRENT (µA)
ADR550
ADR540
ADR530
ADR525
ADR520
= 25°C
T
A
5075100
04501-006
8
7
6
5
4
3
2
REVERSE VOLTAGE CHANGE (mV)
1
0
06
TA = –40°C
39
T
= +25°C
A
IIN (mA)
= +85°C
T
A
1215
04501-009
Figure 2. Reverse Characteristics and Minimum Operating Current
8
7
6
5
4
3
2
REVERSE VOLTAGE CHANGE (mV)
1
0
063
TA = +85°C
IIN (mA)
T
= +25°C
A
= –40°C
T
A
91215
Figure 3. ADR520 Reverse Voltage vs. Operating Current
8
6
4
= –40°C
T
2
A
Figure 5. ADR550 Reverse Voltage vs. Operating Current
VIN = 2V/DIV
V
= 1V/DIV
OUT
IIN = 10mA
TIME (µs)
04501-007
4µs/DIV
04501-010
Figure 6. ADR525 Turn-On Response
VIN = 2V/DIV
V
= 1V/DIV
OUT
T
= +25°C
A
0
REVERSE VOLTAGE CHANGE (mV)
= +85°C
T
–2
03
A
612
915
IIN (mA)
04501-008
Figure 4. ADR525 Reverse Voltage vs. Operating Current
Rev. E | Page 8 of 16
IIN = 100µA
TIME (µs)
Figure 7. ADR525 Turn-On Response
4µs/DIV
04501-011
Page 9
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
VIN = 2V/DIV
IIN = 10mA
TIME (µs)
Figure 8. ADR520 Turn-On Response
IIN = 100µA
V
= 1V/DIV
OUT
4µs/DIV
VIN = 2V/DIV
V
= 1V/DIV
OUT
10µs/DIV
VIN = 2V/DIV
V
= 2V/DIV
OUT
IIN = 100µA
04501-012
TIME (µs)
20µs/DIV
04501-015
Figure 11. ADR550 Turn-On Response
PEAK-TO-PEAK
13.5µV
RMS
2.14µV
5µs/DIV
TIME (µs)
Figure 9. ADR520 Turn-On Response
IIN = 10mA
TIME (µs)
Figure 10. ADR550 Turn-On Response
VIN = 2V/DIV
V
= 2V/DIV
OUT
4µs/DIV
04501-013
TIME (µs)
04501-021
Figure 12. ADR520 Voltage Noise 0.1 Hz to 10 Hz
V GEN = 2V/DIV
I
= 1mA
IN
V
= 50mV/DIV
OUT
10µs/DIV
04501-014
TIME (µs)
04501-016
Figure 13. ADR525 Load Transient Response
Rev. E | Page 9 of 16
Page 10
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
3.0055
3.0050
V GEN = 2V/DIV
I
= 10mA
IN
10µs/DIV
Figure 14. ADR550 Load Transient Response
2.5030
2.5025
2.5020
2.5015
2.5010
(V)
2.5005
OUT
V
2.5000
2.4995
2.4990
2.4985
2.4980
–40–1510356085
TEMPERATURE (°C)
Figure 15. Data for Five Parts of ADR525 V
TIME (µs)
V
= 50mV/DIV
OUT
over Temperature
OUT
04501-017
04501-018
3.0045
3.0040
3.0035
3.0030
(V)
OUT
3.0025
V
3.0020
3.0015
3.0010
3.0005
3.0000
–40–1510356085
TEMPERATURE (°C)
Figure 16. Data for Five Parts of ADR530 V
5.008
5.006
5.004
5.002
5.000
(V)
4.998
OUT
V
4.996
4.994
4.992
4.990
4.988
–40–1510356085
TEMPERATURE (°C)
Figure 17. Data for Five Parts of ADR550 V
over Temperature
OUT
over Temperature
OUT
04501-019
04501-020
Rev. E | Page 10 of 16
Page 11
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
THEORY OF OPERATION
The ADR520/ADR525/ADR530/ADR540/ADR550 use the
band gap concept to produce a stable, low temperature coefficient
voltage reference suitable for high accuracy data acquisition
components and systems. The devices use the physical nature of a
silicon transistor base-emitter voltage (V
operating region. All such transistors have approximately a
−2 mV/°C temperature coefficient (TC), making them unsuitable
for direct use as low temperature coefficient references. Extrapolation of the temperature characteristics of any one of these
devices to absolute zero (with the collector current proportional
to the absolute temperature), however, reveals that its V
approaches approximately the silicon band gap voltage. Thus,
if a voltage develops with an opposing temperature coefficient
to sum the V
, a zero temperature coefficient reference results.
BE
The ADR520/ADR525/ADR530/ADR540/ADR550 circuit
shown in Figure 18 provides such a compensating voltage (V1)
by driving two transistors at different current densities and
amplifying the resultant V
difference (ΔVBE, which has a
BE
positive temperature coefficient). The sum of V
provides a stable voltage reference over temperature.
+
V1
–
+
Δ
V
BE
–
+
V
BE
–
Figure 18. Circuit Schematic
APPLICATIONS
The ADR520/ADR525/ADR530/ADR540/ADR550 are a
series of precision shunt voltage references. They are designed
to operate without an external capacitor between the positive
and negative terminals. If a bypass capacitor is used to filter the
supply, the references remain stable.
All shunt voltage references require an external bias resistor (R
between the supply voltage and the reference (see Figure 19).
sets the current that flows through the load (IL) and the
R
BIAS
reference (I
needs to be chosen based on the following considerations:
R
BIAS
• R
current to the ADR520/ADR525/ADR530/ADR540/
ADR550, even when the supply voltage is at its minimum
value and the load current is at its maximum value.
). Because the load and the supply voltage can vary,
IN
must be small enough to supply the minimum I
BIAS
) in the forward-biased
BE
BE
and V1
BE
V+
V–
04501-002
IN
BIAS
V
S
+ I
I
IN
R
I
IN
Figure 19. Shunt Reference
Given these conditions, R
voltage (V
), the load and operating currents (IL and IIN) of
S
L
V
I
L
ADR550
is determined by the supply
BIAS
OUT
04501-003
the ADR520/ADR525/ADR530/ADR540/ADR550, and the
output voltage (V
) of the ADR520/ADR525/ADR530/
OUT
ADR540/ADR550.
VV
−
S
OUT
R
=
BIAS
(3)
II
+
INL
Precision Negative Voltage Reference
The ADR520/ADR525/ADR530/ADR540/ADR550 are suitable for applications where a precise negative voltage is desired.
Figure 20 shows the ADR525 configured to provide a negative
output.
The trim terminal of the ADR520/ADR525/ADR530/ADR540/
ADR550 can be used to adjust the output voltage over a range
of ±0.5%. This allows systems designers to trim system errors
by setting the reference to a voltage other than the preset output
voltage. An external mechanical or electrical potentiometer can
be used for this adjustment. Figure 21 illustrates how the output
voltage can be trimmed using the AD5273, an Analog Devices,
Inc., 10 kΩ potentiometer.
V
)
ADR530
S
R
V
OUT
R1
470kΩ
Figure 21. Output Voltage Trim
AD5273
POTENTIOMETER
10kΩ
04501-005
•R
must be large enough so that IIN does not exceed
BIAS
15 mA when the supply voltage is at its maximum value
and the load current is at its minimum value.
Rev. E | Page 11 of 16
Page 12
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
Stacking the ADR520/ADR525/ADR530/ADR540/ADR550
for User-Definable Outputs
Multiple ADR520/ADR525/ADR530/ADR540/ADR550 parts
can be stacked to allow the user to obtain a desired higher voltage.
Figure 22 shows three ADR550s configured to give 15 V. The bias
resistor, R
, is chosen using Equation 3; note that the same
BIAS
bias current flows through all the shunt references in series.
Figure 23 shows three ADR550s stacked to give −15 V. R
BIAS
is calculated in the same manner as before. Parts of different
voltages can also be added together. For example, an ADR525
and an ADR550 can be added together to give an output of
+7.5 V or −7.5 V, as desired. Note, however, that the initial
accuracy error is now the sum of the errors of all the stacked
parts, as are the temperature coefficients and output voltage
change vs. input current.
+V
DD
R
+15V
ADR550
ADR550
ADR550
Adjustable Precision Voltage Source
The ADR520/ADR525/ADR530/ADR540/ADR550, combined
with a precision low input bias op amp, such as the AD8610,
can be used to output a precise adjustable voltage. Figure 24
illustrates the implementation of this application using the
ADR520/ADR525/ADR530/ADR540/ADR550. The output
of the op amp, V
, is determined by the gain of the circuit,
OUT
which is completely dependent on the resistors, R1 and R2.
V
= V
OUT
(1 + R2/R1)
REF
An additional capacitor, C1, in parallel with R2, can be added to
filter out high frequency noise. The value of C1 is dependent on
the value of R2.
V
S
R
V
REF
ADR5xx
AD8610
R2
R1
V
= V
OUT
(1+R2/R1)
REF
GND
Figure 22. +15 V Output with Stacked ADR550s
GND
R
–V
DD
Figure 23. −15 V Output with Stacked ADR550s
ADR550
ADR550
ADR550
–15V
04501-022
04501-024
GND
Figure 24. Adjustable Voltage Source
C1
(OPTIONAL)
04501-023
Rev. E | Page 12 of 16
Page 13
ADR520/ADR525/ADR530/ADR540/ADR550
www.BDTIC.com/ADI
OUTLINE DIMENSIONS
2.20
2.00
1.35
1.25
1.15
PIN 1
1.00
0.80
0.10 MAX
0.10 COPLANARI TY
Figure 25. 3-Lead Thin Shrink Small Outline Transistor Package [SC70]
1.40
1.20
1.80
21
0.65 BSC
2.40
2.10
1.80
1.10
0.80
SEATING
PLANE
0.26
0.10
0.40
0.10
3
0.40
0.25
ALL DIMENSIONS COMPLIANT WITH EIAJ SC70
(KS-3)
Dimensions shown in millimeters
3.04
2.80
3
1
2.64
2.10
2
0.30
0.20
0.10
111505-0
0.100
0.013
SEATING
PLANE
0.60
0.45
2.05
1.78
COMPLIANT TO JEDEC STANDARDS TO-236-AB
1.03
0.89
0.51
0.37
1.12
0.89
0.180
0.085
Figure 26. 3-Lead Small Outline Transistor Package [SOT-23-3]