Low noise (0.1 Hz to 10 Hz): 3.5 µV p-p @ 2.5 V output
No external capacitor required
Low temperature coefficient
A Grade: 10 ppm/°C max
B Grade: 3 ppm/°C max
Load regulation: 15 ppm/mA
Line regulation: 20 ppm/V
Wide operating range
ADR430: 4.1 V to 18 V
ADR431: 4.5 V to 18 V
ADR433: 5.0 V to 18 V
ADR434: 6.1 V to 18 V
ADR435: 7.0 V to 18 V
ADR439: 6.5 V to 18 V
High output current: +30 mA/−20 mA
Wide temperature range: −40°C to +125°C
APPLICATIONS
Precision data acquisition systems
High resolution data converters
Medical instruments
Industrial process control systems
Optical control circuits
Precision instruments
GENERAL DESCRIPTION
The ADR43x series is a family of XFET voltage references
featuring low noise, high accuracy, and low temperature drift
performance. Using ADI’s patented temperature drift curvature
correction and XFET (eXtra implanted junction FET) technology,
the ADR43x’s voltage change versus temperature nonlinearity is
minimized.
The XFET references operate at lower current (800 µA) and
supply headroom (2 V) than buried-Zener references. BuriedZener references require more than 5 V headroom for operations.
The ADR43x XFET references are the only low noise solutions
for 5 V systems.
The ADR43x series has the capability to source up to 30 mA
and sink up to 20 mA of output current. It also comes with a
TRIM terminal to adjust the output voltage over a 0.5% range
without compromising performance. The ADR43x is available
in the 8-lead mini SOIC and 8-lead SOIC packages.
PIN CONFIGURATIONS
1
TP
ADR43x
V
2
IN
TOP VIEW
NC
3
(Not to Scale)
GND
4
NC = NO CONNECT
Figure 1. 8-Lead MSOP
(RM Suffix)
TP
1
ADR43x
V
2
IN
TOP VIEW
3
NC
(Not to Scale)
GND
4
NC = NO CONNECT
Figure 2. 8-Lead SOIC
All versions are specified over the extended industrial temperature range (−40°C to +125°C).
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
−40°C < TA < +125°C 15 ppm/mA
Quiescent Current I
Voltage Noise eN p-p 0.1 Hz to 10.0 Hz 3.5 µV p-p
Voltage Noise Density e
Turn-On Settling Time t
Long-Term Stability
Output Voltage Hysteresis V
Ripple Rejection Ratio RRR fIN = 10 kHz –70 dB
Short Circuit to GND I
Supply Voltage Operating Range V
Supply Voltage Headroom VIN − V
1
The long-term stability specification is noncumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.
= 0 mA, TA = 25°C, unless otherwise noted.
LOAD
O
O
OERR
OERR
OERR
OERR
O
O
O
IN
LOAD
IN
N
1
∆V
SC
R
O
O_HYS
IN
O
2.047 2.048 2.049 V
2.045 2.048 2.051 V
1 mV
0.05 %
3 mV
0.15 %
−40°C < TA < +125°C 1 3 ppm/°C
−40°C < TA < +125°C 2 10
−40°C < TA < +125°C 2 10 ppm/°C
VIN = 4.1 V to 18 V
I
LOAD
LOAD
No load, −40°C < TA < +125°C 560 800 µA
1 kHz 60
CIN = 0 10 µs
1,000 h 40 ppm
20 ppm
40 mA
4.1 18 V
2 V
= 0 mA to 10 mA, VIN = 5.0 V
= −10 mA to 0 mA, VIN = 5.0 V
nV√
Hz
Rev. B | Page 3 of 24
Page 4
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
ADR431 ELECTRICAL CHARACTERISTICS
VIN = 4.5 V to 18 V, I
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage
B Grade V
A Grade V
Initial Accuracy
B Grade V
B Grade V
A Grade V
A Grade V
Temperature Coefficient
SOIC-8 (B Grade) TCV
SOIC-8 (A Grade) TCV
MSOP-8 TCV
−40°C < TA < +125°C 15 ppm/mA
Quiescent Current IIN No load, −40°C < TA < +125°C 580 800 µA
Voltage Noise eN p-p 0.1 Hz to 10.0 Hz 3.5 µV p-p
Voltage Noise Density e
Turn-On Settling Time t
Long-Term Stability1 ∆VO 1,000 h 40 ppm
Output Voltage Hysteresis V
Ripple Rejection Ratio RRR fIN = 10 kHz −70 dB
Short Circuit to GND ISC 40 mA
Supply Voltage Operating Range VIN 4.5 18 V
Supply Voltage Headroom VIN – VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.
= 0 mA, TA = 25°C, unless otherwise noted.
LOAD
O
O
OERR
OERR
OERR
0.13 %
OERR
O
O
O
LOAD
N
R
20 ppm
O_HYS
2.499 2.500 2.501 V
2.497 2.500 2.503 V
1 mV
0.04 %
3 mV
−40°C < TA < +125°C 1 3 ppm/°C
−40°C < TA < +125°C 2 10 ppm/°C
−40°C < TA < +125°C 2 10 ppm/°C
I
LOAD
LOAD
1 kHz 80
CIN = 0 10 µs
= 0 mA to 10 mA, VIN = 5.0 V
= −10 mA to 0 mA, VIN = 5.0 V
nV√
Hz
Rev. B | Page 4 of 24
Page 5
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
ADR433 ELECTRICAL CHARACTERISTICS
VIN = 5 V to 18 V, I
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage
B Grade V
A Grade V
Initial Accuracy
B Grade V
B Grade V
A Grade V
A Grade V
Temperature Coefficient TCVO
SOIC-8 (B Grade) −40°C < TA < +125°C 1 3 ppm/°C
SOIC-8 (A Grade) −40°C < TA < +125°C 2 10 ppm/°C
MSOP-8 −40°C < TA < +125°C 2 10 ppm/°C
−40°C < TA < +125°C 15 ppm/mA
Quiescent Current IIN No load, −40°C < TA < +125°C 590 800 µA
Voltage Noise eN p-p 0.1 Hz to 10.0 Hz 3.75 µV p-p
Voltage Noise Density eN 1 kHz 90
Turn-On Settling Time tR CIN = 0 10 µs
Long-Term Stability
Output Voltage Hysteresis V
Ripple Rejection Ratio RRR fIN = 10 kHz −70 dB
Short Circuit to GND ISC 40 mA
Supply Voltage Operating Range VIN 5 18 V
Supply Voltage Headroom VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.
= 0 mA , TA = 25°C, unless otherwise noted.
LOAD
O
O
OERR
OERR
OERR
0.13 %
OERR
LOAD
1
∆VO 1,000 h 40 ppm
20 ppm
O_HYS
2.9985 3.000 3.0015 V
2.996 3.000 3.004 V
1.5 mV
0.05 %
4 mV
I
LOAD
LOAD
= 0 mA to 10 mA, VIN = 6 V
= −10 mA to 0 mA, VIN = 6 V
nV√
Hz
Rev. B | Page 5 of 24
Page 6
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
ADR434 ELECTRICAL CHARACTERISTICS
VIN = 6.1 V to 18 V, I
Table 5.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage
B Grade VO 4.0945 4.096 4.0975 V
A Grade VO 4.091 4.096 4.101 V
Initial Accuracy
B Grade V
B Grade V
A Grade V
A Grade V
Temperature Coefficient TCVO
SOIC-8 (B Grade) −40°C < TA < +125°C 1 3 ppm/°C
SOIC-8 (A Grade) −40°C < TA < +125°C 2 10 ppm/°C
MSOP-8 −40°C < TA < +125°C 2 10 ppm/°C
−40°C < TA < +125°C 15 ppm/mA
Quiescent Current IIN No load, −40°C < TA < +125°C 595 800 µA
Voltage Noise eN p-p 0.1 Hz to 10.0 Hz 6.25 µV p-p
Voltage Noise Density eN 1 kHz 100
Turn-On Settling Time tR CIN = 0 10 µs
Long-Term Stability1 ∆VO 1,000 h 40 ppm
Output Voltage Hysteresis V
Ripple Rejection Ratio RRR fIN = 10 kHz −70 dB
Short Circuit to GND ISC 40 mA
Supply Voltage Operating Range VIN 6.1 18 V
Supply Voltage Headroom VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.
= 0 mA, TA = 25°C, unless otherwise noted.
LOAD
1.5 mV
OERR
0.04 %
OERR
5 mV
OERR
0.13 %
OERR
I
LOAD
20 ppm
O_HYS
= 0 mA to 10 mA, VIN = 7 V
LOAD
= −10 mA to 0 mA, VIN = 7 V
LOAD
nV√
Hz
Rev. B | Page 6 of 24
Page 7
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
ADR435 ELECTRICAL CHARACTERISTICS
VIN = 7 V to 18 V, I
Table 6.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage
B Grade VO 4.998 5.000 5.002 V
A Grade VO 4.994 5.000 5.006 V
Initial Accuracy
B Grade V
B Grade V
A Grade V
A Grade V
Temperature Coefficient TCV
SOIC-8 (B Grade) −40°C < TA < +125°C 1 3 ppm/°C
SOIC-8 (A Grade) −40°C < TA < +125°C 2 10 ppm/°C
MSOP-8 −40°C < TA < +125°C 2 10 ppm/°C
−40°C < TA < +125°C 15 ppm/mA
Quiescent Current IIN No load, −40°C < TA < +125°C 620 800 µA
Voltage Noise eN p-p 0.1 Hz to 10 Hz 8 µV p-p
Voltage Noise Density eN 1 kHz 115
Turn-On Settling Time tR CIN = 0 10 µs
Long-Term Stability1 ∆VO 1,000 h 40 ppm
Output Voltage Hysteresis V
Ripple Rejection Ratio RRR fIN = 10 kHz −70 dB
Short Circuit to GND ISC 40 mA
Supply Voltage Operating Range VIN 7 18 V
Supply Voltage Headroom VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.
= 0 mA, TA = 25°C, unless otherwise noted.
LOAD
2 mV
OERR
0.04 %
OERR
6 mV
OERR
0.12 %
OERR
O
LOAD
20 ppm
O_HYS
I
= 0 mA to 10 mA, VIN = 8 V
LOAD
= −10 mA to 0 mA, VIN = 8 V
LOAD
nV/√
Hz
Rev. B | Page 7 of 24
Page 8
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
ADR439 ELECTRICAL CHARACTERISTICS
VIN = 6.5 V to 18 V, I
Table 7.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage
B Grade VO 4.498 4.500 4.502 V
A Grade VO 4.4946 4.500 4.5054 V
Initial Accuracy
B Grade V
B Grade V
A Grade V
A Grade V
Temperature Coefficient TCVO
SOIC-8 (B Grade) −40°C < TA < +125°C 1 3 ppm/°C
SOIC-8 (A Grade) −40°C < TA < +125°C 2 10 ppm/°C
MSOP-8 −40°C < TA < +125°C 2 10 ppm/°C
−40°C < TA < +125°C 15 ppm/mA
Quiescent Current IIN No load, −40°C < TA < +125°C 600 800 µA
Voltage Noise eN p-p 0.1 Hz to 10.0 Hz 7.5 µV p-p
Voltage Noise Density eN 1 kHz 110
Turn-On Settling Time tR CIN = 0 10 µs
Long-Term Stability1 ∆VO 1,000 h 40 ppm
Output Voltage Hysteresis V
Ripple Rejection Ratio RRR fIN = 10 kHz −70 dB
Short Circuit to GND ISC 40 mA
Supply Voltage Operating Range VIN 6.5 18 V
Supply Voltage Headroom VIN − VO 2 V
1
The long-term stability specification is noncumulative. The drift in subsequent 1,000 hour periods is significantly lower than in the first 1,000 hour period.
= 0 mV, TA = 25°C, unless otherwise noted.
LOAD
2 mV
OERR
0.04 %
OERR
5.4 mV
OERR
0.12 %
OERR
I
LOAD
20 ppm
O_HYS
= 0 mA to 10 mA, VIN = 6.5 V
LOAD
= −10 mA to 0 mA, VIN = 6.5 V
LOAD
nV/√
Hz
Rev. B | Page 8 of 24
Page 9
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
ABSOLUTE MAXIMUM RATINGS
@ 25°C, unless otherwise noted.
Table 8.
Parameter Rating
Supply Voltage 20 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range (R, RM Packages) −65°C to +125°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature Range (Soldering, 60 s) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions beyond those indicated in the operational
sections of this specification is not implied. Absolute maximum
ratings apply individually only, not in combination.
θJA is specified for worst-case conditions (device soldered in circuit board for
surface-mount packages).
1
θ
JA
θJC Unit
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. B | Page 9 of 24
Page 10
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
TYPICAL PERFORMANCE CHARACTERISTICS
Default conditions: ±5 V, CL = 5 pF, G = 2, Rg = Rf = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, Frequency = 1 MHz, TA = 25°C.
0.8
2.5009
2.5007
2.5005
2.5003
2.5001
OUTPUT VOLTAGE (V)
2.4999
2.4997
2.4995
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
Figure 3. ADR431 V
vs. Temperature
OUT
4.0980
4.0975
4.0970
4.0965
4.0960
OUTPUT VOLTAGE (V)
4.0955
04500-0-015
0.7
0.6
0.5
SUPPLY CURRENT (mA)
0.4
0.3
700
650
600
550
500
SUPPLY CURRENT (µA)
450
+125°C
+25°C
–40°C
81046121416
INPUT VOLTAGE (V)
Figure 6. ADR435 Supply Current vs. Input Voltage
04500-0-018
4.0950
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
Figure 4. ADR434 V
vs. Temperature
OUT
5.0025
5.0020
5.0015
5.0010
5.0005
5.0000
OUTPUT VOLTAGE (V)
4.9995
4.9990
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
Figure 5. ADR435 V
vs. Temperature
OUT
04500-0-016
04500-0-017
Rev. B | Page 10 of 24
400
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
Figure 7. ADR435 Supply Current vs. Temperature
0.60
0.58
0.56
0.54
0.52
0.50
0.48
0.46
SUPPLY CURRENT (mA)
0.44
0.42
0.40
101268141618
INPUT VOLTAGE (V)
+125°C
+25°C
–40°C
Figure 8. ADR431 Supply Current vs. Input Voltage
04500-0-019
04500-0-020
Page 11
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
610
2.5
580
550
520
490
460
SUPPLY CURRENT (µA)
430
400
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
Figure 9. ADR431 Supply Current vs. Temperature
15
12
9
6
LOAD REGULATION (ppm/mA)
3
0
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
IL= 0mA to 10mA
Figure 10. ADR431 Load Regulation vs. Temperature
15
IL= 0mA to 10mA
04500-0-021
04500-0-022
2.0
–40°C
1.5
+25°C
1.0
+125°C
DIFFERENTIAL VOLTAGE (V)
0.5
0
–5–100510
LOAD CURRENT (mA)
Figure 12. ADR431 Minimum Input/Output
Differential Voltage vs. Load Current
1.9
1.8
1.7
1.6
1.5
1.4
1.3
MINIMUM HEADROOM (V)
1.2
1.1
1.0
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
NO LOAD
Figure 13. ADR431 Minimum Headroom vs. Temperature
2.5
04500-0-024
04500-0-025
12
9
6
LOAD REGULATION (ppm/mA)
3
0
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
Figure 11. ADR435 Load Regulation vs. Temperature
04500-0-023
Rev. B | Page 11 of 24
2.0
1.5
1.0
DIFFERENTIAL VOLTAGE (V)
0.5
0
+125°C
–5–100510
Figure 14. ADR435 Minimum Input/Output
Differential Voltage vs. Load Current
–40°C
+25°C
LOAD CURRENT (mA)
04500-0-026
Page 12
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
1.9
1.7
1.5
1.3
MINIMUM HEADROOM (V)
1.1
0.9
–40 –25 –10 520 3550 65 80 95 110 125
TEMPERATURE (°C)
NO LOAD
04500-0-027
C
= 0.01µF
LOAD
NOINPUT CAPACITOR
V
= 1V/DIV
OUT
VIN = 2V/DIV
TIME = 4µs/DIV
04500-0-031
Figure 15. ADR435 Minimum Headroom vs. Temperature
Figure 20. ADR431 Line Transient Response—No Capacitors
04500-0-033
Page 13
BYPASS CAPACITOR = 0.1µF
V
IN
V
= 50mV/DIV
OUT
LINE
INTERRUPTION
500mV/DIV
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
2µV/DIV
TIME = 100µs/DIV
04500-0-034
Figure 21. ADR431 Line Transient Response—0.1 µF Bypass Capacitor
1µV/DIV
TIME = 1s/DIV
04500-0-035
Figure 22. ADR431 0.1 Hz to 10.0 Hz Voltage Noise
Figure 24. ADR435 0.1 Hz to 10.0 Hz Voltage Noise
50µV/DIV
Figure 25. ADR435 10 Hz to 10 kHz Voltage Noise
14
12
TIME = 1s/DIV
TIME = 1s/DIV
04500-0-037
04500-0-038
50µV/DIV
TIME = 1s/DIV
Figure 23. ADR431 10 Hz to 10 kHz Voltage Noise
04500-0-036
Rev. B | Page 13 of 24
10
8
6
NUMBER OF PARTS
4
2
0
–120 –90 –70 –50 –30 –10 10 30 50 7090 120
DEVIATION (PPM)
Figure 26. ADR431 Typical Hysteresis
04500-0-029
Page 14
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
50
45
40
35
30
25
20
15
OUTPUT IMPEDANCE (Ω)
10
5
0
10010k1k100k
FREQUENCY (Hz)
ADR435
3
4
3
R
D
A
ADR430
04500-0-039
10
–10
–30
–50
–70
–90
RIPPLE REJECTION (dB)
–110
–130
–150
101001k10k100k1M
FREQUENCY (Hz)
04500-0-040
Figure 27. Output Impedance vs. Frequency
Figure 28. Ripple Rejection Ratio
Rev. B | Page 14 of 24
Page 15
(
)
+θ×
=
V
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
THEORY OF OPERATION
The ADR43x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFETs), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about –120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be closely compensated by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate band gap references. The big advantage
of an XFET reference is that the correction term is some 30 times
lower (therefore, requiring less correction) than for a band gap
reference, resulting in much lower noise, because most of the
noise of a band gap reference comes from the temperature
compensation circuitry.
The ADR43x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.5 V
to 18 V. When these devices are used in applications at higher
currents, users should use the following equation to account for
the temperature effects due to the power dissipation increases.
TPT
DJ
(2)
AJA
where:
T
and TA are the junction and ambient temperatures,
J
respectively.
P
is the device power dissipation.
D
is the device package thermal resistance.
θ
JA
BASIC VOLTAGE REFERENCE CONNECTIONS
Voltage references, in general, require a bypass capacitor
connected from V
illustrates the basic configuration for the ADR43x family of
references. Other than a 0.1 µF capacitor at the output to help
improve noise suppression, a large output capacitor at the
output is not required for circuit stability.
to GND. The circuit in Figure 30
OUT
Figure 29 shows the basic topology of the ADR43x series. The
temperature correction term is provided by a current source
with a value designed to be proportional to absolute temperature.
The general equation is
OUT
P
IR1VΔGV×−×= (1)
PTAT
where:
G is the gain of the reciprocal of the divider ratio.
∆V
is the difference in pinch-off voltage between the two JFETs.
P
I
is the positive temperature coefficient correction current.
PTAT
ADR43x devices are created by on-chip adjustment of R2 and
R3 to achieve 2.048 V or 2.500 V, respectively, at the reference
output.
V
R2
R3
GND
V
IN
OUT
04500-0-002
I
I
PTAT
1
**
*EXTRA CHANNEL IMPLANT
V
= G(∆V
OUT
Figure 29. Simplified Schematic Device
Power Dissipation Considerations
I
1
–R1×I
P
ADR43x
∆
V
P
R1
)
PTAT
1
TP
IN
+
10µF
0.1µF
Figure 30. Basic Voltage Reference Configuration
2
ADR43x
TOP VIEW
3
NIC
(Not to Scale)
4
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
8
7
6
5
TP
NIC
OUTPUT
TRIM
0.1µF
04500-0-003
NOISE PERFORMANCE
The noise generated by the ADR43x family of references is
typically less than 3.75 µV p-p over the 0.1 Hz to 10.0 Hz band
for ADR430, ADR431, and ADR433. Figure 22 shows the 0.1
Hz to 10 Hz noise of the ADR431, which is only 3.5 µV p-p. The
noise measurement is made with a band-pass filter made of a
2-pole high-pass filter with a corner frequency at 0.1 Hz and a
2-pole low-pass filter with a corner frequency at 10.0 Hz.
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two components normally associated with this are the time for the active
circuits to settle and the time for the thermal gradients on the
chip to stabilize. Figure 17 and Figure 18 show the turn-on
settling time for the ADR431.
Rev. B | Page 15 of 24
Page 16
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
APPLICATIONS
OUTPUT ADJUSTMENT
The ADR43x trim terminal can be used to adjust the output
voltage over a ±0.5% range. This feature allows the system
designer to trim system errors out by setting the reference to a
voltage other than the nominal. This is also helpful if the part is
used in a system at temperature to trim out any error. Adjustment
of the output has negligible effect on the temperature performance of the device. To avoid degrading temperature coefficients,
both the trimming potentiometer and the two resistors need to
be low temperature coefficient types, preferably <100 ppm/°C.
INPUT
LASER BEAM
ACTIVATOR
CONTROL
ELECTRONICS
SOURCE FIBER
GIMBAL + SENSOR
LEFT
AMPL
DAC
MEMS MIRROR
PREAMP
ADC
AMPL
DAC
DESTINATION
FIBER
ACTIVATOR
RIGHT
ADR431
ADR431
ADR431
V
IN
V
O
ADR43x
TRIM
GND
Figure 31. Output Trim Adjustment
470kΩ
R1
OUTPUT
R
P
10kΩ
10kΩ (ADR420)
R2
15kΩ (ADR421)
VO = ±0.5%
04500-0-004
REFERENCE FOR CONVERTERS IN OPTICAL
NETWORK CONTROL CIRCUITS
In the upcoming high capacity, all-optical router network,
Figure 32 employs arrays of micromirrors to direct and route
optical signals from fiber to fiber without first converting them
to electrical form, which reduces the communication speed.
The tiny micromechanical mirrors are positioned so that each is
illuminated by a single wavelength that carries unique information and can be passed to any desired input and output fiber.
The mirrors are tilted by the dual-axis actuators controlled by
precision ADCs and DACs within the system. Due to the
microscopic movement of the mirrors, not only is the precision
of the converters important, but the noise associated with these
controlling converters is also extremely critical, because total
noise within the system can be multiplied by the number of
converters employed. As a result, to maintain the stability of the
control loop for this application, the ADR43x is necessary due
to its exceptionally low noise.
DSP
GND
Figure 32. All-Optical Router Network
NEGATIVE PRECISION REFERENCE WITHOUT
PRECISION RESISTORS
In many current-output CMOS DAC applications where the
output signal voltage must be of the same polarity as the
reference voltage, it is often required to reconfigure a currentswitching DAC into a voltage-switching DAC through the use
of a 1.25 V reference, an op amp, and a pair of resistors. Using a
current-switching DAC directly requires an additional operational amplifier at the output to re-invert the signal. A negative
voltage reference is then desirable from the standpoint that an
additional operational amplifier is not required for either
re-inversion (current-switching mode) or amplification
(voltage-switching mode) of the DAC output voltage. In
general, any positive voltage reference can be converted into a
negative voltage reference through the use of an operational
amplifier and a pair of matched resistors in an inverting
configuration. The disadvantage to this approach is that the
largest single source of error in the circuit is the relative
matching of the resistors used.
A negative reference can easily be generated by adding a
precision op amp and configuring it as shown in Figure 33.
is at virtual ground and, therefore, the negative reference
V
OUT
can be taken directly from the output of the op amp. The op
amp must be dual supply, have low offset and rail-to-rail
capability, if negative supply voltage is close to the reference
output.
04500-0-005
Rev. B | Page 16 of 24
Page 17
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
+V
DD
2
V
IN
V
6
OUT
ADR43x
GND
4
A1
–
V
DD
A1 = OP777, OP193
–
V
REF
04500-0-006
Figure 33. Negative Reference
HIGH VOLTAGE FLOATING CURRENT SOURCE
The circuit in Figure 34 can be used to generate a floating
current source with minimal self-heating. This particular
configuration can operate on high supply voltages determined
by the breakdown voltage of the N-channel JFET.
+V
S
SST111
VISHAY
V
IN
ADR43x
V
OUT
GND
OP90
Figure 34. High Voltage Floating Current Source
2N3904
R
2.1kΩ
–V
S
L
04500-0-007
KELVIN CONNECTIONS
In many portable instrumentation applications where PC board
cost and area go hand-in-hand, circuit interconnects are very
often of dimensionally minimum width. These narrow lines can
cause large voltage drops if the voltage reference is required to
provide load currents to various functions. In fact, a circuit’s
interconnects can exhibit a typical line resistance of 0.45 mΩ/
square (1 oz. Cu, for example). Force and sense connections,
also referred to as Kelvin connections, offer a convenient
method of eliminating the effects of voltage drops in circuit
wires. Load currents flowing through wiring resistance produce
an error (V
connection of Figure 35 overcomes the problem by including
the wiring resistance within the forcing loop of the op amp.
Because the op amp senses the load voltage, the op amp loop
control forces the output to compensate for the wiring error and
to produce the correct voltage at the load.
= R × IL) at the load. However, the Kelvin
ERROR
V
IN
2
ADR43x
V
OUT
GND
4
6
R
LW
V
IN
A1
+
A1 = OP191
V
OUT
SENSE
R
LW
V
OUT
FORCE
R
L
04500-0-008
Figure 35. Advantage of Kelvin Connection
DUAL POLARITY REFERENCES
Dual polarity references can easily be made with an op amp and
a pair of resistors. In order not to defeat the accuracy obtained
by ADR43x, it is imperative to match the resistance tolerance as
well as the temperature coefficient of all the components.
V
IN
1µF0.1µF
Figure 36. +5 V and −5 V References Using ADR435
+10V
Figure 37. +2.5 V and −2.5 V References Using ADR435
GND
2
V
IN
ADR435
GND
4
2
V
IN
ADR435
U1
4
V
OUT
U1
TRIM
V
OUT
TRIM
6
5
6
5
5.6kΩ
5.6kΩ
10k
5k
+2.5V
R1
R2
–2.5V
R1
Ω
R3
Ω
+10V
V+
OP1177
U2
V–
–
10V
V+
OP1177
U2
V–
–10V
10k
+5V
R2
Ω
–5V
04500-0-009
04500-0-010
Rev. B | Page 17 of 24
Page 18
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
PROGRAMMABLE CURRENT SOURCE
Together with a digital potentiometer and a Howland current
pump, ADR435 forms the reference source for a programmable
current as
RR2
+
2
⎛
⎜
⎜
I×
=
L
⎜
⎜
⎝
and
A
⎞
B
⎟
R1
⎟
V
(3)
R
2
B
W
⎟
⎟
⎠
PROGRAMMABLE DAC REFERENCE VOLTAGE
With a multichannel DAC such as a quad 12-bit voltage output
DAC AD7398, one of its internal DACs and an ADR43x voltage
reference can be used as a common programmable V
rest of the DACs. The circuit configuration is shown in Figure 39.
V
REFA
DAC A
V
OUTA
R1 ± 0.1%
V
IN
R2
± 0.1%
ADR436
for the
REFX
V
REF
D
V×=
W
V
(4)
REF
N
2
where:
D is the decimal equivalent of the input code.
N is the number of bits.
In addition,
respectively. R2
′
and must be equal to R1 and R21Rin theory can be made as small as needed to
B
′
2R
+ R2B,
A
achieve the necessary current within the A2 output current
driving capability. In this example, OP2177 can deliver a maximum of 10 mA. Because the current pump employs both positive
and negative feedback, capacitors C1 and C2 are needed to
ensure that the negative feedback prevails and, therefore, avoids
oscillation. This circuit also allows bidirectional current flow if
the inputs V
and VB of the digital potentiometer are supplied
A
with the dual polarity references, as shown previously.
C1
10pF
V
DD
2
V
IN
ADR435
U1
GND
4
TRIM
V
OUT
R1'
50kΩ
5
AD5232
U2
DIGITAL
POTENTIOMETER
6
A
U2
W
B
V
DD
V+
OP2177
A1
V–
V
SS
C2
10pF
R1
50kΩ
Figure 38. Programmable Current Source
R2'
1kΩ
V
DD
V+
OP2177
A2
V–
V
SS
+
VL
–
R2
1kΩ
R2
B
10Ω
A
LOAD
GND
IL
V
REFB
DAC B
V
REFC
DAC C
V
REFD
DAC D
AD7398
V
V
V
OUTB
OUTC
OUTD
VOB=V
REFX(DB
V
OC=VREFX(DC
V
OD=VREFX(DD
)
)
)
04500-0-012
Figure 39. Programmable DAC Reference
The relationship of V
REFX
to V
depends on the digital code
REF
and the ratio of R1 and R2, and is given by
R2
⎞
⎛
1
V
REFX
V
=
⎛
⎜
⎝
REF
1
+×
⎟
⎜
R1
⎠
⎝
N
2
(5)
R2D
⎞
×+
⎟
R1
⎠
where:
D is the decimal equivalent of input code.
N is the number of bits.
is the applied external reference.
V
REF
V
is the reference voltage for DAC A to DAC D.
REFX
Table 10. V
04500-0-011
R1, R2 Digital Code V
R1 = R2 0000 0000 0000 2 V
R1 = R2 1000 0000 0000 1.3 V
R1 = R2 1111 1111 1111 V
R1 = 3R2 0000 0000 0000 4 V
R1 = 3R2 1000 0000 0000 1.6 V
R1 = 3R2 1111 1111 1111 V
vs. R1 and R2
REFX
REF
REF
REF
REF
REF
REF
REF
Rev. B | Page 18 of 24
Page 19
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
PRECISION VOLTAGE REFERENCE FOR
DATA CONVERTERS
The ADR43x family has a number of features that make it ideal
for use with ADCs and DACs. The exceptional low noise, tight
temperature coefficient, and high accuracy characteristics make
the ADR43x ideal for low noise applications such as cellular
base station applications.
Another example of ADC for which the ADR431 is well suited
is the AD7701. Figure 40 shows the ADR431 used as the
precision reference for this converter. The AD7701 is a 16-bit
ADC with on-chip digital filtering intended for the
measurement of wide dynamic range
such as those representing chemical, physical, or biological
processes. It contains a charge-balancing (Σ-∆) ADC, a
calibration microcontroller with on-chip static RAM, a clock
oscillator, and a serial communications port.
+5V
ANALOG
SUPPLY
0.1µF
10µF
V
IN
V
OUT
ADR431
GND
0.1µF
10µF
RANGES
SELECT
CALIBRATE
ANALOG
INPUT
ANALOG
GROUND
–5V
ANALOG
SUPPLY
0.1µF
0.1µF
Figure 40. Voltage Reference for 16-Bit ADC AD7701
and low frequency signals
AD7701
AV
DD
V
REF
BP/UP
CAL
A
IN
AGND
AV
SS
DV
SLEEP
MODE
DRDV
CS
SCLK
SDATA
CLKIN
CLKOUT
SC1
SC2
DGND
DV
DD
SS
0.1µF
DATA READY
READ (TRANSMIT)
SERIAL CLOCK
SERIAL CLOCK
0.1µF
04500-0-013
PRECISION BOOSTED OUTPUT REGULATOR
A precision voltage output with boosted current capability can
be realized with the circuit shown in Figure 41. In this circuit,
U2 forces V
N1. Therefore, the load current is furnished by VIN. In this
configuration, a 50 mA load is achievable at V
Moderate heat is generated on the MOSFET, and higher current
can be achieved with a replacement of the larger device. In
addition, for a heavy capacitive load with step input, a buffer
may be added at the output to enhance the transient response.
V
IN
to be equal to V
O
2
U1
V
IN
6
V
OUT
5
TRIM
GND
4
ADR431
by regulating the turn on of
REF
N1
5V
2N7002
+
V+
AD8601
V–
–
U2
Figure 41. Precision Boosted Output Regulator
of 5 V.
IN
V
R
L
O
25Ω
04500-0-014
Rev. B | Page 19 of 24
Page 20
ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
Y
OUTLINE DIMENSIONS
3.00
BSC
85
3.00
BSC
PIN 1
0.65 BSC
0.15
0.00
0.38
0.22
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187AA
4
SEATING
PLANE
4.90
BSC
1.10 MAX
0.23
0.08
8°
0°
0.80
0.60
0.40
Figure 42. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARIT
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
8°
1.27 (0.0500)
0°
0.40 (0.0157)
× 45°
Figure 43. 8-Lead Standard Small Outline Package [SOIC]