Datasheet ADR392, ADR395 Datasheet (ANALOG DEVICES)

Micropower, Low Noise Precision Voltage

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FEATURES

Compact 5-lead TSOT packages Low temperature coefficient

B grade: 9 ppm/°C A grade: 25 ppm/°C

Initial accuracy

B grade: ±4 mV maximum (ADR390)

A grade: ±6 mV maximum Ultralow output noise: 5 μV p-p (0.1 Hz to 10 Hz) Low dropout: 300 mV Low supply current

3 μA maximum in shutdown

120 μA maximum in operation No external capacitor required Output current: 5 mA Wide temperature range: −40°C to +125°C

APPLICATIONS

Battery-powered instrumentation Portable medical instrumentation Data acquisition systems Industrial process controls Automotive

References with Shutdown

ADR390/ADR391/ADR392/ADR395

PIN CONFIGURATION

ADR390/

1

SHDN

V

OUT (SENSE)

ADR391/

V

2

IN

ADR392/

ADR395

3

(Not to Scale)

Figure 1. 5-Lead TSOT (UJ Suffix)

Table 1.

Output

Model

ADR390B 2.048 9 ±4 ADR390A 2.048 25 ±6 ADR391B 2.5 9 ±4 ADR391A 2.5 25 ±6 ADR392B 4.096 9 ±5 ADR392A 4.096 25 ±6 ADR395B 5.0 9 ±5 ADR395A 5.0 25 ±6

Voltage (VO)

5

GND

V

4

OUT (FORCE)

Temperature Coefficient (ppm/°C)

00419-001

Accuracy (mV)

GENERAL DESCRIPTION

The ADR390/ADR391/ADR392/ADR395 are precision 2.048 V,

2.5 V, 4.096 V, and 5 V band gap voltage references, respectively, featuring low power and high precision in a tiny footprint. Using patented temperature drift curvature correction techniques from Analog Devices, Inc., the ADR39x references achieve a low 9 ppm/°C of temperature drift in the TSOT package.

Rev. G

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

The ADR39x family of micropower, low dropout voltage references provides a stable output voltage from a minimum supply of 300 mV above the output. Their advanced design eliminates the need for external capacitors, which further reduces board space and system cost. The combination of low power operation, small size, and ease of use makes the ADR39x precision voltage references ideally suited for batteryoperated applications.

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REVISION HISTORY

2/08—Rev. F to Rev. G

Changes to Ripple Rejection Ration Parameter (Table 2) ........... 3

Changes to Ripple Rejection Ration Parameter (Table 3) ........... 4

Changes to Ripple Rejection Ration Parameter (Table 4) ........... 5

Changes to Ripple Rejection Ration Parameter (Table 5) ........... 6

Changes to Figure 7 .......................................................................... 9

Changes to Outline Dimensions ................................................... 19

Changes to Ordering Guide .......................................................... 19

5/05—Rev. E to Rev. F

Changes to Table 5 ........................................................................... 7

Changes to Figure 2 ......................................................................... 9

4/04—Rev. D to Rev. E

Changes to ADR390—Specifications ............................................ 3

Changes to ADR391—Specifications ............................................ 4

Changes to ADR392—Specifications ............................................ 5

Changes to ADR395—Specifications ............................................ 6

4/04—Rev. C to Rev. D

Updated Format ................................................................ Universal

Changes to Title ............................................................................... 1

Changes to Features ......................................................................... 1

Changes to Applications ................................................................. 1

Changes to General Description ................................................... 1

Changes to Table 1 ........................................................................... 1

Changes to ADR390—Specifications ............................................ 3

Changes to ADR391—Specifications ............................................ 4

Changes to ADR392—Specifications ............................................ 5

Changes to ADR395—Specifications ............................................ 6

Changes to Absolute Maximum Ratings ...................................... 7

ESD Caution...................................................................................7

Terminology .......................................................................................8

Typical Performance Characteristics ..............................................9

Theory of Operation ...................................................................... 16

Device Power Dissipation Considerations .............................. 16

Shutdown Mode Operation ...................................................... 16

Applications Information .............................................................. 17

Basic Voltage Reference Connection ....................................... 17

Capacitors .................................................................................... 18

Outline Dimensions ....................................................................... 19

Ordering Guide .......................................................................... 19

Changes to Thermal Resistance..................................................... 7

Moved ESD Caution........................................................................ 7

Changes to Figure 3, Figure 4, Figure 7, and Figure 8 ................ 9

Changes to Figure 11, Figure 12, Figure 13, and Figure 14...... 10

Changes to Figure 15, Figure 16, Figure 19, and Figure 20...... 11

Changes to Figure 23 and Figure 24............................................ 12

Changes to Figure 27 ..................................................................... 13

Changes to Ordering Guide ......................................................... 19

Updated Outline Dimensions ...................................................... 19

10/02—Rev. B to Rev. C

Add parts ADR392 and ADR395 .................................... Universal

Changes to Features ........................................................................ 1

Changes to General Description ................................................... 1

Additions to Table I ......................................................................... 1

Changes to Specifications ............................................................... 2

Changes to Ordering Guide ........................................................... 4

Changes to Absolute Maximum Ratings ...................................... 4

New TPCs 3, 4, 7, 8, 11, 12, 15, 16, 19, and 20 ............................ 6

New Figures 4 and 5 ...................................................................... 13

Deleted A Negative Precision Reference

without Precision Resistors Section ............................................ 13

Edits to General-Purpose Current Source Section ................... 13

Updated Outline Dimensions ...................................................... 15

5/02—Rev. A to Rev. B

Edits to Layout ................................................................... Universal

Changes to Figure 6 ....................................................................... 13

Rev. G | Page 2 of 20

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SPECIFICATIONS

ADR390 ELECTRICAL CHARACTERISTICS

VIN = 2.5 V to 15 V, TA = 25°C, unless otherwise noted.

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

OUTPUT VOLTAGE V V INITIAL ACCURACY V V V V

O

B grade 2.044 2.048 2.052 V

O

OERR

A grade 0.29 %

OERR

B grade 4 mV

OERR

B grade 0.19 %

OERR

TEMPERATURE COEFFICIENT TCVO A grade: −40°C < TA < +125°C 25 ppm/°C

SUPPLY VOLTAGE HEADROOM VIN − VO 300 mV LINE REGULATION ∆VO/∆VIN VIN = 2.5 V to 15 V, −40°C < TA < +125°C 10 25 ppm/V LOAD REGULATION ∆VO/∆I

QUIESCENT CURRENT IIN No load 120 μA

VOLTAGE NOISE e

0.1 Hz to 10 Hz 5 μV p-p

np-p

TURN-ON SETTLING TIME tR 20 μs LONG-TERM STABILITY OUTPUT VOLTAGE HYSTERESIS ∆V

1

∆VO 1000 hours 50 ppm

O_HYS

RIPPLE REJECTION RATIO RRR fIN = 60 Hz −80 dB SHORT CIRCUIT TO GND ISC V

SHUTDOWN PIN

Shutdown Supply Current I

Shutdown Logic Input Current I

Shutdown Logic Low V

Shutdown Logic High V

1

The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

3 μA

SHDN

500 nA

LOGI C

0.8 V

INL

2.4 V

INH

A grade 2.042 2.048 2.054 V

A grade 6 mV

B grade: −40°C < TA < +125°C 9 ppm/°C

I

LOAD

= 0 mA to 5 mA, −40°C < TA < +85°C, VIN = 3 V 60 ppm/mA

LOAD

I

= 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 3 V 140 ppm/mA

LOAD

−40°C < TA < +125°C 140 μA

100 ppm

= 5 V 25 mA

IN

VIN = 15 V 30 mA

Rev. G | Page 3 of 20

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ADR391 ELECTRICAL CHARACTERISTICS

VIN = 2.8 V to 15 V, TA = 25°C, unless otherwise noted.

Table 3.

Parameter Symbol Conditions Min Typ Max Unit

OUTPUT VOLTAGE VO A grade 2.494 2.5 2.506 V V INITIAL ACCURACY V

V V TEMPERATURE COEFFICIENT TCVO A grade, −40°C < TA < +125°C 25 ppm/°C

SUPPLY VOLTAGE HEADROOM VIN − VO 300 mV LINE REGULATION ∆VO/∆VIN VIN = 2.8 V to 15 V, −40°C < TA < +125°C 10 25 ppm/V LOAD REGULATION ∆VO/∆I

QUIESCENT CURRENT IIN No load 120 μA

VOLTAGE NOISE e TURN-ON SETTLING TIME tR 20 μs LONG-TERM STABILITY

1

OUTPUT VOLTAGE HYSTERESIS ∆V RIPPLE REJECTION RATIO RRR fIN = 60 Hz −80 dB SHORT CIRCUIT TO GND ISC V

SHUTDOWN PIN

Shutdown Supply Current I Shutdown Logic Input Current I Shutdown Logic Low V Shutdown Logic High V

1

The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

B grade 2.496 2.5 2.504 V

O

A grade 6 mV

OERR

V

A grade 0.24 %

OERR

B grade 4 mV

OERR

B grade 0.16 %

OERR

B grade, −40°C < TA < +125°C 9 ppm/°C

I

LOAD

= 0 mA to 5 mA, −40°C < TA < +85°C, VIN = 3 V 60 ppm/mA

LOAD

I

= 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 3 V 140 ppm/mA

LOAD

−40°C < TA < +125°C 140 μA

0.1 Hz to 10 Hz 5 μV p-p

np-p

∆VO 1000 hours 50 ppm

100 ppm

O_HYS

= 5 V 25 mA

IN

VIN = 15 V 30 mA

3 μA

SHDN

500 nA

LOGI C

0.8 V

INL

2.4 V

INH

Rev. G | Page 4 of 20

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ADR392 ELECTRICAL CHARACTERISTICS

VIN = 4.3 V to 15 V, TA = 25°C, unless otherwise noted.

Table 4.

Parameter Symbol Conditions Min Typ Max Unit

OUTPUT VOLTAGE VO A grade 4.090 4.096 4.102 V V INITIAL ACCURACY V

V V TEMPERATURE COEFFICIENT TCVO A grade, −40°C < TA < +125°C 25 ppm/°C

SUPPLY VOLTAGE HEADROOM VIN − VO 300 mV LINE REGULATION ∆VO/∆VIN VIN = 4.3 V to 15 V, −40°C < TA < +125°C 10 25 ppm/V LOAD REGULATION ∆VO/∆I QUIESCENT CURRENT IIN No load 120 μA

VOLTAGE NOISE e TURN-ON SETTLING TIME tR 20 μs LONG-TERM STABILITY

1

OUTPUT VOLTAGE HYSTERESIS ∆V RIPPLE REJECTION RATIO RRR fIN = 60 Hz −80 dB SHORT CIRCUIT TO GND ISC V

SHUTDOWN PIN

Shutdown Supply Current I

Shutdown Logic Input Current I

Shutdown Logic Low V

Shutdown Logic High V

1

The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

B grade 4.091 4.096 4.101 V

O

A grade 6 mV

OERR

V

A grade 0.15 %

OERR

B grade 5 mV

OERR

B grade 0.12 %

OERR

B grade, −40°C < TA < +125°C 9 ppm/°C

I

LOAD

= 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 5 V 140 ppm/mA

LOAD

−40°C < TA < +125°C 140 μA

0.1 Hz to 10 Hz 7 μV p-p

np-p

∆VO 1000 hours 50 ppm

100 ppm

O_HYS

= 5 V 25 mA

IN

VIN = 15 V 30 mA

3 μA

SHDN

500 nA

LOGI C

0.8 V

INL

2.4 V

INH

Rev. G | Page 5 of 20

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ADR395 ELECTRICAL CHARACTERISTICS

VIN = 5.3 V to 15 V, TA = 25°C, unless otherwise noted.

Table 5.

Parameter Symbol Conditions Min Typ Max Unit

OUTPUT VOLTAGE VO A grade 4.994 5.000 5.006 V V INITIAL ACCURACY V

V V TEMPERATURE COEFFICIENT TCVO A grade, −40°C < TA < +125°C 25 ppm/°C

SUPPLY VOLTAGE HEADROOM VIN − VO 300 mV LINE REGULATION ∆VO/∆VIN VIN = 4.3 V to 15 V, −40°C < TA < +125°C 10 25 ppm/V LOAD REGULATION ∆VO/∆I QUIESCENT CURRENT IIN No load 120 μA

VOLTAGE NOISE e TURN-ON SETTLING TIME tR 20 μs LONG-TERM STABILITY

1

OUTPUT VOLTAGE HYSTERESIS ∆V RIPPLE REJECTION RATIO RRR fIN = 60 Hz −80 dB SHORT CIRCUIT TO GND ISC V

SHUTDOWN PIN

Shutdown Supply Current I Shutdown Logic Input Current I Shutdown Logic Low V Shutdown Logic High V

1

The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

B grade 4.995 5.000 5.005 V

O

A grade 6 mV

OERR

V

A grade 0.12 %

OERR

B grade 5 mV

OERR

B grade 0.10 %

OERR

B grade, −40°C < TA < +125°C 9 ppm/°C

I

LOAD

= 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 6 V 140 ppm/mA

LOAD

−40°C < TA < +125°C 140 μA

0.1 Hz to 10 Hz 8 μV p-p

np-p

∆VO 1000 hours 50 ppm

100 ppm

O_HYS

= 5 V 25 mA

IN

VIN = 15 V 30 mA

3 μA

SHDN

500 nA

LOGI C

0.8 V

INL

2.4 V

INH

Rev. G | Page 6 of 20

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ABSOLUTE MAXIMUM RATINGS

At 25°C, unless otherwise noted.

Table 6.

Parameter Rating

Supply Voltage 18 V Output Short-Circuit Duration to GND

Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +125°C Lead Temperature (Soldering, 60 sec) 300°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

See derating curves

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, for a device soldered in a circuit board for surface-mount packages.

Table 7.

Package Type θJA θ

TSOT (UJ-5) 230 146 °C/W

Unit

JC

ESD CAUTION

Rev. G | Page 7 of 20

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TERMINOLOGY

Temperature Coefficient

The change of output voltage with respect to operating temperature changes normalized by the output voltage at 25°C. This parameter is expressed in ppm/°C and can be determined by the following equation:

[]

Cppm/ ×

TCV

O

=°

TVTV

1O2O

()( )

–C25

×°

TTV

12O

6

10

(1)

()()

–

where:

V

(25°C) is VO at 25°C.

O

(T1) is VO at Temperature 1.

V

O

V

(T2) is VO at Temperature 2.

O

Line Regulation

The change in output voltage due to a specified change in input voltage. This parameter accounts for the effects of self-heating. Line regulation is expressed in either percent per volt, partsper-million per volt, or microvolts per volt change in input voltage.

Load Regulation

The change in output voltage due to a specified change in load current. This parameter accounts for the effects of self-heating. Load regulation is expressed in either microvolts per milliampere, parts-per-million per milliampere, or ohms of dc output resistance.

Long-Term Stability

Typical shift of output voltage at 25°C on a sample of parts subjected to a test of 1000 hours at 25°C.

∆V

= VO(t0) − VO(t1)

O

tVtV

)()(

⎛

V (2)

O

⎜

]ppm[

=Δ

⎜ ⎝

−

0

O

tV

)(

0

O

⎞

1

6

⎟

10

×

⎟ ⎠

where:

(t0) is VO at 25°C at Time 0.

V

O

(t1) is VO at 25°C after 1000 hours operation at 25°C.

V

O

Thermal Hysteresis

The change of output voltage after the device is cycled through temperatures from +25°C to –40°C to +125°C and back to +25°C. This is a typical value from a sample of parts put through such a cycle.

V

= VO(25°C) − V

O_HYS

V

HYSO

_

O

]ppm[ ×

=

(3)

O_TC

o

)25(

−

VCV

TCO

_

o

)25(

CV

O

6

10

(4)

where:

(25°C) is VO at 25°C

V

O

V

is VO at 25°C after a temperature cycle from +25°C to

O_TC

−40°C to +125°C and back to +25°C

Rev. G | Page 8 of 20

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TYPICAL PERFORMANCE CHARACTERISTICS

2.060

5.006

2.056

SAMPLE 2

2.052

(V)

OUT

V

2.048

SAMPLE 1

2.044

2.040 –40 –5

30 65 100 125

TEMPERATURE (°C)

Figure 2. ADR390 Output Voltage vs. Temperature

2.506

2.504

SAMPLE 1

2.502

(V)

2.500

OUT

V

2.498

2.496

SAMPLE 3

SAMPLE 2

SAMPLE 3

5.004 SAMPLE 3

5.002

(V)

V

0419-003

SAMPLE 2

5.000

OUT

4.998

4.996

4.994

–40 –5 30 65 125

SAMPLE 1

TEMPERATURE (°C)

100

00419-006

Figure 5. ADR395 Output Voltage vs. Temperature

140

120

100

80

SUPPLY CURRENT (µA)

60

+125°C

+85°C

+25°C

–40°C

2.494 –40 –5

30 65 100 125

TEMPERATURE (°C)

Figure 3. ADR391 Output Voltage vs. Temperature

4.100

4.098

SAMPLE 3

4.096

(V)

4.094

SAMPLE 1

OUT

V

4.092

4.090

4.088 –40 0 40 80 125

SAMPLE 2

TEMPERATURE (°C)

Figure 4. ADR392 Output Voltage vs. Temperature

40

2.5 15.05.0

00419-004

7.5 10.0 12.5

INPUT VOLTAGE (V)

00419-007

Figure 6. ADR390 Supply Current vs. Input Voltage

140

120

+125°C

100

80

SUPPLY CURRENT (µA)

60

40

2.5 15.05.0

00419-005

+85°C

+25°C

–40°C

7.5 10.0 12.5

INPUT VOLTAGE (V)

00419-008

Figure 7. ADR391 Supply Current vs. Input Voltage

Rev. G | Page 9 of 20

ADR390/ADR391/ADR392/ADR395

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140

120

100

80

SUPPLY CURRENT (µA)

60

40

57911

I N PU T VO LTAG E (V )

+125°C

+25°C

–40°C

Figure 8. ADR392 Supply Current vs. Input Voltage

140

120

100

80

SUPPLY CURRENT (µA)

60

+125°C

+25

–40

°

C

°

C

13 15

00419-009

180

I

= 0mA TO 5mA

L

160

140

TION (ppm/mA)

120

LOAD REGUL

100

80

–40 –10

20

TEMPERATURE (°

= 5V

V

IN

50 80 110 125

C)

Figure 11. ADR391 Load Regulation vs. Temperature

90

IL = 0mA TO 5mA

80

70

TION (ppm/mA)

60

LOAD REGUL

50

V

= 7.5V

IN

V

IN

= 5V

V

= 3V

IN

00419-012

40

5.5 7.0 8.5 10.0 14.5

INPUT VOLTAGE (V)

11.5

13.0

Figure 9. ADR395 Supply Current vs. Input Voltage

120

IL = 0mA TO 5mA

100

80

TION (ppm/mA)

60

40

LOAD REGUL

20

0

–40 –10

= 3V

V

IN

V

= 5V

IN

20 50 80 125

TEMPERATURE (°

C)

Figure 10. ADR390 Load Regulation vs. Temperature

110

00419-010

40

–40 –5 30 65 125

TEMPERATURE (°C)

100

00419-013

Figure 12. ADR392 Load Regulation vs. Temperature

80

IL = 0mA TO 5mA

70

V

= 7.5V

IN

60

TION (ppm/mA)

50

LOAD REGUL

40

00419-0 11

30

–40 –5 30 65 125

TEMPERATURE (°C)

100

V

= 5V

IN

00419-014

Figure 13. ADR395 Load Regulation vs. Temperature

Rev. G | Page 10 of 20

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25

20

15

TION (ppm/V)

10

LINE REGUL

5

0

–40 –10

20 80 110 125

TEMPERATURE (°C)

50

Figure 14. ADR390 Line Regulation vs. Temperature

25

20

15

10

LINE REGULATION ( ppm/V)

5

00419-015

14

12

10

8

TION (ppm/V)

6

4

LINE REGUL

2

0

–40 –5 30 65 125

VIN = 5.3V TO 15V

100

TEMPERATURE (°C)

Figure 17. ADR395 Line Regulation vs. Temperature

3.0

2.8

2.6

MIN (V)

IN

V

2.4

2.2

+85°C

–40

+25°C

°C

+125°C

00419-018

0

–40 –10

20 80 110 125

TEMPERATURE (°C)

50

Figure 15. ADR391 Line Regulation vs. Temperature

14

12

10

8

TION (ppm/V)

6

4

LINE REGUL

2

0

–40 –5 30 65 125

VIN = 4.4V TO 15V

100

TEMPERATURE (°C)

Figure 16. ADR392 Line Regulation vs. Temperature

00419-016

2.0 01

234

LOAD CURRENT (mA)

5

00419-019

Figure 18. ADR390 Minimum Input Voltage vs. Load Current

3.6

°C

3.4

3.2

MIN (V )

IN

V

3.0

2.8

2.6 01

00419-017

2345

LOAD CURRENT (mA)

+125

+85

+25

–40

°C

00419-020

Figure 19. ADR391 Minimum Input Voltage vs. Load Current

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4.8

4.6

4.4

MIN (V)

IN

4.2

V

4.0

3.8 0123 5

LOAD CURRENT (mA)

+125

+25°C

–40°C

Figure 20. ADR392 Minimum Input Voltage vs. Load Current

6.0

5.8

5.6

5.4

MIN (V)

5.2

IN

V

5.0

+125

+25

–40

70

TEMPERATURE: +25°

°C

4

0419-021

60

50

Y

40

30

FREQUEN

20

10

0

–0.56 –0.26

–0.41 –0.11

V

OUT

Figure 23. ADR391 V

1k

900

VIN = 5V

800 700

°

C

°

C

°

C

Hz)

600

500

400

300

200

°

C

–40

C

DEVIATION (mV)

Hysteresis Distribution

OUT

ADR391

ADR390

+125°C +25°C

0.04 0.19

0.34

00419-024

4.8

4.6 0123 5

LOAD CURRENT (mA)

4

00419-022

Figure 21. ADR395 Minimum Input Voltage vs. Load Current

60

TEMPERATURE: +25°C

50

40

30

FREQUENCY

20

10

0

–0.18 –0.06

–0.24

–0.12

Figure 22. ADR390 V

–40°C

0 0.06 0.18

V

DEVIATION (mV)

OUT

Hysteresis Distribution

OUT

+125°C +25°C

0.12 0.24

0.30

00419-023

VOLTAGE NOISE DENSITY (nV/

100

10 100 1k 10k

FREQUENCY (Hz)

Figure 24. Voltage Noise Density vs. Frequency

0

VOLTAGE (2µV/DIV)

0

TIME (1s/ DIV)

Figure 25. ADR391 Typical Voltage Noise 0.1 Hz to 10 Hz

00419-025

0419-026

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V

OUT

V

ON

LOAD

VOLTAGE (100µV/DIV)

VOLTAGE (1V/DIV)

LOAD OFF

CL = 0nF

TIME (10µ s/DIV)

Figure 26. ADR391 Voltage Noise 10 Hz to 10 kHz

LINE INTERRUPTI ON

VOLTAGE

V

OUT

TIME (10µs/DIV)

Figure 27. ADR391 Line Transient Response

C

BYPASS

0.5V/DIV

1V/DIV

= 0µF

= 0.1µF

00419-027

TIME (200µ s/DIV)

00419-030

Figure 29. ADR391 Load Transient Response

V

OUT

LOAD OFF

V

ON

VOLTAGE (1V/DIV)

LOAD

00419-028

TIME (200

µs/DIV)

CL = 1nF

00419-031

Figure 30. ADR391 Load Transient Response

V

OUT

CL = 100nF

LINE INTERRUPTION

AGE

VOL

V

OUT

TIME (10

µs/DIV)

0.5V/DIV

1V/DIV

00419-029

Figure 28. ADR391 Line Transient Response

Rev. G | Page 13 of 20

LOAD OFF

V

LOAD

ON

TIME (200µ s/DIV)

VOLTAGE (1V/DIV)

Figure 31. ADR391 Load Transient Response

00419-032

ADR390/ADR391/ADR392/ADR395

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VIN = 15V

C

BYPASS

= 0.1µF

5V/DIV

V

IN

VOLTAGE

V

OUT

2V/DIV

TIME (20µs/DIV)

Figure 32. ADR391 Turn-On Response Time at 15 V

VIN = 15V

V

IN

VOLTAGE

V

OUT

5V/DIV

2V/DIV

V

OUT

VOLTAGE

V

IN

00419-033

2V/DIV

5V/DIV

00419-035

TIME (200µ s/DIV)

Figure 34. ADR391 Turn-On/Turn-Off Response at 5 V with Capacitance

RL = 500Ω

V

OUT

VOLTAGE

V

IN

2V/DIV

5V/DIV

TIME (40µs/DIV)

Figure 33. ADR391 Turn-Off Response at 15 V

00419-034

TIME (200µs/DIV)

00419-036

Figure 35. ADR391 Turn-On/Turn-Off Response at 5 V with Resistor Load

Rev. G | Page 14 of 20

ADR390/ADR391/ADR392/ADR395

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RL = 500Ω C

= 100nF

L

V

OUT

VOLTAGE

V

IN

2V/DIV

5V/DIV

TIME (200

µs/DIV)

Figure 36. ADR391 Turn-On/Turn-Off Response at 5 V

80

60

40

20

0

–20

–40

–60

RIPPLE REJECTION (d B)

–80

–100

–120

10 1M100

1k 10k 100k

FREQUENCY ( Hz)

00419-037

00419-038

100

90

80

70

60

50

40

30

OUTPUT IM PEDANCE (Ω)

20

10

0

10 1M100

= 1µF

C

L

1k 10k 100k

FREQUENCY ( Hz)

CL = 0µF

= 0.1µF

C

L

00419-039

Figure 38. Output Impedance vs. Frequency

Figure 37. Ripple Rejection vs. Frequency

Rev. G | Page 15 of 20

ADR390/ADR391/ADR392/ADR395

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THEORY OF OPERATION

Band gap references are the high performance solution for low supply voltage and low power voltage reference applications, and the ADR390/ADR391/ADR392/ADR395 are no exception. The uniqueness of these devices lies in the architecture. As shown in Figure 39, the ideal zero TC band gap voltage is referenced to the output, not to ground. Therefore, if noise exists on the ground line, it is greatly attenuated on V

OUT

. The band gap cell consists of the PNP pair, Q51 and Q52, running at unequal current densities. The difference in V

results in a

BE

voltage with a positive TC, which is amplified by a ratio of

R58

2

×

R54

This PTAT voltage, combined with V

s of Q51 and Q52,

BE

produces a stable band gap voltage.

Reduction in the band gap curvature is performed by the ratio of Resistors R44 and R59, one of which is linearly temperature dependent. Precision laser trimming and other patented circuit techniques are used to further enhance the drift performance.

Q1

R59 R44

R58

R49

R54

IN

V

OUT (FORCE)

V

OUT (SENSE)

DEVICE POWER DISSIPATION CONSIDERATIONS

The ADR390/ADR391/ADR392/ADR395 are capable of delivering load currents to 5 mA, with an input voltage that ranges from 2.8 V (ADR391 only) to 15 V. When these devices are used in applications with large input voltages, care should be taken to avoid exceeding the specified maximum power dissipation or junction temperature because it could result in premature device failure. The following formula should be used to calculate the maximum junction temperature or dissipation of the device:

TT

–

AJ

P

=

D

(5)

θ

JA

where:

T

and TA are, respectively, the junction and ambient temperatures.

J

P

is the device power dissipation.

D

θ

is the device package thermal resistance.

JA

SHUTDOWN MODE OPERATION

The ADR390/ADR391/ADR392/ADR395 include a shutdown feature that is TTL/CMOS level compatible. A logic low or a

SHDN

zero volt condition on the devices off. During shutdown, the output of the reference becomes a high impedance state, where its potential would then be determined by external circuitry. If the shutdown feature is

SHDN

not used, the

pin should be connected to VIN (Pin 2).

pin is required to turn the

SHDN

Figure 39. Simplified Schematic

Q51

R60

R53

Q52

R61

R48

GND

00419-040

Rev. G | Page 16 of 20

ADR390/ADR391/ADR392/ADR395

S

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APPLICATIONS INFORMATION

BASIC VOLTAGE REFERENCE CONNECTION

The circuit shown in Figure 40 illustrates the basic configuration for the ADR39x family. Decoupling capacitors are not required for circuit stability. The ADR39x family is capable of driving capacitive loads from 0 μF to 10 μF. However, a 0.1 μF ceramic output capacitor is recommended to absorb and deliver the charge, as required by a dynamic load.

HUTDOWN

INPUT

C

B

*NOT REQUIRED

*

0.1µF

SHDN

V

IN

V

OUT (S ENSE)

Figure 40. Basic Configuration for the ADR39x Family

Stacking Reference ICs for Arbitrary Outputs

Some applications may require two reference voltage sources, which are a combined sum of standard outputs. Figure 41 shows how this stacked output reference can be implemented.

OUTPUTTABLE

U1/U2

ADR390/ADR390 ADR391/ADR391 ADR392/ADR392 ADR395/ADR395

V

IN

SHDN

0.1

0.1µF

C2

µF

C2

V

SHDN

V

Figure 41. Stacking Voltage References with the

ADR390/ADR391/ADR392/ADR395

Two reference ICs are used, fed from an unregulated input,

. The outputs of the individual ICs are connected in series,

V

IN

which provide two output voltages, V terminal voltage of U1, while V and the terminal voltage of U2. U1 and U2 are chosen for the two voltages that supply the required outputs (see the Output

GND

ADR39x

V

OUT (FORCE)

*

0.1µF

C

B

V

(V) V

OUT1

2.048

2.5

4.096 5

V

IN

OUT (FORCE)

OUT ( SENSE)

GND

V

IN

OUT (FORCE)

OUT ( SENSE)

GND

is the sum of this voltage

OUT2

U2

U1

OUT1

OUT2

4.096

5.0

8.192 10

(V)

and V

OUT2

OUTPUT

V

OUT2

V

OUT1

. V

OUT1

00419-041

00419-042

is the

Tabl e in Figure 41). For example, if both U1 and U2 are ADR391s, V

is 2.5 V and V

OUT1

OUT2

is 5.0 V.

While this concept is simple, a precaution is required. Because the lower reference circuit must sink a small bias current from U2 plus the base current from the series PNP output transistor in U2, either the external load of U1 or an external resistor must provide a path for this current. If the U1 minimum load is not well defined, the external resistor should be used and set to a value that conservatively passes 600 μA of current with the applicable V

across it. Note that the two U1 and U2

OUT1

reference circuits are treated locally as macrocells; each has its own bypasses at input and output for best stability. Both U1 and U2 in this circuit can source dc currents up to their full rating. The minimum input voltage, V the outputs, V

, plus the dropout voltage of U2.

OUT2

, is determined by the sum of

IN

A Negative Precision Reference without Precision Resistors

A negative reference can be easily generated by adding an A1 op amp and is configured as shown in Figure 42. V and V

OUT (SENSE)

are at virtual ground and, therefore, the negative

OUT (FORCE)

reference can be taken directly from the output of the op amp. The op amp must be dual-supply, low offset, and rail-to-rail if the negative supply voltage is close to the reference output.

+

DD

V

IN

V

OUT (FORCE)

SHDN

V

OUT ( SENSE)

GND

A1

–V

DD

–V

REF

00419-043

Figure 42. Negative Reference

General-Purpose Current Source

Many times in low power applications, the need arises for a precision current source that can operate on low supply voltages. The ADR390/ADR391/ADR392/ADR395 can be configured as a precision current source. As shown in Figure 43, the circuit configuration is a floating current source with a grounded load. The reference output voltage is bootstrapped across R

, which sets the output current into the load. With

SET

this configuration, circuit precision is maintained for load currents in the range from the reference supply current, typically 90 μA to approximately 5 mA.

Rev. G | Page 17 of 20

ADR390/ADR391/ADR392/ADR395

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IN

SHDN

V

OUT (SENSE)

ADR39x

V

IN

V

OUT (FORCE)

GND

ISY (I

SET

0.1µF

ADJUST

)

I

SET

R1

= I

R

SET

P1

SET

+ ISY (I

SET

)

00419-044

I

SY

I

OUT

R

L

Figure 43. A General-Purpose Current Source

High Power Performance with Current Limit

In some cases, the user may want higher output current delivered to a load and still achieve better than 0.5% accuracy out of the ADR39x. The accuracy for a reference is normally specified on the data sheet with no load. However, the output voltage changes with load current.

The circuit shown in Figure 44 provides high current without compromising the accuracy of the ADR39x. The series pass transistor, Q1, provides up to 1 A load current. The ADR39x delivers only the base drive to Q1 through the force pin. The sense pin of the ADR39x is a regulated output and is connected to the load.

The Transistor Q2 protects Q1 during short-circuit limit faults by robbing its base drive. The maximum current is

I

≈ 0.6 V/RS (6)

LMAX

R1

4.7kΩ

V

IN

U1

SHDN

V

IN

V

OUT (FORCE)

V

OUT (SENSE)

ADR39x

GND

R

S

Q1 Q2N2222

R

L

Q2 Q2N4921

00419-D-046

Figure 45. ADR39x for High Output Current

with Darlington Drive Configuration

CAPACITORS

Input Capacitor

Input capacitors are not required on the ADR39x. There is no limit for the value of the capacitor used on the input, but a 1 μF to 10 μF capacitor on the input improves transient response in applications where the supply suddenly changes. An additional

0.1 μF in parallel also helps reduce noise from the supply.

Output Capacitor

The ADR39x does not require output capacitors for stability under any load condition. An output capacitor, typically 0.1 μF, filters out any low level noise voltage and does not affect the operation of the part. On the other hand, the load transient response can improve with the addition of a 1 μF to 10 μF output capacitor in parallel. A capacitor here acts as a source of stored energy for a sudden increase in load current. The only parameter that degrades by adding an output capacitor is the turn-on time, and it depends on the size of the capacitor chosen.

150

100

R1

4.7kΩ

V

IN

U1

SHDN

V

IN

V

OUT (FORCE)

V

OUT (SENSE)

ADR39x

GND

Q2

Q2N2222

Q1 Q2N4921

R

S

RLI

L

Figure 44. ADR39x for High Power Performance with Current Limit

A similar circuit function can also be achieved with the Darlington transistor configuration, as shown in Figure 45.

00419-045

Rev. G | Page 18 of 20

50

0

DRIFT (ppm)

–50

–100

–150

0

100 200 300 400 500 600 700 1000

TIME (Hours)

900800

Figure 46. ADR391 Typical Long-Term Drift over 1000 Hours

00419-002

ADR390/ADR391/ADR392/ADR395

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OUTLINE DIMENSIONS

2.90 BSC

54

0.50

0.30

2.80 BSC

0.95 BSC

*

1.00 MAX

SEATING PLANE

(UJ-5)

0.20

0.08

8° 4° 0°

0.60

0.45

0.30

1.60 BSC

123

PIN 1

*

0.90

0.87

0.84

0.10 MAX

*

COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

1.90

BSC

Figure 47. 5-Lead Thin Small Outline Transistor Package [TSOT]

Dimensions shown in millimeters

ORDERING GUIDE

Models

Output Voltage (V

O

)

Initial Accuracy (mV) (%)

ADR390AUJZ-REEL712.048 ±6 0.29 25 5-Lead TSOT UJ-5 R0A 3,000 −40°C to +125°C ADR390AUJZ-R2 ADR390BUJZ-REEL7 ADR390BUJZ-R2 ADR391AUJZ-REEL7 ADR391AUJZ-R2 ADR391BUJZ-REEL7 ADR391BUJZ-R2 ADR392AUJZ-REEL7 ADR392AUJZ-R2 ADR392BUJZ-REEL7 ADR392BUJZ-R2 ADR395AUJZ-REEL7 ADR395AUJZ-R2 ADR395BUJZ-REEL7 ADR395BUJZ-R2

1

Z = RoHS Compliant Part.

1

2.048 ±6 0.29 25 5-Lead TSOT UJ-5 R0A 250 −40°C to +125°C

1

2.048 ±4 0.19 9 5-Lead TSOT UJ-5 R0B 3,000 −40°C to +125°C

1

2.048 ±4 0.19 9 5-Lead TSOT UJ-5 R0B 250 −40°C to +125°C

1

2.5 ±6 0.24 25 5-Lead TSOT UJ-5 R1A 3,000 −40°C to +125°C

1

2.5 ±6 0.24 25 5-Lead TSOT UJ-5 R1A 250 −40°C to +125°C

1

2.5 ±4 0.16 9 5-Lead TSOT UJ-5 R1B 3,000 −40°C to +125°C

1

2.5 ±4 0.16 9 5-Lead TSOT UJ-5 R1B 250 −40°C to +125°C

1

4.096 ±6 0.15 25 5-Lead TSOT UJ-5 RCA 3,000 −40°C to +125°C

1

4.096 ±6 0.15 25 5-Lead TSOT UJ-5 RCA 250 −40°C to +125°C

1

4.096 ±5 0.12 9 5-Lead TSOT UJ-5 RCB 3,000 −40°C to +125°C

1

4.096 ±5 0.12 9 5-Lead TSOT UJ-5 RCB 250 −40°C to +125°C

1

5.0 ±6 0.12 25 5-Lead TSOT UJ-5 RDA 3,000 −40°C to +125°C

1

5.0 ±6 0.12 25 5-Lead TSOT UJ-5 RDA 250 −40°C to +125°C

1

5.0 ±5 0.10 9 5-Lead TSOT UJ-5 RDB 3,000 −40°C to +125°C

1

5.0 ±5 0.10 9 5-Lead TSOT UJ-5 RDB 250 −40°C to +125°C

Temperature Coefficient (ppm/°C)

Package Description

Package Option

Branding

Number of Parts per Reel

Temperature Range

Rev. G | Page 19 of 20

ADR390/ADR391/ADR392/ADR395

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NOTES

Rev. G | Page 20 of 20

Datasheet ADR392, ADR395 Datasheet (ANALOG DEVICES)

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

PIN CONFIGURATION

GENERAL DESCRIPTION

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ADR390 ELECTRICAL CHARACTERISTICS

ADR391 ELECTRICAL CHARACTERISTICS

ADR392 ELECTRICAL CHARACTERISTICS

ADR395 ELECTRICAL CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

ESD CAUTION

TERMINOLOGY

TYPICAL PERFORMANCE CHARACTERISTICS

THEORY OF OPERATION

DEVICE POWER DISSIPATION CONSIDERATIONS

SHUTDOWN MODE OPERATION

APPLICATIONS INFORMATION

BASIC VOLTAGE REFERENCE CONNECTION

Stacking Reference ICs for Arbitrary Outputs

A Negative Precision Reference without Precision Resistors

General-Purpose Current Source

High Power Performance with Current Limit

CAPACITORS

Input Capacitor

Output Capacitor

OUTLINE DIMENSIONS

ORDERING GUIDE