Datasheet ADR280 Datasheet (Analog Devices)

1.2 V Ultralow Power

V

OUT

V

IN

1

2

3

ADR280

GND

V

IN

V

OUT

1

2

3

ADR280

GND

TEMPERATURE (C)

15

–15

–40 100–20

LINE REGULATION (ppm/V)

0 20 40 60 80

–10

–5

0

5

10

3V TO 5V

High PSRR Voltage Reference

ADR280

FEATURES

1.2 V Precision Output
Excellent Line Regulation, 2 ppm/V Typical
High Power Supply Ripple Rejection, –80 dB at 220 Hz
Ultralow Power, Supply Current 16 A Maximum
Temperature Coefcient, 40 ppm/oC Maximum
Low Noise, 12.5 nV/÷Hz Typical
Operating Supply Range, 2.4 V to 5.5 V
Compact 3-Lead SOT-23 and SC70 Packages

APPLICATIONS
GSM, GPRS, 3G Mobile Stations
Portable Battery-Operated Electronics
Low Voltage Converter References
Wireless Devices

GENERAL DESCRIPTION

The ADR280 is a 1.2 V band gap core reference with excellent
line regulation and power supply rejection designed specically
for applications experiencing heavy dynamic supply variations,
such as data converter references in GSM, GPRS, and 3G
mobile station applications. Devices such as the AD6535, that has
an analog baseband IC with on-board baseband and audio codecs,
voltage regulators, and battery charger rely on the ADR280’s
ability to reject input battery voltage variations during RF power
amplier activity.

In addition to mobile stations, the ADR280 is suitable for a va­riety of general-purpose applications. Most band gap references
include internal gain for specic outputs, which simplies the
user’s design, but compromises on the cost, form factor, and
exibility. The ADR280, on the other hand, optimizes the band
gap core voltage and allows users to tailor the voltage, current, or
transient response by simply adding their preferred op amps.

The ADR280 operates on a wide supply voltage range from 2.4 V
to 5.5 V. It is available in compact 3-lead SOT-23 and
SC70

packages. The device is specied over the extended indus-

trial temperature range of –40°C to +85°C.

PIN CONFIGURATIONS

3-Lead SOT-23

(RT Sufx)

3-Lead SC70

(KS Sufx)

Figure 1. Line Regulation vs. Temperature

REV. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or oth­erwise under any patent or patent rights of Analog Devices. Trademarks
and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

ADR280–SPECIFICATIONS

V

OUT

V

IN

1

2

3

ADR280

GND

V

IN

V

OUT

1

2

3

ADR280

GND

ELECTRICAL CHARACTERISTICS

(VIN = 2.55 V to 5.5 V, TA = 25°C, unless otherwise noted.)

Parameter Symbol Conditions Min Typ1 Max Unit

Output Voltage2 V

1.195 1.200 1.205 V

OUT

Temperature Coefcient TCVo 0°C < TA < 50°C 5 20 ppm/oC
–40°C < TA < +85°C 10 40 ppm/oC

Line Regulation V

/VIN 2.55 V < VIN < 5.5 V, No Load 2 12 ppm/V

OUT

Supply Current IIN 2.4 V < VIN < 5.5 V, No Load 10 16 µA
Ground Current I

V– Grounded, I

GND

= 10 µA 12 20 µA

LOAD

Input Voltage Range VIN 2.4 5.5 V
Operating Temperature Range T
Nominal Load Capacitance C

A

1 µF

OUT

–40 +85 °C

Output Noise Voltage VN f = 10 Hz to 10 kHz 12.5 µVrms
Output Noise Density eN f = 400 kHz 12.5 nV/÷Hz
Power Supply Ripple Rejection3 PSRR I

= 10 µA –80 dB

LOAD

Start-Up Time tON 2 ms

NOTES

1

Typical values represent average readings taken at room temperature.

2

Conditions: 2.4 V < VIN < 5.5 V, 0 µA < I

3

Power supply ripple rejection measurement applies to a changing input voltage (VIN) waveform with a nominal 3.6 V baseline that drops to a 3 V value for
380 µs at a 4.6 ms repetition rate.

Specications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V

Storage Temperature Range . . . . . . . . . . . . . . –65°C to +150°C

Operating Temperature Range . . . . . . . . . . . . . –40°C to +85°C

Junction Temperature Range . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering, 60 Sec) . . . . . . . . . .300°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those listed in the operational sections

< 10 µA, –40°C < TA < +85°C.

OUT

1, 2

of this specication is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.

2

Absolute Maximum Ratings apply at 25°C, unless otherwise noted.

THERMAL RESISTANCE

Package Type JA* 

JC

Unit

SOT-23 230 146 °C/W
SC70 376 102 °C/W

* JA is specied for the worst-case conditions, i.e., JA is specied for device sol-

dered in circuit board for surface-mount packages.

ORDERING GUIDE

Temperature Package Package Top Output Number of
Model Range Description Option Mark Voltage (V) Parts per Reel

ADR280ART-R2 –40°C to +85°C SOT-23 RT-3 RBA 1.200 250
ADR280ART-REEL7 –40°C to +85°C SOT-23 RT-3 RBA 1.200 3,000
ADR280ART-REEL –40°C to +85°C SOT-23 RT-3 RBA 1.200 10,000
ADR280ARTZ-REEL7* –40°C to +85°C SOT-23 RT-3 RBA 1.200 3,000
ADR280AKS-R2 –40°C to +85°C SC70 KS-3 RBA 1.200 250
ADR280AKS-REEL7 –40°C to +85°C SC70 KS-3 RBA 1.200 3,000
ADR280AKS-REEL –40°C to +85°C SC70 KS-3 RBA 1.200 10,000

*Z = Pb-free part.

PIN FUNCTION DESCRIPTIONS

Mnemonic

PIN CONFIGURATIONS

SOT-23

SC70

Pin No. SOT-23 SC70 Description

1 V+ V

2 V

OUT

High Supply Voltage Input

OUT

V+ Output Voltage

3 V– V– Low Supply Voltage Input

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although the ADR280
features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high
energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

–2–

REV. B REV. B

Typical Performance Characteristics–ADR280

TEMPERATURE (C)

1.20225

–40 100–20

V

OUT

(V)

0 20 40 60 80

NO LOAD

1.20200

1.20175

1.20150

1.20125

1.20100

1.20075

1.20050

1.20025

1.20000

TEMPERATURE (C)

–40 100–20

I

IN

(A)

0 20 40 60 80

VIN = 5V

15

14

13

12

11

10

9

VIN = 3V

TEMPERATURE (C)

15

–15

–40 100–20

LINE REGULATION (ppm/V)

0 20 40 60 80

–10

–5

0

5

10

3V TO 5V

Ch1 50.0V M 1.00 s

1

–100

–80

–60

–40

NOISE POWER DENSITY (dBm)

10.07.55.02.50

FREQUENCY (kHz)

10dB/DIV

–40dB

0Hz 100kHz

TPC 1. V

vs. Temperature

OUT

TPC 2. Supply Current vs. Temperature

TPC 4. Noise Voltage Peak-to-Peak 10 Hz to 10 kHz

TPC 5. Output Noise Density Plot
(VIN = 3.6 V, C

= 1 µF, CIN = 1 µF)

OUT

TPC 3. Line Regulation vs. Temperature

TPC 6. Voltage Noise Density 0 Hz to 100 kHz

–3–

ADR280

ADR280

–5–

R1

R3

R5

R7

R9

Q17 Q9

Q18

R8

Q3

R6

Q5

Q6

R4

Q1

PNP3

R2

R12

Q2

Q10

R13

C1

Q7

R10

R11

V–

V+

V

OUT

I1

t

S

1.2

1.0

0.8

0.6

0.4

0.2

0

2 4 6 8 10 12 14 16 18 200

VOLTAGE (V)

TIME (ms)

V+

V

OUT

0.1F

0.1F

V–

ADR280

V+

V

OUT

0.1F

0.1F

V–

ADR280

5V

1.2V

2.5V

REV. B

TPC 7. Settling Time

THEORY OF OPERATION

The ADR280 provides the basic core 1.2 V band gap reference.
It contains two NPN transistors, Q9 and Q17, with their emitter
areas scaled in a xed ratio. The difference in their Vbes produces
a PTAT (proportional to absolute temperature) voltage that
cancels the CTAT (complementary to absolute temperature) Q9
Vbe voltage. As a result, a core band gap voltage that is almost a
constant 1.2 V over temperature is generated (see Figure 2). Preci­sion laser trimming of the internal resistors and other proprietary
circuit techniques are used to enhance the initial accuracy, tem­perature curvature, and temperature drift performance.

Figure 2. Simplied Architecture

APPLICATIONS

The ADR280 should be decoupled with a 0.1 µF ceramic cap at
the output for optimum stability. It is also good practice to
include 0.1 µF ceramic caps at the IC supply pin. These capaci­tors should be mounted close to their respective pins (see Figure 3).

Figure 3. Basic Conguration

The low supply voltage input pin V– can be elevated above
ground; a 1.2 V differential voltage can therefore be established
above V– (see Figure 4).

Figure 4. Floating References

–4–

REV. B

ADR280

V+

V

OUT

0.1F

0.1F

V–

ADR280

V

OUT

U1

U2

U2 = AD8541, SC70
AD8601, SOT-23-5

V+

V

OUT

0.1F

V–

ADR280

U1

5V

5V

1.2V

U2

1.8V

R1

R2

60k 0.1%

120k 0.1%

C2

2.2pF

V+

V–

AD8541

V

O

C1

V+

V

OUT

0.1F

V–

ADR280

U1

5V

1.2V

13.6k

C1

R

SET

RL

1k

I

L

100A

I

GND

I

L

= I

SET

+ I

GND

I

SET

+

–

V+

V

OUT

0.1F

V–

ADR280

U1

5V

C2

R

SET

RL 1k

I

L

100A

IL = 1.2V/R

SET

V+

V–

5V

U2

12k

AD8541

V+

V

OUT

0.1F

V–

ADR280

U1

5V

C1

R

SET

230

RL

500

I

L

5mA

I

L

= 1.2V/R

SET

V+

V–

5V

U3

V+

V–

5V

U2

U2 = U3 = AD8542, AD822

1.2V

+

–

The ADR280 provides the core 1.2 V band gap voltage and is
able to drive a maximum load of only 100 µA. Users can simply
buffer the output for high current or sink/source current applica­tions, such as ADC or LCD driver references (see Figure 5).

Figure 5. Buffered Output

Users can also tailor any specic need for voltage and dynamics
with an external op amp and discrete components (see Figure 5).
Depending on the specic op amp and PCB layout, it may be
necessary to add a compensation capacitor, C2, to prevent gain
peaking and oscillation. The exact value of C2 needed requires
some trial and error but usually falls in the range of a few pF.

Precision Low Power Current Source

By adding a buffer to redirect the I
be precisely set by R

with the equation IL = 1.2 V/R

SET

in Figure 8, a current can

GND

SET

.

Figure 8. Precision Low Power Current Source

Boosted Current Source

Adding one more buffer to the previous circuit boosts the current
to the level that is limited only by the buffer U2 current handling
capability (see Figure 9).

Figure 6. 1.8 V Reference

LOW COST, LOW POWER CURRENT SOURCE

Because of its low power characteristics, the ADR280 can be
converted to a current source with just a setting resistor. In addi­tion to the ADR280 current capability, the supply voltage and the
load limit the maximum current. The circuit in Figure 7 produces
100 µA with 2 V compliance at 5 V supply. The load current is
the sum of I
R

of 13.6 k yields 100 µA of load current.

SET

REV. B

and I

SET

Figure 7. Low Cost Current Source

. I

GND

will increase slightly with load; an

GND

Figure 9. Precision Current Source

–5–

ADR280

ADR280

–7–

V+

V

OUT

0.1F

V–

ADR280

U1

+5V

V+

V–

–2.7V

AD8541

–1.2V

–V

REF

U2

C1

V+

V

OUT

V–

ADR280

U1

5V

V+

V–

U2

R1

R2

RL

25

V

O

10.8k 0.1%

10k 0.1%

C2

1pF

1.2V

AD8541

0.1F

C1

M1

2.5V/100mA

M1 = FDB301N, 2N7000, 2N7002, OR EQUIVALENT

DIGITAL
BASEBAND

AD6535 ANALOG
BASEBAND

BASEBAND CODEC

AUDIO CODEC

POWER
MANAGEMENT

RADIO

ADR280

VOLTAGE REFERENCE

REV. B

Negative Reference

A negative reference can be precisely congured without using
any expensive tight tolerance resistors, as shown in Figure 10.
The voltage difference between V
is at virtual ground, U2 will close the loop by forcing the V– pin
to be the negative reference output.

Figure 10. Negative Reference

Boosted Reference with Scalable Output

A precision user dened output with boosted current capabil­ity can be implemented with the circuit shown in Figure 11. In
this circuit, U2 forces VO to be equal to V
regulating the turn-on of M1; the load current is therefore fur­nished by the 5 V supply. For higher output voltage, U2 must
be changed and the supply voltage of M1 and U2 must also be
elevated and separated from the U1 input voltage. In this cong­uration, a 100 mA load is achievable at a 5 V supply. The higher
the supply voltage, the lower the current handling is because of
the heat generated on the MOSFET. For heavy capacitive loads,
additional buffering is needed at the output to enhance the
transient response.

and V– is 1.2 V. Since V

OUT

(1 + R2/R1) by

REF

OUT

Figure 11. 2.5 V Boosted Reference

GSM and 3G Mobile Station Applications

The ADR280 voltage reference is ideal for use with analog base­band ICs in GSM and 3G mobile station applications. Figure 12
illustrates the use of the ADR280 with the AD6535 GSM analog
baseband. The AD6535 provides all of the data converters and
power management functions needed to implement a GSM
mobile station, including baseband and audio codecs, voltage
regulators, and a battery charger. Besides low current consump­tion and a small footprint, the ADR280 is optimized for excellent
power supply rejection ratio (PSRR) necessary for optimum
AD6535 device performance when the main battery voltage
uctuates during RF power amplier activity.

Figure 12. GSM Mobile Station Application

–6–

REV. B

OUTLINE DIMENSIONS

3.04

2.90

2.80

PIN 1

1.40

1.30

1.20

2.64

2.10

1.90 BSC

1

2

3

SEATING
PLANE

1.12

0.89

0.10

0.01

0.50

0.30

0.20

0.08

0.60

0.50

0.40

0.95 BSC

COMPLIANT TO JEDEC STANDARDS TO-236AB

4.10

4.00

3.90

1.55

1.50

1.50

8.30

8.00

7.70

3.20

3.10

2.90

2.05

2.00

1.95

1.85

1.75

1.65

3.55

3.50

3.45

2.80

2.70

2.60

1.10

1.00

0.90

0.35

0.30

0.25

13.20

13.00

12.80

9.90

8.40

8.40

20.20
MIN

1.50 MIN

7" REEL 100.00

OR

13" REEL 330.00

7" REEL 50.00 MI

N
OR
13" REEL 100.00 MI

N

14.40 MA

X

0.75 MIN

DIRECTION OF UNREELING

1.00 MIN

0.40

0.25

0.10 MAX

1.00

0.80

SEATING
PLANE

1.10 MAX

0.18

0.10

0.30

0.10

2

1

3

PIN 1

0.65 BSC

0.10 COPLANARITY

2.20

1.80

2.40

1.80

1.35

1.15

3-Lead Small Outline Transistor Package [SOT-23-3]

(RT-3)

Dimensions shown in millimeters

Tape and Reel Dimensions

(RT-3)

Dimensions shown in millimeters

ADR280

REV. B

3-Lead Thin Shrink Small Outline Transistor Package [SC70]

(KS-3)

Dimensions shown in millimeters

–7–

ADR280

Revision History

Location Page

10/04—Data Sheet Changed from REV. A to REV. B.

Changes to PIN CONFIGURATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal

Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Changes to OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

6/03—Data Sheet Changed from REV. 0 to REV. A.

Added SC70 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal

Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Changes to TPCs 4, 6, and 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Updated SOT-23 OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

C03065–0–10/04(B)

–8–

REV. B