Datasheet ADP3338AKC-5, ADP3338AKC-3.3, ADP3338AKC-2.85, ADP3338AKC-2.5, ADP3338AKC-1.8 Datasheet (Analog Devices)

Page 1
High-Accuracy Ultralow IQ, 1 A, anyCAP
V
IN
OUT
ADP3338
1F
1F
V
OUT
GND
IN
®
a
FEATURES High Accuracy Over Line and Load: 0.8% @ 25C,
1.4% Over Temperature Ultralow Dropout Voltage: 190 mV (Typ) @ 1 A Requires Only C anyCAP = Stable with Any Type of Capacitor
(Including MLCC) Current and Thermal Limiting Low Noise
2.7 V to 8 V Supply Range –40C to +85C Ambient Temperature Range SOT-223 Package
APPLICATIONS Notebook, Palmtop Computers SCSI Terminators Battery-Powered Systems Bar Code Scanners Camcorders, Cameras Home Entertainment Systems Networking Systems DSP/ASIC Supply
= 1 F for Stability
O
Low Dropout Regulator
ADP3338
FUNCTIONAL BLOCK DIAGRAM
IN
THERMAL
PROTECTION
Q1
DRIVER
GND
CC
ADP3338
g
m
BANDGAP
REF
OUT
R1
R2
GENERAL DESCRIPTION
The ADP3338 is a member of the ADP33xx family of precision low dropout anyCAP voltage regulators. The ADP3338 oper­ates with an input voltage range of 2.7 V to 8 V and delivers a load current up to 1 A. The ADP3338 stands out from the conventional LDOs with a novel architecture and an enhanced process that enables it to offer performance advantages and higher output current than its competition. Its patented design requires only a 1 µF output capacitor for stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for space-restricted applications. The ADP3338 achieves exceptional accuracy of ±0.8% at room temperature and ± 1.4% over temperature, line and load varia­tions. The dropout voltage of the ADP3338 is only 190 mV (typical) at 1 A. This device also includes a safety current limit and thermal overload protection. The ADP3338 has ultralow quiescent current 110 µA (typical) in light load situations.
anyCAP is a registered trademark of Analog Devices Inc.
Figure 1. Typical Application Circuit
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001
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ADP3338–SPECIFICATIONS
1, 2, 3
(VIN = 6.0 V, CIN = C noted.)
= 1 F, TJ = –40C to +125C, unless otherwise
OUT
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT
Voltage Accuracy V
OUT
Line Regulation V
Load Regulation I
Dropout Voltage V
DROP
VIN = V I T V I T V I T
T
T V
OUTNOM
= 0.1 mA to 1 A
L
= 25°C
J
= V
IN
OUTNOM
= 0.1 mA to 1 A
L
= –40°C to +125°C
J
= V
IN
OUTNOM
= 50 mA to 1 A
L
= 150 °C
J
= V
IN
OUTNOM
= 25°C
J
= 0.1 mA to 1 A 0.006 mV/mA
L
= 25°C
J
= 98% of V
OUT
+ 0.4 V to 8 V –0.8 +0.8 %
+ 0.4 V to 8 V –1.4 +1.4 %
+ 0.4 V to 8 V –1.6 +1.6 %
+ 0.4 V to 12 V 0.04 mV/V
OUTNOM
IL = 1 A 190 400 mV
= 500 mA 125 200 mV
I
L
I
= 100 mA 70 150 mV Peak Load Current I Output Noise V
LDPK
NOISE
L
VIN = V
OUTNOM
+ 1 V 1.6 A f = 10 Hz–100 kHz, CL = 10 µF95µV rms IL = 1 A
GROUND CURRENT
In Regulation I
In Dropout I
GND
GND
IL = 1 A 9 30 mA I
= 500 mA 4.5 15 mA
L
= 100 mA 0.9 3 mA
I
L
I
= 0.1 mA 110 190 µA
L
VIN = V
OUTNOM
– 100 mV 190 600 µA IL = 0.1 mA
NOTES
1
All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
2
Application stable with no load.
3
VIN = 2.7 V for models with V
Specifications subject to change without notice.
OUTNOM
2.2 V.
–2–
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ADP3338
WARNING!
ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS*

Input Supply Voltage . . . . . . . . . . . . . . . . . . –0.3 V to +8.5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . . –40°C to +85°C
Operating Junction Temperature Range . . . –40°C to +150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.3°C/W
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.8°C/W
θ
JC
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged. Unless otherwise specified, all voltages are referenced to GND.
PIN CONFIGURATION
ADP3338
OUT
TOP VIEW
(Not to Scale)

ORDERING GUIDE

PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic Function
1 GND Ground Pin. 2 OUT Output of the Regulator. Bypass to
ground with a 1 µF or larger capacitor.
3 IN Regulator Input. Bypass to ground with
a 1 µF or larger capacitor.
3
IN
OUT
2
GND
1
Output Package Package
Model Voltage* Option Description
ADP3338AKC-1.8 1.8 V KC (SOT-223) Plastic Surface Mount ADP3338AKC-2.5 2.5 V KC (SOT-223) Plastic Surface Mount ADP3338AKC-2.85 2.85 V KC (SOT-223) Plastic Surface Mount ADP3338AKC-3.3 3.3 V KC (SOT-223) Plastic Surface Mount ADP3338AKC-5 5 V KC (SOT-223) Plastic Surface Mount
*Contact the factory for other voltage options.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3338 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
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ADP3338
–Typical Performance Characteristics
(TA = 25C unless otherwise noted.)
2.515 V
= 2.5V
OUT
2.510
2.505
2.500
OUTPUT VOLTAGE – V
2.495
2.490
2.5 4.5 INPUT VOLTAGE – V
6.5 8.5
IL = 0A
IL = 0.5A
IL = 1A
10.5
TPC 1. Line Regulation Output Voltage vs. Supply Voltage
12
V
= 2.5V
OUT
= 6V
V
IN
10
8
6
4
GROUND CURRENT – mA
2
0
0 0.2
0.4 0.6 0.8
OUTPUT LOAD – A
TPC 4. Ground Current vs. Load Current
12.5
1.0
2.504
2.503
2.502
2.501
2.500
2.499
2.498
OUTPUT VOLTAGE – V
2.497
2.496
2.495 0
LOAD CURRENT – A
VIN = 6V
0.60.40.2
0.6 0.8 1.0
TPC 2. Output Voltage vs. Load Current
0.2
0.1
OUTPUT VOLTAGE – %
–0.05
0.4
V
= 2.5V
OUT
= 6V
V
IN
0.3
0
–40 –20
0 20 40 60 80 100 120
JUNCTION TEMPERATURE – C
IL = 0.5A
IL = 0.3A
IL = 1A
IL = 0.7A
IL = 0A
TPC 5. Output Voltage Variation % vs. Junction Temperature
300
250
200
150
100
GROUND CURRENT – A
50
0
0246 8
INPUT VOLTAGE – V
V
OUT
I
LOAD
= 2.5V
= 0A
10 12
TPC 3. Ground Current vs. Supply Voltage
18
16
14
12
10
GROUND CURRENT – mA
I
= 1A
LOAD
I
= 700mA
LOAD
I
= 500mA
LOAD
I
= 300mA
LOAD
8
6
4
2
0
40
20 0 20 40 60 80 100 120 140 150
JUNCTION TEMPERATURE C
TPC 6. Ground Current vs. Junction Temperature
250
200
150
100
DROPOUT – mV
V
= 2.5V
OUT
50
0
0 0.2 1.0
0.4 0.6 0.8
LOAD CURRENT – A
TPC 7. Dropout Voltage vs. Load Current
V
= 2.5V
OUT
3
2
1
0
INPUT/OUTPUT VOLTAGE – V
= 2.5
R
LOAD
012345678910
TIME – sec
TPC 8. Power-Up/Power-Down
–4–
V
= 2.5V
OUT
C
= 1F
OUT
2.51 R
= 2.5
LOAD
2.50
2.49
VOLTS
4.5
3.5
80
120 140 180
TIME – s
TPC 9. Line Transient Response
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ADP3338
0
200
TIME – s
VIN = 6V C
OUT
= 10F
1
2.5
2.4
2.6
T
400 600 800
A VOLTS
V
= 2.5V
OUT
C
= 10F
OUT
2.51 R
= 2.5
LOAD
2.50
2.49
VOLTS
4.5
3.5
80
120 140 180
TIME – s
TPC 10. Line Transient Response
2.5
0.0
VOLTS
1.5
A
1.0
0.5
0.0
0.4
400m SHORT
FULL SHORT
0.6 0.8 1 TIME – s
VIN = 6V
TPC 13. Short-Circuit Current
s
VIN = 6V C
OUT
R
LOAD
= 1F
= 2.5
2.6
2.5
2.4
1
A VOLTS
0
T
300 600 800
200
TIME –
TPC 11. Load Transient Response
0
V
= 2.5V
OUT
10
20
30
40
50
60
70
RIPPLE REJECTION dB
80
90
10 100 1k 10k 100k 1M
CL = 10F I
= 1A
L
CL = 1F I
= 0
L
FREQUENCY – Hz
CL = 1F I
= 1A
L
CL = 10F I
= 0
L
TPC 14. Power Supply Ripple Rejection
TPC 12. Load Transient Response
300
250
200
150
= 1A
I
100
RMS NOISE – V
50
0
010 50
L
I
= 0A
L
20 30 40
CL – F
TPC 15. RMS Noise vs. C
L
(10 Hz–100 kHz)
100
10
1
0.1
CL = 10F
0.01
0.001
VOLTAGE NOISE SPECTRAL DENSITY – V/ Hz
10 100
1k
FREQUENCY – Hz
TPC 16. Output Noise Density
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10k
CL = 1F
100k
1M
–5–
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ADP3338

THEORY OF OPERATION

The new anyCAP LDO ADP3338 uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2 which is varied to provide the available output voltage option. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier.
INPUT
Q1
NONINVERTING
WIDEBAND
DRIVER
ADP3338
COMPENSATION CAPACITOR
PTAT
V
g
m
OS
R4
GND
ATTENUATION (V
BANDGAP/VOUT
CURRENT
R3
PTAT
D1
OUTPUT
)
R1
C
LOAD
(a)
R
LOAD
R2
Figure 2. Functional Block Diagram
A very high-gain error amplifier is used to control this loop. The amplifier is constructed in such a way that equilibrium pro­duces a large, temperature-proportional input, “offset voltage” that is repeatable and very well controlled. The temperature­proportional offset voltage is combined with the complementary diode voltage to form a “virtual bandgap” voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibil­ity on the trade-off of noise sources that leads to a low noise design.
The R1, R2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1 and a second divider consisting of R3 and R4, the values can be chosen to produce a temperature-stable output. This unique arrangement specifically corrects for the load­ing of the divider, thus avoiding the error resulting from base current loading in conventional circuits.
The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole-splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance.
Most LDOs place very strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. More­over, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limita­tions make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature.
With the ADP3338 anyCAP LDO, this is no longer true. It can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. This innovative design allows the circuit to be stable with just a small 1 µF capacitor on the output. Additional advantages of the pole-splitting scheme include superior line noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive ± 1.4% accuracy is guaranteed over line, load, and temperature.
Additional features of the circuit include current limit and ther­mal shutdown.
V
IN
C1
1F
OUT
ADP3338
GNDIN
C2 1F
V
OUT
Figure 3. Typical Application Circuit
A
PPLICATION INFORMATION
CAPACITOR SELECTION Output Capacitor
The stability and transient response of the LDO is a function of the output capacitor. The ADP3338 is stable with a wide range of capacitor values, types, and ESR (anyCAP). A capacitor as low as 1 µF is all that is needed for stability. A higher capacitance may be necessary if high output current surges are anticipated or if the output capacitor cannot be located near the output and ground pins. The ADP3338 is stable with extremely low ESR capacitors (ESR 0), such as Multilayer Ceramic Capacitors (MLCC) or OSCON. Note that the effective capacitance of some capacitor types fall below the minimum over temperature or with dc voltage.
Input Capacitor
An input bypass capacitor is not strictly required but it is recom­mended in any application involving long input wires or high source impedance. Connecting a 1 µF capacitor from the input to ground reduces the circuit’s sensitivity to PC board layout and input transients. If a larger output capacitor is neces­sary, a larger value input capacitor is also recommended.

OUTPUT CURRENT LIMIT

The ADP3338 is short-circuit protected by limiting the pass transistor’s base drive current. The maximum output current is limited to about 2 A. See TPC 13.
–6–
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ADP3338

THERMAL OVERLOAD PROTECTION

The ADP3338 is protected against damage due to excessive power dissipation by its thermal overload protection circuit. Thermal protection limits the die temperature to a maximum of 160°C. Under extreme conditions (i.e., high ambient temperature and power dissipation) where the die temperature starts to rise above 160°C, the output current will be reduced until the die tempera­ture has dropped to a safe level.
Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, the device’s power dissipation should be externally limited so that the junction temperature will not exceed 150°C.

CALCULATING POWER DISSIPATION

Device power dissipation is calculated as follows:
PVV I V I
=−
()
D IN OUT LOAD IN GND
Where I and V
and I
LOAD
are the input and output voltages respectively.
OUT
are load current and ground current, V
GND
Assuming worst-case operating conditions are I I
= 10 mA, VIN = 3.3 V and V
GND
×+
= 2.5 V, the device power
OUT
×
()
LOAD
IN
= 1.0 A,
dissipation is:
P V V mA V mA mW
=
()
D
+
()
=3 3 2 5 1000 3 3 10 833. – ..
So, for a junction temperature of 125°C and a maximum ambi­ent temperature of 85°C, the required thermal resistance from junction to ambient is:
°°
125 85
CC
θJA=

PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS

0 833
.
W
48
CW
/
The SOT-223s thermal resistance, θJA, is determined by the sum of the junction-to-case and the case-to-ambient thermal resistances. The junction-to-case thermal resistance, θ
, is
JC
determined by the package design and specified at 26.8°C/W. However, the case-to-ambient thermal resistance is determined by the printed circuit board design.
As shown in Figures 4a–c, the amount of copper the ADP3338 is mounted to affects the thermal performance. When mounted to 2 oz. copper with just the minimal pads, Figure 4a, the θ
is
JA
126.6°C/W. By adding a small copper pad under the ADP3338, Figure 4b, reduces the θ pad to 1 square inch, Figure 4c, reduces the θ
to 102.9°C/W. Increasing the copper
JA
even further
JA
to 52.8°C/W.
a. b. c.
Figure 4. PCB Layouts
Use the following general guidelines when designing printed circuit boards:
1. Keep the output capacitor as close to the output and ground pins as possible.
2. Keep the input capacitor as close to the input and ground pins as possible.
3. PC board traces with larger cross sectional areas will remove more heat from the ADP3338. For optimum heat transfer, specify thick copper and use wide traces.
4. The thermal resistance can be decreased by adding a copper pad under the ADP3338 as shown in Figure 4b.
5. If possible, utilize the adjacent area to add more copper around the ADP3338. Connecting the copper area to the output of the ADP3338, as shown in Figure 4c, is best but will improve thermal performance even if it is connected to other signals.
6. Use additional copper layers or planes to reduce the thermal resistance. Again, connecting the other layers to the output of the ADP3338 is best, but not necessary. When connecting the output pad to other layers use multiple vias.
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ADP3338
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
3-Lead Surface Mount
KC (SOT-223)
0.124 (3.15)
0.116 (2.95)
0.146 (3.70)
0.130 (3.30)
0.033 (0.85)
0.026 (0.65)
0.067 (1.70)
0.060 (1.50)
0.004 (0.10)
0.0008 (0.02)
1 3 2
0.0905 (2.30) NOM
0.264 (6.70)
0.248 (6.30)
0.181 (4.60) NOM
4
0.041 (1.05)
0.033 (0.85)
SEATING PLANE
0.287 (7.30)
0.264 (6.70)
0.051 (1.30)
0.043 (1.10)
10MAX
16 10
16 10
C02050–1.5–6/01(0)
0.25 (0.35)
0.010 (0.25)
–8–
PRINTED IN U.S.A.
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