Datasheet ADP3309 Datasheet (Analog Devices)

anyCAP™ 100 mA

a

FEATURES
ⴞ1.2% Accuracy Over Line and Load Regulations @ +25ⴗC
Ultralow Dropout Voltage: 120 mV Typical @ 100 mA
Requires Only C
anyCAP = Stable with All Types of Capacitors

(Including MLCC)
Current and Thermal Limiting
Low Noise
Low Shutdown Current: 1 ␮A

3.0 V to 12 V Supply Range
–20ⴗC to +85ⴗC Ambient Temperature Range
Several Fixed Voltage Options
Ultrasmall SOT-23-5 Package
Excellent Line and Load Regulations

APPLICATIONS
Cellular Telephones
Notebook, Palmtop Computers
Battery Powered Systems
PCMCIA Regulator
Bar Code Scanners
Camcorders, Cameras

= 0.47 ␮F for Stability

O

Low Dropout Linear Regulator

ADP3309

FUNCTIONAL BLOCK DIAGRAM

ADP3309

CC

M

BANDGAP

R1

R2

REF

ERR/NC

SD

IN

THERMAL

PROTECTION

Q2

Q1

DRIVER G

GND

OUT

GENERAL DESCRIPTION

The ADP3309 is a member of the ADP330x family of precision
low dropout anyCAP voltage regulators. It is pin-for-pin and
functionally compatible with National’s LP2981, but offers
performance advantages. The ADP3309 stands out from con­ventional LDOs with a novel architecture and an enhanced

process. Its patented design requires only a 0.47 µF output

capacitor for stability. This device is stable with any type of
capacitor regardless of its ESR (Equivalent Series Resistance)
value, including ceramic types for space restricted applications.

The ADP3309 achieves ±1.2% accuracy at room temperature
and ±2.2% overall accuracy over temperature, line and load

regulations. The dropout voltage of the ADP3309 is only

anyCAP is a trademark of Analog Devices, Inc.

120 mV (typical) at 100 mA. This device also includes a current
limit and a shutdown feature. In shutdown mode, the ground

current is reduced to ~1 µA.

The ADP3309 operates with a wide input voltage range from

3.0 V to 12 V and delivers a load current in excess of 100 mA.
The ADP3309 anyCAP LDO offers a wide range of output
voltages. For a 50 mA version, refer to the ADP3308 data sheet.

V

IN

0.47mF

ERR/NC

C1

+
–

ADP3309-3.3

IN

SD

OFF

OUT

ON

GND

V

= +3.3V

C2

0.47mF

OUT

+
–

Figure 1. Typical Application Circuit

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

ADP3309-xx–SPECIFICATIONS

(@TA = –20ⴗC to +85ⴗC, VIN = 7 V, CIN = 0.47 ␮F, C
otherwise noted.)1 The following specifications apply to all voltage options.

= 0.47 ␮F, unless

OUT

Parameter Symbol Conditions Min Typ Max Units

OUTPUT VOLTAGE ACCURACY V

OUT

VIN = V
I
T
V

OUTNOM

= 0.1 mA to 100 mA

L

= +25°C –1.2 +1.2 %

A

= V

IN

OUTNOM

+ 0.3 V to 12 V

+ 0.3 V to 12 V

IL = 0.1 mA to 100 mA –2.2 +2.2 %

∆V
∆V

∆V

∆I

GND

O

IN

O

L

LINE REGULATION V

LOAD REGULATION I

GROUND CURRENT I

= V

IN

T

T

OUTNOM

= +25°C 0.02 mV/V

A

= 0.1 mA to 100 mA

L

= +25°C 0.06 mV/mA

A

+ 0.3 V to 12 V

IL = 100 mA 0.8 2.0 mA
IL = 0.1 mA 0.19 0.3 mA

GROUND CURRENT IN DROPOUT I

GND

VIN = 2.4 V
IL = 0.1 mA 0.9 1.7 mA

V

DROPOUT VOLTAGE V

DROP

= 98% of V

OUT

OUTNOM

IL = 100 mA 0.12 0.25 V

= 10 mA 0.025 0.07 V

I

L

IL = 1 mA 0.004 0.015 V

SHUTDOWN THRESHOLD V

THSD

ON 2.0 0.75 V
OFF 0.75 0.3 V

SHUTDOWN PIN INPUT CURRENT I

GROUND CURRENT IN SHUTDOWN I

SDIN

Q

MODE T

OUTPUT CURRENT IN SHUTDOWN I

OSD

MODE T

ERROR PIN OUTPUT LEAKAGE I

EL

0 < V
5 < V

VSD = 0 V, VIN = 12 V

V
T

T

V

≤ 5 V 1 µA

SD

≤ 12 V @ VIN = 12 V 9 µA

SD

= +25°C 0.005 1 µA

A

= 0 V, VIN = 12 V

SD

= +85°C 0.01 3 µA

A

= +25°C @ VIN = 12 V 2 µA

A

= +85°C @ VIN = 12 V 4 µA

A

= 5 V 13 µA

EO

ERROR PIN OUTPUT

“LOW” VOLTAGE V

PEAK LOAD CURRENT I

OUTPUT NOISE @ 5 V OUTPUT V

NOTES

1

Ambient temperature of +85°C corresponds to a junction temperature of 125°C under typical full load test conditions.

Specifications subject to change without notice.

EOL

LDPK

NOISE

I

= 400 µA 0.12 0.3 V

SINK

VIN = V

OUTNOM

+ 1 V, T

= +25°C 150 mA

A

f = 10 Hz–100 kHz 100 µV

rms

–2–

REV. 0

ADP3309

GND

TOP VIEW

(Not to Scale)

SD

OUT

ADP3309

IN

ERR/NC

NC = NO CONNECT

ABSOLUTE MAXIMUM RATINGS*

Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V

Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V

Power Dissipation . . . . . . . . . . . . . . . . . . . . Internally Limited

Operating Ambient Temperature Range . . . –55°C to +125°C
Operating Junction Temperature Range . . . –55°C to +125°C

␣ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190°C/W

θ

JA

θ

␣ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W

JC

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering 10 sec) . . . . . . . .+300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C

*This is a stress rating only; operation beyond these limits can cause the device to

be permanently damaged.

ORDERING GUIDE

Voltage Package Marking

Model Output Option* Code

ADP3309ART-2.7 2.7 V SOT-23 DNC
ADP3309ART-2.85 2.85 V SOT-23 DVC
ADP3309ART-2.9 2.9 V SOT-23 DWC
ADP3309ART-3 3.0 V SOT-23 DPC
ADP3309ART-3.3 3.3 V SOT-23 DRC
ADP3309ART-3.6 3.6 V SOT-23 DSC

*SOT = Surface Mount.
Contact the factory for the availability of other output voltage options.

PIN FUNCTION DESCRIPTIONS

Pin Name Function

1 IN Regulator Input.
2 GND Ground Pin.
3 SD Active Low Shutdown Pin. Connect to

ground to disable the regulator output.
When shutdown is not used, this pin
should be connected to the input pin.

4 ERR/NC Open Collector. Output that goes low

to indicate the output is about to go
out of regulation. This pin can be left open.
(NC = No Connect).

5 OUT Output of the Regulator, fixed 2.7, 2.85,

2.9, 3.0, 3.3 or 3.6 volts output voltage.

Bypass to ground with a 0.47 µF or larger

capacitor.

PIN CONFIGURATION

Other Member of anyCAP Family

Model Output Current Package Option

1

2

ADP3308 50 mA SOT-23-5 Lead

NOTES

1

See individual data sheet for detailed ordering information.

2

SOT = Surface Mount.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3309 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

–3–REV. 0

ADP3309

–Typical Performance Characteristics

3.302

3.301

3.300

3.299

3.298

3.297

OUTPUT VOLTAGE – Volts

3.296

3.295

3.3 4 145 6 7 8 9 10 11 12 13

IL = 0mA

IL = 10mA

IL = 50mA

IL = 100mA

INPUT VOLTAGE – Volts

V

OUT

= +3.3V

Figure 2. Line Regulation: Output
Voltage vs. Supply Voltage

900

750

600

450

GROUND CURRENT – mA

300

IL = 0 TO 100mA

3.302
V

= +3.3V

3.301

3.300

3.299

3.298

3.297

OUTPUT VOLTAGE – Volts

3.296

3.295

20 30 40 50 60 70 80 90

0 10 100

OUTPUT LOAD – mA

OUT

= +7V

V

IN

Figure 3. Output Voltage vs. Load
Current

0.2

0.1
IL = 0mA

0.0

–0.1

–0.2

OUTPUT VOLTAGE – %

–0.3

IL = 50mA

IL = 100mA

1150

900

650

400

GROUND CURRENT – mA

160

0

0 1.2 12.02.4 3.6 4.8 6.0 7.2 8.4 9.6 10.8

INPUT VOLTAGE – Volts

V

OUT

= 0mA

I

L

= +3.3V

Figure 4. Quiescent Current vs.
Supply Voltage

1250

1000

GROUND CURRENT – mA

IL = 100mA

750

500

250

VIN = +7V

IL = 0mA

150

0 25 100

50 75

OUTPUT LOAD – mA

Figure 5. Quiescent Current vs. Load
Current

120

96

72

48

24

INPUT-OUTPUT VOLTAGE – mV

0

0 25 10050 75

OUTPUT LOAD – mA

Figure 8. Dropout Voltage vs. Output
Current

–0.4

–45 –25 135–5 15 35 75 95 11555

TEMPERATURE – 8C

Figure 6. Output Voltage Variation %
vs. Temperature

5

4

3

2

1

INPUT/OUTPUT VOLTAGE – Volts

0

01 0

234321

INPUT VOLTAGE – Volts

V
R

OUT

= 33V

L

= +3.3V

Figure 9. Power-Up/Power-Down

0
–25 –5 135

15 35 55 75 95 115

TEMPERATURE – 8C

Figure 7. Quiescent Current vs.
Temperature

8.0

7.0

6.0

5.0

4.0

3.0

2.0

INPUT/OUTPUT VOLTAGE – Volts

1.0

0

0 20 200

40 60 80 100 120 140 160 180

V

TIME – ms

V

IN

OUT

VSD = V
CL = 0.47mF
R

L

V

OUT

= 33V

= +3.3V

IN

Figure 10. Power-Up Overshoot

–4–

REV. 0

ADP3309

3.320

3.310

3.300

3.290

3.280

Volts

7.5

7.0

V

= +3.3V

OUT

RL = 33V

= 0.47mF

C

L

V

IN

0 40 400

80 120 160 200 240 280 320 360

TIME – ms

Figure 11. Line Transient Response

3.320
V

= +3.3V

OUT

= 4.7mF

C

3.310

L

3.300

VoltsmA

3.290

3.280

I

100

10

OUT

3.320

3.310

3.300

3.290

3.280

Volts

7.5

7.0

V

= +3.3V

OUT

V

IN

40 60 80 100 120 140 160 180

0 20 200

TIME – ms

Figure 12. Line Transient Response

300

200

mA

100

0

4

µ

Volts

2

0

V

= +3.3V

OUT

RL = 3.3kV
C

= 0.47mF

L

I

OUT

V

OUT

3.320
V

= +3.3V

OUT

= 0.47mF

C

3.310

L

3.300

VoltsmA

3.290

3.280

I

100

10

0 100 500

OUT

200 300 400

TIME – ms

Figure 13. Load Transient

4

CL = 0.47mF

3

2

1

Volts

0
3

0

CL = 4.7mF

V
R

OUT

= 33V

L

+3V

V

+3.3V

= +3.3V

V

OUT

SD

0 100 500

200 300 400

TIME – ms

Figure 14. Load Transient

4

+3.3V

3

2

1

Volts

0

3

0

010 50

20 30 40

TIME – ms

V

OUT

R

= 33V

L

C

= 0.47mF

L

V

SD

= +3.3V

Figure 17. Turn Off

01 5234

0.5 4.51.5 2.5 3.5
TIME – sec

Figure 15. Short Circuit Current

0

a. 0.47mF, RL = 33k

–10

b. 0.47mF, R
c. 10mF, R

–20

d. 10mF, R

–30
–40
–50
–60

db

–70

RIPPLE REJECTION – dB

–80
–90

a

c

–100

10 100 10M1k 10k 1M

V

= 33

L

V

= 33k

L

V

= 33

L

FREQUENCY – Hz

V

a

100k

OUT

c

= +3.3V

b

d

V

Figure 18. Power Supply Ripple
Rejection

0 20 10040 60 80

TIME – ms

Figure 16. Turn On

10

1

V

= +3.3V, CL = 0.47mF

OUT

= 1mA

I

L

0.1

0.01
100 1k 100k10k

VOLTAGE NOISE SPECTRAL DENSITY – mV Hz

FREQUENCY – Hz

Figure 19. Output Noise Density

–5–REV. 0

ADP3309

THEORY OF OPERATION

The ADP3309 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.

D1

R3

PTAT

CURRENT

OUTPUT

)

R1

R

LOAD

(a)

R2

C

LOAD

INPUT

Q1

NONINVERTING

WIDEBAND

DRIVER

COMPENSATION
CAPACITOR

ADP3309

ATTENUATION
(V

BANDGAP/VOUT

PTAT

V

G

OS

M

R4

GND

Figure 20.␣ Functional Block Diagram

A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that at equilibrium it
produces a large, temperature proportional input “offset volt­age” that is repeatable and very well controlled. The tem­perature proportional offset voltage is combined with the
complementary diode voltage to form a “virtual bandgap” volt­age, implicit in the network, although it never appears explicitly
in the circuit. Ultimately, this patented design makes it possible
to control the loop with only one amplifier. This technique also
improves the noise characteristics of the amplifier by providing
more flexibility on the trade-off of noise sources that leads to a
low noise design.

The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode D1, and a second divider consist­ing of R3 and R4, the values can be chosen to produce a tem­perature stable output.

The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type and ESR of the
load capacitance.

Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resis­tance. Moreover, the ESR value, required to keep conventional
LDOs stable, changes depending on load and temperature.
These ESR limitations make designing with LDOs more diffi­cult because of their unclear specifications and extreme varia­tions over temperature.

This is no longer true with the ADP3309 anyCAP LDO. It can
be used with virtually any capacitor, with no constraint on the
minimum ESR. This innovative design allows the circuit to be

stable with just a small 0.47 µF capacitor on the output. Addi-

tional advantages of the design scheme include superior line
noise rejection and very high regulator gain which leads to ex-

cellent line and load regulation. An impressive ±2.2% accuracy

is guaranteed over line, load and temperature.

Additional features of the circuit include current limit and ther­mal shutdown. Compared to the standard solutions that give
warning after the output has lost regulation, the ADP3309
provides improved system performance by enabling the ERR
pin to give warning before the device loses regulation.

As the chip’s temperature rises above 165°C, the circuit acti-

vates a soft thermal shutdown, indicated by a signal low on the
ERR pin, to reduce the current to a safe level.

APPLICATION INFORMATION
Capacitor Selection: anyCAP

Output Capacitors: As with any micropower device, output
transient response is a function of the output capacitance. The
ADP3309 is stable with a wide range of capacitor values, types

and ESR (anyCAP). A capacitor as low as 0.47 µF is all that is

needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. The ADP3309 is

stable with extremely low ESR capacitors (ESR ≈ 0), such as

multilayer ceramic capacitors (MLCC) or OSCON.

Input Bypass Capacitor: An input bypass capacitor is not re­quired. However, for applications where the input source is high
impedance or far from the input pin, a bypass capacitor is rec-

ommended. Connecting a 0.47 µF capacitor from the input pin

(Pin 1) to ground reduces the circuit’s sensitivity to PC board
layout. If a bigger output capacitor is used, the input capacitor

must be 1 µF minimum.

Thermal Overload Protection

The ADP3309 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,

which limits the die temperature to a maximum of 165°C.

Under extreme conditions (i.e., high ambient temperature and
power dissipation) where die temperature starts to rise above

165°C, the output current is reduced until the die temperature

has dropped to a safe level. The output current is restored when
the die temperature is reduced.

Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited

so that junction temperatures will not exceed 125°C.

Calculating Junction Temperature

Device power dissipation is calculated as follows:

P

= (VIN – V

D

Where I
and V

Assuming I

V

OUT

and I

LOAD

are input and output voltages respectively.

OUT

LOAD

are load current and ground current, V

GND

= 100 mA, I

= 3.3 V, device power dissipation is:

P

= (5.0 – 3.3) 100 mA + 5.0 × 2 mA = 180 mW

D

∆T = T

– TA = P

J

) I

OUT

GND

× θJA = 0.18 × 190 = 34.2°C

D

+ (VIN) I

LOAD

GND

= 2 mA, VIN = 5.0 V and

IN

With a maximum junction temperature of 125°C, this yields a
maximum ambient temperature of ~90°C.

Printed Circuit Board Layout Consideration

Surface mount components rely on the conductive traces or
pads to transfer heat away from the device. Appropriate PC
board layout techniques should be used to remove heat from the
immediate vicinity of the package.

–6–

REV. 0

The following general guidelines will be helpful when designing

V

OUT

= 2.7V/3.3VVIN = 4V TO 12V

OUTPUT SELECT

4V
0V

ADP3309-2.7

OUTIN

SD

GND

ADP3309-3.3

+

+

IN

OUT

C1

1.0mF

C2

0.47mF

SD

GND

ADP3309-3.3

OUT

IN

SD

GND

+

V

IN

= 4V TO 8V

MJE253*

V

OUT

= 3.3V@1A

C1

47mF

C2
10mF

*AAVID531002 HEATSINK IS USED

ERR

R1

50V

a board layout:

1. PC board traces with larger cross section areas will remove
more heat. For optimum results, use PC boards with thicker
copper and or wider traces.

2. Increase the surface area exposed to open air so heat can be
removed by convection or forced air flow.

3. Do not use solder mask or silk screen on the heat dissipating
traces because it will increase the junction to ambient
thermal resistance of the package.

Shutdown Mode

Applying a TTL high signal to the shutdown pin or tying it to
the input pin will turn the output ON. Pulling the shutdown pin
down to a TTL low signal or tying it to ground will turn the
output OFF. In shutdown mode, quiescent current is reduced

to less than 1 µA.

Error Flag Dropout Detector

The ADP3309 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If the
output is about to lose regulation, for example, by reducing the
supply voltage below the combined regulated output and drop­out voltages, the ERR pin will be activated. The ERR output is
an open collector that will be driven low.

Once set, the ERRor flag’s hysteresis will keep the output low
until a small margin of operating range is restored either by
raising the supply voltage or reducing the load.

ADP3309

Figure 21. Crossover Switch

Higher Output Current

The ADP3309 can source up to 100 mA without any heatsink
or pass transistor. If higher current is needed, an appropriate
pass transistor can be used, as in Figure 22, to increase the
output current to 1 A.

APPLICATION CIRCUITS
Crossover Switch

The circuit in Figure 21 shows that two ADP3309s can be used
to form a mixed supply voltage system. The output switches
between two different levels selected by an external digital input.
Output voltages can be any combination of voltages from the
Ordering Guide of the data sheet.

V

= 2.5V TO 3.5V

IN

C1
100mF
10V

R1
120V

V

I

IN

LIM

ADP3000-ADJ

SW2GND

L1

6.8mH

SW1

FB

D1

1N5817

Figure 23. Constant Dropout Post Regulator

Figure 22. Higher Output Current Linear Regulator␣

Constant Dropout Post Regulator

The circuit in Figure 23 provides high precision with low drop­out for any regulated output voltage. It significantly reduces the
ripple from a switching regulator while providing a constant
dropout voltage, which limits the power dissipation of the LDO
to 30 mW. The ADP3000 used in this circuit is a switching
regulator in the step-up configuration.

ADP3309-3.3

C2
100mF
10V

2N3906

Q1

R2

30.1kV
1%

R3
124kV
1%

IN OUT

SD

GND

Q2
2N3906

R4
274kV

+

3.3V@100mA

C3

2.2mF

–7–REV. 0

ADP3309

0.0669 (1.70)

0.0590 (1.50)

0.0512 (1.30)

0.0354 (0.90)

0.0059 (0.15)

0.0019 (0.05)

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

5-Lead Surface Mount Package

(SOT-23)

0.1181 (3.00)

0.1102 (2.80)

4 5

0.1181 (3.00)

0.1024 (2.60)

0.0374 (0.95) BSC

0.0571 (1.45)

0.0374 (0.95)

SEATING
PLANE

PIN 1

1 3

2

0.0748 (1.90)
BSC

0.0197 (0.50)

0.0138 (0.35)

10°

0°

C3250–2.5–7/98

0.0079 (0.20)

0.0031 (0.08)

0.0217 (0.55)

0.0138 (0.35)

–8–

PRINTED IN U.S.A.

REV. 0