Datasheet ADP2504 Datasheet (ANALOG DEVICES)

600 mA/1000 mA, 2.5 MHz Buck-Boost

2.3V

www.BDTIC.com/ADI

FEATURES FEATURES

1 mm height profile 1 mm height profile Compact PCB footprint Compact PCB footprint Seamless transition between modes Seamless transition between modes 38 A typical quiescent current 38 A typical quiescent current

2.5 MHz operation enables 1 µH inductor 2.5 MHz operation enables 1 µH inductor Input voltage: 2.3 V to 5.5 V Input voltage: 2.3 V to 5.5 V Fixed output voltage: 2.8 V to 5.0 V Fixed output voltage: 2.8 V to 5.0 V 600 mA (ADP2503) and 1000 mA (ADP2504) output options 600 mA (ADP2503) and 1000 mA (ADP2504) output options Boost converter configuration with load disconnect Boost converter configuration with load disconnect SYNC pin with three different modes: SYNC pin with three different modes:

Power save mode (PSM) for improved light load efficiency Power save mode (PSM) for improved light load efficiency Forced fixed frequency operation mode Forced fixed frequency operation mode

Synchronization with external clock Synchronization with external clock Internal compensation Internal compensation Soft start Soft start Enable/shutdown logic input Enable/shutdown logic input Overtemperature protection Overtemperature protection Short-circuit protection Short-circuit protection Undervoltage lockout protection Undervoltage lockout protection Small 10-lead 3 mm × 3 mm LFCSP/QFN package Small 10-lead 3 mm × 3 mm LFCSP/QFN package

APPLICATIONS APPLICATIONS

Wireless handsets Wireless handsets Digital cameras/portable audio players Digital cameras/portable audio players Miniature hard disk power supplies Miniature hard disk power supplies USB powered devices USB powered devices

DC-to-DC Converters

ADP2503/ADP2504

GENERAL DESCRIPTION GENERAL DESCRIPTION

The ADP2503/ADP2504 are high efficiency, low quiescent current

The ADP2503/ADP2504 are high efficiency, low quiescent current step-up/step-down dc-to-dc converters that can operate at input

step-up/step-down dc-to-dc converters that can operate at input voltages greater than, less than, or equal to the regulated output

voltages greater than, less than, or equal to the regulated output voltage. The power switches and synchronous rectifiers are

voltage. The power switches and synchronous rectifiers are internal to minimize external part count. At high load currents,

internal to minimize external part count. At high load currents, the ADP2503/ADP2504 use a current-mode, fixed frequency

the ADP2503/ADP2504 use a current-mode, fixed frequency pulse-width modulation (PWM) control scheme for optimal

pulse-width modulation (PWM) control scheme for optimal stability and transient response. To ensure the longest battery life

stability and transient response. To ensure the longest battery life in portable applications, the ADP2503/ADP2504 have an

in portable applications, the ADP2503/ADP2504 have an optional power save mode that reduces the switching frequency

optional power save mode that reduces the switching frequency under light load conditions. For wireless and other low noise

under light load conditions. For wireless and other low noise applications where variable frequency power save mode may

applications where variable frequency power save mode may cause interference, the logic control input sync forces fixed

cause interference, the logic control input sync forces fixed frequency PWM operation under all load conditions.

frequency PWM operation under all load conditions.

The ADP2503/ADP2504 can run from input voltages between

2.3 V and 5.5 V, allowing single lithium or lithium polymer cell,

2.3 V and 5.5 V, allowing single lithium or lithium polymer cell, multiple alkaline or NiMH cells, PCMCIA, USB, and other

multiple alkaline or NiMH cells, PCMCIA, USB, and other standard power sources. The ADP2503/ADP2504 have fixed

standard power sources. The ADP2503/ADP2504 have fixed output options ranging from 2.8 V to 5 V. Compensation is

output options ranging from 2.8 V to 5 V. Compensation is internal to minimize the number of external components.

internal to minimize the number of external components.

During logic-controlled shutdown, the input is disconnected

During logic-controlled shutdown, the input is disconnected from the output and draws less than 1 µA from the input source.

from the output and draws less than 1 µA from the input source. Operating as boost converters, the ADP2503/ADP2504 feature

Operating as boost converters, the ADP2503/ADP2504 feature a true load disconnect function that isolates the load from the

a true load disconnect function that isolates the load from the power source. Other key features include undervoltage lockout

power source. Other key features include undervoltage lockout to prevent deep battery discharge and soft start to prevent input

to prevent deep battery discharge and soft start to prevent input current overshoot at startup.

current overshoot at startup.

TYPICAL APPLICATION CIRCUIT TYPICAL APPLICATION CIRCUIT

SW1

V

IN

TO 5.5V

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADP2503

PVIN

VIN

SYNC

EN

ON

OFF

1.0µH

SW2

V

OUT

VOUT

FB

AGND

PGND

Figure 1.

2.8V TO 5V

22µF10µF

07475-001

ADP2503/ADP2504

www.BDTIC.com/ADI

REVISION HISTORY

10/08—Revision 0: Initial Version

Soft Start ...................................................................................... 11

Sync Function ............................................................................. 11

Enable ........................................................................................... 11

Undervoltage Lockout ............................................................... 12

Thermal Shutdown .................................................................... 12

Short-Circuit Protection ............................................................ 12

Reverse Current Limit ............................................................... 12

Applications Information .............................................................. 13

Inductor Selection ...................................................................... 13

PCB Layout Guidelines .................................................................. 15

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 16

Rev. 0 | Page 2 of 16

ADP2503/ADP2504

www.BDTIC.com/ADI

SPECIFICATIONS

VIN = 3.6 V, V unless otherwise noted.

Table 1.

Parameters Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Input Voltage Range 2.3 5.5 V

Undervoltage Lockout Threshold VIN rising 2.15 2.20 2.25 V

Undervoltage Lockout Threshold VIN falling 2.10 2.14 2.20 V

OUTPUT CHARACTERISTICS

Output Voltage Range 2.8 5.0 V

Feedback Impedance 450 kΩ

Output Voltage Initial Accuracy ADP2503/ADP2504 (PWM operation, no load) −2 +2 %

Load and Line Regulation VIN = 2.3 V to 3.6 V, I

V

CURRENT CHARACTERISTICS

Quiescent Current (VIN) I

Shutdown Current TA = TJ = −40°C to +85°C 0.2 1 µA

SWITCH CHARACTERISTICS

N-Channel Switches (LFCSP) VIN = 3.6 V 150 mΩ

P-Channel Switches (LFCSP) VIN = V

P-Channel Leakage TJ = −40°C to +85°C 1 µA

Switch Current Limit

ADP2504 1.3 2.0 A ADP2503 1.0 1.4 A

Reverse Current Limit 1.1 A

OSCILLATOR AND STARTUP

Oscillator Frequency 2.1 2.5 2.9 MHz On Time PMOS1 (Buck Mode) Minimum duty cycle = 30% 130 ns On Time NMOS2 (Boost Mode) Maximum duty cycle = 50% (×2) 200 ns Sync Clock Frequency 2.2 2.8 MHz Sync Clock Minimum Off Time 160 ns

LOGIC LEVEL CHARACTERISTICS

EN, SYNC Input High Threshold 1.2 V EN, SYNC Input Low Threshold 0.4 V EN, SYNC Leakage Current VIN = VEN −1 +0.1 +1 µA

THERMAL CHARACTERISTICS

Thermal Shutdown Threshold 150 °C Thermal Shutdown Hysteresis 25 °C

1

All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).

= 3.3 V, @ TA = TJ = −40°C to +125°C for minimum/maximum specifications and TA = 25°C for typical specifications,

OUT

1

= 0 mA to 500 mA, forced PWM mode 0.5 %

LOAD

= 2.3 V to 5.5 V, I

IN

= 0 mA, V mode = EN = VIN = 3.6 V, device not switching 38 50 µA

OUT

= 3.6 V 150 mΩ

OUT

= 0 mA to 500 mA, forced PWM mode 0.6 %

LOAD

Rev. 0 | Page 3 of 16

ADP2503/ADP2504

www.BDTIC.com/ADI

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

PVIN, VIN, SW1, SW2, VOUT, SYNC,

EN, FB PGND to AGND −0.3 V to 0.3 V Operating Ambient Temperature −40°C to +85°C Operating Junction Temperature −40°C to +125°C Storage Temperature −65°C to +150°C Lead Temperature

Soldering (10 sec) 300°C

Vapor Phase (60 sec) 215°C

Infrared (15 sec) 220°C ESD Human Body Model ±2000 V ESD Charged Device Model ±1500 V ESD Machine Model ±100 V

−0.3 V to +6 V

THERMAL RESISTANCE

θJA is specified for a device soldered to a standard JEDEC2S2P PCB. For a typical printed circuit board of a handset, the total thermal resistance is higher. For correct operation up to 85°C ambient temperature the total thermal resistance must not exceed 100 K/W.

Table 3.

Package Type

10-Lead LFCSP (QFN) 84 °C/W

θ

JA

Unit

ESD CAUTION

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to GND.

Rev. 0 | Page 4 of 16

ADP2503/ADP2504

www.BDTIC.com/ADI

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1VOUT

ADP2503/

2SW2

ADP2504

3PGND

TOP VIEW

4SW1

(Not to scale)

5PVIN

*CONNECT PADDLETO GND.

Figure 2. Pin Configuration

10 FB 9AGND 8VIN 7SYNC 6EN

07475-003

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 VOUT Output of the ADP2503/ADP2504. Connect the output capacitor between VOUT and PGND. 2 SW2

Power Switch 2 Connection. This is the internal connection to the input PMOS and NMOS switches. Connect

SW2 to the inductor with a short, wide track. 3 PGND Power GND. Connect the input and output capacitors and the PGND pin to a PGND plane. 4 SW1

Power Switch 1 Connection. This is the internal connection to the output PMOS and NMOS switches. Connect

SW1 to the inductor with a short, wide track. 5 PVIN

Power Input. This the input to the buck-boost power switches. Place a 10 F capacitor between PVIN and

PGND as close as possible to the ADP2503/ADP2504. 6 EN Enable. Drive EN high to turn on the ADP2503/ADP2504. Bring EN low to put the part into shutdown mode. 7 SYNC The SYNC pin permits the ADP2503/ADP2504 to operate in three different modes.

Normal operation: with SYNC driven low, the ADP2503/ADP2504 operate at 2.5 MHz PWM mode for heavy

and medium loads, and moves to power save mode (PSM) mode for light loads.

Forced PWM operation: with SYNC driven high, the ADP2503/ADP2504 operate at fixed 2.5 MHz PWM mode

for all load conditions.

SYNC mode: to synchronize the ADP2503/ADP2504 switching to an external signal, drive this pin with a clock

between 2.2 MHz and 2.8 MHz. The SYNC signal must have on and off times greater than 160 ns. 8 VIN Analog Power Supply. This is the supply for the ADP2503/ADP2504 internal circuitry. 9 AGND Analog Ground. 10 FB Output Feedback. This is an input to the internal error amplifier. EP Paddle Connect the paddle to PGND.

Rev. 0 | Page 5 of 16

ADP2503/ADP2504

A

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

700

600

)

500

V

400

300

200

OUTPUT CURRENT (

100

0

2.82.3 3.3 3.8 4.3 4.8 5.3 INPUT VOLTAGE (V)

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

Figure 3. ADP2503 Output Current vs. Input Voltage

1100 1000

900 800 700 600 500 400

OUTPUT CURRENT (A)

300 200 100

0

2.82.3 3.3 3.8 4.3 4.8 5.3 INPUT VOLTAGE (V)

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

Figure 4. ADP2504 Output Current vs. Input Voltage

= 2.8V = 3.3V = 3.5V = 4.2V = 4.5V = 5.0V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

(A)

VIN = 5.5V V V V

= 4.2V

IN

= 3.6V

IN

= 2.3V

IN

0.1 1

OUT

= 4.2V

IN

= 3.6V

IN

= 2.3V

IN

0.1 1

= 3.3 V)

OUT

07475-104

= 5.0 V)

07475-109

20

10

0

07475-114

0.001

0.01 I

OUT

Figure 6. Efficiency vs. Output Current, PSM and PWM Mode (V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

07475-115

0.001

0.01 I

OUT

Figure 7. Efficiency vs. Output Current, PWM Mode (V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

(A)

VIN = 5.5V V V V

= 4.2V

IN

= 3.6V

IN

= 2.3V

IN

0.1 1

= 5.0 V)

OUT

07475-103

20

10

0

0.001

0.01 I

OUT

Figure 5. Efficiency vs. Output Current, PWM Mode (V

Rev. 0 | Page 6 of 16

100

90

80

70

60

50

40

EFFICIENCY (%)

30

(A)

VIN = 5.5V V V V

= 4.2V

IN

= 3.6V

IN

= 2.3V

IN

0.1 1

20

10

0

0.001

0.01 I

OUT

Figure 8. Efficiency vs. Output Current, PSM and PWM Mode (V

= 3.3 V)

OUT

07475-108

ADP2503/ADP2504

www.BDTIC.com/ADI

100

90

80

70

60

50

40

EFFICIENCY (%)

30

(A)

VIN = 5.5V V V V

= 4.2V

IN

= 3.6V

IN

= 2.3V

IN

0.1 1

20

10

0

0.001

0.01 I

OUT

Figure 9. Efficiency vs. Output Current, PWM Mode (V

= 2.8 V)

OUT

07475-105

3.35

3.33

3.31

A (V)

OUT

V

3.29

3.27

3.25 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Figure 12. Load Regulation (VIN = 3.6 V, V

I

OUT

(A)

OUT

07475-110

= 3.3 V)

100

90

80

70

60

50

40

EFFICIENCY (%)

30

(A)

VIN = 5.5V V V V

= 4.2V

IN

= 3.6V

IN

= 2.3V

IN

0.1 1

20

10

0

0.001

0.01 I

OUT

Figure 10. Efficiency vs. Output Current, PSM and PWM Mode (V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

I

= 500mA

OUT

I

= 100mA

OUT

I

= 10mA

OUT

2.3

2.8 3.3

3.8 4.3 4.8 5.3 V

(V)

IN

Figure 11. Efficiency vs. Input Voltage (V

= 3.3 V)

OUT

= 2.8 V)

OUT

2.8

2.7 –40°C

2.6

2.5

2.4

FREQUENCY (MHz)

2.3

2.2

2.7 3.1 3.5

07475-106

2.3 V

IN

Figure 13. Frequency vs. Input Voltage Over Temperature (V

50

45

40

35

30

25

20

15

QUIESCENT CURRENT (µA)

10

5

0

2.7 3.1 3.5

07475-107

2.3 V

IN

Figure 14. Quiescent Current vs. Input Voltage (V

+25°C

+85°C

3.9 4.3 4.7 5.1 5.5 (V)

= 3.3 V)

OUT

3.9 4.3 4.7 5.1 5.5 (V)

= 3.3 V)

OUT

07475-112

07475-113

Rev. 0 | Page 7 of 16

ADP2503/ADP2504

www.BDTIC.com/ADI

VIN = 3.0V TO 3.6V V

= 5.0V

V

IN

SW1

4

OUT

V

I

OUT

1

2

VIN= 3.6V

= 3.3V

V

OUT

W

B

W

SW2

V

OUT

CH2 1.00V CH4 5.00V

B

M40.0µs A CH2 3.40mV

W

B

T 18.20%

W

2

3

1

CH1 50.0mV CH3 5.00V

B

Figure 15. Line Transient, PWM Mode (VIN = 3.0 V to 3.6 V, V

VIN = 3.0V TO 3.6V

= 3.3V

V

IN

OUT

SW1

4

W

B

W

SW2

V

OUT

CH2 1.00V CH4 5.00V

B

M40.0µs A CH2 3.40V

W

B

T 18.20%

W

2

3

1

CH1 50.0mV CH3 5.00V

B

Figure 16. Line Transient, PWM Mode (VIN = 3.0 V to 3.6 V, V

= 5.0 V)

OUT

= 3.3 V)

OUT

SW1

4

SW2

07475-005

3

CH1 100mV CH3 5.00V

B

W

B

W

CH2 250mA Ω CH4 5.00V

B

Figure 18. Load Transient (VIN = 3.6 V V

V

I

OUT

1

2

M100µs A CH2 60.0mA

T 25.80%

W

= 3.3 V, I

OUT

= 100 mA to 350 mA)

OUT

VIN = 3.6V

= 3.3V

V

OUT

07475-008

SW1

4

SW2

07475-006

3

CH1 100mV CH3 5.00V

B

CH2 250mA Ω M100µs A CH2 60.0mA

W

B

W

CH4 5.00V

B

Figure 19. Load Transient (VIN = 3.6 V V

T 23.00%

W

OUT

= 3.3 V, I

= 10 mA to 300 mA)

OUT

07475-111

VIN= 3.0V TO 3.6V V

= 2.8V

V

IN

OUT

SW1

4

W

B

W

SW2

V

OUT

CH4 1.00V CH4 5.00V

B

M40.0µs A CH2 3.40mV

W

B

T 18.20%

W

= 2.8 V)

OUT

07475-007

2

3

1

CH1 50.0mV CH3 5.00V

B

Figure 17. Line Transient, PWM Mode (VIN = 3.0 V to 3.6 V, V

Rev. 0 | Page 8 of 16

SW1

4

I

OUT

2

1

CH1 100mV

V

OUT

B

CH2 500mA Ω M100µs A CH2 –115mA

W

CH4 2.00V

B

W

T 45.40%

VIN= 3.6V V

= 3.3V

OUT

Figure 20. Mode Change by Load Transients, Load Rise (V

= 3.3 V)

OUT

07475-010

ADP2503/ADP2504

www.BDTIC.com/ADI

SW1

4

I

OUT

2

VIN= 3.6V V

= 3.3V

OUT

V

1

CH1 100mV

OUT

B

CH2 500mA Ω M100µs A CH2 410mA

W

CH4 2.00V

B

W

T 45.40%

Figure 21. Mode Change by Load Transients, Load Fall (V

= 3.3 V)

OUT

SW2

3

SW1

4

I

SW

2

V

1

07475-011

CH1 20.0mV CH3 5.00V

B

OUT

B

CH2 250mA Ω M 400ns A CH4 2.40V

W

CH4 5.00V

B

W

Figure 24. Typical PWM Switching Waveform, Buck-Boost Operation

= 3.3 V)

(V

OUT

VIN= 3.0V V

OUT

T 50.00%

= 3.3V

07475-027

VIN= 4.0V V

= 3.3V

SW2

3

OUT

SW1

4

I

SW

2

V

1

CH1 50.0mV CH3 5.00V

B

OUT

B

CH2 250mA Ω M 400ns A CH3 2.40V

W

CH4 5.00V

B

W

T 50.00%

Figure 22. Typical PWM Switching Waveform, Buck Operation (V

VIN= 3.0V V

= 3.3V

SW2

3

OUT

SW1

4

I

SW

2

V

1

CH1 20.0mV CH3 5.00V

B

OUT

B

CH2 250mA Ω M 400ns A CH4 2.40V

W

CH4 5.00V

B

W

T 50.80%

Figure 23. Typical PWM Switching Waveform, Boost Operation (V

= 3.3 V)

OUT

07475-012

07475-013

= 3.3 V)

VIN= 3.0V V

= 3.3V

OUT

3

4

2

1

CH1 100mV CH3 5.00V

SW2

SW1

I

SW

V

OUT

B

CH2 1.00A Ω M 4.00µs A CH2 820mA

B

W

CH4 5.00V

B

W

T 15.20%

07475-015

Figure 25. Typical PSM Switching Waveform, Buck-Boost Operation

= 3.3 V)

(V

OUT

SW1

4

V

= 3.3V

OUT

V

OUT

1

I

SW

2

EN

3

CH1 2.00V CH3 5.00V

B

CH2 500mAΩ

W

B

CH4 5.00V

W

B

M 100µs A CH3 2.40 V

W

B

W

Figure 26. Startup into PWM Mode (V

T 9.400%

= 3.3 V, I

OUT

= 300 mA)

OUT

07475-018

Rev. 0 | Page 9 of 16

ADP2503/ADP2504

www.BDTIC.com/ADI

SW1

4

V

OUT

1

I

SW

2

EN

3

CH1 2.00V CH3 5.00V

B

CH2 500mAΩ

W

B

CH4 5.00V

W

Figure 27. Startup into PWM Mode (V

V

B

M 100µs A CH3 2.40 V

W

B

T 9.400%

W

= 3.3 V, I

OUT

= 3.3V

= 10 mA)

OUT

SW1

4

V

= 3.3V

= 3.3 V, I

OUT

= 10 mA)

OUT

07475-023

V

OUT

1

I

SW

2

EN

3

07475-019

CH1 2.00V CH3 5.00V

B

CH2 500mAΩ

W

B

CH4 5.00V

W

B

M 100µs A CH3 2.40 V

W

B

T 9.400%

W

Figure 28. Startup into PSM Mode (V

Rev. 0 | Page 10 of 16

ADP2503/ADP2504

V

www.BDTIC.com/ADI

THEORY OF OPERATION

1.0µH

SW1 SW2

4

VIN

8

ADP2503/ADP2504

BIASING

2

ADP2503/ADP2504

BAT = 2.3V

TO 5.5V

10µF

EN

PVIN

5

2.25V

UVLO

BAND GAP

REFERENCE

EN

6

SYNC

7

PGND AGND

3 9

PMOS1 PMOS2

NMOS1 NMOS2

THERMAL

PROTECTION

OSCILLATOR

Figure 29. ADP2503/ADP2504 Block Diagram

The ADP2503/ADP2504 are synchronous average currentmode switching buck-boost regulators designed to maintain a fixed output voltage V greater than, equal to, or less than V cantly greater than V

from an input supply VIN that can be

OUT

. When VIN is signifi-

OUT

, the device is in buck mode: PMOS2 is

OUT

always active, NMOS2 is always off, and the PMOS1, NMOS1 switches constitute a buck converter. When V lower than V

, the device is in boost mode: PMOS1 is always

OUT

is significantly

IN

active, NMOS1 is always off, and the NMOS2, PMOS2 switches constitute a boost converter. When V 10%; V

+ 10%], the ADP2503/ADP2504 automatically enter

OUT

is in the range [V

IN

OUT

−

the buck-boost mode. In buck-boost mode, the two operations buck (PMOS1 and NMOS1 switching in antiphase) and boost (NMOS2 and PMOS2 switching in antiphase) take place at each period of the clock. This is aimed at maintaining the regulation and keeping a minimal current ripple in the inductor to guarantee good transient performances.

POWER SAVE MODE

When the SYNC pin is low, the ADP2503/ADP2504 can operate in power save mode (PSM). In this mode, when the load current becomes less than 75 mA nominally at V troller pulls up V V

goes back to a restart value. Then V

OUT

and then halts the switching regime until

OUT

for a new cycle. This minimizes the switching losses at light load. When the load rises above 150 mA, the ADP2503/ADP2504 revert to fixed PWM mode. This results in about 75 mA of hysteresis

= 3.6 V, the con-

IN

is pulled up again

OUT

PWM CONTROL

between PSM and fixed PWM, preventing oscillations between these two modes.

SOFT START

When the ADP2503/ADP2504 are started, V 0 V to its final programmed value in 200 s (typ). This limits the inrush current to less than 600 mA for a nominal output capacitor of 20 F. Because the V the inrush current becomes larger if the output capacitor is made larger.

SYNC FUNCTION

When the SYNC pin is high, PSM is deactivated. The ADP2503/ ADP2504 always operate in PWM using the internal oscillator. When the SYNC pin is switching in the 2.2 MHz to 2.8 MHz range,

quency applied on SYNC and then locks on it. When the SYNC pin stops switching, the regulator switching frequency slides back to the internal oscillator frequency.

ENABLE

The device starts operation with soft start when the EN pin is brought high. Pulling the EN pin low forces the device into shutdown, with a typical shutdown current of 0.2 µA.

In this mode, the PMOS power switches are turned off, the NMOS power switches are turned on, and the control circuitry is not enabled. For proper operation, the EN pin must be terminated and must not be left floating.

VOUT

1

22µF

SOFT START

FB

10

–0.5V

CS

07475-025

is ramped from

OUT

start-up slope is constant,

OUT

the regulator switching frequency slides to the fre-

Rev. 0 | Page 11 of 16

ADP2503/ADP2504

www.BDTIC.com/ADI

UNDERVOLTAGE LOCKOUT

The undervoltage lockout circuit prevents the device from operating incorrectly at low input voltages. It prevents the converter from turning on the power switches under undefined conditions and, therefore, prevents deep discharge of the battery supply. V

must be greater than 2.25 V to enable the converter. During

IN

operation, if V are disabled until the supply exceeds the UVLO rising threshold.

drops below 2.18 V, the ADP2503/ADP2504

IN

THERMAL SHUTDOWN

When the junction temperature, TJ, exceeds 150°C typical, the device goes into thermal shutdown. In this mode, the power switches are turned off. The device resumes operation when the junction temperature again falls below 125°C typical.

SHORT-CIRCUIT PROTECTION

When the nominal inductor peak current value of 1.5 A is reached, the ADP2503/ADP2504 first switch off the NMOS2 transistor if it was active. If the current thereafter continues to increase by an extra amount of 200 mA, the PMOS1 transistor is also switched off. This operation is reversible when the short circuit stops. It allows the inductor current ripple to be minimized close to 1.5 A and, thus, the controller to restore V even if a high load current is maintained after the short circuit.

OUT

REVERSE CURRENT LIMIT

In case of a short circuit on V expected, the inductor current becomes negative (reverse current). The negative peak value is limited to 1.1 A by deactivating the switch PMOS2.

to a value greater than

OUT

Rev. 0 | Page 12 of 16

ADP2503/ADP2504

−

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APPLICATIONS INFORMATION

INDUCTOR SELECTION

The high 2.5 MHz switching frequency of the ADP2503/ ADP2504 allows for minimal output voltage ripple, while minimizing inductor size and cost. Careful inductor selection also optimizes efficiency and reduces electromagnetic interference (EMI). The selection of the inductor value determines the inductor current ripple and loop dynamics.

VVV

−×

)(

OUT

LfV

××

V

IN

×

1

×

ηV

OSC

Lf

×

OUT

IN

OSC

VV

−=Δ)(

IN

V

OUT

L

f

where

OSC

L is the inductor value in henries.

and

BuckpeakI

BoostpeakI

is the switching frequency (typically 2.5 MHz),

OUT

=Δ

)(,

A larger inductor value reduces the current ripple (and, therefore, peak inductor current), but is physically larger in size with increased dc resistance. Inductor values between 1 µH and

1.5 µH are usually suggested. The maximum inductor value to ensure stability is 2.0 µH. For increased efficiency with the ADP2504, it is suggested that a 1.5 µH inductor be used.

The inductor peak current is at the maximum in boost mode. To determine the actual maximum inductor current in boost mode, the input dc current should be estimated.

⎞

⎛

V

OUT

⎟

II

⎜

×=

MAXLOADMAXIN

)()(

⎜ ⎝

⎟

IN

⎠

where η is efficiency (assume η ≈ 0.85 to 0.90).

The saturation current rating of the inductor must be at least I

IN(MAX)

+ I

LOAD

/2.

Ceramic multilayer inductors can be used with lower current designs for a reduced overall solution size and dc resistance (DCR). These are available in low profile packages. Care must be taken because these derate quickly as the inductor value is increased, especially at higher operating temperatures.

Ferrite core inductors have good core loss characteristics as well as reasonable dc resistance. A shielded ferrite inductor reduces the EMI generated by the inductor.

Table 5. Sample of Recommended Inductors

Dimensions

Vendo r

Val ue (µH) Part No.

DCR (mΩ)

I

SAT

(A)

L × W × H (mm)

Toko 1.2 DE2810C 55 1.7 2.8 × 2.8 × 1.0 Toko 1.5 DE2810C 60 1.5 2.8 × 2.8 × 1.0 Toko 1 MDT2520-CN 100 1.8 2.5 × 2 × 1.2 Murata 1 LQM2HP-G0 55 1.6 2.5 × 2 × 1 Murata 1.5 LQM2HP-G0 70 1.5 2.5 × 2 × 1 TDK 1.0 CPL2512T 90 1.5 2.5 × 1.5 × 1.2 TDK 1.5 CPL2512T 120 1.2 2.5 × 1.5 × 1.2 Coilcraft 1.0 LPS3010 85 1.7 3.0 × 3.0 × 0.9 Coilcraft 1.5 LPS3010 120 1.3 3.0 × 3.0 × 0.9 Tai yo

1.5 NR3015T1 40 1.5 3.0 × 3.0 × 1.5

Yud en

Output Capacitor Selection

The output capacitor selection determines the output voltage ripple, transient response, and the loop dynamics of the ADP2503/ADP2504. The output voltage ripple for a given output capacitor is given by

OUT

)(,

BoostpeakV

)(,

8

IN

LOAD

=Δ

OUT

OUTOUT

×

OUT

=Δ

BuckpeakV

VVV

IN

()

OSC

−×

××

)(

OUT

2

CfLV

××××

OUT

VVI

)(

IN

fVC

OSC

If the ADP2503/ADP2504 are operating in buck mode, the worst-case voltage ripple occurs for the highest input voltage, V

If the ADP2503/ADP2504 are operating in boost mode, the

IN.

worst-case voltage ripple occurs for the lowest input voltage, V

IN.

The maximum voltage overshoot, or undershoot, is inversely proportional to the value of the output capacitor. To ensure stability and excellent transient response, it is recommended to use a minimum of 22 µF X5R 6.3 V or 2 × 10 µF X5R 6.3 V capacitors at the output. The effective capacitance (includes temperature and dc bias effects) needed for stability is 14 µF.

Table 6. Recommended Output Capacitors

Vendor Va lue Part No.

Murata 2 × 10 µF, 6.3 V GRM188R60J106ME47 1.6 × 0.8 × 0.8 (2) TDK 2 × 10 µF, 6.3 V C1608JB0J106K 1.6 × 0.8 × 0.8 (2) Murata 22 µF, 6.3 V GRM21BR60J226ME39 2 × 1.25 × 1.25 TDK 22 µF, 6.3 V C2012X5R0J226M 2 × 1.25 × 1.25 TDK 22 µF, 10 V C3216X5R1A226K 2 × 1.25 × 1.25 Murata 10 µF, 10 V GRM21BR71A106KE51L 2 × 1.25 × 1.25 (2)

Rev. 0 | Page 13 of 16

Dimensions L × W × H (mm)

ADP2503/ADP2504

www.BDTIC.com/ADI

Input Capacitor Selection

The ADP2503/ADP2504 require an input capacitor to filter noise on the VIN pin, and provide the transient currents while maintaining constant input and output voltage. A 10 µF X5R/ X7R ceramic capacitor rated for 6.3 V is the minimum recommended input capacitor. Increased input capacitance reduces the amplitude of the switching frequency ripple on the battery. Because of the dc bias characteristics of ceramic capacitors, a 0603, 6.3 V X5R/X7R, 10 µF ceramic capacitor is preferable.

Table 7. Recommended Input Capacitors

Dimensions L × W × H

Vendor Value Part No.

Murata 10 µF, 6.3 V GRM188R60J106ME47 1.6 × 0.8 × 0.8 TDK 10 µF, 6.3 V C1608JB0J106K 1.6 × 0.8 × 0.8

(mm)

Rev. 0 | Page 14 of 16

ADP2503/ADP2504

www.BDTIC.com/ADI

PCB LAYOUT GUIDELINES

Poor layout can affect ADP2503/ADP2504 performance, causing electromagnetic interference (EMI) and electromagnetic compatibility (EMC) performance, ground bounce, and voltage losses. Poor layout can also affect regulation and stability. A good layout is implemented using the following rules:

• Place the inductor, input capacitor, and output capacitor

close to the IC using short tracks. These components carry high switching frequencies and large tracks act like antennas.

• Route the output voltage path away from the inductor and

SW node to minimize noise and magnetic interference.

• Maximize the size of ground metal on the component side

to help with thermal dissipation.

• Use a ground plane with several vias connecting to the

component side ground to further reduce noise interference on sensitive circuit nodes.

Figure 30. ADP2503/ADP2504 Evaluation Board

Rev. 0 | Page 15 of 16

07475-026

ADP2503/ADP2504

www.BDTIC.com/ADI

OUTLINE DIMENSIONS

3.00

BSC SQ

0.30

0.23

0.18

0.50 BSC

PIN 1 INDEX

AREA

TOP VIEW

0.80

0.75

0.70

SEATING

PLANE

Figure 31. 10-Lead Lead Frame Chip Scale Package [LFCSP_WD]

ORDERING GUIDE

Model Voltage

ADP2503ACPZ-2.8-R7 ADP2503ACPZ-3.3-R7 ADP2503ACPZ-3.5-R7 ADP2503ACPZ-4.2-R7 ADP2503ACPZ-4.5-R7 ADP2503ACPZ-5.0-R7 ADP2504ACPZ-2.8-R7 ADP2504ACPZ-3.3-R7 ADP2504ACPZ-3.5-R7 ADP2504ACPZ-4.2-R7 ADP2504ACPZ-4.5-R7 ADP2504ACPZ-5.0-R7 ADP2503-2.8-EVAL-Z ADP2503-3.3-EVAL-Z ADP2503-3.5-EVAL-Z ADP2503-4.2-EVAL-Z ADP2503-4.5-EVAL-Z ADP2503-5.0-EVAL-Z ADP2504-2.8-EVAL-Z ADP2504-3.3-EVAL-Z ADP2504-3.5-EVAL-Z ADP2504-4.2-EVAL-Z ADP2504-4.5-EVAL-Z ADP2504-5.0-EVAL-Z

1

Z = RoHS Compliant Part.

1

2.8 V 0.6 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 L9Y

1

3.3 V 0.6 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 L9Z

1

3.5 V 0.6 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 LAP

1

4.2 V 0.6 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 LA0

1

4.5 V 0.6 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 LA1

1

5.0 V 0.6 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 LA2

1

2.8 V 1 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 L9T

1

3.3 V 1 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 L85

1

3.5 V 1 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 LAN

1

4.2 V 1 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 L9U

1

4.5 V 1 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 L9V

1

5.0 V 1 A −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-10-9 L9W

1

Evaluation Board for 2.8 V

1

Evaluation Board for 3.3 V

1

Evaluation Board for 3.5 V

1

Evaluation Board for 4.2 V

1

Evaluation Board for 4.5 V

1

Evaluation Board for 5.0 V

1

Evaluation Board for 2.8 V

1

Evaluation Board for 3.3 V

1

Evaluation Board for 3.5 V

1

Evaluation Board for 4.2 V

1

Evaluation Board for 4.5 V

1

Evaluation Board for 5.0 V

Current

Maximum

Temperature Range

6

*

EXPOSED

PAD

(BOTTOM VIEW)

5

2.48

2.38

2.23

*

PADDLE CONNEC T E D TO GND.

0.80 MAX

0.55 NOM

0.50

0.40

0.30

0.05 MAX

0.02 NOM

0.20 REF

3 mm × 3 mm Body, Very Very Thin, Dual Lead

(CP-10-9)

Dimensions shown in millimeters

Package Description

10

1.74

1.64

1.49

1

P

N

I

1

R

A

O

T

N

I

D

C

I

)

0

2

.

R

0

(

060408-B

Package Option

Branding

Rev. 0 | Page 16 of 16

Datasheet ADP2504 Datasheet (ANALOG DEVICES)

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES FEATURES

APPLICATIONS APPLICATIONS

GENERAL DESCRIPTION GENERAL DESCRIPTION

TYPICAL APPLICATION CIRCUIT TYPICAL APPLICATION CIRCUIT

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

THEORY OF OPERATION

POWER SAVE MODE

SOFT START

SYNC FUNCTION

ENABLE

UNDERVOLTAGE LOCKOUT

THERMAL SHUTDOWN

SHORT-CIRCUIT PROTECTION

REVERSE CURRENT LIMIT

APPLICATIONS INFORMATION

INDUCTOR SELECTION

Output Capacitor Selection

Input Capacitor Selection

PCB LAYOUT GUIDELINES

OUTLINE DIMENSIONS

ORDERING GUIDE