Datasheet ADP2370 Datasheet (ANALOG DEVICES)

High Voltage, 1.2 MHz/600 kHz, 800 mA,

Low Quiescent Current Buck Regulator

ADP2370/ADP2371

Trademarks and registered trademarks are the property of their respective owners.

Fax: [phone] ©2012 Analog Devices, Inc. All rights reserved.

ADP2370/

ADP2371

FSEL

EN

POWER GOOD

V

OUT

= 3.3V

V

IN

= 6V

C

IN

10µF

C

OUT

10µF

AGND

(EXPOSED PAD)

VIN

SYNC

ON

OFF

1.2MHz

600kHz

SW

PG

PGND

FB

1

2

3

4

8

7

6

5

09531-001

Data Sheet

FEATURES

Input voltage range: 3.2 V to 15 V, output current: 800 mA
Quiescent current < 14 µA in power saving mode (PSM)
>90% efficiency
Force PWM pin (SYNC), 600 kHz/1.2 MHz frequency pin

(FSEL)

Fixed outputs: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.0 V, 3.3 V, 5 V,

and adjustable option
100% duty cycle capability
Initial accuracy: ±1%
Low shutdown current: <1.2 µA
Quick output discharge (QOD) option
Synchronizable to an external clock
8-lead, 0.75 mm × 3 mm × 3 mm LFCSP (QFN) package
Supported by ADIsimPower design tool

APPLICATIONS

Portable and battery-powered equipment
Automatic meter readers (WSN)
Point of sales and transaction processing instruments
Medical instruments
Medium format display tablets and pads

TYPICAL APPLICATION CIRCUIT

Figure 1.

GENERAL DESCRIPTION

The ADP2370/ADP2371 are high efficiency, low quiescent current,
800 mA buck (step-down) dc-to-dc converters in small 8-lead,
3 mm × 3 mm LFCSP (QFN) packages. The total solution requires
only three tiny external components.

The buck regulator uses a proprietary high speed current mode,
constant frequency PWM control scheme for excellent stability
and transient response. The need for an external rectifier is elimi­nated by using a high efficiency synchronous rectifier architecture.

To ensure the longest battery life in portable applications, the

ADP2370/ADP2371 employ a power saving variable frequency

mode that reduces the switching frequency under light load
conditions. The ADP2370/ADP2371 operate from input voltages
of 3.2 V to 15 V allowing the use of multiple alkaline/NiMH,
lithium cells, or other standard power sources.

The ADP2370/ADP2371 offer multiple options for setting the
operational frequency. The ADP2370/ADP2371 can be synchro­nized to a 600 kHz to 1.2 MHz external clock or it can be forced
to operate at 600 kHz or 1.2 MHz via the FSEL pin. The ADP2370/

ADP2371 can be forced to operate in PWM mode (FPWM)

when noise considerations are more important than efficiency.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
ri

ghts of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

A power-good output is available to indicate when the output
voltage is below 92% of its nominal value.

The ADP2371 is identical to the ADP2370 except that the

ADP2371 includes the addition of an integrated switched

resistor, quick output discharge function (QOD) that auto­matically discharges the output when the device is disabled.

Both devices include an internal power switch and a synchronous
rectifier for minimal external part count and high efficiency.
The ADP2370/ADP2371 also include internal soft start and
internal compensation for ease of use.

During a logic controlled shutdown, the input is disconnected
from the output and the regulator draws less than 1.2 μA from
the input source. Other key features include undervoltage lockout
to prevent deep battery discharge and soft start to prevent input
overcurrent at startup. Short-circuit protection and thermal over­load protection circuits prevent damage under adverse conditions.

The ADP2370/ADP2371 each use one 0805 capacitor, one 1206
capacitor, and one 4 mm × 4 mm inductor. The total solution
size is about 53 mm

2

resulting in a very small footprint solution

to meet a variety of portable applications.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]

www.analog.com

ADP2370/ADP2371 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Typical Application Circuit ............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Recommended Specifications: Capacitors ................................ 5

Absolute Maximum Ratings ....................................................... 6

Thermal Data ................................................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution .................................................................................. 6

Pin Configuration and Function Descriptions ............................. 7

Typical Performance Characteristics ............................................. 8

Buck Output .................................................................................. 8

Theory of Operation ...................................................................... 20

PWM Operation ......................................................................... 20

PSM Operation ........................................................................... 21

Features Descriptions ..................................................................... 22

Precision Enable ......................................................................... 22

Forced PWM or PWM/PSM Selection .................................... 22

Quick Output Discharge (QOD) Function ............................. 22

Short-Circuit Protection ............................................................ 22

Undervoltage Lockout ............................................................... 22

Thermal Protection .................................................................... 22

Soft Start ...................................................................................... 22

Current Limit .............................................................................. 22

100% Duty Cycle ........................................................................ 23

Synchronizing ............................................................................. 23

Power Good ................................................................................ 24

Applications Information .............................................................. 25

ADIsimPower Design Tool ....................................................... 25

External Component Selection ................................................ 25

Selecting the Inductor ................................................................ 25

Output Capacitor ........................................................................ 25

Input Capacitor ........................................................................... 25

Adjustable Output Voltage Programming .............................. 25

Efficiency ..................................................................................... 26 

Recommended Buck External Components .......................... 26

Capacitor Selection .................................................................... 28

Thermal Considerations ................................................................ 29

PCB Layout Considerations ...................................................... 30

Packaging and Ordering Information ......................................... 32

Outline Dimensions ................................................................... 32

Ordering Guide .......................................................................... 32

REVISION HISTORY

5/12—Rev. 0 to Rev. A

Changed Voltage Range for SW to PGND and Ground Plane

from −0.3 V to VIN + 0.3 V to −0.7 V to VIN + 0.3 V ............... 6

Changes to Ordering Guide .......................................................... 32

4/12—Revision 0: Initial Version

Rev. A | Page 2 of 32

Data Sheet ADP2370/ADP2371

SUPPLY

P-Channel

I

Peak inductor current

1200

1300

mA

SPECIFICATIONS

VIN = V
T

= −40°C to +125°C for minimum/maximum specifications, unless otherwise noted.

J

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

FIXED OUTPUT

ADJUSTABLE OUTPUT

FIXED AND ADJUSTABLE OUTPUT

Overcurrent Frequency Foldback Threshold

VIN > 5.5 V 40 60 ns

POWER SWITCH

OSCILLATOR

FSEL = 0 V, 3.2 V ≤ VIN ≤ 15 V 500 600 700 kHz

+ 1 V or 3.2 V, whichever is greater, EN = V

OUT

, I

= 100 mA, CIN = 10 μF, C

IN

OUT

= 10 µF, TA = 25°C for typical specifications,

OUT

Input Voltage Range VIN 3.2 15 V

Quiescent Current I

FSEL = VIN, SYNC = 0 V, no load, device not

Q-PSM

13.5 μA

switching

I

FSEL = VIN, SYNC = VIN, no load, device not

Q-PWM

725 μA

switching
I
Shutdown Current I

Output Current I
Fixed Output Accuracy V
I

FSEL = VIN, SYNC = VIN, no load, device switching 5.7 mA

SW-PWM

EN = GND, TJ = −40°C to +85°C 1.2 3.5 μA

SHUT

800 mA

OUT

Initial set point, I

OUT

= 250 mA −1.5 +1.5 %

OUT

= 250 mA, TJ = 25°C −1 +1 %

OUT

No load to full load, PWM mode −3 +3 %

Feedback Voltage VFB 0.8 V
Feedback Voltage Accuracy V
Output Voltage Range V

Load Regulation ∆V
Line Regulation ∆V
Efficiency EFF I

Rising OC
Falling OC
PSM Threshold PSM

Initial set point, I

FB-TOL

No load to full load 0.8 14 V

OUT-ADJ

/∆I

OUT

/∆VIN I

FOLDBACK-RISE

FOLDBACK-FALL

THRESHOLD

No load to full load 0.125 %/A

= 250 mA 0.01 %/V

OUT

= 250 mA, VIN = 7.2 V, V

OUT

% of V

% of V

OUT

OUT

, V
, V

OUT

OUT

VIN = 7.2 V, V

OUT

OUT

= 250 mA, TJ = 25°C −1 +1 %

OUT

= 3.3 V 92 %

OUT

rising 50 %
falling 37.5 %

= 3.3 V 170 mA

OUT

Feedback Pin Input Current

Fixed I
Adjustable I

Minimum On Time ON-TIME

Soft Start Time SS
Active Pull-Down Resistance

Fixed output voltage model 2.5 μA

FB-FIXED

Adjustable output voltage model 10 nA

FB-ADJUST

VIN < 5.5 V 65 100 ns

MIN

When EN rises from 0 V to VIN, and V

TIME

R

260 400 Ω

PULL-DOWN

= 0.9 × V

OUT

350 μs

OUT

(ADP2371)

P-Channel On Resistance RDS
VIN < 5.5 V, I
N-Channel On Resistance RDS
VIN < 5.5 V, I

VIN > 5.5 V, I

ON-P

VIN > 5.5 V, I

ON-N

= 400 mA 400 mΩ

OUT

= 400 mA 500 mΩ

OUT

= 400 mA 280 mΩ

OUT

= 400 mA 400 mΩ

OUT

Current Limit

LIM-P

N-Channel I

Leakage Current I

Peak inductor current 500 550 mA

LIM-N

LEAK-SW

P-Channel 0.01 1 μA
N-Channel 0.01 1 μA

Oscillator Frequency f

FSEL = VIN, 3.2 V ≤ VIN ≤ 15 V 1.0 1.2 1.4 MHz

OSC

Rev. A | Page 3 of 32

ADP2370/ADP2371 Data Sheet

Low

SYNC

3.2 V ≤ VIN ≤ 15 V

0.4

V

Hysteresis

PG

5 %

Hysteresis

EN

125 mV

0 V to VIN

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

Frequency Synchronization Range f

SYNC_RANGE

FSEL = VIN, 3.2 V ≤ VIN ≤ 15 V 0.8 1.6 MHz

Synchronization Threshold

High SYNC

Hysteresis SYNC
Typical Sync Duty Cycle Range SYNC
VIN (1.2 MHz), 5 V ≤ VIN ≤ 15 V, FSEL = VIN 20 70 %
SYNC Pin Leakage Current SYNC
FSEL Threshold 3.2 V ≤ VIN ≤ 15 V

High FESL

Low FSEL

Hysteresis FSEL
FSEL Pin Leakage Current FSEL

POWER GOOD (PG PIN)

PG Threshold 3.2 V ≤ VIN ≤ 15 V

Rising PG

Falling PG

PG Output Low PG
PG Delay

Rising PG

Falling PG

PG Leakage PG

UNDERVOLTAGE LOCKOUT (UVLO)

Input Voltage Rising UVLO
Input Voltage Falling UVLO
Hysteresis UVLO

ENABLE INPUT STANDBY (EN PIN) 3.2 V ≤ VIN ≤ 15 V

EN Input Logic V

High EN

Low EN

ENABLE INPUT PRECISION (EN PIN) 3.2 V ≤ VIN ≤ 15 V

EN Input Logic

High EN

Low EN

Hysteresis EN
EN Input Leakage Current I

EN-LKG

EN Input Delay Time TI

FSEL = 0 V, 3.2 V ≤ VIN ≤ 15 V 400 800 kHz

3.2 V ≤ VIN ≤ 15 V 1.2 V

HIGH

LOW

HYS

DUTY

LKG

HIGH

LOW

HYS

LKG

92 95 %

RISE

82.5 87 %

FAL L

HYS

Pull-up current < 1 mA 0.3 V

LOW

DELAYRISE

3.2 V ≤ VIN ≤ 15 V 200 mV

VIN (1.2 MHz), 3.2 V ≤ VIN ≤ 5 V, FSEL = VIN 20 55 %

SYNC = 0 V or SYNC = VIN 0.05 1 μA

1 V

0.4 V
125 mV
FSEL = 0 V or FSEL = VIN 0.04 1 μA

V

crossing PG rising threshold, pull-up

OUT

20 μs

current < 1 mA

DELAYFALL

V

crossing PG falling threshold, pull-up

OUT

0.5 μs

current < 1 mA

0.04 1 μA

LKG

3.19 V

RISE

2.80 V

FAL L

190 mV

HYS

1

STBY-HIGH

0.4 V

STBY-LOW

STBY-HYS

1.135 1.2 1.26 V

HIGH

1.045 1.1 1.155 V

LOW

100 mV

HYS

EN = VIN or GND 0.05 1 µA

For V

EN-DLY

= 0 V to 0.1 × V

OUT

when EN rises from

OUT

70 μs

THERMAL SHUTDOWN 3.2 V ≤ VIN ≤ 15 V

Thermal Shutdown Threshold TSSD TJ rising 150 °C
Thermal Shutdown Hysteresis TS

15 °C

SD-HYS

Rev. A | Page 4 of 32

Data Sheet ADP2370/ADP2371

MINIMUM INPUT and OUTPUT CAPACITANCE1

C

TA = −40°C to +125°C

6.5

10 µF

RECOMMENDED SPECIFICATIONS: CAPACITORS

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

MIN

CAPACITOR ESR R

1

The minimum input and output capacitance should be greater than 7 μF over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R- and X5R-type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any buck.

ESR

TA = −40°C to +125°C

1 10 mΩ

Rev. A | Page 5 of 32

ADP2370/ADP2371 Data Sheet

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

VIN to PGND and Ground Plane −0.3 V to +17 V
SW to PGND and Ground Plane −0.7 V to VIN + 0.3 V
FB to PGND and Ground Plane −0.3 V to +6 V
EN to PGND and Ground Plane −0.3 V to +17 V
PG to PGND and Ground Plane −0.3 V to +17 V
SYNC to PGND and Ground Plane −0.3 V to +17 V
FSEL to PGND and Ground Plane −0.3 V to +17 V
Temperature Range

Storage −65°C to +150°C
Operating Ambient −40°C to +85°C
Operating Junction −40°C to +125°C

Soldering Conditions JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings
may cause permanent dam age

to the device. This is a stress

rating only ; functional operation of the dev ice at these or any
other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions fo r extended periods may affect
device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in com­bination. Exceeding the junction temperature (T
cause damage to the ADP2370/ADP2371. Monitoring ambient
temperature does not guarantee that T

is within the specified

J

temperature limits. The maximum ambient temperature may
require derating in applications with high power dissipation and
poor thermal resistance.

In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long
as the junction temperature is within specification limits. The
junction temperature of the device is dependent on the ambient
temperature, the power dissipation of the device, and the junction
to ambient thermal resistance of the package (θ

Maximum junction temperature (T
ambient temperature (T

) and power dissipation (PD) using

A

) is calculated from the

J

the formula

T

= TA + (PD × θJA)

J

Junction-to-ambient thermal resistance (θ
based on modeling and calculation using a 4-layer board. θ
highly dependent on the application and board layout. In applica­tions where high maximum power dissipation exists, close

) limit can

J

).

JA

) of the package is

JA

is

JA

attention to thermal board design is required. The value of θ
vary, depending on PCB material, layout, and environmental con­ditions.

The specified values of θ

are based on a 4-layer, 4 in. × 3 in.

JA

circuit board. See JESD 51-7, High Effective Thermal Conduc­tivity Test Board for Leaded Surface Mount Packages, for detailed
information on board construction. For more information, see

Application Note AN-772, A Design and Manufacturing Guide for

the Lead Frame Chip Scale Package (LFCSP).

Ψ

is the junction to board thermal characterization parameter

JB

with units of °C/W. The Ψ

of the package is based on modeling

JB

and calculation using a 4-layer board. The JESD51-12, Guidelines
for Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. Ψ

measures the component power flowing

JB

through multiple thermal paths rather than a single path as in
thermal resistance, θ

. Therefore, ΨJB thermal paths include

JB

convection from the top of the package as well as radiation
from the package, factors that make Ψ

more useful in real-

JB

world applications. Maximum junction temperature (T
calculated from the board temperature (T
dissipation (P

T

= TB + (PD × ΨJB)

J

) using the formula

D

For more detailed information regarding Ψ

) and power

B

, see JESD51-12

JB

and JESD51-8, Integrated Circuit Thermal Test Method Envi-
ronmental Conditions—Junction-to-Board.

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
θ

is a parameter for surface-mount packages with top mounted

JC

heat sinks.

Table 4. Thermal Resistance

Package Type θJA θJC ΨJB Unit

8-Lead 3 mm × 3 mm LFCSP 36.7 23.5 17.2 °C/W

ESD CAUTION

) is

J

JA

can

Rev. A | Page 6 of 32

Data Sheet ADP2370/ADP2371

09531-002

ADP2370/ADP2371

TOP VIEW

(Not to

Scale)

3EN
4SYNC

1VIN

NOTES

1. THE EXP OSED PAD ON THE BO TTOM OF THE PACKAGE ENHANCES
THE THERMAL PERFORMANCE AND I S E LECTRICALL Y CONNECTED
TO GRO UND INSIDE THE PACKAG E . THE EXPOS E D P AD M US T BE
CONNECTED T O THE GROUND PL ANE ON THE CIRCUIT BOARD
FOR PROPER OPERATION.

2FSEL

6 PG
5 FB

8 PGND
7 SW

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 2. Pin Configuration

Table 5. Pin Function Descriptions

Pin No. Mnemonic Description

1 VIN Power Input.
2 FSEL Frequency Select. High = 1.2 MHz, low = 600 kHz.
3 EN Enable. Enable input with precision thresholds.
4 SYNC Synchronize. This pin is used to synchronize the device to an external 600 kHz to 1.2 MHz clock or forces

PWM mode when it is held high. SYNC held low forces automatic PWM/PSM operation.
5 FB Feedback. This pin provides feedback from the output.
6 PG Power Good. PG is an open-drain output.
7 SW Switch. This pin serves as the connection from the power MOSFETs to the inductor.
8 PGND Power Ground.
EPAD Exposed Pad. The exposed pad on the bottom of the package enhances the thermal performance and is

electrically connected to ground inside the package. The exposed pad must be connected to the ground

plane on the circuit board for proper operation.

Rev. A | Page 7 of 32

ADP2370/ADP2371 Data Sheet

0

5

10

15

20

25

3 4 5 6 7 8 9 10 11 12 13 14 15 16

QUIESCENT CURRENT (µA)

INPUT VOLTAGE (V)

–40°C

–5°C

+25°C

+85°C

+125°C

09531-003

500

600

550

650

700

750

800

3 4 5 6 7 8 9 10 11 12 13 14 15

FPWM QUIESCENT CURRENT ( µA)

INPUT VOLTAGE (V)

–40°C

–5°C

+25°C

+85°C

+125°C

09531-004

0.55

0.57

0.59

0.61

0.63

0.65

1.10

1.12

1.14

1.16

1.18

1.20

1.22

1.24

1.26

1.28

1.30

–45 –25 –5 15 35 55 75 95 115 135

TEMPERATURE (°C)

1.2MHz

600kHz

FREQUENCY (MHz)

FREQUENCY (MHz)

09531-005

0.55

0.57

0.59

0.61

0.63

0.65

1.10

1.12

1.14

1.16

1.18

1.20

1.22

1.24

1.26

1.28

1.30

3 5 7 9 11 13 15

TEMPERATURE (°C)

1.2MHz

600kHz

09531-006

FREQUENCY (MHz)

FREQUENCY (MHz)

3.10

3.15

3.20

3.25

3.30

3.35

3.40

–40 –5 25 85 125

OUTPUT VOLTAGE (V)

TEMPERATURE (°C)

0.1mA
1mA
5mA
10mA
50mA
100mA
300mA
800mA

09531-007

–40 –5 25 85 125

OUTPUT VOLTAGE (V)

TEMPERATURE (°C)

09531-008

4.80

4.85

4.90

4.95

5.00

5.05

5.10

5.15

5.20

0.1mA
1mA
5mA
10mA
50mA
100mA
300mA
800mA

TYPICAL PERFORMANCE CHARACTERISTICS

BUCK OUTPUT

Using recommended inductor values, I

Figure 3. Quiescent Supply Current vs. Input Voltage, Nonswitching,

Different Temperatures

= 10 mA, CIN = C

OUT

= 10 µF, automatic PSM/PWM mode, TA = 25°C, unless otherwise noted.

OUT

Figure 6. Switching Frequency vs. Input Voltage, FPWM Mode

Figure 4. FPWM Quiescent Supply Current vs. Input Voltage, Nonswitching,

Different Temperatures

Figure 5. Switching Frequency vs. Temperature, FPWM Mode, VIN = 8 V

Figure 7. Output Voltage vs. Temperature, V

Different Loads

Figure 8. Output Voltage vs. Temperature, V

Different Loads

= 3.3 V, VIN = 7.3 V,

OUT

= 5 V, VIN = 7.2 V,

OUT

Rev. A | Page 8 of 32

Data Sheet ADP2370/ADP2371

1.15

1.17

1.19

1.21

1.23

1.25

–40 –5 25 85 125

OUTPUT VOLTAGE (V)

TEMPERATURE (°C)

0.1mA
1mA
5mA
10mA
50mA
100mA
300mA
800mA

09531-009

1.70

1.75

1.80

1.85

1.90

–40 –5 25 85 125

OUTPUT VOLTAGE (V)

TEMPERATURE (°C)

0.1mA
1m

A
5mA
10mA
50mA
100mA
300mA
800mA

09531-010

3.10

3.15

3.20

3.25

3.30

3.35

3.40

3 5 7 9 11 13 15

OUTPUT VOLTAGE (V)

INPUT VOLTAGE (V)

0.1mA

1mA

5mA

10mA

50mA

100mA

300mA

800mA

09531-011

3.10

3.15

3.20

3.25

3.30

3.35

3.40

0.1 1 10 100 1000

OUTPUT VOLTAGE (V)

LOAD (mA)

3.8V

4.55V

6.05V

7.30V

10.55V

12.05V

15.05V

09531-012

3.10

3.15

3.20

3.25

3.30

3.35

3.40

3 5 7 9 11 13 15

OUTPUT VOLTAGE (V)

INPUT VOLTAGE (V)

0.1mA

1mA

5mA

10mA

50mA

100mA

300mA

800mA

09531-013

4.80

4.85

4.90

4.95

5.00

5.05

5.10

5.15

5.20

0.1 1 10 100 1000

OUTPUT VOLTAGE (V)

LOAD (mA)

5.40V

6.00V

7.20V

9.00V

10.80V

12.00V

15.05V

09531-014

Figure 9. Output Voltage vs. Temperature, V

Different Loads

Figure 10. Output Voltage vs. Temperature, V

Different Loads

= 1.2 V, VIN = 4 V,

OUT

= 1.8 V, VIN = 7.2 V,

OUT

Figure 12. Load Regulation, V

Figure 13. Line Regulation, V

= 3.3 V

OUT

= 5.0 V, Different Loads

OUT

Figure 11. Line Regulation, V

= 3.3 V, Different Loads

OUT

Rev. A | Page 9 of 32

Figure 14. Load Regulation, V

OUT

= 5.0 V

ADP2370/ADP2371 Data Sheet

1.15

1.16

1.17

1.18

1.19

1.20

1.21

1.22

1.23

1.24

1.25

3 5 7 9 11 13 15

OUTPUT VOLTAGE (V)

INPUT VOLTAGE (V)

0.1mA
1mA
5mA
10mA
50mA
100mA
300mA
800mA

09531-015

1.15

1.16

1.17

1.18

1.19

1.20

1.21

1.22

1.23

1.24

1.25

0.1 1 10 100 1000

OUTPUT VOLTAGE (V)

LOAD (mA)

3.20V

3.95V

5.45V

7.20V

9.95V

11.95V

15.20V

09531-016

1.70

1.75

1.80

1.85

1.90

3 5 7 9 11 13 15

OUTPUT VOLTAGE (V)

INPUT VOLTAGE (V)

0.1mA
1mA
5mA
10mA
50mA
100mA
300mA
800mA

09531-017

1.70

1.75

1.80

1.85

1.90

0.1 1 10 100 1000

OUTPUT VOLTAGE (V)

LOAD (mA)

09531-018

3.20V

3.95V

5.45V

7.20V

9.95V

11.95V

15.20V

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-019

3.80V

4.55V

6.05V

7.30V

10.55V

12.05V

15.05V

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-020

–40°C
–5°C

+25°C
+85°C
+125°C

Figure 15. Line Regulation, V

Figure 16. Load Regulation, V

= 1.2 V, Different Loads

OUT

= 1.2 V

OUT

Figure 18. Load Regulation, V

Figure 19. Efficiency vs. Load Current, V

= 1.8 V

OUT

= 3.3 V, Different Input Voltages

OUT

Figure 17. Line Regulation, V

= 1.8 V, Different Loads

OUT

Figure 20. Efficiency vs. Load Current, V

V

= 3.3 V, Different Temperatures,

OUT

= 7.3 V

IN

Rev. A | Page 10 of 32

Data Sheet ADP2370/ADP2371

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-021

5.4V

6.0V

7.2V

9.0V

10.8V

12.8V

15.0V

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-022

–40°C
–5°C

+25°C
+85°C
+125°C

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-023

3.20V

3.95V

5.50V

7.20V

9.95V

12.45V

15.20V

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-024

–40°C
–5°C

+25°C
+85°C
+125°C

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-025

3.20V

3.95V

5.50V

7.20V

9.95V

12.45V

15.20V

0

10

20

30

40

50

60

70

80

90

100

0.01 0.10 1.0 10 100 1000

EFFICIENCY (%)

LOAD (mA)

09531-026

–40°C
–5°C

+25°C
+85°C
+125°C

Figure 21. Efficiency vs. Load Current, V

Figure 22. Efficiency vs. Load Current, V

= 5.0 V, Different Input Voltages

OUT

= 5.0 V, Different Temperatures

OUT

Figure 24. Efficiency vs. Load Current, V

V

= 4 V

IN

Figure 25. Efficiency vs. Load Current, V

= 1.2 V, Different Temperatures,

OUT

= 1.8 V, Different Input Voltages

OUT

Figure 23. Efficiency vs. Load Current, V

= 1.2 V, Different Input Voltages

OUT

Figure 26. Efficiency vs. Load Current, V

Rev. A | Page 11 of 32

= 1.8 V, Different Temperatures,

OUT

V

= 4 V

IN

ADP2370/ADP2371 Data Sheet

40

45

50

55

60

65

70

75

80

85

90

0.01 0.1 1 10 100 1000

EFFICIENCY (%)

LOAD (mA)

600kHz

1.2MHz

09531-027

CH1 500mA Ω

B

W

CH3 1.00V

B

W

CH2 20.0mV

B

W

M10.0µs A CH3 4.56V

1

2
3

T 11.00%

V

OUT

V

IN

09531-028

INDUCTOR CURRENT

M10.0µs A CH3 4.64V

1

T 11.20%

V

OUT

V

IN

INDUCTOR CURRENT

09531-029

CH1 200mA Ω

B

W

CH3 1.00V

B

W

CH2 20.0mV

B

W

M10.0µs A CH3 4.56V

2

1

3

T 11.0%

V

OUT

V

IN

INDUCTOR CURRENT

09531-030

CH1 500mA Ω

B

W

CH3 1.00V

B

W

CH2 20.0mV

B

W

M10.0µs A CH3 5.44V

1

2

3

T 10.80%

V

OUT

V

IN

INDUCTOR CURRENT

09531-031

CH1 500mA Ω

B

W

CH3 1.00V

B

W

CH2 10.0mV

B

W

M10.0µs A CH3 6.78V

1

2

3

T 11.40%

V

OUT

V

IN

INDUCTOR CURRENT

09531-032

CH1 200mA Ω

B

W

CH3 1.00V

B

W

CH2 20.0mV

B

W

Figure 27. Efficiency vs. Load Current, Different Switching Frequency,

V

= 1.8 V, VIN = 9 V

OUT

Figure 28. Line Transient, V

= 1.8 V, PSM Mode, 100 mA, V

OUT

2 μs Rise Time, C

= 3.3 μF

IN

= 4 V to 5 V,

IN1

Figure 30. Line Transient, V

Figure 31. Line Transient, V

= 1.2 V, PSM Mode, 100 mA, V

OUT

2 μs Rise Time, C

= 1.2 V, PWM Mode, 800 mA, V

OUT

2 μs Rise Time, C

= 3.3 μF

IN

= 3.3 μF

IN

= 4 V to 5 V,

IN1

= 4 V to 5 V,

IN1

Figure 29. Line Transient, V

= 1.8 V, PWM Mode, 800 mA, V

OUT

2 μs Rise Time, C

IN

= 3.3 μF

= 4 V to 5 V,

IN1

Figure 32. Line Transient, V

= 3.3 V, PSM Mode, 100 mA, V

OUT

2 μs Rise Time, C

= 3.3 μF

IN

= 6 V to 7 V,

IN1

Rev. A | Page 12 of 32

Data Sheet ADP2370/ADP2371

M10.0µs A CH3 6.78V

1

2

T 11.40%

V

OUT

V

IN

INDUCTOR CURRENT

09531-033

CH1 200mA Ω

B

W

CH3 1.00V

B

W

CH2 10.0mV

B

W

M10.0µs A CH3 6.74V

1

2

3

T 10.60%

V

OUT

V

IN

INDUCTOR CURRENT

09531-034

CH1 200mA Ω

B

W

CH3 1.00V

B

W

CH2 50.0mV

B

W

M10.0µs A CH3 6.52V

1

2

T 11.00%

V

OUT

V

IN

INDUCTOR CURRENT

09531-035

CH1 200mA Ω

B

W

CH3 1.00V

B

W

CH2 10.0mV

B

W

M20.0µs A CH1 560mA

1

2

3

T 10.40%

09531-036

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M40.0µs A CH1 320mA

1

2

3

T 72.00%

09531-037

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 100mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M10.0µs A CH1 76. 0mA

1

2

3

T 50.40%

09531-038

CH1 100mA Ω

B

W

CH3 200mA Ω

B

W

CH2 20.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

Figure 33. Line Transient, V

2 μs Rise Time, C

Figure 34. Line Transient, V

2 μs Rise Time, C

= 3.3 V, PWM Mode, 800 mA, V

OUT

= 5 V, PSM Mode, 100 mA, V

OUT

= 3.3 μF

IN

= 3.3 μF

IN

= 6 V to 7 V,

IN1

= 6 V to 7 V,

IN1

Figure 36. Load Transient, V

Load Current Rise Time = 200 ns

Figure 37. Load Transient, V

Load Current Rise Time = 200 ns

= 1.8 V, 300 mA to 800 mA,

OUT

= 1.8 V, 10 mA to 800 mA,

OUT

Figure 35. Line Transient, V

= 5 V, PWM Mode, 800 mA, V

OUT

2 μs Rise Time, C

= 3.3 μF

IN

= 6 V to 7 V,

IN1

Rev. A | Page 13 of 32

Figure 38. Load Transient, V

Load Current Rise Time = 200 ns

= 1.8 V,10 mA to 110 mA,

OUT

ADP2370/ADP2371 Data Sheet

M20.0µs A CH1 208mA

1

2

3

T 50.40%

09531-039

CH1 200mA Ω

B

W

CH3 200mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M40.0µs A CH1 580mA

1

2

3

T 10.20%

09531-040

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M40.0µs A CH1 530mA

1

2

3

T 71.80%

09531-041

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 200mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M20.0µs A CH1 46.0mA

1

2

3

T 50.40%

09531-042

CH1 100mA Ω

B

W

CH3 200mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M20.0µs A CH1 184mA

1

2

3

T 29.80%

09531-043

CH1 200mA Ω

B

W

CH3 200mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M10.0µs A CH1 560mA

1

2

3

T 10.40%

09531-044

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

Figure 39. Load Transient, V

Load Current Rise Time = 200 ns

Figure 40. Load Transient, V

Load Current Rise Time = 200 ns

= 1.8 V,100 mA to 300 mA,

OUT

= 3.3 V, 300 mA to 800 mA,

OUT

Figure 42. Load Transient, V

Load Current Rise Time = 200 ns

Figure 43. Load Transient, V

Load Current Rise Time = 200 ns

= 3.3 V, 10 mA to 110 mA,

OUT

= 3.3 V, 100 mA to 300 mA,

OUT

Figure 41. Load Transient, V

Load Current Rise Time = 200 ns

= 3.3 V, 10 mA to 800 mA,

OUT

Figure 44. Load Transient, V

Load Current Rise Time = 200 ns, V

= 1.2 V, 300 mA to 800 mA,

OUT

= 5 V

IN

Rev. A | Page 14 of 32

Data Sheet ADP2370/ADP2371

M40.0µs A CH1 320mA

T 72.00%

09531-045

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 100mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

1

2

3

M10.0µs A CH1 112mA

T 50.40%

09531-046

CH1 100mA Ω

B

W

CH3 500mA Ω

B

W

CH2 20.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

1

2

3

M20.0µs A CH1 220mA

1

2

3

T 50.40%

09531-047

CH1 100mA Ω

B

W

CH3 200mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M20.0µs A CH1 530mA

1

2

3

T 10.00%

09531-048

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 100mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M40.0µs A CH1 320mA

1

2

3

T 72.00%

09531-049

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 200mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M20.0µs A CH1 80.0mA

T 50.40%

09531-050

CH1 100mA Ω

B

W

CH3 200mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

1

2

3

Figure 45. Load Transient, V

Figure 46. Load Transient, V

= 1.2 V, 10 mA to 800 mA, Load Current Rise

OUT

Time = 200 ns, V

= 1.2 V,10 mA to 110 mA, Load Current Rise

OUT

Time = 200 ns, V

= 5 V

IN

= 5 V

IN

Figure 48. Load Transient, V

Figure 49. Load Transient, V

= 5 V, 300 mA to 800 mA, Load Current Rise

OUT

Time = 200 ns, V

= 5 V, 1 mA to 800 mA, Load Current Rise

OUT

Time = 200 ns, V

= 8 V

IN

= 8 V

IN

Figure 47. Load Transient, V

= 1.2 V,100 mA to 300 mA, Load Current Rise

OUT

Time = 200 ns, V

= 5 V

IN

Figure 50. Load Transient, V

Rev. A | Page 15 of 32

= 5 V,10 mA to 110 mA, Load Current Rise

OUT

Time = 200 ns, V

= 8 V

IN

ADP2370/ADP2371 Data Sheet

M20.0µs A CH1 208mA

1

2

3

T 30.40%

09531-051

CH1 200mA Ω

B

W

CH3 200mA Ω

B

W

CH2 100mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

M100µs A CH1 2.50V

1

2

3

T 10.00%

09531-052

CH1 5.00V

B

W

CH3 200mA Ω

B

W

CH2 1.00V

B

W

V

IN

V

OUT

INDUCTOR CURRENT

M100µs A CH1 2.50V

1

2

3

T 10.00%

09531-053

CH1 5.00V

B

W

CH3 500mA Ω

B

W

CH2 1.00V

B

W

V

IN

V

OUT

INDUCTOR CURRENT

M100µs A CH1 2.50V

T 10.00%

09531-054

CH1 5.00V

B

W

CH3 200mA Ω

B

W

CH2 2.00V

B

W

V

IN

V

OUT

INDUCTOR CURRENT

1

2

3

M100µs A CH1 2.50V

T 10.00%

09531-055

CH1 5.00V

B

W

CH2 2.00V

B

W

V

IN

V

OUT

INDUCTOR CURRENT

1

2

3

CH3 500mA Ω

B

W

M100µs A CH1 2.50V

T 10.00%

09531-056

CH1 5.00V

B

W

CH3 200mA Ω

B

W

CH2 1.00V

B

W

V

IN

V

OUT

1

2

3

INDUCTOR CURRENT

Figure 51. Load Transient, V

Figure 52. Startup, V

= 5 V, 100 mA to 300 mA, Load Current Rise

OUT

Time = 200 ns, V

= 8 V

IN

= 1.8 V, 10 mA

OUT

Figure 54. Startup, V

Figure 55. Startup, V

= 3.3 V, 10 mA

OUT

= 3.3 V, 800 mA

OUT

Figure 53. Startup, V

= 1.8 V, 800 mA

OUT

Figure 56. Startup, V

= 1.2 V, 10 mA, VIN = 5 V

OUT

Rev. A | Page 16 of 32

Data Sheet ADP2370/ADP2371

M100µs A CH1 2.50V

T 10.00%

09531-057

CH1 5.00V

B

W

CH3 500mA Ω

B

W

CH2 500mV

B

W

V

IN

V

OUT

INDUCTOR CURRENT

1

2

3

M100µs A CH1 2.50V

T 10.00%

09531-058

CH1 5.00V

B

W

CH3 200mA Ω

B

W

CH2 2.00mV

B

W

V

IN

V

OUT

INDUCTOR CURRENT

1

2

3

M100µs A CH1 2.50V

T 10.00%

09531-059

CH1 5.00V

B

W

CH3 500mA Ω

B

W

CH2 2.00mV

B

W

V

IN

V

OUT

INDUCTOR CURRENT

1

2

3

0

50

100

150

200

250

3 5 7 9 11 13 15

PSM TO PWM THRE S HOLD (mA)

INPUT VOLTAGE (V)

–40°C
–5°C
+25°C
+85°C
+125°C

09531-060

800

850

900

950

1000

1050

1100

1150

1200

–60 –40 –20 0 20 40 60 80 100 120 140

OC THRESHOLD (mA)

TEMPERATURE (°C)

5.4V

7.2V

12.0V

15.0V

09531-061

0

0.02

0.04

0.05

0.01

0.03

0 100 200 300 400 500 600 700 800

RIPPLE VOLTAGE (mV p-p)

LOAD CURRENT (mA)

3.2V

5.0V

9.0V
15V

09531-062

Figure 57. Startup, V

Figure 58. Startup, V

= 1.2 V, 800 mA, VIN = 5 V

OUT

= 5 V, 10 mA, VIN = 7 V

OUT

Figure 60. PSM to PWM Mode Transition vs. Input Voltage,

Different Temperatures

Figure 61. Overcurrent Limit vs. Temperature, V

OUT

= 5 V,

Different Input Voltages

Figure 59. Startup, V

OUT

= 5 V, 800 mA, VIN = 7 V

Rev. A | Page 17 of 32

Figure 62. Output Ripple vs. Load Current, V

Voltages, Automatic Mode

= 1.2 V, Different Input

OUT

ADP2370/ADP2371 Data Sheet

0

0.02

0.04

0.05

0.01

0.03

0 100 200 300 400 500 600 700 800

RIPPLE VOLTAGE (mV p-p)

LOAD CURRENT (mA)

3.2V

5.0V

9.0V
15V

09531-063

0

0.04

0.06

0.08

0.02

0 100 200 300 400 500 600 700 800

RIPPLE VOLTAGE (mV p-p)

LOAD CURRENT (mA)

4.5V

5.0V

9.0V
15V

09531-064

0

0.04

0.06

0.08

0.10

0.02

0 100 200 300 400 500 600 700 800

RIPPLE VOLTAGE (mV p-p)

LOAD CURRENT (mA)

5.8V

6.0V

9.0V
15V

09531-065

0

0.005

0.010

0.015

0.020

0.025

0 100 200 300 400 500 600 700 800

RIPPLE VOLTAGE (mV p-p)

LOAD CURRENT (mA)

4V
5V
9V
15V

09531-066

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

–40 –20 0 20 40 60 80 100 120

RDS

ON

(Ω)

TEMPERATURE (°C)

3.0V

3.5V

4.0V

5.0V

6.0V

7.0V

10.0V

09531-067

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

–40 –20 0 20 40 60 80 100 120

RDS

ON

(Ω)

TEMPERATURE (°C)

3.0V

3.5V

4.0V

5.0V

6.0V

7.0V

10.0V

09531-068

Figure 63. Output Ripple vs. Load Current, V

Voltages, Automatic Mode

Figure 64. Output Ripple vs. Load Current, V

Voltages, Automatic Mode

= 1.8 V, Different Input

OUT

= 3.3 V, Different Input

OUT

Figure 66. Output Ripple vs. Load Current, V

= 3.3 V, Different Input

OUT

Voltages, Force PWM Mode

Figure 67. PMOS RDSON vs. Temperature at 400 mA, Different Input Voltages

Figure 65. Output Ripple vs. Load Current, V

Voltages, Automatic Mode

= 5 V, Different Input

OUT

Figure 68. NMOS RDSON vs. Temperature at 400 mA, Different Input Voltages

Rev. A | Page 18 of 32

Data Sheet ADP2370/ADP2371

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

3 4 5 6 7 8 9 10

RDS

ON

(Ω)

INPUT VOLTAGE (V)

09531-069

–40°C

–5°C

+25°C

+85°C

+125°C

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

3 4 5 6 7 8 9 10

RDS

ON

(Ω)

INPUT VOLTAGE (V)

09531-070

–40°C

–5°C

+25°C

+85°C

+125°C

Figure 69. PMOS RDSON vs. Input Voltage at 400 mA, Different Temperatures

Figure 70. NMOS RDSON vs. Input Voltage at 400 mA, Different Temperatures

Rev. A | Page 19 of 32

ADP2370/ADP2371 Data Sheet

SLOPE COMP

OSCILLATOR

DEFAULT = 1.2MHz

VOUT ÷ 2 FRE QUENCY

FOLDBACK

CONTROL

LOGIC

ADP2371

ONLY

SOFT

START

1.2V

EN

VIN

SW

PGND

FB

SYNC

FSEL

PG

1.0V

STANDBY

EN_PREC

VIN

200mA

Kr

UVLO

VIN

PWM

PSM

0.808V

0.8V

VIN

1.2A

VIN

5V

REG

VIN

2.95V

0.736V

0.8V

0.696V

150°C
135°C

H = FPWM
L = PWM/PSM

H = 1.2MHz
L = 600kHz

THSD

FB

I

SLOPE

RDS

ON

× Kr

RDS

ON

× Kr

P_I

LIMIT

N_I

LIMIT

–0.5A – (PWM)

0A – (PSM)

I

MIN

V

SW

g

M

V

COMP

I

COMP

V

TOL

09531-071

SW

OUT

f

V

L

×

×

=

478.0

2.1

THEORY OF OPERATION

The ADP2370/ADP2371 use a high speed, current mode, con­stant frequency PWM control scheme for excellent stability and
transient response. To ensure the longest battery life in portable
applications, the ADP2370/ADP2371 has a power saving mode.
Under light load conditions, the output capacitor is charged as
needed to maintain regulation; otherwise, the ADP2370/ADP2371
enter sleep mode, a low 14 μA quiescent state. The architecture
ensures smooth transitions from PWM mode to and from PSM,
and maintains high efficiencies at light loads. The following sec­tions describe the two modes of operation and provide detailed
descriptions of the ADP2370/ADP2371 features.

PWM OPERATION

The ADP2370/ADP2371 PWM mode is a fixed frequency,

1.2 MHz typical, current mode architecture. Use the SYNC pin
to synchronize the regulator to an external clock frequency or
use the FSEL pin to select an internal clock frequency of
600 kHz or 1.2 MHz.

Figure 71. Functional Block Diagram

The ADP2370/ADP2371 use a constant slope compensation
scheme where the inductor scales with the output voltage. The
equation for choosing the inductor for a particular output
voltage is

See the Applications Information section for details regarding
choosing an appropriate inductor value.

Cycle to cycle operation of the PWM mode begins with the
falling edge of the internal clock. Note that when using an
external clock, the rising edge synchronizes the regulator and
the falling edge is determined by the internal clock, typically a
25 ns pulse width. The falling edge of the clock starts the cycle
by turning on the high-side switch, which produces a positive
di/dt current in the inductor. The PWM comparator controls
when the high-side switch turns off. The positive input of the
comparator monitors the peak inductor current via the SW node.

Rev. A | Page 20 of 32

M20.00µs A CH1 156mA

T 50.40%

09531-072

CH1 200mA Ω

B

W

CH3 200mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

1

2

3

M20.00µs A CH1 156mA

T 50.40%

09531-073

CH1 200mA Ω

B

W

CH3 200mA Ω

B

W

CH2 50.0mV

B

W

V

OUT

INDUCTOR CURRENT

1

2

3

LOAD CURRENT

Data Sheet ADP2370/ADP2371

The negative side of the comparator input voltage is set by the
voltage control loop minus the slope compensation. When the
high-side switch turns off, the low-side switch turns on for the
remainder of the clock period.

While in PWM/PSM mode, the low-side switch turns off when
the inductor current reaches zero, operating in discontinuous
conduction (DCC) mode. If SYNC is tied high to force the device
into PWM only mode, the low-side switch stays on until the
next clock cycle or until the inductor current reaches the
negative current limit.

PSM OPERATION

The ADP2370/ADP2371 smoothly transition to the variable
frequency PSM operation. The ADP2370/ADP2371 select a
minimum current value, I
based on the input and output voltages. The design of the I

, for the peak current of the inductor

MIN

MIN

value is based on the recommended inductor values. Deviating
from the recommended inductor value for a particular output
voltage results in shifting the PSM to PWM threshold and could
result in the device entering DCC mode.

As long as the required peak inductor current is above I

MIN

, the
regulator remains in PWM mode. As the load decreases, the
PSM circuitry prevents the peak inductor current from dropping
below the PSM peak current value. This circuitry causes the
regulator to supply more current to the output filter than the
load requires, resulting in the output voltage increasing and the
output of the internal compensation node of the error amplifier,
V

, decreasing.

COMP

When the FB pin voltage rises above 1% of the nominal output
voltage and the V

node voltage is below a predetermined

COMP

PSM threshold voltage level, the regulator enters sleep mode.
While in sleep mode, the high-side and low-side switches and a
majority of the circuitry are disabled to allow for a low sleep
mode quiescent current as well as high efficiency performance.

During sleep mode, the output voltage decreases as the output
capacitor discharges into the load. Fixed frequency operation
starts when the FB voltage reaches the nominal output voltage.
When the load requirement increases past the I
level, the V

node rises and the PWM control loop sets the

COMP

peak current

MIN

duty cycle. While the part is entering and exiting sleep mode,
the PSM voltage ripple is larger than 1% because of the delay in
the comparators.

Figure 72 and Figure 73 illustrate how the output voltage and
inductor current change with loads and transitions in and out of
PSM operation. The output voltage ripple in PSM is ~40 mV p-p,
and the ripple in PWM is <10 mV p-p.

Figure 72. PSM to PWM Transition Waveforms, V

10 mA Load to 300 mA Load

Figure 73. PWM to PSM Transition Waveforms, V

300 mA Load to 10 mA Load

= 1.8 V,

OUT

= 1.8 V,

OUT

Rev. A | Page 21 of 32

ADP2370/ADP2371 Data Sheet

FEATURES DESCRIPTIONS

PRECISION ENABLE

The enable circuit of the ADP2370/ADP2371 minimizes the
input current during shutdown and simultaneously provides
an accurate enable threshold. When the enable input voltage
is below 400 mV, the regulators are in shutdown mode and the
supply current is typically 1.2 μA. As the enable input voltage
rises above the standby enable threshold of 1.0 V, the internal
bias currents and voltages are activated, turning on the precision
enable circuitry. This allows the precision enable circuitry to
detect accurately when the EN pin voltage exceeds the precision
enable rising threshold of 1.2 V.

FORCED PWM OR PWM/PSM SELECTION

Connecting the SYNC pin to a voltage greater than 1.2 V forces
the device to operate permanently in the PWM mode. This means
that the ADP2370/ADP2371 continue to operate at a fixed fre­quency even when the output current is less than the PWM/PSM
threshold. In PWM mode, the efficiency is lower compared to the
PSM mode during light loads. The low-side NMOS remains on
when the output current drops to less than zero thereby preventing
the device from entering discontinuous conduction (DCC) mode.

It is possible to switch from FPWM mode to the power-save
mode during operation by pulling the SYNC pin low. The
flexible configuration of the SYNC pin during operation of
the device allows for efficient power management.

Connecting the SYNC pin to a voltage less than 0.4 V allows
the part to operate in either PWM or PSM modes, depending on
the output current. Whenever the average output current goes
below the PWM/PSM threshold, the ADP2370/ADP2371 enter
PSM mode operation. During PSM mode the part operates with
reduced switching frequency and with a minimal quiescent cur­rent to maintain high efficiency. The low-side NMOS turns off
when the output current reaches zero, causing the part to operate
in DCC mode.

QUICK OUTPUT DISCHARGE (QOD) FUNCTION

The ADP2371 includes an output discharge resistor that forces the
output voltage to zero when the buck is disabled. This ensures
that the output of the buck is always in a well-defined state, whether
or not it is enabled. The ADP2370 does not include this output
discharge function.

SHORT-CIRCUIT PROTECTION

The ADP2370/ADP2371 include frequency foldback to prevent
output current runaway on a hard short. When the voltage at
the feedback pin falls below 0.3 V, indicating the possibility of
a hard short at the output, the switching frequency is reduced
to 1/4 of the internal oscillator frequency. The reduction in the
switching frequency gives more time for the inductor to dis­charge, preventing a runaway of output current.

UNDERVOLTAGE LOCKOUT

To protect against battery discharge, an undervoltage lockout
(UVLO) circuit is incorporated into the ADP2370/ADP2371.
When the input voltage drops below the UVLO threshold, the

ADP2370/ADP2371 shuts down, and both the power switch

and synchronous rectifier turn off. Once the input voltage rises
above the UVLO threshold, the soft start period is initiated and
the device is enabled.

THERMAL PROTECTION

In the event that the junction temperature on either the ADP2370
or ADP2371 rises above 150°C, the thermal shutdown protec­tion circuit turns off the regulator. Extreme junction temperature
can be the result of high current operation, poor circuit board
design, and/or high ambient temperature. A 20°C hysteresis is
included in the protection circuit so that when a thermal shut­down occurs, the device does not return to operation until the
on-chip temperature drops below 130°C. When exiting a
thermal shutdown, soft start is initiated.

SOFT START

The ADP2370/ADP2371 have an internal soft start function
that ramps the output voltage in a controlled manner upon
startup, thereby limiting the inrush current. This prevents
possible input voltage drops when a battery or a high imped­ance power source is connected to the input of the converter.
Typical soft start time is 350 μs. The ADP2370/ADP2371 are
also capable of starting up into a precharged output capacitor.
If soft start is invoked when the output capacitor charge is greater
than zero, the device delays the start of switching until the internal
soft start ramp reaches the corresponding FB voltage. This fea­ture prevents discharging the output capacitor at the beginning
of soft start.

CURRENT LIMIT

The ADP2370/ADP2371 have protection circuitry that limits
the direction and amount of current to 1200 mA that flows
through the power switch and synchronous rectifier, cycle by
cycle. The positive current limit on the power switch limits the
amount of current that can flow from the input to the output.
The negative current limit on the synchronous rectifier prevents
the inductor current from reversing direction and flowing out
of the load.

A negative current limit is provided by the ADP2370/ADP2371
to prevent an excessive reverse inductor current when the switching
section sinks current from the load in forced continuous con­duction mode. Under negative current-limit conditions, both
the high-side and low-side switches are disabled.

Rev. A | Page 22 of 32

Data Sheet ADP2370/ADP2371

M2.00ms A CH1 4.90V

T 32.20%

09531-074

CH1 1.00V

B

W

CH3 50.0mA Ω

B

W

CH2 1.00V

B

W

V

IN

V

OUT

INDUCTOR CURRENT

1

2

3

M2.00ms A CH1 4.90V

T 32.20%

09531-075

CH1 1.00V

B

W

CH3 50.0mA Ω

B

W

CH2 1.00V

B

W

V

IN

V

OUT

INDUCTOR CURRENT

1
2

3

1 2 3

INTERNAL 1.2MHZ

INTERNAL 600kHZ

SYNC

PWM CLOCK (IF FSEL = 1)

PWM CLOCK FOLLOWS SYNC UNTIL IT MISSES
4 × 1.2MHZ INTERNAL CLOCK CYCLES

PWM CLOCK (IF FSEL = 0)

4

09531-076

M20.0µs A CH4 2.00V

T 20.0%

09531-077

CH1 5.00V

B

W

CH3 200mA Ω

B

W

CH4 5.00V

B

W

CH2 100mV

B

W

SW

V

OUT

INDUCTOR CURRENT

SYNC

1

2

3

4

M20.0µs A CH4 2.00V

T 20.0%

09531-078

CH1 5.00V

B

W

CH3 200mA Ω

B

W

CH4 5.00V

B

W

CH2 50.0mV

B

W

SW

V

OUT

INDUCTOR CURRENT

SYNC

1

2

3

4

100% DUTY CYCLE

The ADP2370/ADP2371 enter and exit 100% duty cycle smoothly.
The control loop seeks the next clock cycle while the high-side
switch is engaged. When this occurs, the clock signal is masked
and the PMOS remains on. When the input voltage increases, the
internal V
the device stops skipping clock cycles and exits 100% duty cycle.

node decreases its signal to the control loop; thus,

COMP

If the device is synchronized to an external clock, the PSM
mode is disabled and the device stays in forced PWM mode.
Connect FSEL to ground when synchronizing to a frequency
range from 400 kHz to 800 kHz, and connect FSEL to the input
voltage when the external frequency is in the range of 800 kHz
to 1600 kHz. FSEL has an internal pull-down resistor and
defaults to the 600 kHz mode when FSEL is unconnected.

Figure 74. Transition into and out of Dropout in PSM Mode,

Figure 75. Transition into and out of Dropout in PWM Mode,

SYNCHRONIZING

It is possible to synchronize the ADP2370/ADP2371 to an external
clock within a frequency range from 400 kHz to 1.6 MHz. The
device automatically detects the rising edge of the first clock
and synchronizes to the external clock. When the clock signal
stops, the device automatically switches back to the internal
clock and continues operating.

The switchover is initiated when no rising edge on the SYNC
pin can be detected on the internal clock for a duration of four
clock cycles. Therefore, the maximum delay time can be 6.7 µs if
the internal clock is running at its minimum frequency of 600 kHz.
During this time, there is no clock signal available. The output
stops switching until the ADP2370 circuitry switches to the
internal clock signal.

V

= 5 V, 100 mA Load

OUT

V

= 5 V, 100 mA Load

OUT

Figure 76. Typical SYNC Timing

Figure 77. Typical SYNC Transient, 1.2 MHz to 800 kHz to 1.2 MHz

Figure 78. SYNC Transient 1.2 MHz to 800 kHz

Rev. A | Page 23 of 32

ADP2370/ADP2371 Data Sheet

M2.00µs A CH2 –57.0mV

T 20.0%

09531-079

CH1 5.00V

B

W

CH3 200mA Ω

B

W

CH4 5.00V

B

W

CH2 50.0mV

B

W

SW

V

OUT

INDUCTOR CURRENT

SYNC

1

2

3

4

M40.0µs A CH3 3. 40V

T 10.00%

09531-080

CH1 500mV

B

W

CH3 5.00V

B

W

CH2 1.00V

B

W

V

OUT

PG

ENABLE

3

2

1

M1.00µs A CH3 740mA

T 10.00%

09531-081

CH1 500mV

B

W

CH3 500mAΩ

B

W

CH2 1.00V

B

W

V

OUT

PG

LOAD CURRENT

1

2

3

Figure 79. SYNC Transient 800 kHz to 1.2 MHz

POWER GOOD

The ADP2370/ADP2371 power-good (PG) output indicates the
state of the monitored output voltage. The PG function is an active
high, open-drain output, requiring an external pull-up resistor that
is typically supplied from the I/O supply rail, as shown in Figure 1.

When the sensed output voltage is below 87% of its nominal value,
the PG pin is held low. When the sensed output voltage rises above
92% of the nominal level, the PG line is pulled high after t
The PG pin remains high when the sensed output voltage is
above 92% of the nominal output voltage level.

The typical PG delay when the buck is in PWM mode is 20 μs.
Figure 80 shows the typical PG operation during startup. Figure 81
shows the PG operation when there is a large load transient that
causes the output voltage to fall just below the PG threshold.

When not using the PG function, remove the pull-up resistor
and leave the PG pin either open or shorted to ground.

RESET

.

Figure 80. Typical PG Timing at Startup

Figure 81. Typical PG Timing with 200 mA to 1100 mA Load Transient

Rev. A | Page 24 of 32

Data Sheet ADP2370/ADP2371

SW

OUT

f

V

L

×

×

=

478.0

2.1















−×

×

=∆

IN

OUT

SW

OUT

L

V

V

Lf

V

I 1

)

2

(

)(LMAXLOAD

PK

III∆

+=

L

RIPPLE

COUT

I

V

ESR

Δ

≤

RIPPLE

SW

IN

OUT

VLf

V

C

××××

≥

2)2(

π

RIPPLE

SW

L

OUT

Vf

I

C

××

∆

≥

8

IN

OUT

IN

OUT

MAXLOAD

CIN

V

VVV

II

)(

)(

−

≥

IN

OUT

IN

OUT

MAXLOAD

V

VVV

IrmsI

)(

)(

−

≥

APPLICATIONS INFORMATION

ADIsimPower DESIGN TOOL

ADP2370/ADP2371 are supported by the ADIsimPower™ design

tool set. ADIsimPower is a collection of tools that produce
complete power designs optimized for a specific design goal.
The tools enable the user to generate a full schematic, bill of
materials, and calculate performance in minutes. ADIsimPower
can optimize designs for cost, area, efficiency, and parts count
taking into consideration the operating conditions and limita­tions of the IC and all real external components. For more
information about, and to obtain ADIsimPower design tools,
visit www.analog.com/ADIsimPower. Users can also request
an unpopulated board through the ADIsimPower tool.

OUTPUT CAPACITOR

Output capacitance is required to minimize the voltage overshoot,
voltage undershoot, and the ripple voltage present on the output.
Capacitors with low equivalent series resistance (ESR) values
produce the lowest output ripple; therefore, use capacitors such as
the X5R dielectric. Do not use Y5V and Z5U capacitors. Y5V
and Z5U capacitors are unsuitable choices because of their large
capacitance variation over temperature and their dc bias voltage
changes. Because ESR is important, select the capacitor using
the following equation:

EXTERNAL COMPONENT SELECTION

Tabl e 6 and Tab le 7 list external component selections for the

ADP2370/ADP2371 application circuit shown in Figure 82. The

selection of components is dependent on the input voltage, output
voltage, and load current requirements. Additionally, trade-offs
among performance parameters, such as efficiency and transient
response, are made by varying the choice of external components.

SELECTING THE INDUCTOR

The high frequency switching of the ADP2370/ADP2371 allows
for the use of small surface-mount power inductors. The inductor
value affects the transition from PWM to PSM, efficiency, output
ripple, and current-limit values. Use the following equation to cal­culate the ideal inductance, which is derived from the inductor
current slope compensation, for a given output voltage and
switching frequency:

The ripple current is calculated as follows:

where:

is the switching frequency in MHz (1.2 MHz typical).

f

SW

L is the inductor value in μH.

The dc resistance (DCR) value of the selected inductor affects
efficiency; however, a decrease in this value typically means an
increase in root mean square (rms) losses in the core and skin.
A minimum requirement of the dc current rating of the inductor
is for it to be equal to the maximum load current plus half of
the inductor current ripple, as shown by the following equation:

where:

ESR
V

RIPPLE

Use the following equations to determine the output
capacitance:

Increasing the output capacitor value has no effect on stability
and may reduce output ripple and enhance load transient response.
When choosing the output capacitor value, it is important to
account for the loss of capacitance due to output voltage dc bias.

INPUT CAPACITOR

An input capacitor is required to reduce input voltage ripple, input
ripple current, and source impedance. Place the input capacitor
as close as possible to the VIN pin. A low ESR X7R- or X5R-type
capacitor is highly recommended to minimize the input voltage
ripple. Use the following equation to determine the rms input
current:

ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING

The ADP2370/ADP2371 feature an adjustable output voltage range
from 0.8 V to 12 V. The output voltage is set by the ratio of two
external resistors, R2 and R3, as shown in Figure 83. The device
servos the output to maintain the voltage at the FB pin at 0.8 V,
referenced to ground; the current in R2 is then equal to 0.8 V/R3
plus the FB pin bias current. The bias current of the FB pin,
10 nA at 25°C, flows through R2 into the FB pin.

The output voltage is calculated using the equation

Rev. A | Page 25 of 32

is the ESR of the chosen capacitor.

COUT

is the peak-to-peak output voltage ripple.

V

= 0.8 V(1 + R2/R3) + (FB

OUT

I-BIAS

)(R2)

IN

OUT

V

V

D =

FSEL

EN

POWER GOOD

6.8µH

V

OUT

= 3.3V

V

IN

= 6V

C

IN

10µF

C

OUT

10µF

AGND

(EXPOSED PAD)

VIN

SYNC

ON

OFF

ADP2370/

ADP2371

SW

PG

PGND

FB

1

2

3

4

8

7

6

5

09531-082

ADP2370/ADP2371 Data Sheet

To minimize errors in the output voltage caused by the bias
current of the FB pin, maintain a value of R2 that is less than
250 kΩ. For example, when R2 and R3 each equal 250 kΩ, the
output voltage is 1.6 V. The output voltage error introduced by
the FB pin bias current is 2.5 mV, or 0.156%, assuming a typical
FB pin bias current of 10 nA at 25°C.

Note that in shutdown mode, the output is turned off and the
divider current is zero.

Select the output inductor and capacitor as described in the
Selecting the Inductor, Output Capacitor, and Input Capacitor
sections, as well as Tab le 6 for more information.

EFFICIENCY

Efficiency is defined as the ratio of output power to input power.
The high efficiency of the ADP2370/ADP2371 has two distinct
advantages. First, only a small amount of power is lost in the
dc-to-dc converter package, which in turn, reduces thermal
constraints. Second, high efficiency delivers the maximum
output power for the given input power, thereby extending
battery life in portable applications.

Power Switch Conduction Losses

Power switch dc conduction losses are caused by the flow of
output current through the P-channel power switch and the
N-channel synchronous rectifier, which have internal resis­tances (R
loss is approximated by

where:

The internal resistance of the power switches increases with tem­perature and increases when the input voltage is less than 5.5 V.

Inductor Losses

Inductor conduction losses are caused by the flow of current
through the inductor, which has an internal resistance (DCR)
associated with it. Larger size inductors have smaller DCR,
which can decrease inductor conduction losses. Inductor core
losses relate to the magnetic permeability of the core material.
Because the ADP2370/ADP2371 are high switching frequency
dc-to-dc regulators, shielded ferrite core material is recommended
because of its low core losses and low EMI.

To estimate the total amount of power lost in the inductor, use
the following equation:

P

Switching Losses

Switching losses are associated with the current drawn by the
driver to turn-on and turn-off the power devices at the switching

) associated with them. The amount of power

DS(ON)

_

CONDSW

_)(_)(

NONDSPONDS

= DCR × I

L

2

+ Core Losses

OUT

2

))1((

IDRDRP ×−×+×=

OUT

Rev. A | Page 26 of 32

frequency. Each time a power device gate is turned on and turned
off, the driver transfers a charge from the input supply to the
gate, and then from the gate to ground.

Estimate switching losses using the following equation:

P

SW

= (C

GATE_P

+ C

GATE_N

) × V

2

IN

× fSW

where:

C

is the gate capacitance of the internal high-side switch.

GATE_P

C

is the gate capacitance of the internal low-side switch.

GATE_N

f

is the switching frequency.

SW

The typical value for gate capacitances, C

GATE _P

and C

is 150 pF.

Transition Losses

Transition losses occur because the P-channel switch cannot
turn on or turn off instantaneously. In the middle of an SW
node transition, the power switch provides all of the inductor
current. The source-to-drain voltage of the power switch is half
the input voltage, resulting in power loss. Transition losses
increase with both load current and input voltage and occur
twice for each switching cycle.

Use the following equation to estimate transition losses:

P

= VIN/2 × I

TRAN

× (tR + tF) × fSW

OUT

where:

t

is the rise time of the SW node.

R

t

is the fall time of the SW node.

F

The typical value for the rise and fall times, t

and tF, is 2 ns.

R

RECOMMENDED BUCK EXTERNAL COMPONENTS

The recommended external components for use with the

ADP2370/ADP2371 are listed

(capacitors).

Figure 82. Typical Application, 1.2 MHz, Fixed Output

in Tab le 6 (inductors) and Table 7

GATE _N

,

Data Sheet ADP2370/ADP2371

FSEL

EN

POWER GOOD

R1

10kΩ

R2

249kΩ

R3

200kΩ

6.8µH

V

OUT

= 1.8V

V

IN

= 6V

C

IN

10µF

C

OUT

10µF

AGND

(EXPOSED PAD)

VIN

SYNC

ADP2370/

ADP2371

SW

PG

PGND

FB

1

2

3

4

8

7

6

5

09531-083

ON

OFF

Coilcraft

XFL4020-332ME

1.2 MHz

1.5

3.1

3.3

4 × 4 × 2

3.1

38

Coilcraft

XAL4040-103ME

1.2 MHz

5

10.5

10

4 × 4 × 4

1.5

92

Murata

GRM32ER7YA106KA12

1210

35

Input or Output

<15 V

Figure 83. Typical Application, 600 kHz, Adjustable Output

Table 6. Inductors

Vendor Model Frequency

Output
Voltage

Ideal Value
(μH)

Standard Value
(μH)

Dimensions
(mm)

I

SAT

(A)

DCR
(mΩ)

Coilcraft XFL4020-222ME 1.2 MHz 1.2 2.5 2.2 4 × 4 × 2 4.1 24

Coilcraft XFL4020-332ME 1.2 MHz 1.8 3.8 3.3 4 × 4 × 2 3.1 38
Coilcraft XFL4020-472ME 1.2 MHz 2.5 5.2 4.7 4 × 4 × 2 2.0 57
Coilcraft XAL4030-682ME 1.2 MHz 3.0 6.3 6.8 4 × 4 × 3 1.9 74
Coilcraft XAL4030-682ME 1.2 MHz 3.3 6.9 6.8 4 × 4 × 3 1.9 74

Coilcraft LPS6235-183ML 1.2 MHz 9 18.8 18 6 × 6 × 3.5 1.7 14
Coilcraft XFL4020-472ME 600 kHz 1.2 5.0 4.7 4 × 4 × 2 2.0 57
Coilcraft XAL4030-682ME 600 kHz 1.5 6.3 6.8 4 × 4 × 3 1.9 74
Coilcraft XAL4030-682ME 600 kHz 1.8 7.5 6.8 4 × 4 × 3 1.9 74
Coilcraft XAL4040-103ME 600 kHz 2.5 10.5 10 4 × 4 × 4 1.5 92
Coilcraft XAL4040-103ME 600 kHz 3.0 12.6 10 4 × 4 × 4 1.5 92
Coilcraft XAL4040-153ME 600 kHz 3.3 13.8 15 4 × 4 × 4 1.3 120
Coilcraft LPS6235-223ML 600 kHz 5 20.9 22 6 × 6 × 3.5 1.6 145
Coilcraft LPS6235-333ML 600 kHz 9 37.7 33 6 × 6 × 3.5 1.3 130

Table 7. 10 μF Capacitors

Output

Vendor Model Case Size Voltage Rating Location Input Voltage

Voltage

Murata GRM32DR61E106KA12 1210 25 Input or Output <12 V
Murata GRM31CR61C106KA88 1206 16 Input or Output <8 V
Murata GRM32ER7YA106KA12 1210 35 Input or Output <12 V
Murata GRM32DR61E106KA12 1210 25 Input or Output <9 V
Murata GRM31CR61C106KA88 1206 16 Input or Output <7 V
Murata GRM21BR61C106KE15 0805 16 Output <2.5 V

Rev. A | Page 27 of 32

ADP2370/ADP2371 Data Sheet

M20.0µs A CH1 560mA

1

2

3

T 10.40%

09531-084

CH1 500mA Ω

B

W

CH3 500mA Ω

B

W

CH2 50.0mV

B

W

LOAD CURRENT

V

OUT

INDUCTOR CURRENT

0

1

2

3

4

5

6

7

8

9

10

11

12

0 5 10 15 20 25 30 35

CAPACITANCE (µF)

DC BIAS VOLTAGE (V)

10µF/25V/1210
10µF/35V/1210
10µF/16V/0805
10µF/16V/1206

09531-085

CAPACITOR SELECTION

Output Capacitor

The ADP2370/ADP2371 are designed for operation with small,
space-saving ceramic capacitors, but function with most commonly
used capacitors provided that the effective series resistance (ESR)
value is carefully considered. The ESR of the output capacitor
affects stability of the control loop. A minimum output capaci­tance of 7 µF with an ESR of 10 mΩ or less is recommended to
ensure stability of the ADP2370/ADP2371.

Transient response to changes in load current is also affected by
output capacitance. Using a larger value of output capacitance
improves the transient response of the ADP2370/ADP2371 to
large changes in load current. Figure 84 shows the transient
response for an output capacitance value of 10 µF.

Figure 85 depicts the capacitance vs. voltage bias characteristic
of a several 10 µF capacitors in different case sizes and voltage
ratings. The voltage stability of a capacitor is strongly influenced
by the capacitor size and voltage rating. In general, a capacitor in a
larger package or higher voltage rating exhibits better stability.
The temperature variation of the X5R dielectric is about ±15%
over the −40°C to +85°C temperature range and is not a
function of package or voltage rating.

Figure 84. Output Transient Response, V

300 mA to 800 mA, Load Current Rise Time = 200 ns

Input Bypass Capacitor

Connecting a 10 µF capacitor from VIN to GND reduces the
circuit sensitivity to the PCB layout, especially when long input
traces or high source impedance are encountered. If greater than
10 µF of output capacitance is required, increase the input
capacitor to match it to improve the transient response.

Input and Output Capacitor Properties

Use any good quality ceramic capacitors with the ADP2370/

ADP2371; however they must meet the minimum capacitance

and maximum ESR requirements. Ceramic capacitors are manu­factured with a variety of dielectrics, each with different behavior
over temperature and applied voltage. Capacitors must have a
dielectric adequate to ensure the minimum capacitance over the
necessary temperature range and dc bias conditions. X5R or X7R
dielectric capacitors with a voltage rating of 6.3 V to 25 V are
recommended for best performance. Y5V and Z5U dielectrics
are not recommended because of their poor temperature and dc
bias characteristics.

OUT2

= 1.8 V, C

= 10 µF,

OUT

Rev. A | Page 28 of 32

Figure 85. Capacitance vs. Voltage Characteristic Different Case Sizes

Use Equation 1 to determine the worst-case capacitance,
accounting for capacitor variation over temperature,
component tolerance, and voltage.

C

= C

EFF

× (1 − TEMPCO) × (1 − TOL) (1)

BIAS

where:
C

is the effective capacitance at the operating voltage.

BIAS

TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.

In this example, the worst-case TEMPCO over −40°C to +85°C
is assumed to be 15% for an X5R dielectric. The tolerance of the
capacitor (TOL) is assumed to be 10%, and C

is 8.53 μF at 12 V

BIAS

for the 10 μ F, 35 V capacitor in a 1210 package (see Figure 85).

Substituting these values in Equation 1 yields

C

= 8.53 μF × (1 − 0.15) × (1 − 0.1) = 6.53 μF

EFF

Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the ADP2370/ADP2371
over temperature and tolerance at the chosen output voltage.

To guarantee the performance of the ADP2370/ADP2371, it is
imperative that the effects of dc bias, temperature, and
tolerances of the capacitors are evaluated for each application.

Data Sheet ADP2370/ADP2371

25

35

45

55

65

75

85

95

105

115

125

135

145

0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50

JUNCTION TE M P E R ATURE (° C)

TOTAL POWER DISSIPATION (W)

6400mm

2

500mm

2

100mm

2

T

J

MAX

09531-086

0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00

JUNCTION TE M P E R ATURE (° C)

TOTAL POWER DISSIPATION (W)

09531-087

50

60

70

80

90

100

110

120

130

140

6400mm

2

500mm

2

100mm

2

TJMAX

0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00

JUNCTION TE M P E R ATURE (° C)

TOTAL POWER DISSIPATION (W)

09531-088

6400mm

2

500mm

2

100mm

2

TJMAX

65

75

85

95

105

115

125

135

145

THERMAL CONSIDERATIONS

In most applications, the ADP2370/ADP2371 do not dissipate
much heat due to their high efficiency. However, in applications
with high ambient temperature and high supply voltage-to-output
voltage differential, the heat dissipated in the package may be
large enough to cause the junction temperature of the die to
exceed the 125°C maximum.

If the junction temperature of the ADP2370/ADP2371 exceeds
150°C, the regulator enters thermal shutdown. The regulator
recovers only after the junction temperature has fallen below
130°C, this helps to prevent any permanent damage to the IC.
Thermal analysis for the chosen application is clearly very
important to guarantee reliable operation under all conditions.
The junction temperature of the die is the sum of the ambient
temperature of the environment and the temperature rise of the
package due to the power dissipation, as shown in Equation 2.

To guarantee reliable operation, the junction temperature of the

ADP2370/ADP2371 must not exceed 125°C. To ensure the junc-

tion temperature stays below this maximum value, the user must
be aware of the parameters that contribute to junction temperature
changes. These parameters include ambient temperature, power
dissipation in the power device, and the thermal resistance between

the junction and ambient air (θ

on the package assembly compounds that are used and the amount
of PCB copper soldered to the package GND and EPAD. Tab le 8
shows typical θ
various PCB copper sizes.

Table 8. Typical θ

Copper Size (mm2) θJA (°C/W)
251 162.2
100 124.1
500 68.7
1000 56.5
6400 42.4

1

The device is soldered to minimum size pin traces.

The junction temperature of the ADP2370/ADP2371 is
calculated from the following equation:

T

= TA + (PD × θJA) (2)

J

where:

T

is the ambient temperature.

A

P

is the total power dissipation in the die, given by

D

= P

P

D

where:

P

, P

SW

TRAN

values of the 8-lead, 3 mm × 3 mm LFCSP for

JA

Values

JA

BUCK

, and P

= PSW + P

SW_COND

+ P

TRAN

are defined in the Efficiency section.

). The θJA number is dependent

JA

(3)

SW_CO ND

For a given ambient temperature and total power dissipation,
there exists a minimum copper size requirement for the PCB to
ensure the junction temperature does not rise above 125°C. The
following figures (Figure 86 to Figure 89) show junction
temperature calculations for different ambient temperatures,
total power dissipation, and areas of PCB copper.

Rev. A | Page 29 of 32

Figure 86. Junction Temperature vs. Power Dissipation, T

Figure 87. Junction Temperature vs. Power Dissipation, T

Figure 88. Junction Temperature vs. Power Dissipation, T

= 25°C

A

= 50°C

A

= 65°C

A

ADP2370/ADP2371 Data Sheet

0 0.2 0.60.4 0.8 1.0

JUNCTION TE M P E R ATURE (° C)

TOTAL POWER DISSIPATION (W)

09531-089

6400mm

2

500mm

2

100mm

2

T

J

MAX

85

95

105

115

125

135

20

40

60

80

100

120

140

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

JUNCTION TE M P E R ATURE (° C)

TOTAL POWER DISSIPATION (W)

25°C
50°C
65°C
85°C

TJMAX

PCB LAYOUT CONSIDERATIONS

Improve heat dissipation from the package by increasing
the amount of copper attached to the pins of the ADP2370/

ADP2371. However, as listed in Table 8, a point of diminishing

returns is eventually reached, beyond which an increase in the
copper size does not yield significant heat dissipation benefits.

Poor layout can affect the ADP2370/ADP2371 buck performance
causing electromagnetic interference (EMI), poor electromagnetic
compatibility (EMC) performance, ground bounce, and voltage
losses; thus, regulation and stability can be affected. Implement
a good PCB layout to ensure optimum performance by applying
the following rules:

Figure 89. Junction Temperature vs. Power Dissipation, T

= 85°C

A

In cases where the board temperature is known, use the thermal
characterization parameter, Ψ
ature rise. Maximum junction temperature (T
from the board temperature (T

, to estimate the junction temper-

JB

) is calculated

J

) and power dissipation (PD)

B

using the formula:

T

= TB + (PD × ΨJB) (5)

J

The typical Ψ

value for the 8-lead, 3 mm × 3 mm LFCSP is

JB

22.2° C /W.

• Place the inductor, input capacitor, and output capacitor

close to the IC using short tracks. These components carry
high switching frequencies and long, large tracks act like
antennas.

• Route the output voltage path away from the inductor and

SW node to minimize noise and magnetic interference.

• Use a ground plane with several vias connected to the

component-side ground to reduce noise interference on
sensitive circuit nodes.

• Use of 0402-size or 0603-size capacitors achieves the smallest

possible footprint solution on boards where area is limited.

Figure 90. Junction Temperature vs. Power Dissipation,

Different Board Temperatures

09531-090

Rev. A | Page 30 of 32

Data Sheet ADP2370/ADP2371

09531-091

09531-092

Figure 91. PCB Layout, Top

Figure 92. PCB Layout, Bottom

Rev. A | Page 31 of 32

ADP2370/ADP2371 Data Sheet

112008-A

PIN 1
INDICATOR
(R 0.2)

EXPOSED

PAD

BOTTOM VIEW

TOP VIEW

1

4

8

5

INDEX

AREA

3.00

BSC SQ

SEATING

PLANE

0.80

0.75

0.70

0.30

0.25

0.18

0.05 MAX

0.02 NOM

0.80 MAX

0.55 NOM

0.20 REF

0.50 BSC

COPLANARITY

0.08

2.48

2.38

2.23

1.74

1.64

1.49

0.50

0.40

0.30

COMPLIANTTOJEDEC STANDARDS MO - 229- WEED-4

FOR PROPE R CONNECTION O F
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DE S CRIPTIONS
SECTION OF THIS DATA SHEET.

ADP2371ACPZ-1.2-R7

1.2 with QOD

−40°C to +125°C

8-Lead LFCSP

CP-8-5

LLJ

©2012 Analog Devices, Inc. All rights reserved. Trademarks and

PACKAGING AND ORDERING INFORMATION

OUTLINE DIMENSIONS

Figure 93. 8-Lead Lead Frame Chip Scale Package [LFCSP]

Dimensions shown in millimeters

(CP-8-5)

ORDERING GUIDE

Model1 Buck Output Voltage (V) Temperature Range Package Description Package Option Branding

ADP2370ACPZ-1.2-R7 1.2 −40°C to +125°C 8-Lead LFCSP CP-8-5 LL4
ADP2370ACPZ-1.5-R7 1.5 −40°C to +125°C 8-Lead LFCSP CP-8-5 LL5
ADP2370ACPZ-1.8-R7 1.8 −40°C to +125°C 8-Lead LFCSP CP-8-5 LL6
ADP2370ACPZ-2.5-R7 2.5 −40°C to +125°C 8-Lead LFCSP CP-8-5 LL7
ADP2370ACPZ-3.0-R7 3.0 −40°C to +125°C 8-Lead LFCSP CP-8-5 LL8
ADP2370ACPZ-3.3-R7 3.3 −40°C to +125°C 8-Lead LFCSP CP-8-5 LL9
ADP2370ACPZ-5.0-R7 5.0 −40°C to +125°C 8-Lead LFCSP CP-8-5 LLB
ADP2370ACPZ-R7 Adjustable −40°C to +125°C 8-Lead LFCSP CP-8-5 LGZ

ADP2371ACPZ-1.8-R7 1.8 with QOD −40°C to +125°C 8-Lead LFCSP CP-8-5 LLK
ADP2371ACPZ-3.3-R7 3.3 with QOD −40°C to +125°C 8-Lead LFCSP CP-8-5 LLL
ADP2371ACPZ-R7 Adjustable with QOD −40°C to +125°C 8-Lead LFCSP CP-8-5 LLM
ADP2370CPZ-REDYKIT REDYKIT

1

Z = RoHS Compliant Part.

registered trademarks are the property of their respective owners.
D09531-0-5/12(A)

Rev. A | Page 32 of 32