Datasheet ADP1712 Datasheet (ANALOG DEVICES)

300 mA, Low Dropout

A

2

F

A

FEATURES

Maximum output current: 300 mA Input voltage range: 2.5 V to 5.5 V Light load efficient

I

= 75 μA with 100 μA load

GND

Low shutdown current: <1 μA Very low dropout voltage: 170 mV @ 300 mA load Initial accuracy: ±1% Accuracy over line, load, and temperature: ±2% 16 fixed output voltage options with soft start:

0.75 V to 3.3 V (ADP1712)

Adjustable output voltage option: 0.8 V to 5.0 V

(ADP1712 Adjustable)

16 fixed output voltage options with reference bypass:

0.75 V to 3.3 V (ADP1713)

16 fixed output voltage options with tracking:

0.75 V to 3.3 V (ADP1714) Low output noise: 40 μV rms High PSRR: 72 dB @ 1 kHz Stable with small 2.2 μF ceramic output capacitor Excellent load/line transient response Current limit and thermal overload protection Logic controlled enable 5-lead TSOT package

APPLICATIONS

Mobile phones Digital camera and audio devices Portable and battery-powered equipment Post dc-dc regulation

GENERAL DESCRIPTION

The ADP1712/ADP1713/ADP1714, available in a tiny, 5-lead TSOT package, are low dropout linear regulators that operate from 2.5 V to 5.5 V and provide up to 300 mA of output current. The low 170 mV dropout voltage at a 300 mA load improves efficiency and allows operation over a wide input voltage range. Using a novel scaling architecture, ground current is a very low 75 μA when driving a 100 μA load, making the ADP1712/ ADP1713/ADP1714 ideal for battery-operated portable equipment.

The ADP1712/ADP1713/ADP1714 are available in 16 fixed output voltage options. The ADP1712 is also available in an adjustable version, which allows output voltages that range from

0.8 V to 5 V via an external divider. The ADP1712 fixed version allows an external capacitor to be connected to program the

CMOS Linear Regulator

ADP1712/ADP1713/ADP1714

TYPICAL APPLICATION CIRCUITS

ADP1712

1

2.2µF

IN

2

GND

3

EN

Figure 1. ADP1712 with Fixed Output Voltage and Soft-Start Capacitor, 3.3 V

DP1712

V

.2µ

IN

= 5.5V

ADJUSTABLE

1

IN

2

GND

3

EN

OUT

ADJ

Figure 2. ADP1712 with Adjustable Output Voltage, 0.8 V to 5.0 V

VIN = 3V

2.2µ

ADP1713

1

IN

2

GND

3

EN

OUT

BYP

Figure 3. ADP1713 with Fixed Output Voltage and Bypass Capacitor, 0.75 V

VIN = 3V

2.2µF

1

2

3

DP1714

IN

GND

EN

OUT

TRK

5

4

0V TO 5V

Figure 4. ADP1714 with Output Voltage Tracking

soft-start time. The ADP1713 allows a reference bypass capacitor to be connected, which reduces output voltage noise and improves power supply rejection. The ADP1714 includes a tracking feature, which allows the output to follow an external voltage rail or reference.

The ADP1712/ADP1713/ADP1714 are optimized for stable operation with small 2.2 μF ceramic output capacitors, allowing good transient performance while occupying minimal board space. An enable pin controls the output voltage on all devices, and an undervoltage lockout circuit disables the regulator if IN drops below a minimum threshold. The parts also have short circuit protection and thermal overload protection, which prevent damage to the devices in adverse conditions.

OUT

SS

V

OUT

V

OUT

5

4

2.2µF

5

4

V

= 3.3VVIN = 5V

OUT

5

2.2µF

10nF

4

= 0.8V(1 + R1/R2)

2.2µF

R1

R2

V

= 0.75V

OUT

2.2µF

10nF

V

(V)

OUT

3

2

1

0

12345

V

TRK

06455-001

06455-002

06455-003

(V)

06455-004

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADP1712/ADP1713/ADP1714

REVISION HISTORY

6/09—Rev. 0 to Rev. A

Updated Outline Dimensions ....................................................... 15

Changes to Ordering Guide .......................................................... 15

1/07—Revision 0: Initial Version

Adjustable Output Voltage (ADP1712 Adjustable) ............... 11

Bypass Capacitor (ADP1713) ................................................... 11

Track Mode (ADP1714) ............................................................ 11

Enable Feature ............................................................................ 11

Undervoltage Lockout (UVLO) ............................................... 11

Application Information ................................................................ 12

Capacitor Selection .................................................................... 12

Current Limit and Thermal Overload Protection ................. 12

Thermal Considerations ............................................................ 13

Printed Circuit Board Layout Considerations ....................... 14

Outline Dimensions ....................................................................... 15

Ordering Guide .......................................................................... 15

Rev. A | Page 2 of 16

ADP1712/ADP1713/ADP1714

SPECIFICATIONS

VIN = (V

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT VOLTAGE RANGE VIN T OPERATING SUPPLY CURRENT I I I I I I I I SHUTDOWN CURRENT I EN = GND, TJ = –40°C to +125°C 1.0 μA FIXED OUTPUT VOLTAGE V ACCURACY (ADP1712 FIXED, 100 μA < I ADP1713, AND ADP1714) ADJUSTABLE OUTPUT VOLTAGE V ACCURACY (ADP1712 ADJUSTABLE)1 100 μA < I LINE REGULATION ∆V LOAD REGULATION2 ∆V I DROPOUT VOLTAGE3 V I I I I

I

START-UP TIME4 T

ADP1712 Adjustable and ADP1714 70 μs ADP1712 External Soft Start CSS = 10 nF 7.3 ms

ADP1713 With 10 nF bypass capacitor 90 μs CURRENT LIMIT THRESHOLD5 I THERMAL SHUTDOWN THRESHOLD TSSD T

THERMAL SHUTDOWN HYSTERESIS TS

SOFT-START SOURCE CURRENT SS (ADP1712 WITH EXTERNAL SOFT START) UVLO AC TIVE THRESHOLD UVLO UVLO INACTIVE THRESHOLD UVLO UVLO HYSTERESIS UVLO V

OUT

+ 0.5 V) or 2.5 V (whichever is greater), I

OUT

to V

ACCURACY (ADP1714) V

TRK

= 10 mA, CIN = C

OUT

= –40°C to +125°C 2.5 5.5 V

J

I

GND

EN = GND 0.1 μA

GND-SD

I

OUT

I

OUT

/∆VIN VIN = (V

OUT

/∆I

OUT

I

DROPOUT

= 0 μA 60 μA

OUT

= 0 μA, TJ = –40°C to +125°C 70 μA

OUT

= 100 μA 75 μA

OUT

= 100 μA, TJ = –40°C to +125°C 85 μA

OUT

= 100 mA 210 μA

OUT

= 100 mA, TJ = –40°C to +125°C 250 μA

OUT

= 300 mA 365 μA

OUT

= 300 mA, TJ = –40°C to +125°C 420 μA

OUT

= 10 mA –1 +1 %

OUT

< 300 mA, TJ = –40°C to +125°C –2 +2 %

OUT

= 10 mA 0.792 0.8 0.808 V

OUT

< 300 mA, TJ = –40°C to +125°C 0.784 0.8 0.816 V

OUT

+ 0.5 V) to 5.5 V, TJ = –40°C to +125°C –0.25 +0.25 %/ V

OUT

I

= 10 mA to 300 mA 0.001 %/mA

OUT

= 10 mA to 300 mA, TJ = –40°C to +125°C 0.004 %/mA

OUT

= 100 mA, V

OUT

= 100 mA, V

OUT

= 300 mA, V

OUT

= 300 mA, V

OUT

= 100 mA, 2.5 V ≤ V

OUT

= 100 mA, 2.5 V ≤ V

I

OUT

= 2.2 μF, TA = 25°C, unless otherwise noted.

OUT

≥ 3.0 V 60 70 mV ≥ 3.0 V, TJ = –40°C to +125°C 80 mV ≥ 3.0 V 170 205 mV ≥ 3.0 V, TJ = –40°C to +125°C 230 mV

< 3.0 V 70 85 mV

OUT

< 3.0 V, TJ = –40°C to

OUT

95 mV

+125°C

= 300 mA, 2.5 V ≤ V

OUT

= 300 mA, 2.5 V ≤ V

I

OUT

< 3.0 V 200 235 mV

OUT

< 3.0 V, TJ = –40°C to

OUT

270 mV

+125°C

START-UP

380 500 700 mA

LIMIT

rising 150

J

15

SD-HYS

I-SOURCE

ACTIVE

INACTIVE VIN

HYS

TRK-ERROR

SS = GND 0.8 1.2 1.5 μA

VIN falling 2 V

rising 2.45 V

250 mV

0 V ≤ V

= –40°C to +125°C

T

J

0 V ≤ V

= –40°C to +125°C

T

J

≤ (0.5 × V

TRK

≤ (0.5 × V

TRK

OUT(NOM)

), V

OUT(NOM)

≤ 1.8 V,

> 1.8 V,

–40 +40 mV

–80 +80 mV

°C

Rev. A | Page 3 of 16

ADP1712/ADP1713/ADP1714

Parameter Symbol Conditions Min Typ Max Unit

EN INPUT LOGIC HIGH VIH 2.5 V ≤ VIN ≤ 5.5 V 1.8 V EN INPUT LOGIC LOW VIL 2.5 V ≤ VIN ≤ 5.5 V 0.4 V EN INPUT LEAKAGE CURRENT V ADJ INPUT BIAS CURRENT

(ADP1712 ADJUSTABLE) OUTPUT NOISE OUT

ADP1713

ADP1712 and ADP1714 10 Hz to 100 kHz, VIN = 5.0 V, V

POWER SUPPLY REJECTION RATIO PSRR

ADP1713

ADP1712 and ADP1714 1 kHz, VIN = 5.0 V, V

1

Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances

of resistors used.

2

Based on an end-point calculation using 10 mA and 300 mA loads. See for typical load regulation performance for loads less than 10 mA. Figure 10

3

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.5 V.

4

Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value.

5

Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.

EN = IN or GND 0.1 1 μA

I-LEAKAGE

30 100 nA

ADJ

I-BIAS

NOISE

10 Hz to 100 kHz, V

= 5.0 V, V

IN

= 0.75 V,

OUT

40 μV rms

with 10 nF bypass capacitor

= 3.3 V 380 μV rms

OUT

1 kHz, V

= 5.0 V, V

IN

= 0.75 V, with 10 nF

OUT

72 dB

bypass capacitor

= 3.3 V 65 dB

OUT

Rev. A | Page 4 of 16

ADP1712/ADP1713/ADP1714

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

IN to GND –0.3 V to +6 V OUT to GND –0.3 V to IN EN to GND –0.3 V to +6 V SS/ADJ/BYP/TRK to GND –0.3 V to +6 V Storage Temperature Range –65°C to +150°C Operating Junction Temperature Range –40°C to +125°C Lead Temperature, Soldering (10 sec) 300°C Soldering Conditions JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.

Table 3. Thermal Resistance

Package Type θJA Unit

5-Lead TSOT 170 °C/W

ESD CAUTION

Rev. A | Page 5 of 16

ADP1712/ADP1713/ADP1714

G

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

1

IN

ADP1712

FIXED

2

ND

TOP VIEW

(Not to Scale)

3 4

EN SS

5

OUT

5

06455-00

1

IN

ADP1712

ADJUSTABLE

2

ND

TOP VIEW

(Not to Scale)

3 4

EN ADJ

5

OUT

1

IN

ADP1713

2

GND

06455-006

TOP VIEW

(Not to Scale)

3 4

EN BYP

5

OUT

06455-007

1

IN

ADP1714

2

GND

TOP VIEW

(Not to Scale)

3 4

EN TRK

5

OUT

Figure 5. 5-Lead TSOT (UJ-Suffix) Figure 6. 5-Lead TSOT (UJ-Suffix) Figure 7. 5-Lead TSOT (UJ-Suffix) Figure 8. 5-Lead TSOT (UJ-Suffix)

Table 4. Pin Function Descriptions

ADP1712 Fixed Pin No.

ADP1712 Adjustable Pin No.

ADP1713 Pin No.

ADP1714 Pin No. Mnemonic Description

1 1 1 1 IN Regulator Input Supply. Bypass IN to GND with a 2.2 μF or greater capacitor. 2 2 2 2 GND Ground. 3 3 3 3 EN

Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN.

4 SS

Soft Start. Connect a capacitor between SS and GND to set the output

start-up time. 4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 4 BYP

Bypass. Connect a 1 nF or greater capacitor (10 nF recommended)

between BYP and GND to reduce the internal reference noise for low

noise applications. 4 TRK

Track. The output follows the voltage placed on the TRK pin. (See the

Theory of Operation section for a more detailed description.) 5 5 5 5 OUT

Regulated Output Voltage. Bypass OUT to GND with a 2.2 μF or greater

capacitor.

06455-008

Rev. A | Page 6 of 16

ADP1712/ADP1713/ADP1714

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 3.8 V, I

3.32

3.31

3.30

(V)

3.29

OUT

V

3.28

3.27

3.26 –40

Figure 9. Output Voltage vs. Junction Temperature

3.304

3.302

3.300

3.298

(V)

OUT

V

3.296

3.294

3.292

= 10 mA, C

OUT

I

= 100µA

LOAD

I

= 1mA

LOAD

I

= 10mA

LOAD

I

= 100mA

LOAD

I

= 200mA

LOAD

I

= 300mA

LOAD

= C

IN

10 60 110

= 2.2 μF, TA = 25°C, unless otherwise noted.

OUT

T

(°C)

J

450

I

= 300mA

400

350

300

250

(µA)

200

GND

I

150

100

50

0 –40

06455-009

10 60 110

LOAD

I

= 200mA

LOAD

I

= 100mA

LOAD

I

= 10mA

LOAD

I

= 1mA

LOAD

I

= 100µA

LOAD

T

(°C)

J

06455-012

Figure 12. Ground Current vs. Junction Temperature

400

350

300

250

(µA)

200

GND

I

150

100

50

3.290

0.1 1000

1 10 100

I

(mA)

LOAD

Figure 10. Output Voltage vs. Load Current

3.305

3.300

3.295

(V)

OUT

V

3.290

I

= 100µA

LOAD

I

= 1mA

3.285

3.280

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

= 10mA = 100mA = 200mA = 300mA

VIN (V)

Figure 11. Output Voltage vs. Input Voltage

0

0.1 1000

06455-010

1 10 100

I

(mA)

LOAD

06455-013

Figure 13. Ground Current vs. Load Current

500

450

400

350

300

(µA)

250

GND

I

200

I

150

100

50

5.33.3 3.8 4. 3 4.8

06455-011

0

LOAD

= 10mA

VIN (V)

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

= 300mA

= 200mA

= 100mA

= 1mA

= 100µA

5.33.3 3.8 4. 3 4.8

06455-014

Figure 14. Ground Current vs. Input Voltage

Rev. A | Page 7 of 16

ADP1712/ADP1713/ADP1714

V

V V

180

160

140

120

(mV)

100

80

DROPOUT

V

60

40

20

0

0.1 1000

1 10 100

I

(mA)

LOAD

Figure 15. Dropout Voltage vs. Load Current

3.35

3.30

3.25

3.20

(V)

OUT

V

3.15

I

= 100µA

3.10

3.05

3.00

3.20 3 .60

3.25 3. 30 3.35 3.40 3.45 3. 50 3.55

V

(V)

IN

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

= 1mA = 10mA = 100mA = 200mA = 300mA

Figure 16. Output Voltage vs. Input Voltage (in Dropout)

06455-015

06455-016

LOAD SWI TCHED FRO M 10mA TO 300mA

V

OUT

20mV/DI

TIME (20μs/DIV)

Figure 18. Load Transient Response

LOAD SWI TCHED FROM 10 mA TO 300mA

V

OUT

20mV/DI

TIME (20μs/DIV)

Figure 19. Load Transient Response

VIN = 5V V

= 3.3V

OUT

C

= 2.2μF

IN

C

= 2.2μF

OUT

VIN = 5V V

OUT

C

= 10μF

IN

C

OUT

06455-018

= 3.3V

= 10μF

06455-019

1000

I

=

900

LOAD

300mA

800

700

VIN STEP FROM 4V TO 5V

600

(µA)

500

GND

I

400

I

300

LOAD

10mA

I

LOAD

100mA

=

200

I

= 1mA

LOAD

100

I

= 100µA

LOAD

0

3.20 3.60

3.25 3. 30 3. 35 3.40 3.45 3.50 3. 55

V

(V)

IN

Figure 17. Ground Current vs. Input Voltage (in Dropout)

I

=

LOAD

200mA

=

1

2V/DI

V

2

OUT

VIN = 5V

= 3.3V

V

OUT

= 10μF

C

IN

= 10μF

C

OUT

I

LOAD

= 300mA

10mV/DI

06455-017

TIME (100μ s/DIV)

06455-020

Figure 20. Line Transient Response

Rev. A | Page 8 of 16

ADP1712/ADP1713/ADP1714

–

16

14

12

–55

50

V

= 50mV

RIPPLE

= 10mA

I

LOAD

= 2.2μF

C

OUT

FREQUENCY = 10kHz

10

8

6

RAMP-UP TIM E (ms)

4

2

0

02

5 101520

C

(nF)

SS

5

06455-036

Figure 21. Output Voltage Ramp-Up Time vs. Soft-Start Capacitor Value

0

V

= 50mV

RIPPLE

= 5V

V

IN

–10

–20

–30

–40

–50

PSRR (dB)

–60

–70

–80

–90

= 0.75V

V

OUT

= 2.2μF

C

OUT

I

LOAD

I

LOAD

10 10M

100 1k 10k 100k 1M

FREQUENCY (Hz)

= 1mA

= 100µA

I

LOAD

I

LOAD

= 10mA

= 100mA

06455-037

Figure 22. ADP1713 Power Supply Rejection Ratio vs. Frequency

–60

PSRR (dB)

–65

–70

2.7 4.74.23.73.2

Figure 23. ADP1712 Adjustable Power Supply Rejection Ratio vs.

45

V

RIPPLE

V

IN

C

OUT

FREQUENCY = 10kHz

–50

–55

PSRR (dB)

–60

–65

–70

0.8 4.33.83.32.82.31.81.3

Figure 24. ADP1712 Adjustable Power Supply Rejection Ratio vs.

(10 nF Bypass Capacitor)

= 5V

= 2.2μF

= 50mV

V

= 2.4V

OUT

V

= 0.8V

OUT

V

(V)

IN

Input Voltage

V

(V)

OUT

Output Voltage

I

LOAD

V

OUT

= 1.6V

= 100mA

I

LOAD

= 10mA

06455-038

06455-039

Rev. A | Page 9 of 16

ADP1712/ADP1713/ADP1714

V

THEORY OF OPERATION

The ADP1712/ADP1713/ADP1714 are low dropout linear regulators that use an advanced, proprietary architecture to provide high power supply rejection ratio (PSRR) and excellent line and load transient response with just a small 2.2 μF ceramic output capacitor. All devices operate from a 2.5 V to 5.5 V input rail and provide up to 300 mA of output current. Incorporating a novel scaling architecture, ground current is very low when driving light loads. Ground current in the shutdown mode is typically less than 1 μA.

IN

EN

CURRENT

LIMIT THERMAL PROTECT

SHUTDOWN

AND UVLO

REFERENCE

OUT

SS/ ADJ/ BYP/ TRK

SOFT-START FUNCTION (ADP1712)

For applications that require a controlled startup, the ADP1712 provides a programmable soft-start function. Programmable soft start is useful for reducing inrush current upon startup and for providing voltage sequencing. To implement soft start, connect a small ceramic capacitor from SS to GND. Upon startup, a 1.2 μA current source charges this capacitor. The ADP1712 start-up output voltage is limited by the voltage at SS, providing a smooth ramp up to the nominal output voltage. The soft-start time is calculated by

T

= V

SS

REF × (CSS/ISS

where:

T

is the soft-start period.

SS

is the 0.8 V reference voltage.

V

REF

is the soft-start capacitance from SS to GND.

C

SS

I

is the current sourced from SS (1.2 μA).

SS

When the ADP1712 is disabled (using EN), the soft-start capacitor is discharged to GND through an internal 100 Ω resistor.

) (1)

GND

Figure 25. Internal Block Diagram

Internally, the ADP1712/ADP1713/ADP1714 each consist of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, which allows more current to pass and increases the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage.

The ADP1712 is available in two versions, one with a fixed output voltage and one with an adjustable output voltage. The fixed output voltage is set internally to one of sixteen values between 0.75 V and

3.3 V, using an internal feedback network. The adjustable output voltage can be set to between 0.8 V and 5.0 V by an external voltage divider connected from OUT to ADJ. The ADP1713 and ADP1714 are available in fixed output voltage options only. The ADP1712 fixed version allows an external soft-start capacitor to be connected between the SS pin and GND, which controls the output voltage ramp during startup. The ADP1713 allows a reference bypass capacitor to be connected between the BYP pin and GND, which reduces output voltage noise and improves power supply rejection. The ADP1714 features a track pin, which allows the output voltage to follow the voltage at the TRK pin.

A logic on the EN pin determines if the output is active. When EN is high, the output is on, and when EN is low, the output is off.

Rev. A | Page 10 of 16

06455-023

1

2V/DI

2

2V/DI

EN

OUT

TIME (4ms/DIV)

VIN = 5V

= 3.3V

V

OUT

= 2.2μF

C

OUT

= 22nF

C

SS

I

LOAD

= 300mA

6455-040

Figure 26. OUT Ramp-Up with External Soft-Start Capacitor

The ADP1712 adjustable version, ADP1713, and ADP1714 have no pins for soft start, so the function is switched to an internal soft-start capacitor. This sets the soft-start ramp-up period to approximately 24 μs.

EN

1

2V/DI

2

1V/DI

OUT

TIME (20µ s/DIV)

VIN = 5V

= 1.6V

V

OUT

= 2.2μF

C

OUT

I

LOAD

= 10mA

6455-041

Figure 27. OUT Ramp-Up with Internal Soft-Start

ADP1712/ADP1713/ADP1714

V

ADJUSTABLE OUTPUT VOLTAGE (ADP1712 ADJUSTABLE)

The ADP1712 adjustable version can have its output voltage set over a 0.8 V to 5.0 V range. The output voltage is set by connecting a resistive voltage divider from OUT to ADJ. The output voltage is calculated using the equation

V

= 0.8 V (1 + R1/R2) (2)

OUT

where:

R1 is the resistor from OUT to ADJ. R2 is the resistor from ADJ to GND.

The maximum bias current into ADJ is 100 nA, so for less than 0.5% error due to the bias current, use values less than 60 kΩ for R2.

BYPASS CAPACITOR (ADP1713)

The ADP1713 allows for an external bypass capacitor to be connected to the internal reference, which reduces output voltage noise and improves power supply rejection. A low leakage capacitor of 1 nF or greater (10 nF is recommended) must be connected between the BYP and GND pins.

TRACK MODE (ADP1714)

The ADP1714 includes a tracking mode feature. As shown in Figure 28, if the voltage applied at the TRK pin is less than the nominal output voltage, OUT is equal to the voltage at TRK. Otherwise, OUT regulates to its nominal output value.

For example, consider an ADP1714 with a nominal output voltage of 3 V. If the voltage applied to its TRK pin is greater than 3 V, OUT maintains a nominal output voltage of 3 V. If the voltage applied to TRK is reduced below 3 V, OUT tracks this voltage. OUT can track the TRK pin voltage from the nominal value all the way down to 0 V. A voltage divider is present from TRK to the error amplifier input with a divider ratio equal to the divider from OUT to the error amplifier. This sets the output voltage equal to the tracking voltage. Both divider ratios are set by postpackage trim, depending on the desired output voltage.

4

3

(V)

2

OUT

V

1

0

05

Figure 28. ADP1714 Output Voltage vs. Tracking Voltage

1234

V

(V)

TRK

with Nominal Output Voltage Set to 3 V

06455-024

ENABLE FEATURE

The ADP1712/ADP1713/ADP1714 use the EN pin to enable and disable the OUT pin under normal operating conditions. As shown in Figure 29, when a rising voltage on EN crosses the active threshold, OUT turns on. When a falling voltage on EN crosses the inactive threshold, OUT turns off.

EN

1

500mV/DI

OUT

TIME (4ms/DIV)

VIN=5V

=1.6V

V

OUT

=2.2μF

C

OUT

I

LOAD

=10mA

06455-025

Figure 29. ADP1712 Adjustable Typical EN Pin Operation

As can be seen, the EN pin has hysteresis built in. This prevents on/off oscillations that can occur due to noise on the EN pin as it passes through the threshold points.

The EN pin active/inactive thresholds are derived from the IN voltage. Therefore, these thresholds vary with changing input voltage. Figure 30 shows typical EN active/inactive thresholds when the input voltage varies from 2.5 V to 5.5 V.

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

TYPICAL EN T HRESHOLDS (V)

0.6

0.5

2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5. 25

2.50 5. 50

Figure 30. Typical EN Pin Thresholds vs. Input Voltage

EN ACTIVE

EN INACTIVE

HYSTERESIS

(V)

V

IN

06455-026

UNDERVOLTAGE LOCKOUT (UVLO)

The ADP1712/ADP1713/ADP1714 have an undervoltage lockout circuit, which monitors the voltage on the IN pin. When the voltage on IN drops below 2 V (minimum), the circuit activates, disabling the OUT pin.

Rev. A | Page 11 of 16

ADP1712/ADP1713/ADP1714

V

APPLICATION INFORMATION

CAPACITOR SELECTION

Output Capacitor

The ADP1712/ADP1713/ADP1714 are designed for operation with small, space-saving ceramic capacitors, but they function with most commonly used capacitors as long as care is taken about the effective series resistance (ESR) value. The ESR of the output capacitor affects stability of the LDO control loop. A minimum of

2.2 μF capacitance with an ESR of 500 mΩ or less is recommended to ensure stability of the ADP1712/ADP1713/ADP1714. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP1712/ADP1713/ADP1714 to large changes in load current. Figure 31 and Figure 32 show the transient responses for output capacitance values of 2.2 μF and 10 μF, respectively.

V

RESPONSE TO LO AD STEP

OUT

FROM 10mA TO 300mA

20mV/DI

VIN = 5V V

= 3.3V

OUT

C

= 2.2µF

IN

C

= 2.2µF

OUT

TIME (20μs/DIV)

Figure 31. Output Transient Response, C

= 2.2 μF

OUT

V

RESPONSE TO LOAD STEP

OUT

FROM 10mA T O 300mA

20mV/DI

VIN = 5V

= 3.3V

V

OUT

= 10µF

C

IN

= 10µF

C

OUT

TIME (20μs/DIV)

Figure 32. Output Transient Response, C

= 10 μF

OUT

Input Bypass Capacitor

Connecting a 2.2 μF capacitor from the IN pin to GND reduces the circuit sensitivity to printed circuit board (PCB) layout,

06455-027

06455-028

especially when long input traces or high source impedance are encountered. If greater than 2.2 μF of output capacitance is required, increasing the input capacitor to match is recommended.

Input and Output Capacitor Properties

Any good quality ceramic capacitors can be used with the ADP1712/ADP1713/ADP1714, as long as they meet the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended. Y5V and Z5U dielectrics are not recommended, due to their poor temperature and dc bias characteristics.

CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION

The ADP1712/ADP1713/ADP1714 are protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP1712/ADP1713/ADP1714 are designed to current limit when the output load reaches 500 mA (typical). When the output load exceeds 500 mA, the output voltage is reduced to maintain a constant current limit.

Thermal overload protection is included, which limits the junction temperature to a maximum of 150°C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 150°C, the output is turned off, reducing the output current to zero. When the junction temperature drops below 135°C (typical), the output is turned on again and output current is restored to its nominal value.

Consider the case where a hard short from OUT to ground occurs. At first the ADP1712/ADP1713/ADP1714 current limit, so that only 500 mA is conducted into the short. If self heating of the junction is great enough to cause its temperature to rise above 150°C, thermal shutdown activates, turning off the output and reducing the output current to zero. As the junction temperature cools and drops below 135°C, the output turns on and conducts 500 mA into the short, again causing the junction temperature to rise above 150°C. This thermal oscillation between 135°C and 150°C causes a current oscillation between 500 mA and 0 mA, which continues as long as the short remains at the output.

Current and thermal limit protections are intended to protect the device against accidental overload conditions. For reliable operation, device power dissipation needs to be externally limited so junction temperatures do not exceed 125°C.

Rev. A | Page 12 of 16

ADP1712/ADP1713/ADP1714

THERMAL CONSIDERATIONS

To guarantee reliable operation, the junction temperature of the

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

ADP1712/ADP1713/ADP1714 must not exceed 125°C. To ensure the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air (θ

). The θJA

JA

number is dependent on the package assembly compounds used

100

80

(°C)

J

T

60

40

and the amount of copper to which the GND pin of the package is soldered on the PCB. Table 5 shows typical θ

values of the

JA

5lead TSOT package for various PCB copper sizes.

20

0

0.5 5.0

Table 5.

Copper Size (mm2)

01 170 50 152 100 146

θ

JA

(°C/W)

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

300 134 500 131

1

Device soldered to minimum size pin traces.

The junction temperature of the ADP1712/ADP1713/ADP1714 can be calculated from the following equation:

T

= TA + (PD × θJA) (3)

J

where:

T

is the ambient temperature.

A

P

is the power dissipation in the die, given by

D

P

= [(VIN – V

D

OUT

) × I

] + (VIN × I

LOAD

) (4)

GND

100

80

(°C)

J

T

60

40

20

0

0.5 5.0

where:

I

is the load current.

LOAD

is the ground current.

I

GND

V

and V

IN

are input voltage and output voltage, respectively.

OUT

Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation simplifies to the following:

T

= TA + {[(VIN – V

J

OUT

) × I

] × θJA} (5)

LOAD

As shown in Equation 4, for a given ambient temperature, inputto-output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to ensure the junction temperature does not rise above 125°C. The following figures show junction temperature calculations for

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

20

0

0.5 5.0

different ambient temperatures, load currents, input-to-output voltage differentials, and areas of PCB copper.

1mA 10mA

1.0 1.5 2.0 2.5 3.0 3.5 4. 0 4.5

30mA 80mA

100mA 200mA

V

– V

(V)

IN

OUT

300mA

(LOAD CURRENT)

Figure 33. 500 mm2 of PCB Copper, TA = 25°C

1mA 10mA

1.0 1.5 2.0 2.5 3.0 3.5 4. 0 4.5

30mA 80mA

100mA 200mA

V

– V

(V)

IN

OUT

300mA

(LOAD CURRENT)

Figure 34. 100 mm2 of PCB Copper, TA = 25°C

1mA 10mA

1.0 1.5 2.0 2.5 3.0 3.5 4. 0 4.5

30mA 80mA

100mA 200mA

V

– V

(V)

IN

OUT

300mA

(LOAD CURRENT)

Figure 35. 0 mm2 of PCB Copper, TA = 25°C

06455-029

06455-030

06455-031

Rev. A | Page 13 of 16

ADP1712/ADP1713/ADP1714

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

20

1mA 10mA

0

0.5 5.0

1.0 1.5 2.0 2.5 3.0 3.5 4. 0 4.5

30mA 80mA

100mA 200mA

V

– V

(V)

IN

OUT

300mA

(LOAD CURRENT)

Figure 36. 500 mm2 of PCB Copper, TA = 50°C

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

06455-032

PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS

Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP1712/ ADP1713/ADP1714. However, as can be seen from Tabl e 5, a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits.

Place the input capacitor as close as possible to the IN and GND pins. Place the output capacitor as close as possible to the OUT and GND pins. For the ADP1712 adjustable version, place the soft-start capacitor as close as possible to the SS pin. For the ADP1713, place the internal reference bypass capacitor as close as possible to the BYP pin. Use of 0402 or 0603 size capacitors and resistors achieves the smallest possible footprint solution on boards where area is limited.

GND (BOTTOM)

GND (TOP)

ADP1712/ ADP1713/ ADP1714

C2C1

20

1mA 10mA

0

0.5 5.0

1.0 1.5 2.0 2.5 3.0 3.5 4. 0 4.5

Figure 37. 100 mm2 of PCB Copper, TA = 50°C

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

20

1mA 10mA

0

0.5 5.0

1.0 1.5 2.0 2.5 3.0 3.5 4. 0 4.5

30mA 80mA

100mA 200mA

V

– V

(V)

IN

OUT

300mA

(LOAD CURRENT)

IN

06455-033

EN

SS/ ADJ/ BYP/ TRK

OUT

R1C3

R2

06455-035

Figure 39. Example PCB Layout

100mA 200mA

V

– V

(V)

IN

OUT

300mA

(LOAD CURRENT)

06455-034

Figure 38. 0 mm2 of PCB Copper, TA = 50°C

Rev. A | Page 14 of 16

ADP1712/ADP1713/ADP1714

OUTLINE DIMENSIONS

2.90 BSC

54

1.60 BSC

123

*

0.90 MAX

0.70 MIN

0.10 MAX

*

COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTI ON OF PACKAGE HEIGHT AND T HICKNESS.

1.90

BSC

0.50

0.30

Figure 40. 5-Lead Thin Small Outline Transistor Package [TSOT]

Dimensions shown in millimeters

2.80 BSC

0.95 BSC

*

1.00 MAX

SEATING PLANE

(UJ-5)

0.20

0.08

8° 4° 0°

0.60

0.45

0.30

100708-A

ORDERING GUIDE

Te mp e ra tu r e

Model

Range

ADP1712AUJZ-0.75R71 –40°C to +125°C 0.75 5-Lead TSOT UJ-5 L3S ADP1712AUJZ-0.8-R71 –40°C to +125°C 0.80 5-Lead TSOT UJ-5 L3T ADP1712AUJZ-0.85R71 –40°C to +125°C 0.85 5-Lead TSOT UJ-5 L3U ADP1712AUJZ-0.9-R71 –40°C to +125°C 0.90 5-Lead TSOT UJ-5 L3V ADP1712AUJZ-0.95R71 –40°C to +125°C 0.95 5-Lead TSOT UJ-5 L3W ADP1712AUJZ-1.0-R71 –40°C to +125°C 1.00 5-Lead TSOT UJ-5 L3X ADP1712AUJZ-1.05R71 –40°C to +125°C 1.05 5-Lead TSOT UJ-5 L3Y ADP1712AUJZ-1.1-R71 –40°C to +125°C 1.10 5-Lead TSOT UJ-5 L3Z ADP1712AUJZ-1.15R71 –40°C to +125°C 1.15 5-Lead TSOT UJ-5 L4H ADP1712AUJZ-1.2-R71 –40°C to +125°C 1.20 5-Lead TSOT UJ-5 L4J ADP1712AUJZ-1.3-R71 –40°C to +125°C 1.30 5-Lead TSOT UJ-5 L4K ADP1712AUJZ-1.5-R71 –40°C to +125°C 1.50 5-Lead TSOT UJ-5 L4L ADP1712AUJZ-1.8-R71 –40°C to +125°C 1.80 5-Lead TSOT UJ-5 L4M ADP1712AUJZ-2.5-R71 –40°C to +125°C 2.50 5-Lead TSOT UJ-5 L4N ADP1712AUJZ-3.0-R71 –40°C to +125°C 3.00 5-Lead TSOT UJ-5 L4P ADP1712AUJZ-3.3-R71 –40°C to +125°C 3.30 5-Lead TSOT UJ-5 L4Q ADP1712AUJZ-R71 –40°C to +125°C 0.8 to 5 5-Lead TSOT UJ-5 L4R ADP1713AUJZ-0.75R71 –40°C to +125°C 0.75 5-Lead TSOT UJ-5 L4U ADP1713AUJZ-0.8-R71 –40°C to +125°C 0.80 5-Lead TSOT UJ-5 L4V ADP1713AUJZ-0.85R71 –40°C to +125°C 0.85 5-Lead TSOT UJ-5 L4W ADP1713AUJZ-0.9-R71 –40°C to +125°C 0.90 5-Lead TSOT UJ-5 L4X ADP1713AUJZ-0.95R71 –40°C to +125°C 0.95 5-Lead TSOT UJ-5 L4Y ADP1713AUJZ-1.0-R71 –40°C to +125°C 1.00 5-Lead TSOT UJ-5 L4Z ADP1713AUJZ-1.05R71 –40°C to +125°C 1.05 5-Lead TSOT UJ-5 L50 ADP1713AUJZ-1.1-R71 –40°C to +125°C 1.10 5-Lead TSOT UJ-5 L51 ADP1713AUJZ-1.15R71 –40°C to +125°C 1.15 5-Lead TSOT UJ-5 L52 ADP1713AUJZ-1.2-R71 –40°C to +125°C 1.20 5-Lead TSOT UJ-5 L53

Output Voltage (V)

Package Description

Package Option Branding

Rev. A | Page 15 of 16

ADP1712/ADP1713/ADP1714

Te mp e ra tu r e

Model

Range

ADP1713AUJZ-1.3-R71 –40°C to +125°C 1.30 5-Lead TSOT UJ-5 L54 ADP1713AUJZ-1.5-R71 –40°C to +125°C 1.50 5-Lead TSOT UJ-5 L55 ADP1713AUJZ-1.8-R71 –40°C to +125°C 1.80 5-Lead TSOT UJ-5 L56 ADP1713AUJZ-2.5-R71 –40°C to +125°C 2.50 5-Lead TSOT UJ-5 L57 ADP1713AUJZ-3.0-R71 –40°C to +125°C 3.00 5-Lead TSOT UJ-5 L58 ADP1713AUJZ-3.3-R71 –40°C to +125°C 3.30 5-Lead TSOT UJ-5 L59 ADP1714AUJZ-0.75R71 –40°C to +125°C 0.75 5-Lead TSOT UJ-5 L5A ADP1714AUJZ-0.8-R71 –40°C to +125°C 0.80 5-Lead TSOT UJ-5 L5C ADP1714AUJZ-0.85R71 –40°C to +125°C 0.85 5-Lead TSOT UJ-5 L5D ADP1714AUJZ-0.9-R71 –40°C to +125°C 0.90 5-Lead TSOT UJ-5 L5E ADP1714AUJZ-0.95R71 –40°C to +125°C 0.95 5-Lead TSOT UJ-5 L5F ADP1714AUJZ-1.0-R71 –40°C to +125°C 1.00 5-Lead TSOT UJ-5 L5G ADP1714AUJZ-1.05R71 –40°C to +125°C 1.05 5-Lead TSOT UJ-5 L5H ADP1714AUJZ-1.1-R71 –40°C to +125°C 1.10 5-Lead TSOT UJ-5 L5J ADP1714AUJZ-1.15R71 –40°C to +125°C 1.15 5-Lead TSOT UJ-5 L5K ADP1714AUJZ-1.2-R71 –40°C to +125°C 1.20 5-Lead TSOT UJ-5 L5L ADP1714AUJZ-1.3-R71 –40°C to +125°C 1.30 5-Lead TSOT UJ-5 L5M ADP1714AUJZ-1.5-R71 –40°C to +125°C 1.50 5-Lead TSOT UJ-5 L5N ADP1714AUJZ-1.8-R71 –40°C to +125°C 1.80 5-Lead TSOT UJ-5 L5P ADP1714AUJZ-2.5-R71 –40°C to +125°C 2.50 5-Lead TSOT UJ-5 L5Q ADP1714AUJZ-3.0-R71 –40°C to +125°C 3.00 5-Lead TSOT UJ-5 L5R ADP1714AUJZ-3.3-R71 –40°C to +125°C 3.30 5-Lead TSOT UJ-5 L5S ADP1712-3.3-EVALZ11 3.3

ADP1712-EVALZ11

ADP1713-3.3-EVALZ11 3.3

ADP1714-3.3-EVALZ11 3.3

1

Z = RoHS Compliant Part.

Output Voltage (V)

Adjustable, but set to 1.6

Package Description

ADP1712 Fixed 3.3 V Output with Soft Start

Package Option Branding

Evaluation Board ADP1712 Adjustable Output Evaluation Board

ADP1713 Fixed 3.3 V Output with Bypass Evaluation Board

ADP1714 Fixed 3.3 V Output with Track Mode Evaluation Board

registered trademarks are the property of their respective owners. D06455-0-6/09(A)

D06455-0-6/09(A)

Rev. A | Page 16 of 16

Datasheet ADP1712 Datasheet (ANALOG DEVICES)

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

TYPICAL APPLICATION CIRCUITS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

ESD CAUTION

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

THEORY OF OPERATION

SOFT-START FUNCTION (ADP1712)

ADJUSTABLE OUTPUT VOLTAGE (ADP1712 ADJUSTABLE)

BYPASS CAPACITOR (ADP1713)

TRACK MODE (ADP1714)

ENABLE FEATURE

UNDERVOLTAGE LOCKOUT (UVLO)

APPLICATION INFORMATION

CAPACITOR SELECTION

Output Capacitor

Input Bypass Capacitor

Input and Output Capacitor Properties

CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION

THERMAL CONSIDERATIONS

PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS

OUTLINE DIMENSIONS

ORDERING GUIDE