Page 1
600kHz/1.25MHz Step-Up
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Preliminary Technical Data
FEATURES
Fully integrated 1.5 A , 0.15 Ω power switch
Pin-selectable 600 kHz or 1.25 MHz PWM frequency
1.8 V minimum input voltage
Adjustable output voltage up to 20 V
Adjustable soft start
Input undervoltage lockout
Thermal shutdown
MSOP 8-lead package
APPLICATIONS
TFT LCD bias supplies
Portable applications
Industrial/instrumentation equipment
FUNCTIONAL BLOCK DIAGRAM
PWM DC-DC Switching Converter
ADP1612
GENERAL DESCRIPTION
The ADP1612 is a step-up dc-to-dc switching converter with an
integrated 1.5 A, 0.15 Ω power switch capable of providing an
output voltage as high as 20 V. With a package height of less
than 1.1 mm, the ADP1612 is optimal for space-constrained
applications such as portable devices or thin film transistor
(TFT) liquid crystal displays (LCDs).
The ADP1612 operates in pulse-width modulation (PWM)
current mode with up to 90% efficiency. Adjustable soft start
prevents inrush currents at startup. The pin-selectable
switching frequency and PWM current-mode architecture
allow for excellent transient response, easy noise filtering, and
the use of small, cost-saving external inductors and capacitors.
The ADP1612 is offered in the lead-free 8-lead MSOP and
operates over the temperature range of −40 °C to +85 °C.
Figure 1.Functional Block Diagram
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
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Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.
Page 2
ADP1612 Preliminary Technical Data
www.BDTIC.com/ADI
TABLE OF CONTENTS
Features.............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ........................................................................ 7
Current-Mode PWM Operation................................................ 7
Frequency Selection ..................................................................... 7
Soft Start .........................................................................................7
Thermal Shutdown .......................................................................8
On/Off Control..............................................................................8
Applications Information.................................................................9
Setting the Output Voltage...........................................................9
Choosing the Input and Output Capacitors........................... 10
Diode Selection........................................................................... 10
Loop Compensation .................................................................. 10
Soft Start Capacitor.................................................................... 11
Typical Application Circuits ......................................................... 12
Layout Guidelines........................................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide............................................................................... 14
REVISION HISTORY
6/08—Rev. PrA
Rev. PrA | Page 2 of 14
Page 3
Preliminary Technical Data ADP1612
www.BDTIC.com/ADI
SPECIFICATIONS
Specifications with standard typeface are for TJ = 25 °C, and those in bold face type apply over the full operating temperature range (TJ =
-40 °C to + 125 °C). Unless otherwise specified, V
characterization using standard statistical quality control (SQC), unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
SUPPLY
Input Voltage VIN
Quiescent Current
Non-switching State IQ V
Non-switching State IQ V
Shutdown I
Switching State
Switching State
1
2
OUTPUT
Output Voltage V
Load Regulation I
Overall Regulation Line, load, temperature
REFERENCE
Feedback Voltage VFB TBD TBD TBD V
Line Regulation VIN = 2.5 V to 5.5 V TBD TBD %/V
ERROR AMPLIFIER
Transconductance G
Voltage Gain AV 60 dB
FB Input Bias Current V
SWITCH
SW On Resistance R
SW Leakage Current VSW = 20 V 0.01 10 μA
Peak Current Limit
3
I
OSCILLATOR
Oscillator Frequency fSW FREQ = GND TBD 600 TBD kHz
FREQ = VIN TBD 1.25 TBD MHz
Maximum Duty Cycle D
FREQ Pin Current I
SHUTDOWN
Shutdown Input Voltage Low VIL Non-switching state, V
Shutdown Input Voltage High VIH Switching state, V
Shutdown Input Bias Current I
SOFT START
SS Charging Current VSS = 0 V TBD 5 TBD μA
UNDERVOLTAGE LOCKOUT
4
UVLO Threshold Rising VIN rising 1.7
UVLO Threshold Falling VIN falling TBD 1.65 V
1
This parameter specifies the average current while switching internally and with SW (Pin 5) floating.
2
This parameter specifies the average current while switching internally and with SW (Pin 5) floating.
3
Current limit is a function of duty cycle. See Typical Performance Characteristics section for typical values over operating ranges.
4
UVLO
= 3.6 V. All limits at temperature extremes are guaranteed by correlation and
IN
1.8
= 1.5 V, FREQ = VIN 900 TBD μA
FB
= 1.5 V, FREQ = GND 900 TBD
FB
V
QSHDN
IQSW f
IQSW f
V
OUT
= 0 V 0.01 2 μA
SHDN
= 600 kHz, no load 2 TBD mA
SW
= 1.23 MHz, no load 4 TBD mA
SW
IN
= 10 mA to 150 mA, V
LOAD
= 8 V TBD mV/mA
OUT
TBD
MEA ΔI = 5 μA
= TBD V 10 TBD nA
FB
ISW = 1.0 A 150 TBD mΩ
DSON
V
CL
COMP = open, VFB = 1 V, FREQ = VIN TBD 90 TBD %
MAX
FREQ
V
SDHN
= 8 V TBD 1.5 TBD A
OUT
FREQ = GND TBD 5 TBD uA
= 1.8 V to 6 V 0.95 0.3 V
IN
= 1.8 V to 6 V 1.6 0.95 V
IN
= 1.6 V 1 TBD μA
SHDN
160 μA/V
6
20
%
1.8
V
V
V
Rev. PrA | Page 3 of 14
Page 4
ADP1612 Preliminary Technical Data
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VIN, SHDN, FB to GND −0.3 V to 6.5 V
FREQ to GND -0.3 V to VIN+ 0.3 V
COMP to GND 1.0 V to 1.6 V
SS to GND -0.3 V to 1.3 V
SW to GND 21 V
RMS SW Pin Current 1.2 A
Operating Ambient Temperature
Range
Operating Junction Temperature
Range
Storage Temperature Range −65 °C to + 150 °C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
−40 °C to + 85 °C
−40 °C to + 125 °C
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA θ
8 Lead MSOP
2-Layer Board
4-Layer Board
Maximum Power Dissipation
TBD TBD
TBD TBD
TBD TBD mW
Unit
JC
°C/W
°C/W
ESD CAUTION
Rev. PrA | Page 4 of 14
Page 5
Preliminary Technical Data ADP1612
www.BDTIC.com/ADI
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2.Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 COMP Compensation input. Connect a series resistor-capacitor network from COMP to GND to compensate the
regulator.
2 FB Output voltage feedback input. Connect a resistive voltage divider from the output voltage to FB to set the
regulator output voltage.
3 SHDN Shutdown input. Drive SHDN low to shut down the regulator; drive SHDN high to turn it on.
4 GND Ground.
5 SW Switching output. Connect the power inductor from the input voltage to SW and connect the external rectifier
from SW to the output voltage to complete the step-up converter.
6 VIN Main power supply input. VIN powers the ADP1612 internal circuitry. Connect VIN to the input source voltage.
Bypass VIN to GND with a 10 μF or greater capacitor as close to the ADP1612 as possible.
7 FREQ Frequency Setting Input. FREQ controls the switching frequency. Connect FREQ to GND to program the oscillator
to 600 kHz, or connect FREQ to VIN to program it to 1.25 MHz. If FREQ is left floating, the part will default to
600kHz.
8 SS Soft start timing capacitor input. Connect a capacitor from SS to GND brings up the output slowly at power-up
and reduce in-rush current.
Rev. PrA | Page 5 of 14
Page 6
ADP1612 Preliminary Technical Data
www.BDTIC.com/ADI
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 3
Figure 4
Figure 6
Figure 7
Figure 5
Rev. PrA | Page 6 of 14
Figure 7
Page 7
Preliminary Technical Data ADP1612
www.BDTIC.com/ADI
THEORY OF OPERATION
Figure 8. Block Diagram with Application Circuit
The ADP1612 current-mode step-up switching converter
converts a 1.8 V to 6 V input voltage up to an output voltage as
high as 20 V. The 1.5 A internal switch allows a high output
current, and the high 600 kHz/1.25 MHz switching frequency
allows tiny external components. The switch current is
monitored on a pulse-by-pulse basis to limit it to 1.5 A, typical.
CURRENT-MODE PWM OPERATION
The ADP1612 utilizes a current mode PWM control scheme to
regulate the output voltage over all load conditions. The output
voltage is monitored at FB through a resistive voltage divider.
The voltage at FB is compared to the internal TBD V reference
by the internal transconductance error amplifier to create an
error voltage at COMP. The switch current is internally
measured and added to the stabilizing ramp, and the resulting
sum is compared to the error voltage at COMP to control the
PWM modulator. This current-mode regulation system allows
fast transient response, while maintaining a stable output
voltage. By selecting the proper resistor-capacitor network from
COMP to GND, the regulator response is optimized for a wide
range of input voltages, output voltages, and load conditions.
FREQUENCY SELECTION
The ADP1612’s frequency is user-selectable to operate at either
600 kHz to optimize the regulator for high efficiency or to 1.25
MHz for small external components. Connect FREQ to Vin for
1.25 MHz operation, or connect FREQ to GND for 600 kHz
operation. If FREQ is left floating, the part will default to 600
kHz.
SOFT START
To prevent input inrush current at startup, connect a capacitor
from SS to GND to set the soft start period. When the
ADP1612 is in shutdown (SHDN is at GND) or the input
voltage is below the 1.65V undervoltage lockout voltage, SS is
internally shorted to GND to discharge the soft start capacitor.
Once the ADP1612 is turned on, SS sources 5μA, typical, to the
soft start capacitor at startup. As the soft start capacitor charges,
it limits the voltage at COMP. Because of the current-mode
regulator, the voltage at COMP is proportional to the switch
peak current, and, therefore, the input current. By slowly
charging the soft start capacitor, the input current ramps slowly
to prevent it from overshooting excessively at startup.
Rev. PrA | Page 7 of 14
Page 8
ADP1612 Preliminary Technical Data
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THERMAL SHUTDOWN
The ADP1612 includes thermal shutdown protection. If the die
temperature exceeds 150 ºC, typical, the thermal shutdown will
turn off the NMOS power device, significantly reducing power
dissipation in the device, and preventing output voltage
regulation. The NMOS power device will remain off until the
die temperature reduces to 120 ºC, typical. The soft-start
capacitor will be discharged during thermal shutdown to ensure
low output voltage overshoot and inrush currents when
regulation resumes.
ON/OFF CONTROL
The SHDN input turns the ADP1612 regulator on or off. Drive
SHDN low to turn off the regulator and reduce the input
current to 0.1uA, typical. Drive SHDN high to turn on the
regulator.
When the step-up dc–dc switching converter is turned off, there
is a dc path from the input to the output through the inductor
and output rectifier. This causes the output voltage to remain
slightly below the input voltage by the forward voltage of the
rectifier, preventing the output voltage from dropping to zero
when the regulator is shut down. Figure 11 in the Application
Circuit section shows the application circuit to disconnect the
output voltage from the input voltage at shutdown.
Rev. PrA | Page 8 of 14
Page 9
Preliminary Technical Data ADP1612
−
×
×
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APPLICATIONS INFORMATION
SETTING THE OUTPUT VOLTAGE
The ADP1612 features an adjustable output voltage range of VIN
to 20 V. The output voltage is set by the resistor voltage divider
(R1 and R2, Figure 8.) from the output voltage (V
TBD V feedback input at FB. Use the following formula to
determine the output voltage:
(
OUT
Use an R2 resistance of 10 kΩ or less to prevent output voltage
errors due to the 0.1uA FB input bias current. Choose R1 based
on the following formula:
×=
RR
21 (2)
+×=
OUT
−
TBD
⎛
⎜
⎝
)
211 RRTBDV
TBDV
⎞
⎟
⎠
(1)
OUT
) to the
INDUCTOR SELECTION
The inductor is an essential part of the step-up switching
converter. It stores energy during the on-time, and transfers that
energy to the output through the output rectifier during the offtime. Use inductance in the range of 4.7 μH to 22 μH. In
general, lower inductance values have higher saturation current
and lower series resistance for a given physical size. However,
lower inductance results in higher peak current that can lead to
reduced efficiency and greater input and/or output ripple and
noise. A peak-to-peak inductor ripple current close to 30% of
the maximum dc input current typically yields an optimal
compromise.
For determining the inductor ripple current in continuous
operation, the input (V
the switch duty cycle (D) by the following equation:
) and output (V
IN
) voltages determine
OUT
D
= (3)
Using the duty cycle and switching frequency, f
the on-time by the following equation:
t =
ON
The inductor ripple current (ΔI
I
=Δ (5)
L
Solving for the inductance value, L,
L
= (6)
Make sure that the peak inductor current (the maximum input
current plus half the inductor ripple current) is below the rated
saturation current of the inductor. Likewise, make sure that the
maximum rated rms current of the inductor is greater than the
maximum dc input current to the regulator.
For duty cycles greater than 50%, which occur with input
voltages greater than one-half the output voltage, slope
compensation is required to maintain stability of the currentmode regulator. For stable current-mode operation, ensure that
the selected inductance is equal to or greater than L
LL
MIN
>
D
VV
INOUT
V
OUT
, determine
SW
D
(4)
f
SW
) in steady state is
L
tV
ONIN
L
tV
ONIN
I
Δ
L
:
MIN
=>
()
2
−
xVVR
INOUTDSON
V 0.55
×
f
SW
(7)
5.0
Table 5. Inductor Manufacturers
Vendor Part L (μH) Max DC Current Max DCR (mΩ) Height (mm)
Sumida
847-956-0666
www.sumida.com
www.coilcraft.com
www.tokoam.com
CMD4D11-4R7MC 4.7 0.75 216 1.2
CDRH4D28-100 10 1.00 128 3.0
CDRH5D18-220 22 0.80 290 2.0
CR43-4R7 4.7 1.15 109 3.5
CR43-100 10 1.04 182 3.5
DS1608-472 4.7 1.40 60 2.9 Coilcraft 847-639-6400
DS1608-103 10 1.00 75 2.9
D52LC-4R7M 4.7 1.14 87 2.0 Toko 847-297-0070
D52LC-100M 10 0.76 150 2.0
Rev. PrA | Page 9 of 14
Page 10
ADP1612 Preliminary Technical Data
I
V
V
V
V
−
www.BDTIC.com/ADI
CHOOSING THE INPUT AND OUTPUT CAPACITORS
The ADP1612 requires input and output bypass capacitors to
supply transient currents while maintaining constant input and
output voltage. Use a low ESR (equivalent series resistance),
10 μF or greater input capacitor to prevent noise at the
ADP1612 input. Place the capacitor between V
and GND as
IN
close to the ADP1612 as possible. Ceramic capacitors are
preferred because of their low ESR characteristics. Alternatively,
use a high value, medium ESR capacitor in parallel with a 0.1 μF
low ESR capacitor as close to the ADP1612 as possible.
The output capacitor maintains the output voltage and supplies
current to the load while the ADP1612 switch is on. The value
and characteristics of the output capacitor greatly affect the
output voltage ripple and stability of the regulator. Use a low
ESR output capacitor; ceramic dielectric capacitors are
preferred.
For very low ESR capacitors such as ceramic capacitors, the
ripple current due to the capacitance is calculated as follows. In
continuous mode, because the capacitor discharges during the
on-time, t
, the charge removed from the capacitor, QC, is the
ON
load current multiplied by the on-time. Therefore, the output
voltage ripple (ΔV
V
OUT
C
OUT
Q
OUT
) is
t
×
L
C
ON
==Δ
C
(8)
OUT
where:
C
is the output capacitance,
OUT
I
is the average inductor current,
L
ON
D
(9)
f
SW
t =
and
V
OUT
IN
(10)
D−=
OUT
Choose the output capacitor based on the following equation:
I
C
OUT
L
≥
SW
OUT
−×
)(
IN
(11)
VVf
Δ××
OUTOUT
Table 6. Capacitor Manufacturers
Vendor Phone No. Web Address
AVX 408-573-4150 www.avxcorp.com
Murata 714-852-2001 www.murata.com
Sanyo 408-749-9714 www.sanyovideo.com
Taiyo–Yuden 408-573-4150 www.t-yuden.com
DIODE SELECTION
The output rectifier conducts the inductor current to the output
capacitor and load while the switch is off. For high efficiency,
minimize the forward voltage drop of the diode. For this reason,
Schottky rectifiers are recommended. However, for high
voltage, high temperature applications, where the Schottky
rectifier reverse leakage current becomes significant and can
degrade efficiency, use an ultrafast junction diode.
Make sure that the diode is rated to handle the average output
load current. Many diode manufacturers derate the current
capability of the diode as a function of the duty cycle. Verify
that the output diode is rated to handle the average output load
current with the minimum duty cycle. The minimum duty cycle
of the ADP1612 is
where
D
VV
= (12)
MIN
V
IN(MAX)
V
OUT
is the maximum input voltage.
)(
MAXINOUT
Table 7. Schottky Diode Manufacturers
Vendor Phone No. Web Address
Motorola 602-244-3576 www.mot.com
Diodes, Inc. 805-446-4800 www.diodes.com
Sanyo 310-322-3331 www.irf.com
LOOP COMPENSATION
The ADP1612 uses external components to compensate the
regulator loop, allowing optimization of the loop dynamics for a
given application.
The step-up converter produces an undesirable right-half plane
zero in the regulation feedback loop. This requires compensating the regulator such that the crossover frequency occurs well
below the frequency of the right-half plane zero. The right-half
plane zero is determined by the following equation:
V
V
OUT
2
⎞
R
IN
LOAD
⎟
×
⎟
⎠
(13)
L
×π
⎛
⎜
=2)(
RHPF
Z
⎜
⎝
where:
F
(RHP) is the right-half plane zero.
Z
is the equivalent load resistance or the output voltage
R
LOAD
divided by the load current.
To stabilize the regulator, make sure that the regulator crossover
frequency is less than or equal to one-fifth of the right-half
plane zero and less than or equal to one-fifteenth of the
switching frequency.
Rev. PrA | Page 10 of 14
Page 11
Preliminary Technical Data ADP1612
π
C
×
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The regulator loop gain is
FB
V
IN
V
OUT
ZGZG
OUTCSCOMPMEA
where
A ×××××=
V
VL
V
OUT
(14)
where:
A
is the loop gain.
VL
is the feedback regulation voltage, TBD V.
V
FB
is the regulated output voltage.
V
OUT
is the input voltage.
V
IN
is the error amplifier transconductance gain.
G
MEA
is the impedance of the series RC network from COMP to
Z
COMP
GND.
is the current sense transconductance gain (the inductor
G
CS
current divided by the voltage at COMP), which is internally set
by the ADP1612.
is the impedance of the load and output capacitor.
Z
OUT
To determine the crossover frequency, it is important to note
that, at that frequency, the compensation impedance (Z
dominated by the resistor, and the output impedance (Z
COMP
OUT
) is
) is
dominated by the impedance of the output capacitor. So, when
solving for the crossover frequency, the equation (by definition
of the crossover frequency) is simplified to
V
V
IN
FB
A
|| =
VL
V
V
OUT
OUT
GRG
CSCOMPMEA
1
×××××=
π
2
××
Cf
OUTC
(15)
1
where:
is the crossover frequency.
f
C
R
is the compensation resistor.
COMP
Solving for R
R
COMP
For V
= TBD, G
FB
COMP
=
,
2
= 160 μS, and GCS = TBD S,
MEA
VVCf
××××
OUTOUTOUTC
(16)
GGVV
×××
CSMEAINFB
The capacitor, C2, is chosen to cancel the zero introduced by
output capacitance ESR.
Solving for C2,
C2
For low ESR output capacitance such as with a ceramic capacitor, C2 is optional. For optimal transient performance, the
R
COMP
load transient response of the ADP1612. For most applications,
the compensation resistor should be in the range of 10 kΩ to
400 kΩ, and the compensation capacitor should be in the range
of 100 pF to 2 nF.
SOFT START CAPACITOR
The voltage at SS ramps up slowly by charging the soft start
capacitor (C
The soft start capacitor limits the rate of voltage rise on the
COMP pin, which in turn limits the peak switch current at
startup.
A 47 nF soft start capacitor results in negligible input current
overshoot at startup, and so is suitable for most applications.
However, if an unusually large output capacitor is used, a longer
=
COMP
C
is the compensation capacitor.
COMP
REF
FB
2
ESR
=
R
COMP
and C
COMP
) with an internal 5 μA current source.
SS
soft start period is required to prevent input inrush current.
VVCfTBD
××××
R
COMP
=
V
IN
OUTOUTOUTC
(17)
Once the compensation resistor is known, set the zero formed
by the compensation capacitor and resistor to one-fourth of the
crossover frequency, or
Conversely, if fast startup is a requirement, the soft start
capacitor can be reduced or even removed, allowing the
ADP1612 to start quickly, but allowing greater peak switch
.
current
2
RfC××π
ERROR AMP
Figure 9. Compensation Components
OUT
(19)
(18)
COMPC
g
COMP
m
1
R
C
C2
C
C
04906-026
might need to be adjusted by observing the
Rev. PrA | Page 11 of 14
Page 12
ADP1612 Preliminary Technical Data
www.BDTIC.com/ADI
TYPICAL APPLICATION CIRCUITS
R4
BAV99
VGL
BZT52C5VIS
200
C6
D9
D8
F
10
D7
C5
10nF
C4
10nF
D5
D4
BAV99
D3
C1
10nF
L1
D2
BAV99
R3
200
C3
10
F
C2
1
F
VGH
D5
BZT52C22
V
IN
C
IN
C
SS
Figure 10. Step Up Regulator
Figure 11. Step-Up Regulator with True Shutdown
ADP1612
VIN
ON
3
SHDN
7
FREQ
8 1
SS
SW
FB
COMP
GND
4
Figure 12. TFT LCD Bias Supply
Figure 13. SEPIC Converter
D1
56
2
R
COMP
C
COMP
V
OUT
R1
R2
C
OUT
Rev. PrA | Page 12 of 14
Page 13
Preliminary Technical Data ADP1612
www.BDTIC.com/ADI
LAYOUT GUIDELINES
For high efficiency, good regulation, and stability, a welldesigned printed circuit board layout is required.
Follow these guidelines when designing printed circuit boards
(see Figure 8):
• Keep the low ESR input capacitor, C
GND.
• Keep the high current path from C
L1, to SW and PGND as short as possible.
• Keep the high current path from C
rectifier, D1, and the output capacitor, C
possible.
• Keep high current traces as short and as wide as possible.
• Place the feedback resistors as close to FB as possible to
prevent noise pickup. Connect the ground of the feedback
, close to VIN and
IN
through the inductor,
IN
through L1, the
IN
, as short as
OUT
network directly to an AGND plane that makes a Kelvin
connection to the GND pin.
• Place the compensation components as close as possible to
COMP. Connect the ground of the compensation network
directly to an AGND plane that makes a Kelvin connection
to the GND pin.
• Connect the SS capacitor as close to the device as possible.
Connect the ground of the SS capacitor to an AGND plane
that makes a Kelvin connection to the GND pin.
• Avoid routing high impedance traces near any node
connected to SW or near the inductor to prevent radiated
noise injection.
Rev. PrA | Page 13 of 14
Page 14
ADP1612 Preliminary Technical Data
www.BDTIC.com/ADI
OUTLINE DIMENSIONS
3.00
BSC
85
3.00
BSC
PIN 1
0.65 BSC
4.90
BSC
4
0.15
0.00
0.38
0.22
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 14. 8-Lead Mini Small Outline Package [MSOP]
1.10 MAX
0.23
SEATING
PLANE
Dimensions shown in millimeters
0.08
(RM-8)
8°
0°
0.80
0.60
0.40
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADP1612ARMZ-R7
1
Z = Pb-free part.
1
−40°C to +85°C 8-Lead Mini Small Outline Package [MSOP] RM-8 P11
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR06772-0-6/08(PrA)
Rev. PrA | Page 14 of 14
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