Fully integrated 1.2 A , 0.23 Ω power switch
Pin-selectable 700 kHz or 1.2 MHz PWM frequency
90% efficiency
Adjustable output voltage up to 20 V
3% output regulation accuracy
Adjustable soft start
Input undervoltage lockout
MSOP 8-lead package
The ADP1611 is a step-up dc-to-dc switching converter with an
integrated 1.2 A, 0.23 Ω power switch capable of providing an
output voltage as high as 20 V. With a package height of less
than 1.1 mm, the ADP1611 is optimal for space-constrained
applications such as portable devices or thin film transistor
(TFT) liquid crystal displays (LCDs).
The ADP1611 operates in pulse-width modulation (PWM)
current mode with up to 90% efficiency. Adjustable soft start
prevents inrush currents at startup. The pin-selectable switching
frequency and PWM current-mode architecture allow excellent
transient response, easy noise filtering, and the use of small,
cost-saving external inductors and capacitors.
The ADP1611 is offered in the Pb-free 8-lead MSOP and
operates over the temperature range of −40°C to +85°C.
IN
ADP1611
BIAS
SW
F/F
QSR
DRIVER
5
8
SOFT START
SS
3
SD
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
VIN = 3.3 V, TA = −40°C to +85°C, unless otherwise noted. All limits at temperature extremes are guaranteed by correlation and
characterization using standard statistical quality control (SQC), unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
SUPPLY
Input Voltage V
IN
Quiescent Current
Nonswitching State I
Shutdown I
Switching State
1
Q
SD
Q
IQ
SW
OUTPUT
Output Voltage V
OUT
Load Regulation I
Overall Regulation Line, load, temperature ±3 %
REFERENCE
Feedback Voltage V
FB
Line Regulation VIN = 2.5 V to 5.5 V −0.15 +0.15 %/V
ERROR AMPLIFIER
Transconductance g
Voltage Gain A
m
V
FB Input Bias Current V
SWITCH
SW On Resistance R
ON
SW Leakage Current VSW = 20 V 0.01 20 µA
Peak Current Limit
2
I
CLSET
OSCILLATOR
Oscillator Frequency f
RT = GND 0.49 0.7 0.885 MHz
OSC
RT = IN 0.89 1.23 1.6 MHz
Maximum Duty Cycle D
MAX
SHUTDOWN
Shutdown Input Voltage Low V
Shutdown Input Voltage High V
Shutdown Input Bias Current I
This parameter specifies the average current while switching internally and with SW (Pin 5) floating.
2
Guaranteed by design and not fully production tested.
3
Guaranteed by characterization.
2.5 5.5 V
VFB = 1.3 V, RT = V
IN
390 600 µA
VSD = 0 V 0.01 10 µA
fSW = 1.23 MHz, no load 1 2 mA
V
= 10 mA to 150 mA, V
LOAD
= 10 V 0.05 mV/mA
OUT
IN
20 V
1.212 1.230 1.248 V
∆I = 1 µA
100 µA/V
60 dB
= 1.23 V
FB
10 nA
ISW = 1.0 A 230 600 mΩ
2.0 A
COMP = open, VFB = 1 V, RT = GND 78 83 90 %
0.6 V
2.2 V
VSD = 3.3 V 0.01 1 µA
Rev. 0 | Page 3 of 20
Page 4
ADP1611
7
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
IN, COMP, SD, SS, RT, FB to GND
SW to GND 22 V
RMS SW Pin Current 1.2 A
Operating Ambient Temperature Range −40°C to +85°C
Operating Junction Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θJA, Two Layers 206°C/W
θJA, Four Layers 142°C/W
Lead Temperature Range (Soldering, 60 sec) 300°C
−0.3 V to +6 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Absolute maximum ratings apply individually
only, not in combination. Unless otherwise specified, all other
voltages are referenced to GND.
F/F
QSR
IN
IN
BIAS
CURRENT-
SENSE
AMPLIFIER
ADP1611
DRIVER
C
IN
L1
D1
SW
5
4
GND
V
OUT
C
OUT
04906-002
R1
1.2MHz
00kHz
C
SS
R
C
C
C
V
OUT
FB
R2
V
IN
SD
SS
REF
2
RAMP
GEN
RT
7
OSC
3
SOFT START
8
COMP
16
ERROR
AMP
g
m
COMPARATOR
Figure 2. Block Diagram and Typical Application Circuit
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 4 of 20
Page 5
ADP1611
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
COMP
FB
SD
GND
1
ADP1611
2
TOP VIEW
3
(Not to Scale)
4
8
SS
RT
7
6
IN
SW
5
04906-0-003
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 COMP
Compensation Input. Connect a series resistor-capacitor network from COMP to GND to compensate the
regulator.
2 FB
Output Voltage Feedback Input. Connect a resistive voltage divider from the output voltage to FB to set the
regulator output voltage.
3
SDShutdown Input. Drive SD low to shut down the regulator; drive SD high to turn it on.
4 GND Ground.
5 SW
Switching Output. Connect the power inductor from the input voltage to SW and connect the external rectifier
from SW to the output voltage to complete the step-up converter.
6 IN
Main Power Supply Input. IN powers the ADP1611 internal circuitry. Connect IN to the input source voltage.
Bypass IN to GND with a 10µF or greater capacitor as close to the ADP1611 as possible.
7 RT
Frequency Setting Input. RT controls the switching frequency. Connect RT to GND to program the oscillator to
700 kHz, or connect RT to IN to program it to 1.2 MHz.
8 SS Soft-Start Timing Capacitor Input. A capacitor from SS to GND brings up the output slowly at power-up.
Rev. 0 | Page 5 of 20
Page 6
ADP1611
TYPICAL PERFORMANCE CHARACTERISTICS
100
EFFICIENCY (%)
90
80
70
60
VIN = 5V
F
= 700kHz
SW
L = 10µH
V
OUT
V
OUT
= 15V
= 20V
V
= 10V
OUT
EFFICIENCY (%)
100
90
80
70
60
50
VIN = 3.3V
F
= 1.2MHz
SW
L = 4.7µH
V
= 5V
OUT
V
= 13V
OUT
V
= 8.5V
OUT
50
40
1101001000
LOAD CURRENT (mA)
Figure 4. Output Efficiency vs. Load Current
100
VIN = 5V
= 1.2MHz
F
SW
L = 6.8µH
90
80
70
60
EFFICIENCY (%)
50
40
30
1101001000
LOAD CURRENT (mA)
V
V
= 20V
OUT
V
OUT
Figure 5. Output Efficiency vs. Load Current
OUT
= 15V
= 10V
04906-004
04906-005
40
30
1101001000
LOAD CURRENT (mA)
Figure 7. Output Efficiency vs. Load Current
2.8
V
= 10V
OUT
2.6
2.4
2.2
2.0
1.8
CURRENT LIMIT (A)
1.6
1.4
1.2
–40–1510356085
AMBIENT TEMPERATURE (°C)
= 5.5V
V
IN
V
IN
VIN = 2.5V
Figure 8. Current Limit vs. Ambient Temperature, V
= 3.3V
OUT
04906-007
04906-008
= 10 V
95
VIN = 3.3V
= 700kHz
F
SW
90
L = 10µH
85
80
75
70
EFFICIENCY (%)
65
60
55
50
1101001000
LOAD CURRENT (mA)
V
= 13V
OUT
V
= 8.5V
OUT
Figure 6. Output Efficiency vs. Load Current
V
= 5V
OUT
04906-006
1.4
1.2
1.0
0.8
0.6
0.4
OSCILLATORY FREQUENCY (MHz)
0.2
V
= 10V
OUT
= 3.3V
V
IN
0
–40–1510356085
AMBIENT TEMPERATURE (°C)
RT = V
RT = GND
IN
04906-009
Figure 9. Oscillatory Frequency vs. Ambient Temperature
Rev. 0 | Page 6 of 20
Page 7
ADP1611
1.4
1.2
1.0
0.8
0.6
0.4
OSCILLATORY FREQUENCY (MHz)
0.2
V
= 10V
OUT
0
2.53.03.54.04.55.05.5
SUPPLY VOLTAGE (V)
RT = V
RT = GND
IN
04906-010
0.50
FSW = 700kHz
V
= 1.3V
FB
0.45
0.40
0.35
0.30
QUIESCENT CURRENT (mA)
0.25
0.20
–40–1510356085
AMBIENT TEMPERATURE (°C)
= 5.5V
V
IN
V
IN
VIN = 2.5V
= 3.3V
04906-013
Figure 10. Oscillatory Frequency vs. Supply Voltage
350
300
)
Ω
250
200
SWITCH RESISTANCE (m
150
100
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 11. Switch Resistance vs. Ambient Temperature
VIN = 3.3V
1.242
1.232
1.222
REGULATION FB VOLTAGE (V)
1.212
–40–1510356085
AMBIENT TEMPERATURE (°C)
VIN = 5.5V
= 3.3V
V
IN
VIN = 2.5V
04906-011
04906-012
Figure 13. Quiescent Current vs. Ambient Temperature
0.60
FSW = 1.23kHz
= 1.3V
V
FB
0.55
0.50
0.45
0.40
QUIESCENT CURRENT (mA)
0.35
0.30
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 14. Quiescent Current vs. Ambient Temperature
1.4
FSW = 700kHz
1.3
1.2
1.1
1.0
0.9
0.8
0.7
SUPPLY CURRENT (mA)
0.6
0.5
0.4
= 1V
V
FB
–40–1510356085
AMBIENT TEMPERATURE (°C)
= 5.5V
V
IN
= 3.3V
V
IN
VIN = 2.5V
= 5.5V
V
IN
VIN = 3.3V
VIN = 2.5V
04906-014
04906-015
Figure 12. Regulation FB Voltage vs. Ambient Temperature
Figure 15. Supply Current vs. Ambient Temperature
Rev. 0 | Page 7 of 20
Page 8
ADP1611
2.0
FSW = 1.23kHz
V
1.8
300
= 1V
FB
250
1.6
1.4
1.2
1.0
SUPPLY CURRENT (mA)
0.8
0.6
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 16. Supply Current vs. Ambient Temperature
1.0
VIN= 3.3V
SD = 0.4V
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
SWITCH LEAKAGE CURRENT (µA)
0.1
= 20V
V
SW
0
–401570125
AMBIENT TEMPERATURE (°C)
= 5.5V
V
IN
VIN = 3.3V
VIN = 2.5V
04906-016
04906-017
200
150
UVLO HYS (mV)
100
50
0
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 19. UVLO Hysteresis vs. Ambient Temperature
3
CH1 = IL 500mA/DIV
CH2 = OUTPUT RIPPLE 100mV/DIV
1
CH3 = S
10V/DIV
W
2
CH1 10.0mVΩM2.00µsA CH3 12.4V
CH3 10.0V
CH2 100mV
VIN = 5V, V
I
LOAD
L = 10µH, C
T 0.00000s
= 20V,
OUT
= 200mA, FSW = 700kHz,
= 10µF
OUT
04906-019
04906-020
Figure 17. Switch Leakage Current vs. Ambient Temperature
1.2
VIN = 3.5V
1.0
0.8
0.6
0.4
SHUTDOWN THRESHOLD (V)
0.2
0
–401570125
AMBIENT TEMPERATURE (°C)
Figure 18. Shutdown Threshold vs. Ambient Temperature
V
IH
V
IL
04906-018
Rev. 0 | Page 8 of 20
Figure 20. Switching Waveform in Continuous Conduction
3
CH1 = IL 500mA/DIV
CH2 = OUTPUT RIPPLE 100mV/DIV
CH3 = S
10V/DIV
W
1
2
CH1 10.0mVΩM2.00µsA CH3 12.2V
CH3 10.0V
CH2 100mV
VIN = 5V, V
I
LOAD
L = 10µH, C
= 20V,
OUT
= 20mA, FSW = 700kHz,
= 10µF
OUT
Figure 21. Switching Waveform in Discontinuous Conduction
04906-021
Page 9
ADP1611
2
VIN = 5V
= 20V
V
OUT
= 10µF
C
CH1 = I
CH2 = V
1
CH1 10.0mVΩM2.00µsA CH1 4.8mV
LOAD
OUT
200mA/DIV
200mV/DIV
CH2 200mV
T 571.200µs
Figure 22. Load Transient Response, 700 kHz, V
OUT
L = 10µH
= 700kHz
F
SW
= 400kΩ
R
C
= 100pF
C
C
OUT
2
1
CH1 = I
CH2 = V
LOAD
OUT
200mA/DIV
200mV/DIV
VIN = 5V
= 20V
V
OUT
= 10µF
C
OUT
L = 10µH
= 1.2MHz
F
SW
= 400kΩ
R
C
= 100pF
C
C
= 20 V
04906-022
4
CH1 = IL 2A/DIV
CH2 = V
CH3 = S
2
1
3
CH1 10.0mVΩM200µsA CH3 680mV
CH3 1.00V
CH4 = COMP 2V/DIV
CH2 10.0V
CH4 2.00V
OUT
D
10V/DIV
1V/DIV
Figure 24. Start-Up Response from Shutdown, C
VIN = 5V
V
OUT
= 200mA
I
OUT
= 0F
C
SS
= 20V
SS
4
CH1 = IL 2A/DIV
2
1
CH2 = V
CH3 = S
CH4 = COMP 2V/DIV
OUT
D
10V/DIV
1V/DIV
VIN = 5V
V
OUT
= 200mA
I
OUT
= 100nF
C
SS
= 20V
04906-024
= 0 F
CH1 10.0mVΩM200µsA CH1 7.20mV
Figure 23. Load Transient Response, 1.2 MHz, V
CH2 200mV
T 488.000µs
OUT
= 20 V
04906-023
3
CH1 10.0mVΩM400µsA CH3 680mV
CH3 1.00V
Figure 25. Start-Up Response from Shutdown, C
CH2 10.0V
CH4 2.00V
= 100 nF
SS
04906-025
Rev. 0 | Page 9 of 20
Page 10
ADP1611
THEORY OF OPERATION
The ADP1611 current-mode step-up switching converter
converts a 2.5 V to 5.5 V input voltage up to an output voltage
as high as 20 V. The 1.2 A internal switch allows a high output
current, and the high 1.2 MHz switching frequency allows tiny
external components. The switch current is monitored on a
pulse-by-pulse basis to limit it to 2 A.
CURRENT-MODE PWM OPERATION
The ADP1611 uses current-mode architecture to regulate the
output voltage. The output voltage is monitored at FB through a
resistive voltage divider. The voltage at FB is compared to the
internal 1.23 V reference by the internal transconductance error
amplifier to create an error current at COMP. A series resistorcapacitor at COMP converts the error current to a voltage.
The switch current is internally measured and added to the
stabilizing ramp, and the resulting sum is compared to the error
voltage at COMP to control the PWM modulator. This currentmode regulation system allows fast transient response, while
maintaining a stable output voltage. By selecting the proper
resistor-capacitor network from COMP to GND, the regulator
response is optimized for a wide range of input voltages, output
voltages, and load conditions.
ON/OFF CONTROL
The SD input turns the ADP1611 regulator on or off. Drive SD
low to turn off the regulator and reduce the input current to
10 nA. Drive
high to turn on the regulator.
SD
When the step-up dc-to-dc switching converter is turned off,
there is a dc path from the input to the output through the
inductor and output rectifier. This causes the output voltage to
remain slightly below the input voltage by the forward voltage
of the rectifier, preventing the output voltage from dropping to
0 when the regulator is shut down. Figure 28 shows the application circuit to disconnect the output voltage from the input
voltage at shutdown.
SETTING THE OUTPUT VOLTAGE
The ADP1611 features an adjustable output voltage range of VIN
to 20 V. The output voltage is set by the resistive voltage divider
(R1 and R2 in Figure 2) from the output voltage (V
1.230 V feedback input at FB. Use the following formula to
determine the output voltage:
= 1.23 × (1 + R1/R2) (1)
V
OUT
OUT
) to the
FREQUENCY SELECTION
The ADP1611 frequency is user-selectable and operates at
either 700 kHz to optimize the regulator for high efficiency
or at 1.2 MHz for small external components. Connect RT to
IN for 1.2 MHz operation, or connect RT to GND for 700 kHz
operation. To achieve the maximum duty cycle, which might
be required for converting a low input voltage to a high output
voltage, use the lower 700 kHz switching frequency.
SOFT START
To prevent input inrush current at startup, connect a capacitor
from SS to GND to set the soft-start period. When the device is
in shutdown (
2.4 V undervoltage lockout voltage, SS is internally shorted to
GND to discharge the soft start capacitor. Once the ADP1611 is
turned on, SS sources 3 µA to the soft-start capacitor at startup.
As the soft-start capacitor charges, it limits the voltage at
COMP. Because of the current-mode regulator, the voltage at
COMP is proportional to the switch peak current, and,
therefore, the input current. By slowly charging the soft-start
capacitor, the input current ramps slowly to prevent it from
overshooting excessively at startup.
is at GND) or the input voltage is below the
SD
Use an R2 resistance of 10 kΩ or less to prevent output voltage
errors due to the 10 nA FB input bias current. Choose R1 based
on the following formula:
V
−
23.1
R1 = R2 ×
⎛
OUT
⎜
⎝
⎞
(2)
⎟
23.1
⎠
INDUCTOR SELECTION
The inductor is an essential part of the step-up switching
converter. It stores energy during the on time, and transfers that
energy to the output through the output rectifier during the off
time. Use inductance in the range of 1 µH to 22 µH. In general,
lower inductance values have higher saturation current and
lower series resistance for a given physical size. However, lower
inductance results in higher peak current that can lead to
reduced efficiency and greater input and/or output ripple and
noise. Peak-to-peak inductor ripple current at close to 30% of
the maximum dc input current typically yields an optimal
compromise.
For determining the inductor ripple current, the input (V
output (V
) voltages determine the switch duty cycle (D) by
OUT
the following equation:
VV−
D =
INOUT
V
(3)
OUT
) and
IN
Rev. 0 | Page 10 of 20
Page 11
ADP1611
×
Table 4. Inductor Manufacturers
Vendor Part L (µH) Max DC Current Max DCR (mΩ) Height (mm)
Using the duty cycle and switching frequency, fSW, determine
the on time by the following equation:
D
=
t
ON
The inductor ripple current (∆I
∆
IL =
(4)
f
SW
) in steady state is
L
×
tV
ONIN
(5)
L
Solving for the inductance value, L,
×
ONIN
L =
(6)
ItV∆
L
Make sure that the peak inductor current (the maximum input
current plus half the inductor ripple current) is below the rated
saturation current of the inductor. Likewise, make sure that the
maximum rated rms current of the inductor is greater than the
maximum dc input current to the regulator.
For duty cycles greater than 50%, which occur with input
voltages greater than one-half the output voltage, slope
compensation is required to maintain stability of the currentmode regulator. For stable current-mode operation, ensure that
the selected inductance is equal to or greater than L
VV
−
LL
MIN
OUT
=>
IN
(7)
f
×
A8.1
SW
MIN
CHOOSING THE INPUT AND OUTPUT CAPACITORS
The ADP1611 requires input and output bypass capacitors to
supply transient currents while maintaining constant input and
output voltage. Use a low equivalent series resistance (ESR)
input capacitor, 10 µF or greater, to prevent noise at the
ADP1611 input. Place the capacitor between IN and GND as
close to the ADP1611 as possible. Ceramic capacitors are
preferred because of their low ESR characteristics. Alternatively,
use a high value, medium ESR capacitor in parallel with a 0.1 µF
low ESR capacitor as close to the ADP1611 as possible.
The output capacitor maintains the output voltage and supplies
current to the load while the ADP1611 switch is on. The value
and characteristics of the output capacitor greatly affect the
output voltage ripple and stability of the regulator. Use a low
ESR output capacitor; ceramic dielectric capacitors are
preferred.
For very low ESR capacitors, such as ceramic capacitors, the
ripple current due to the capacitance is calculated as follows.
Because the capacitor discharges during the on time, t
charge removed from the capacitor, Q
, is the load current
C
ON
, the
multiplied by the on time. Therefore, the output voltage ripple
) is
(∆V
OUT
Q
V
OUT
C
C
OUT
tI
×
ONL
==∆
(8)
C
OUT
where:
C
is the output capacitance.
OUT
is the average inductor current.
I
L
t=
ON
D
f
SW
and
=
VVD−
INOUT
V
OUT
Choose the output capacitor based on the following equation:
The output rectifier conducts the inductor current to the output
capacitor and load while the switch is off. For high efficiency,
minimize the forward voltage drop of the diode. For this reason,
Schottky rectifiers are recommended. However, for high
voltage, high temperature applications where the Schottky
rectifier reverse leakage current becomes significant and can
degrade efficiency, use an ultrafast junction diode.
Make sure that the diode is rated to handle the average output
load current. Many diode manufacturers derate the current
capability of the diode as a function of the duty cycle. Verify
that the output diode is rated to handle the average output load
current with the minimum duty cycle. The minimum duty cycle
of the ADP1611 is
−
VV
−
D
where V
=
MIN
is the maximum input voltage.
IN-MAX
MAXINOUT
V
OUT
(10)
Table 6. Schottky Diode Manufacturers
Vendor Phone No. Web Address
On Semiconductor 602-244-6600 www.onsemi.com
Diodes, Inc. 805-446-4800 www.diodes.com
Central Semiconductor 631-435-1110 www.centralsemi.com
Sanyo 310-322-3331 www.sanyo.com
LOOP COMPENSATION
The ADP1611 uses external components to compensate the
regulator loop, allowing optimization of the loop dynamics for a
given application.
The step-up converter produces an undesirable right-half plane
zero in the regulation feedback loop. This requires compensating the regulator such that the crossover frequency occurs
well below the frequency of the right-half plane zero. The righthalf plane zero is determined by the following equation:
2
⎛
⎞
Z
⎜
V
OUT
⎝
V
IN
⎜
=
)(
RHPF
where:
(RHP) is the right-half plane zero.
F
Z
R
is the equivalent load resistance or the output voltage
LOAD
divided by the load current.
To stabilize the regulator, ensure that the regulator crossover
frequency is less than or equal to one-fifth of the right-half
plane zero and less than or equal to one-fifteenth of the
switching frequency.
R
LOAD
⎟
×
⎟
⎠
(11)
L
×
π
2
The regulator loop gain is
where:
A
V
V
V
G
Z
GND.
G
current divided by the voltage at COMP), which is internally set
by the ADP1611.
Z
To determine the crossover frequency, it is important to note
that, at that frequency, the compensation impedance (Z
dominated by the resistor, and the output impedance (Z
dominated by the impedance of the output capacitor. So, when
solving for the crossover frequency, the equation (by definition
of the crossover frequency) is simplified to
where f
compensation resistor.
Solving for R
For V
Once the compensation resistor is known, set the zero formed
by the compensation capacitor and resistor to one-fourth of the
crossover frequency, or
where C
The capacitor, C2, is chosen to cancel the zero introduced by
output capacitance ESR.
Solving for C2,
V
V
A×××××=
VL
V
OUT
is the loop gain.
VL
is the feedback regulation voltage, 1.230 V.
FB
is the regulated output voltage.
OUT
is the input voltage.
IN
is the error amplifier transconductance gain.
MEA
is the impedance of the series RC network from COMP to
COMP
is the current-sense transconductance gain (the inductor
CS
is the impedance of the load and output capacitor.
OUT
A
||=
VL
is the crossover frequency and R
C
R
COMP
= 1.23, G
FB
R
COMP
COMP
COMP
IN
FB
V
OUT
V
V
IN
V
=
FB
OUT
COMP
2
=
=
G
MEA
V
OUT
π
= 100 µS, and GCS = 2 S
MEA
4
1055.2
2
π
(16)
RfC××
COMPC
R
V
COMP
××××
×××
GGVV
IN
G
VVCf
OUTOUTOUTC
CSMEAINFB
is the compensation capacitor.
ZGZG
(12)
OUTCSCOMPMEA
1
×××××=
CS
π
2
CCf
××
OUT
is the
COMP
(14)
VVCf
×××××
OUTOUTOUTC
(15)
COMP
OUT
(13)
1
) is
) is
Rev. 0 | Page 12 of 20
CESRC2×
OUT
=
R
COMP
(17)
Page 13
ADP1611
For low ESR output capacitance, such as with a ceramic capacitor, C2 is optional. For optimal transient performance, the
R
COMP
and C
might need to be adjusted by observing the
COMP
load transient response of the ADP1611. For most applications,
the compensation resistor should be in the range of 30 kΩ to
400 kΩ, and the compensation capacitor should be in the range
of 100 pF to 1.2 nF. Table 7 shows external component values
for several applications.
ERROR AMP
REF
FB
2
Figure 26. Compensation Components
g
COMP
m
1
R
C
C2
C
C
04906-026
SOFT-START CAPACITOR
The voltage at SS ramps up slowly by charging the soft-start
capacitor (C
lists the values for the soft-start period, based on maximum
output current and maximum switching frequency.
The soft-start capacitor limits the rate of voltage rise on the
COMP pin, which in turn limits the peak switch current at
startup. Table 8 shows a typical soft-start period, t
maximum output current, I
A 20 nF soft-start capacitor results in negligible input current
overshoot at startup, and so is suitable for most applications.
However, if an unusually large output capacitor is used, a longer
soft-start period is required to prevent input inrush current.
Conversely, if fast startup is a requirement, the soft-start
capacitor can be reduced or even removed, allowing the
ADP1611 to start quickly, but allowing greater peak switch
current (see Figure 24 and Figure 25).
) with an internal 3 µA current source. Table 8
SS
, at
SS
, for several conditions.
OUT_MAX
Table 7. Recommended External Components for Popular Input/Output Voltage Conditions
The circuit in Figure 27 shows the ADP1611 in a step-up
configuration. The ADP1611 is used here to generate a 15 V
regulator with the following specifications:
= 3.5 V to 5.5 V
V
IN
= 15 V
V
OUT
I
≤ 400 mA
OUT
The output can be set to the desired voltage using Equation 2.
Use Equations 16 and 17 to change the compensation network.
L1
4.7µH
5V15V
C
IN
10µF
C
SS
22nF
ADP1611
IN
ON
3
SD
7
RT
81
SS
GND
4
SW
FB
COMP
Figure 27. 5 V to 15 V Step-Up Regulator
STEP-UP DC-TO-DC CONVERTER WITH TRUE
SHUTDOWN
Some battery-powered applications require very low standby
current. The ADP1611 typically consumes 10 nA from the
input, which makes it suitable for these applications. However,
the output is connected to the input through the inductor and
the rectifying diode, allowing load current draw from the input
while shut down. The circuit in Figure 28 enables the ADP1611
to achieve output load disconnect at shutdown. To shut down
the ADP1611 and disconnect the output from the input, drive
pin below 0.4 V.
the
SD
4.7µH
D1
56
R1
112kΩ
2
10kΩ
R
COMP
220kΩ
C
COMP
150pF
R2
C
OUT
10µF
04906-027
TFT LCD BIAS SUPPLY
Figure 29 shows a power supply circuit for TFT LCD module
applications. This circuit has +10 V, −5 V, and +22 V outputs.
The +10 V is generated in the step-up configuration. The −5 V
and +22 V are generated by the charge-pump circuit. During
step-up , the SW node switches between 10 V and ground
(neglecting forward drop of the diode and on resistance of the
switch). When the SW node is high, C5 charges up to 10 V. C5
holds its charge and forward-biases D8 to charge C6 to −10 V.
The Zener diode, D9, clamps and regulates the output to −5 V.
R3
200Ω
C3
10µF
C2
1µF
R1
R2
C
10µF
.3V
C
10µF
R4
BAV99
VGL
–5V
BZT52C5VIS
IN
C
SS
22nF
200Ω
C6
D9
10µF
L1
4.7µH
ADP1611
IN
ON
3
SD
7
RT
81
SS
GND
4
D8
D7
SW
FB
COMP
C5
10nF
56
2
C4
10nF
C1
10nF
D1
R
COMP
220kΩ
C
COMP
150pF
D5
D4
BAV99
D3
D2
BAV99
71.3kΩ
10kΩ
Figure 29. TFT LCD Bias Supply
The VGH output is generated in a similar manner by the
charge-pump capacitors, C1, C2, and C4. The output voltage is
tripled and regulated down to 22 V by the Zener diode, D5.
10V
OUT
VGH
22V
D5
BZT52C22
04906-029
Q1 FDC6331
5V15V
A
10kΩ
Q1
B
10µF
ON
22nF
ADP1611
IN
3
SHDN
7
RT
81
SS
GND
SW
FB
COMP
4
56
112kΩ
2
10kΩ
220kΩ
150pF
10µF
04906-028
Figure 28. Step-Up Regulator with True Shutdown
Rev. 0 | Page 14 of 20
Page 15
ADP1611
SEPIC POWER SUPPLY
The circuit in Figure 30 shows the ADP1611 in a single-ended
primary inductance converter (SEPIC) topology. This topology
is useful for an unregulated input voltage, such as a batterypowered application in which the input voltage can vary
between 2.7 V to 5 V, and the regulated output voltage falls
within the input voltage range.
The input and the output are dc-isolated by a coupling capacitor, C1. In steady state, the average voltage of C1 is the input
voltage. When the ADP1611 switch turns on and the diode
turns off, the input voltage provides energy to L1, and C1
provides energy to L2. When the ADP1611 switch turns off and
the diode turns on, the energy in L1 and L2 is released to charge
the output capacitor, C
to supply current to the load.
, and the coupling capacitor, C1, and
OUT
L1
4.7µH
C1
2.5V–5.5V3.3V
C
IN
10µF
C
SS
22nF
ADP1611
IN
ON
3
SD
7
RT
81
SS
GND
4
SW
COMP
10µF
56
R1
16.8kΩ
L2
4.7µH
2
FB
R
COMP
60kΩ
C
COMP
1nF
10kΩ
C
OUT
10µF
R2
Figure 30. 3.3 V DC-to-DC Converter
04906-030
Rev. 0 | Page 15 of 20
Page 16
ADP1611
LAYOUT PROCEDURE
To achieve high efficiency, good regulation, and stability, a welldesigned printed circuit board layout is required. Where
possible, use the sample application board layout as a model.
Follow these guidelines when designing printed circuit boards
(see Figure 1):
•Keep the low ESR input capacitor, C
GND.
•Keep the high current path from C
L1, to SW and PGND as short as possible.
, close to IN and
IN
through the inductor,
IN
• Keep high current traces as short and as wide as possible.
• Place the feedback resistors as close to FB as possible to
prevent noise pickup.
•Place the compensation components as close as possible to
COMP.
•Avoid routing high impedance traces near any node
connected to SW or near the inductor to prevent radiated
noise injection.
•Keep the high current path from C
rectifier, D1, and the output capacitor, C
possible.