Fully integrated 1.2 A , 0.2 Ω, power switch
Pin-selectable 700 kHz or 1.2 MHz PWM frequency
92% efficiency
Adjustable output voltage up to 12 V
3% output regulation accuracy
Adjustable soft start
Input undervoltage lockout
MSOP 8-lead package
The ADP1610 is a dc-to-dc step-up switching converter with an
integrated 1.2 A, 0.2 Ω power switch capable of providing an
output voltage as high as 12 V. With a package height of less that
1.1 mm, the ADP1610 is optimal for space-constrained
applications such as portable devices or thin film transistor
(TFT) liquid crystal displays (LCDs).
The ADP1610 operates in pulse-width modulation (PWM)
current mode with up to 92% efficiency. Adjustable soft start
prevents inrush currents at startup. The pin-selectable switching
frequency and PWM current-mode architecture allow excellent
transient response, easy noise filtering, and the use of small,
cost-saving external inductors and capacitors.
The ADP1610 is offered in the Pb-free 8-lead MSOP and
operates over the temperature range of −40°C to +85°C.
IN
ADP1610
BIAS
SW
F/F
QSR
DRIVER
5
8
SOFT START
SS
3
SD
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
VIN = 3.3 V, TA = −40°C to +85°C, unless otherwise noted.
All limits at temperature extremes are guaranteed by correlation and characterization using standard statistical quality control (SQC),
unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
SUPPLY
Input Voltage V
IN
Quiescent Current
Nonswitching State I
Shutdown I
Switching State
1
Q
SD
Q
IQ
SW
OUTPUT
Output Voltage V
OUT
Load Regulation I
Overall Regulation Line, load, temperature
REFERENCE
Feedback Voltage V
FB
Line Regulation VIN = 2.5 V to 5.5 V −0.15 +0.15 %/V
ERROR AMPLIFIER
Transconductance g
Voltage Gain A
m
V
FB Input Bias Current V
SWITCH
SW On Resistance R
ON
SW Leakage Current VSW = 12 V 0.01 20 µA
Peak Current Limit
2
I
CLSET
OSCILLATOR
Oscillator Frequency f
RT = GND 0.49 0.7 0.885 MHz
OSC
RT = IN 0.89 1.23 1.6 MHz
Maximum Duty Cycle D
MAX
SHUTDOWN
Shutdown Input Voltage Low V
Shutdown Input Voltage High V
Shutdown Input Bias Current I
This parameter specifies the average current while switching internally and with SW (Pin 5) floating.
2
Guaranteed by design and not fully production tested.
3
Guaranteed by characterization.
2.5 5.5 V
VFB = 1.3 V, RT = V
IN
390 600 µA
VSD = 0 V 0.01 10 µA
fSW = 1.23 MHz, no load 1 2 mA
V
= 10 mA to 150 mA, V
LOAD
= 10 V 0.05 mV/mA
OUT
IN
12 V
±3
%
1.212 1.230 1.248 V
∆I = 1 µA
100 µA/V
60 dB
= 1.23 V
FB
10 nA
ISW = 1.0 A 200 400 mΩ
2.0 A
COMP = open, VFB = 1 V, RT = GND 78 83 90 %
Nonswitching state 0.6 V
Switching state 2.2 V
VSD = 3.3 V 0.01 1 µA
Rev. 0 | Page 3 of 16
Page 4
ADP1610
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
IN, COMP, SD, SS, RT, FB to GND
SW to GND 14 V
RMS SW Pin Current 1.2 A
Operating Ambient Temperature Range −40°C to +85°C
Operating Junction Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θJA, Two Layers 206°C/W
θJA, Four Layers 142°C/W
Lead Temperature Range (Soldering, 60 s) 300°C
V
OUT
R1
FB
2
R2
V
IN
1.2MHz
700kHz
RT
7
3
SD
SS
C
SS
8
−0.3 V to +6 V
R
C
C
C
COMP
16
ERROR
REF
RAMP
AMP
g
m
GEN
OSC
SOFT START
COMPARATOR
Figure 2. Block Diagram and Typical Application Circuit
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Absolute maximum ratings apply individually
only, not in combination. Unless otherwise specified, all other
voltages are referenced to GND.
IN
C
IN
L1
D1
V
OUT
C
OUT
04472-002
F/F
QSR
IN
BIAS
CURRENT
SENSE
AMPLIFIER
ADP1610
DRIVER
SW
5
4
GND
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 4 of 16
Page 5
ADP1610
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
COMP
GND
FB
SD
ADP1610
2
TOP VIEW
3
(Not to Scale)
4
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 COMP
Compensation Input. Connect a series resistor-capacitor network from COMP to GND to compensate the
regulator.
2 FB
Output Voltage Feedback Input. Connect a resistive voltage divider from the output voltage to FB to set the
regulator output voltage.
3
SDShutdown Input. Drive SD low to shut down the regulator; drive SD high to turn it on.
4 GND Ground.
5 SW
Switching Output. Connect the power inductor from the input voltage to SW and connect the external rectifier
from SW to the output voltage to complete the step-up converter.
6 IN
Main Power Supply Input. IN powers the ADP1610 internal circuitry. Connect IN to the input source voltage.
Bypass IN to GND with a 10µF or greater capacitor as close to the ADP1610 as possible.
7 RT
Frequency Setting Input. RT controls the switching frequency. Connect RT to GND to program the oscillator to
700 kHz, or connect RT to IN to program it to 1.2 MHz.
8 SS Soft Start Timing Capacitor Input. A capacitor from SS to GND brings up the output slowly at power-up.
8
SS
RT
7
IN
6
5
SW
04472-003
Rev. 0 | Page 5 of 16
Page 6
ADP1610
TYPICAL PERFORMANCE CHARACTERISTICS
100
V
= 10V
OUT
= 700kHz
F
SW
90
L = 10µH
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
1101001000
LOAD CURRENT (mA)
Figure 4. Output Efficiency vs. Load Current
100
V
= 10V
OUT
F = 1.2MHz
90
L = 4.7µH
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
1101001000
LOAD CURRENT (mA)
Figure 5. Output Efficiency vs. Load Current
100
V
= 7.5V
OUT
= 700kHz
F
SW
L = 10µH
90
80
VIN = 5.5V
VIN = 3.3V
VIN = 2.5V
04472-005
VIN = 5.5V
VIN = 3.3V
VIN = 2.5V
04472-006
VIN = 5.5V
VIN = 3.3V
VIN = 2.5V
100
V
= 7.5V
OUT
F
= 1.2MHz
SW
L = 4.7µH
90
80
70
60
EFFICIENCY (%)
50
40
30
1101001000
LOAD CURRENT (mA)
Figure 7. Output Efficiency vs. Load Current
2.4
2.2
2.0
1.8
1.6
CURRENT LIMIT (A)
1.4
1.2
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 8. Current Limit vs. Ambient Temperature, V
1.4
1.2
1.0
VIN = 5.5V
VIN = 3.3V
VIN = 2.5V
= 5.5V
V
IN
= 3.3V
V
IN
VIN = 2.5V
= 10 V
OUT
RT = V
04472-008
04472-009
IN
70
60
EFFICIENCY (%)
50
40
30
1101001000
LOAD CURRENT (mA)
Figure 6. Output Efficiency vs. Load Current
04472-007
Rev. 0 | Page 6 of 16
0.8
0.6
0.4
OSCILLATORY FREQUENCY (MHz)
V
0.2
0
–40–1510356085
= 10V
OUT
VIN= 3.3V
AMBIENT TEMPERATURE (°C)
Figure 9. Oscillatory Frequency vs. Ambient Temperature
RT = GND
04472-010
Page 7
ADP1610
4.4
1.2
1.0
0.8
0.6
0.4
OSCILLATORY FREQUENCY (MHz)
0.2
V
= 10V
OUT
0
2.53.03.54.04.55.05.5
SUPPLY VOLTAGE (V)
Figure 10. Oscillatory Frequency vs. Supply Voltage
350
300
RT = V
RT = GND
VIN = 2.5V
IN
04472-011
0.50
FSW = 700kHz
V
= 1.3V
FB
0.45
0.40
0.35
0.30
QUIESCENT CURRENT (mA)
0.25
0.20
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 13. Quiescent Current vs. Ambient Temperature
0.60
FSW = 1.23kHz
V
= 1.3V
FB
0.55
VIN = 5.5V
= 3.3V
V
IN
VIN = 2.5V
04472-014
250
200
150
100
SWITCH RESISTANCE (mΩ)
50
0
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 11. Switch Resistance vs. Ambient Temperature
1.245
1.24
1.235
1.23
1.225
1.22
FB REGULATION VOLTAGE (V)
1.215
= 3.3V
V
IN
VIN = 5.5V
04472-012
0.50
0.45
0.40
QUIESCENT CURRENT (mA)
0.35
0.30
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 14. Quiescent Current vs. Ambient Temperature
2.0
FSW = 1.23kHz
= 1V
V
FB
1.8
1.6
1.4
1.2
1.0
SUPPLY CURRENT (mA)
0.8
= 5.5V
V
IN
= 3.3V
V
IN
VIN = 2.5V
= 5.5V
V
IN
VIN = 3.3V
VIN = 2.5V
04472-015
1.21
–40–10–25205503580 95 11065125
AMBIENT TEMPERATURE (°C)
Figure 12. FB Regulation Voltage vs. Ambient Temperature
04472-013
Rev. 0 | Page 7 of 16
0.6
–40–1510356085
AMBIENT TEMPERATURE (°C)
Figure 15. Supply Current vs. Ambient Temperature
04472-016
Page 8
ADP1610
1.4
FSW = 700kHz
1.3
V
1.2
1.1
1.0
0.9
0.8
0.7
SUPPLY CURRENT (mA)
0.6
0.5
0.4
–40–1510356085
Figure 16. Supply Current vs. Ambient Temperature
3.5
VIN= 3.3V
SD = 0.4V
3.0
2.5
2.0
CH1 = IL 200mA/DIV
= 1V
FB
VIN = 5.5V
VIN = 3.3V
VIN = 2.5V
04472-017
AMBIENT TEMPERATURE (°C)
CH2 = V
2
1
CH1 10.0mVΩ CH2 5.00VM400nsA CH2 10.0V
SW
5V/DIV
VIN = 3.3V
= 10V
V
OUT
= 20mA
I
LOAD
= 700kHz
F
SW
L = 10µH
T 136.000ns
04472-020
Figure 19. Switching Waveform in Discontinuous Conduction
VIN = 3.3V, V
C
= 10µF, L = 10µH, RC= 130Ω
OUT
C
= 270pF, FSW = 700kHz
C
CH1 = V
CH2 = I
1
OUT,
OUT,
= 10V
OUT
200mV/DIV
200mA/DIV
1.5
1.0
SUPPLY CURRENT (µA)
0.5
0
–401570125
TEMPERATURE (°C)
Figure 17. Supply Current in Shutdown vs. Ambient Temperature
CH1 = IL 500mA/DIV
CH2 = V
2
1
CH1 10.0mVΩ CH2 5.00VM400nsA CH2 10.0V
SW
5V/DIV
VIN = 3.3V
= 10V
V
OUT
= 200mA
I
LOAD
= 700kHz
F
SW
L = 10µH
T 136.000ns
Figure 18. Switching Waveform in Continuous Conduction
04472-018
04472-019
2
CH1 200mVCH2 10.0mVΩ M200µsA CH2 7.60mV
Figure 20. Load Transient Response, 700 kHz , V
OUT
04472-021
= 10 V
VIN = 3.3V, V
C
= 10µF, L = 4.7µH, RC= 220kΩ
OUT
C
= 150pF, FSW = 1.2MHz
C
CH1 = V
CH2 = I
1
2
CH1 200mVCH2 10.0mVΩ M200µsA CH2 7.60mV
Figure 21. Load Transient Response, 1.2 MHz, V
OUT
, 200mV/DIV
OUT
, 200mA/DIV
OUT
= 10V
OUT
04472-022
= 10 V
Rev. 0 | Page 8 of 16
Page 9
ADP1610
2
4
CH1 = IL 1A/DIV
CH2 = V
3
1
CH1 10.0mVΩ CH2 2.00VM100µsA CH2 680mV
CH3 10.0VCH4 10.00V
IN
CH3 = V
OUT
CH4 = SW,FSW= 700kHz
T 414.800µs
Figure 22. Start-Up Response from V
VIN = 3.3V
V
OUT
I
OUT
C
SS
, SS = 0 nF
IN
= 0.2A
= 0nF
2
4
CH1 = IL 1A/DIV
CH2 = V
3
IN
CH3 = V
OUT
CH4 = SW,FSW = 700kHz
VIN = 3.3V
V
OUT
I
= 0.2A
OUT
C
= 10nF
SS
= 10V
= 10V
04472-023
2
4
CH1 = IL 1A/DIV
CH2 = V
3
1
CH1 10.0mVΩ CH2 2.00VM100µsA CH2 1.72V
CH3 10.0VCH4 10.00V
IN
CH3 = V
OUT
CH4 = SW,FSW= 700kHz
T 405.600µs
VIN = 3.3V
V
OUT
I
= 0.2A
OUT
C
= 0nF
SS
Figure 24. Start-Up Response from Shutdown, SS = 0 nF
2
4
I
CH1 = IL 1A/DIV
3
CH2 = SD
CH3 = V
OUT
CH4 = SW,FSW= 700kHz
V
V
C
OUT
= 3.3V
IN
OUT
SS
= 0.2A
= 10nF
= 10V
04472-025
= 10V
1
CH1 10.0mVΩ CH2 2.00VM100µsA CH2 680mV
CH3 10.0VCH4 10.00V
Figure 23. Start-Up Response from V
T 414.800µs
, SS = 10 nF
IN
04472-024
1
CH1 10.0mVΩ CH2 2.00VM100µsA CH2 1.72V
CH3 10.0VCH4 10.00V
T 405.600µs
Figure 25. Start-Up Response from Shutdown, SS = 10 nF
04472-026
Rev. 0 | Page 9 of 16
Page 10
ADP1610
−
−
THEORY OF OPERATION
The ADP1610 current-mode step-up switching converter
converts a 2.5 V to 5.5 V input voltage up to an output voltage as
high as 12 V. The 1.2 A internal switch allows a high output
current, and the high 1.2 MHz switching frequency allows tiny
external components. The switch current is monitored on a
pulse-by-pulse basis to limit it to 2 A.
CURRENT-MODE PWM OPERATION
The ADP1610 uses current-mode architecture to regulate the
output voltage. The output voltage is monitored at FB through a
resistive voltage divider. The voltage at FB is compared to the
internal 1.23 V reference by the internal transconductance error
amplifier to create an error current at COMP. A series resistorcapacitor at COMP converts the error current to a voltage. The
switch current is internally measured and added to the stabilizing ramp, and the resulting sum is compared to the error
voltage at COMP to control the PWM modulator. This currentmode regulation system allows fast transient response, while
maintaining a stable output voltage. By selecting the proper
resistor-capacitor network from COMP to GND, the regulator
response is optimized for a wide range of input voltages, output
voltages, and load conditions.
ON/OFF CONTROL
The SD input turns the ADP1610 regulator on or off. Drive SD
low to turn off the regulator and reduce the input current to
10 nA. Drive
SD
high to turn on the regulator.
When the dc-dc step-up switching converter is turned off, there
is a dc path from the input to the output through the inductor
and output rectifier. This causes the output voltage to remain
slightly below the input voltage by the forward voltage of the
rectifier, preventing the output voltage from dropping to zero
when the regulator is shut down. Figure 28 shows the application circuit to disconnect the output voltage from the input
voltage at shutdown.
SETTING THE OUTPUT VOLTAGE
The ADP1610 features an adjustable output voltage range of VIN
to 12 V. The output voltage is set by the resistive voltage divider
(R1 and R2 in Figure 2) from the output voltage (V
1.230 V feedback input at FB. Use the following formula to
determine the output voltage:
= 1.23 × (1 + R1/R2) (1)
V
OUT
OUT
) to the
FREQUENCY SELECTION
The ADP1610’s frequency is user-selectable to operate at either
700 kHz to optimize the regulator for high efficiency or to
1.2 MHz for small external components. Connect RT to IN for
1.2 MHz operation, or connect RT to GND for 700 kHz
operation. To achieve the maximum duty cycle, which might be
required for converting a low input voltage to a high output
voltage, use the lower 700 kHz switching frequency.
SOFT START
To prevent input inrush current at startup, connect a capacitor
from SS to GND to set the soft start period. When the ADP1610
is in shutdown (
2.4 V undervoltage lockout voltage, SS is internally shorted to
GND to discharge the soft start capacitor. Once the ADP1610 is
turned on, SS sources 3 µA to the soft start capacitor at startup.
As the soft start capacitor charges, it limits the voltage at COMP.
Because of the current-mode regulator, the voltage at COMP is
proportional to the switch peak current, and, therefore, the
input current. By slowly charging the soft start capacitor, the
input current ramps slowly to prevent it from overshooting
excessively at startup.
SD
is at GND) or the input voltage is below the
Use an R2 resistance of 10 kΩ or less to prevent output voltage
errors due to the 10 nA FB input bias current. Choose R1 based
on the following formula:
R1 = R2 ×
V
⎛
OUT
⎜
⎜
⎝
23.1
⎞
⎟
(2)
⎟
23.1
⎠
INDUCTOR SELECTION
The inductor is an essential part of the step-up switching
converter. It stores energy during the on-time, and transfers that
energy to the output through the output rectifier during the offtime. Use inductance in the range of 1 µH to 22 µH. In general,
lower inductance values have higher saturation current and
lower series resistance for a given physical size. However, lower
inductance results in higher peak current that can lead to
reduced efficiency and greater input and/or output ripple and
noise. Peak-to-peak inductor ripple current at close to 30% of
the maximum dc input current typically yields an optimal
compromise.
For determining the inductor ripple current, the input (V
output (V
) voltages determine the switch duty cycle (D) by
OUT
the following equation:
VV
D =
OUT
V
OUT
IN
(3)
) and
IN
Rev. 0 | Page 10 of 16
Page 11
ADP1610
V
−
×
Table 4. Inductor Manufacturers
Vendor Part L (µH) Max DC Current Max DCR (mΩ) Height (mm)
Using the duty cycle and switching frequency, fSW, determine the
on-time by the following equation:
D
=
t
ON
The inductor ripple current (∆I
=
∆I
L
(4)
f
SW
) in steady state is
L
tV
×
IN
ON
(5)
L
Solving for the inductance value, L,
×
t
IN
ON
L =
∆
(6)
I
L
Make sure that the peak inductor current (the maximum input
current plus half the inductor ripple current) is below the rated
saturation current of the inductor. Likewise, make sure that the
maximum rated rms current of the inductor is greater than the
maximum dc input current to the regulator.
For duty cycles greater than 50%, which occur with input
voltages greater than one-half the output voltage, slope
compensation is required to maintain stability of the currentmode regulator. For stable current-mode operation, ensure that
the selected inductance is equal to or greater than L
VV
−
LL
MIN
OUT
=>
IN
(7)
f
×
A8.1
SW
MIN
:
CHOOSING THE INPUT AND OUTPUT CAPACITORS
The ADP1610 requires input and output bypass capacitors to
supply transient currents while maintaining constant input and
output voltage. Use a low ESR (equivalent series resistance),
10 µF or greater input capacitor to prevent noise at the
ADP1610 input. Place the capacitor between IN and GND as
close to the ADP1610 as possible. Ceramic capacitors are
preferred because of their low ESR characteristics. Alternatively,
use a high value, medium ESR capacitor in parallel with a 0.1 µF
low ESR capacitor as close to the ADP1610 as possible.
The output capacitor maintains the output voltage and supplies
current to the load while the ADP1610 switch is on. The value
and characteristics of the output capacitor greatly affect the
output voltage ripple and stability of the regulator. Use a low
ESR output capacitor; ceramic dielectric capacitors are
preferred.
For very low ESR capacitors such as ceramic capacitors, the
ripple current due to the capacitance is calculated as follows.
Because the capacitor discharges during the on-time, t
charge removed from the capacitor, Q
, is the load current
C
ON
, the
multiplied by the on-time. Therefore, the output voltage ripple
) is
(∆V
OUT
V
OUT
C
Q
OUT
C
tI
×
L
ON
==∆
C
(8)
OUT
where:
C
is the output capacitance,
OUT
is the average inductor current,
I
L
D
t=
ON
(9)
f
SW
and
VV
V
OUT
IN
(10)
OUT
=
D
Choose the output capacitor based on the following equation:
The output rectifier conducts the inductor current to the output
capacitor and load while the switch is off. For high efficiency,
minimize the forward voltage drop of the diode. For this reason,
Schottky rectifiers are recommended. However, for high voltage,
high temperature applications, where the Schottky rectifier
reverse leakage current becomes significant and can degrade
efficiency, use an ultrafast junction diode.
Make sure that the diode is rated to handle the average output
load current. Many diode manufacturers derate the current
capability of the diode as a function of the duty cycle. Verify
that the output diode is rated to handle the average output load
current with the minimum duty cycle. The minimum duty cycle
of the ADP1610 is
VV
−
−
V
OUT
MAXIN
(12)
OUT
=
D
MIN
where V
is the maximum input voltage.
IN-MAX
Table 6. Schottky Diode Manufacturers
Vendor Phone No. Web Address
Motorola 602-244-3576 www.mot.com
Diodes, Inc. 805-446-4800 www.diodes.com
Sanyo 310-322-3331 www.irf.com
LOOP COMPENSATION
The ADP1610 uses external components to compensate the
regulator loop, allowing optimization of the loop dynamics for a
given application.
The regulator loop gain is
A×××××=
VL
FB
OUT
V
IN
OUT
(14)
ZGZG
CSCOMPMEA
OUT
where:
A
is the loop gain.
VL
V
is the feedback regulation voltage, 1.230 V.
FB
V
is the regulated output voltage.
OUT
V
is the input voltage.
IN
G
is the error amplifier transconductance gain.
MEA
Z
is the impedance of the series RC network from COMP to
COMP
GND.
G
is the current sense transconductance gain (the inductor
CS
current divided by the voltage at COMP), which is internally set
by the ADP1610.
Z
is the impedance of the load and output capacitor.
OUT
To determine the crossover frequency, it is important to note
that, at that frequency, the compensation impedance (Z
dominated by the resistor, and the output impedance (Z
COMP
OUT
) is
) is
dominated by the impedance of the output capacitor. So, when
solving for the crossover frequency, the equation (by definition
of the crossover frequency) is simplified to
V
V
IN
FB
A
||=
VL
V
V
OUT
OUT
GRG
CSCOMPMEA
1
×××××=
π
2
××
(15)
1
Cf
OUTC
where:
is the crossover frequency.
f
C
The step-up converter produces an undesirable right-half plane
zero in the regulation feedback loop. This requires compensating the regulator such that the crossover frequency occurs well
below the frequency of the right-half plane zero. The right-half
plane zero is determined by the following equation:
2
V
V
OUT
⎞
R
IN
LOAD
⎟
×
⎟
⎠
(13)
L
×π
⎛
RHPF
Z
⎜
=2)(
⎜
⎝
where:
F
(RHP) is the right-half plane zero.
Z
R
is the equivalent load resistance or the output voltage
LOAD
divided by the load current.
To stabilize the regulator, make sure that the regulator crossover
frequency is less than or equal to one-fifth of the right-half
plane zero and less than or equal to one-fifteenth of the
switching frequency.
Rev. 0 | Page 12 of 16
is the compensation resistor.
R
COMP
Solving for R
R
COMP
For V
= 1.23, G
FB
R
COMP
,
COMP
π
2
=
= 100 µS, and GCS = 2 S,
MEA
4
1055.2
=
VVCf
××××
OUTOUTOUTC
(16)
GGVV
×××
CSMEAINFB
VVCf
C
V
IN
×××××
OUTOUTOUT
(17)
Once the compensation resistor is known, set the zero formed
by the compensation capacitor and resistor to one-fourth of the
crossover frequency, or
where C
=
COMP
is the compensation capacitor.
COMP
2
RfC××π
(18)
COMPC
Page 13
ADP1610
3
Table 7. Recommended External Components for Popular Input/Output Voltage Conditions
The capacitor, C2, is chosen to cancel the zero introduced by
output capacitance ESR.
Solving for C2,
For low ESR output capacitance such as with a ceramic capacitor, C2 is optional. For optimal transient performance, the R
and C
COMP
transient response of the ADP1610. For most applications, the
compensation resistor should be in the range of 30 kΩ to
400 kΩ, and the compensation capacitor should be in the range
of 100 pF to 1.2 nF. Table 7 shows external component values
for several applications.
SOFT START CAPACITOR
The voltage at SS ramps up slowly by charging the soft start
capacitor (C
listed the values for the soft start period, based on maximum
output current and maximum switching frequency.
The soft start capacitor limits the rate of voltage rise on the
COMP pin, which in turn limits the peak switch current at
startup. Table 8 shows a typical soft start period, t
maximum output current, I
A 20 nF soft start capacitor results in negligible input current
overshoot at startup, and so is suitable for most applications.
However, if an unusually large output capacitor is used, a longer
soft start period is required to prevent input inrush current.
Conversely, if fast startup is a requirement, the soft start
capacitor can be reduced or even removed, allowing the
12 10 100 2
ADP1610 to start quickly, but allowing greater peak switch
.
might need to be adjusted by observing the load
COMP
current (see Figure 22 to Figure 25)
APPLICATION CIRCUITS
The circuit in Figure 27 shows the ADP1610 in a step-up
configuration. The ADP1610 is used here to generate a 10 V
= 2.5 V to 5.5 V,
IN
D1
R1
71.3kΩ
R2
10kΩ
R
COMP
220kΩ
C
COMP
150pF
C
OUT
10µF
) with an internal 3 µA current source. Table 8
SS
, at
SS
, for several conditions.
OUT_MAX
regulator with the following specifications: V
= 10 V, and I
V
OUT
.3V10V
C
IN
10µF
C
22nF
≤ 400 mA.
OUT
4.7µH
L
ADP1610
IN
ON
3
SD
7
RT
81
SS
SS
GND
4
SW
FB
COMP
56
2
Figure 27. 3.3 V to 10 V Step-Up Regulator
The output can be set to the desired voltage using Equation 2.
Use Equation 16 and 17 to change the compensation network.
04472-030
Rev. 0 | Page 13 of 16
Page 14
ADP1610
3
µ
DC-DC STEP-UP SWITCHING CONVERTER WITH
TRUE SHUTDOWN
Some battery-powered applications require very low standby
current. The ADP1610 typically consumes 10 nA from the
input, which makes it suitable for these applications. However,
the output is connected to the input through the inductor and
the rectifying diode, allowing load current draw from the input
while shut down. The circuit in Figure 28 enables the ADP1610
to achieve output load disconnect at shutdown. To shut down
the ADP1610 and disconnect the output from the input, drive
SD
pin below 0.4 V.
the
4.7µH
L
Q1 FDC6331
3.3V10V
A
R3
10kΩ
Q1
B
C
IN
10µF
OFF
C
22nF
SS
ADP1610
IN
3
SD
7
RT
81
SS
GND
SW
FB
COMP
4
Figure 28. Step-Up Regulator with True Shutdown
D1
56
R1
71.3kΩ
2
R2
R
COMP
220kΩ
C
COMP
150pF
10kΩ
C
OUT
10µF
TFT LCD BIAS SUPPLY
Figure 29 shows a power supply circuit for TFT LCD module
applications. This circuit has +10 V, −5 V, and +22 V outputs.
The +10 V is generated in the step-up configuration. The −5 V
and +22 V are generated by the charge-pump circuit. During the
step-up operation, the SW node switches between 10 V and
ground (neglecting forward drop of the diode and on resistance
of the switch). When the SW node is high, C5 charges up to
10 V. C5 holds its charge and forward-biases D8 to charge C6
to −10 V. The Zener diode, D9, clamps and regulates the output
to −5 V.
The VGH output is generated in a similar manner by the
charge-pump capacitors, C1, C2, and C4. The output
voltage is tripled and regulated down to 22 V by the
Zener diode, D5.
R3
.3V
C
10µF
R4
BAV99
VGL
–5V
BZT52C5VIS
IN
C
SS
22nF
200Ω
C6
D9
10µF
4.7µH
L
ADP1610
IN
ON
3
SD
7
RT
81
SS
GND
4
D8
D7
SW
FB
COMP
C5
10nF
56
2
C4
10nF
C1
10nF
D1
R
COMP
220kΩ
C
COMP
150pF
D5
D4
BAV99
D3
D2
BAV99
R1
71.3kΩ
R2
10kΩ
10µF
C3
C2
1µF
200Ω
C
10µF
10V
OUT
VGH
22V
D5
BZT52C22
04472-033
Figure 29. TFT LCD Bias Supply
SEPIC POWER SUPPLY
The circuit in Figure 30 shows the ADP1610 in a single-ended
04472-031
primary inductance converter (SEPIC) topology. This topology
is useful for an unregulated input voltage, such as a batterypowered application in which the input voltage can vary
between 2.7 V to 5 V, and the regulated output voltage falls
within the input voltage range.
The input and the output are dc-isolated by a coupling capacitor, C1. In steady state, the average voltage of C1 is the input
voltage. When the ADP1610 switch turns on and the diode
turns off, the input voltage provides energy to L1, and C1
provides energy to L2. When the ADP1610 switch turns off and
the diode turns on, the energy in L1 and L2 is released to charge
the output capacitor, C
, and the coupling capacitor, C1, and
OUT
to supply current to the load.
4.7
H
L1
2.5V–5.5V3.3V
C
IN
10µF
C
SS
22nF
ADP1610
IN
ON
3
SD
7
RT
81
SS
GND
4
SW
FB
COMP
Figure 30. 3.3 V DC-DC Converter
C1
10µF
56
R1
16.8kΩ
4.7µH
L2
2
R
COMP
60kΩ
C
1nF
COMP
10kΩ
C
OUT
10µF
R2
04472-032
Rev. 0 | Page 14 of 16
Page 15
ADP1610
LAYOUT PROCEDURE
To get high efficiency, good regulation, and stability, a welldesigned printed circuit board layout is required. Where
possible, use the sample application board layout as a model.
Follow these guidelines when designing printed circuit boards
(see Figure 1):
Keep the low ESR input capacitor, C
•
, close to IN and
IN
GND.
•
Keep the high current path from C
through the inductor
IN
L1 to SW and PGND as short as possible.
•
Keep the high current path from C
rectifier D1, and the output capacitor C
through L1, the
IN
as short as
OUT
possible.
•
Keep high current traces as short and as wide as possible.
•
Place the feedback resistors as close to the FB pin as
possible to prevent noise pickup.
•
Place the compensation components as close as possible to
COMP.
•
Avoid routing high impedance traces near any node
connected to SW or near the inductor to prevent radiated
noise injection.