Datasheet ADP151-EP Datasheet (ANALOG DEVICES)

CMOS Linear Regulator

ADP151-EP

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

Trademarks and registered trademarks are the property of their respective owners.

Fax: [phone] ©2012 Analog Devices, Inc. All rights reserved.

1µF

1µF

V

OUT

= 3.3VV

IN

= 3.7V

VOUT

NC

VIN

GND

EN

OFF

ON

NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.

1

2

3 4

5

10681-001

Enhanced Product

FEATURES

Ultralow noise: 9 µV rms
Input voltage range: 2.2 V to 5.5 V
Low quiescent current

I

= 10 µA with 0 load

GND

I

= 265 μA with 200 mA load

GND

Low shutdown current: <1 µA
Low dropout voltage: 150 mV at 200 mA load
Accuracy over line, load, and temperature: −2.5%/+3%
PSRR performance of 70 dB at 10 kHz
Current-limit and thermal overload protection
Internal pull-down resistor on EN input
5-lead TSOT package
Enhanced processing (EP) for −55°C to +125°C operation

APPLICATIONS

RF, VCO, and PLL power supplies
Portable and battery-powered equipment
Post dc-to-dc regulation
Portable medical devices
Aeronautic and military operating temperature environment

Ultralow Noise, 200 mA,

TYPICAL APPLICATION CIRCUIT

Figure 1. TSOT ADP151-EP with Fixed Output Voltage, 3.3 V

GENERAL DESCRIPTION

The ADP151-EP is an ultralow noise, low dropout linear
regulator that operates from 2.2 V to 5.5 V and provides up to
200 mA of output current. The low 150 mV dropout voltage at
200 mA load improves efficiency and allows operation over a
wide input voltage range.

Using an innovative circuit topology, the ADP151-EP achieves
ultralow noise performance without the necessity of a bypass
capacitor, making it ideal for noise-sensitive analog and RF
applications. The ADP151-EP also achieves ultralow noise
performance without compromising PSRR or transient line
and load performance. The low 265 μA of quiescent current
at 200 mA load makes the ADP151-EP suitable for battery-
operated portable equipment.

The ADP151-EP also includes an internal pull-down resistor
on the EN input.

The ADP151-EP is specifically designed for stable operation
with tiny 1 µF, ±30% ceramic input and output capacitors to
meet the requirements of high performance, space constrained
applications.

The ADP151-EP is capable of 16 fixed output voltage options,
ranging from 1.1 V to 3.3 V.

Short-circuit and thermal overload protection circuits prevent
damage in adverse conditions. The ADP151-EP is available in a
tiny 5-lead TSOT package.

Additional application and technical information can be found
in the ADP151 data sheet.

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]

www.analog.com

ADP151-EP Enhanced Product

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Typical Application Circuit ............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Input and Output Capacitor, Recommended Specifications .. 4

Absolute Maximum Ratings ............................................................ 5

Thermal Data ................................................................................ 5

REVISION HISTORY

7/12—Revision 0: Initial Version

Thermal Resistance .......................................................................5

ESD Caution...................................................................................5

Pin Configurations and Function Descriptions ............................6

Typical Performance Characteristics ..............................................7

Applications Information .............................................................. 11

Thermal Considerations ............................................................ 11

Printed Circuit Board Layout Considerations ............................ 13

Outline Dimensions ....................................................................... 14

Ordering Guide .......................................................................... 14

Rev. 0 | Page 2 of 16

Enhanced Product ADP151-EP

GND

OUT

OUT

OUT

OUT

OUT

OUT

OUT

I

OUT

= 200 mA, TJ = −55°C to +125°C

350

μA

GND-SD

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

DROPOUT VOLTAGE2

V

DROPOUT

I

OUT

= 10 mA

10 mV

OUT

OUT

OUT

STA RT-UP

LIMIT

RISE

Input Voltage Falling

UVLO

FAL L

1.28

V

HYS

Thermal Shutdown Threshold

TSSD

TJ rising

150

°

NOISE

OUT

OUT

OUT

SPECIFICATIONS

VIN = (V

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT VOLTAGE RANGE VIN TJ = −55°C to +125°C 2.2 5.5 V
OPERATING SUPPLY CURRENT I
I
I
I
I
I
I

+ 0.4 V) or 2.2 V, whichever is greater; EN = VIN, I

OUT

I

= 0 µA 10 µA
= 0 µA, TJ = −55°C to +125°C 20 µA
= 100 µA 20 µA
= 100 µA, TJ = −55°C to +125°C 40 µA
= 10 mA 60 µA
= 10 mA, TJ = −55°C to +125°C 90 µA
= 200 mA 265 μA

= 10 mA, CIN = C

OUT

= 1 µF, TA = 25°C, unless otherwise noted.

OUT

SHUTDOWN CURRENT I

EN = GND 0.2 µA
EN = GND, TJ = −55°C to +125°C 1.0 µA
OUTPUT VOLTAGE ACCURACY

V
V
V

100 µA < I
V
100 µA < I

I

= 10 mA −1 +1 %

TJ = −55°C to +125°C

< 1.8 V

< 200 mA, VIN = (V

+ 0.4 V) to 5.5 V −3 +3 %

≥ 1.8 V

< 200 mA, VIN = (V

+ 0.4 V) to 5.5 V −2.5 +3 %

REGULATION

Line Regulation ∆V

Load Regulation1 ∆V
I
I
V
I
I

I

I
I
START-UP TIME3 t
CURRENT-LIMIT THRESHOLD4 I

/∆VIN VIN = (V
/∆I

V

+ 0.4 V ) to 5.5 V, TJ = −55°C to +125°C −0.05 +0.05 %/V

< 1.8 V %/mA
= 100 µA to 200 mA 0.006 %/mA
= 100 µA to 200 mA, TJ = −55°C to +125°C 0.012 %/mA

≥ 1.8 V
= 100 µA to 200 mA 0.003 %/mA
= 100 µA to 200 mA, TJ = −55°C to +125°C 0.008 %/mA

= 10 mA, TJ = −55°C to +125°C 30 mV
= 200 mA 150 mV
= 200 mA, TJ = −55°C to +125°C 230 mV

VOUT = 3.3 V 180 µs

TJ = 0°C to +125°C 220 300 400 mA

UNDERVOLTAGE LOCKOUT TJ = −55°C to +125°C

Input Voltage Rising UVLO

1.96 V

Hysteresis UVLO

THERMAL SHUTDOWN

Thermal Shutdown Hysteresis TS

EN INPUT

EN Input Logic High VIH 2.2 V ≤ VIN ≤ 5.5 V 1.2 V
EN Input Logic Low VIL 2.2 V ≤ VIN ≤ 5.5 V 0.4 V

EN Input Pull-Down Resistance REN VIN = VEN = 5.5 V 2.6 MΩ
OUTPUT NOISE OUT
10 Hz to 100 kHz, VIN = 5 V, V
10 Hz to 100 kHz, VIN = 5 V, V

120 mV

15

SD-HYS

10 Hz to 100 kHz, VIN = 5 V, V

= 3.3 V 9 µV rms
= 2.5 V 9 µV rms
= 1.1 V 9 µV rms

Rev. 0 | Page 3 of 16

C

°C

ADP151-EP Enhanced Product

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

100 kHz, VIN = 4.3 V, V

OUT

= 3.3 V, I

OUT

= 10 mA

55 dB

OUT

OUT

OUT

OUT

MIN

ESR

Parameter Symbol Conditions Min Typ Max Unit

POWER SUPPLY REJECTION RATIO PSRR

VIN = V

100 kHz, VIN = 3.8 V, V

VIN = V

+ 0.5 V 10 kHz, VIN = 3.8 V, V

+ 1 V 10 kHz, VIN = 4.3 V, V

= 3.3 V, I

= 3.3 V, I

= 3.3 V, I

= 10 mA 70 dB

= 10 mA 55 dB

= 10 mA 70 dB

10 kHz, VIN = 2.2 V, V
100 kHz, VIN = 2.2 V, V

1

Based on an end-point calculation using 0.1 mA and 200 mA loads. See Figure 4 for typical load regulation performance for loads less than 1 mA.

2

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.2 V.

3

Start-up time is defined as the time between the rising edge of EN and V

4

Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V (that is, 2.7 V).

being at 90% of its nominal value.

OUT

= 1.1 V, I

= 1.1 V, I

= 10 mA 70 dB

= 10 mA 55 dB

INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

Minimum Input and Output Capacitance1 C
Capacitor ESR R

1

The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.

TA = −55°C to +125°C 0.7 µF

TA = −55°C to +125°C 0.001 0.2 Ω

Rev. 0 | Page 4 of 16

Enhanced Product ADP151-EP

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

VIN to GND −0.3 V to +6.5 V
VOUT to GND −0.3 V to VIN
EN to GND −0.3 V to +6.5 V
Storage Temperature Range −65°C to +150°C
Operating Junction Temperature Range −55°C to +125°C
Operating Ambient Temperature Range −55°C to +125°C
Soldering Conditions JEDEC J-STD-020

Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in
combination. The ADP151-EP can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that T
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient
temperature may have to be derated.

In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (T
the device is dependent on the ambient temperature (T
power dissipation of the device (P
thermal resistance of the package (θ

The maximum junction temperature (T
ambient temperature (T

) and power dissipation (PD) using the

A

formula

T

= TA + (PD × θJA)

J

The junction-to-ambient thermal resistance (θ
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal

is within the specified

J

) of

J

), the

A

), and the junction-to-ambient

D

).

JA

) is calculated from the

J

) of the package

JA

board design is required. The value of θ
on PCB material, layout, and environmental conditions. The
specified values of θ

are based on a 4-laye r, 4 in. × 3 in. circuit

JA

board. See JESD51-7 for detailed information on the board
construction.

Ψ

is the junction-to-board thermal characterization parameter

JB

with units of °C/W. Ψ

of the package is based on modeling and

JB

calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information, states
that thermal characterization parameters are not the same as
thermal resistances. Ψ

measures the component power flowing

JB

through multiple thermal paths rather than a single path as in
thermal resistance, θ

. Therefore, ΨJB thermal paths include

JB

convection from the top of the package as well as radiation from
the package, factors that make Ψ
applications. Maximum junction temperature (T
from the board temperature (T

B

using the formula

T

= TB + (PD × ΨJB)

J

See JESD51-8 and JESD51-12 for more detailed information
about Ψ

.

JB

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type θJA ΨJB Unit

5-Lead TSOT 174 43 °C/W

ESD CAUTION

may vary, depending

JA

more useful in real-world

JB

) is calculated

J

) and power dissipation (PD)

Rev. 0 | Page 5 of 16

ADP151-EP Enhanced Product

TOP VIEW

(Not to S cale)

ADP151-EP

VIN

GND

EN

VOUT

NC

1

2

3 4

5

NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.

10681-002

3

EN

Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Figure 2. 5-Lead TSOT Pin Configuration

Table 5. Pin Function Descriptions

Pin Number Mnemonic Description
1 VIN Regulator Input Supply. Bypass VIN to GND with a 1 µF or greater capacitor.
2 GND Ground.

startup, connect EN to VIN.
4 NC No Connect. Not connected internally.
5 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1 µF or greater capacitor.

Rev. 0 | Page 6 of 16

Enhanced Product ADP151-EP

3.35

3.25

3.27

3.29

3.31

3.33

–40–60 –20 200 40 60 80 120100

V

OUT

(V)

JUNCTION T E M P E RATURE (°C)

LOAD = 10µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 200mA

10681-003

3.25

3.27

3.29

3.31

3.33

3.35

0.01 0.1 1 10 100 1000

V

OUT

(V)

I

LOAD

(mA)

10681-004

3.25

3.27

3.29

3.31

3.33

3.35

3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4

V

OUT

(V)

VIN (V)

10681-005

LOAD = 10µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 200mA

I

GND

(µA)

JUNCTION T E M P E R ATURE (°C)

1000

–60 –40 –20 0 20 40 60 80 100 120

100

10

1

10681-006

LOAD = 10µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 200mA

10

100

1000

0.01 0.1 1 10 100 1000

I

GND

(µA)

I

LOAD

(mA)

10681-007

10

100

1000

3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4

I

GND

(µA)

VIN (V)

LOAD = 10µA
LOAD = 1mA
LOAD = 100mA
LOAD = 100µA

LOAD = 10mA
LOAD = 200mA

10681-008

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 5 V, V

= 3.3 V, I

OUT

= 1 mA, CIN = C

OUT

= 1 µF, TA = 25°C, unless otherwise noted.

OUT

Figure 3. Output Voltage vs. Junction Temperature

Figure 4. Output Voltage vs. Load Current

Figure 6. Ground Current vs. Junction Temperature

Figure 7. Ground Current vs. Load Current

Figure 5. Output Voltage vs. Input Voltage

Figure 8. Ground Current vs. Input Voltage

Rev. 0 | Page 7 of 16

ADP151-EP Enhanced Product

0

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

–60 –40 –20 0 20 40 60 80 100 120

SHUTDOWN CURRE NT (µA)

TEMPERATURE (°C)

V

IN

= 3.6V

V

IN

= 3.8V

V

IN

= 4.2V

V

IN

= 4.4V

V

IN

= 4.8V

V

IN

= 5.5V

10681-009

0

20

40

60

80

100

120

1 10 100 1000

DROPOUT V OLTAGE (mV)

I

LOAD

(mA)

10681-010

3.00

3.05

3.10

3.15

3.20

3.25

3.30

3.35

3.1 3.2 3.3 3.4 3.5 3.6

V

OUT

(V)

V

IN

(V)

1mA
5mA
10mA
50mA
100mA
200mA

10681-011

0

100

200

300

400

500

600

700

800

3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55

I

GND

(µA)

V

IN

(V)

I

OUT

= 1mA

I

OUT

= 10mA

I

OUT

= 100mA

I

OUT

= 5mA

I

OUT

= 50mA

I

OUT

= 200mA

10681-012

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

FREQUENCY ( Hz )

10681-013

200mA
100mA
10mA
1mA
100µA

PSRR (dB)

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

PSRR (dB)

FREQUENCY ( Hz )

200mA
100mA
10mA
1mA
100µA

10681-014

Figure 9. Shutdown Current vs. Temperature at Various Input Voltages

Figure 10. Dropout Voltage vs. Load Current

Figure 12. Ground Current vs. Input Voltage (in Dropout)

Figure 13. Power Supply Rejection Ratio vs. Frequency, V

= 1.2 V, VIN = 2.2 V

OUT

Figure 11. Output Voltage vs. Input Voltage (in Dropout)

Figure 14. Power Supply Rejection Ratio vs. Frequency, V

= 2.8 V, VIN = 3.3 V

OUT

Rev. 0 | Page 8 of 16

Enhanced Product ADP151-EP

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

PSRR (dB)

FREQUENCY ( Hz )

10681-015

200mA
100mA
10mA
1mA
100µA

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

PSRR (dB)

FREQUENCY ( Hz )

V

OUT

= 3.3V, I

OUT

= 200mA

V

OUT

= 3.3V, I

OUT

= 10mA

V

OUT

= 2.8V, I

OUT

= 200mA

V

OUT

= 2.8V, I

OUT

= 10mA

V

OUT

= 1.1V, I

OUT

= 200mA

V

OUT

= 1.1V, I

OUT

= 10mA

10681-016

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

PSRR (dB)

FREQUENCY ( Hz )

I

OUT

= 200mA, VIN = 3.3V

I

OUT

= 10mA, VIN = 3.3V

I

OUT

= 200mA, VIN = 3.8V

I

OUT

= 10mA, VIN = 3.8V

10681-017

and Load Currents, V

OUT

= 2.8 V

14

0

1

2

3

4

5

6

7

8

9

10

11

12

13

0.001 0.01 0.1 1 10 100 1k

NOISE (µ V rms)

LOAD CURRENT ( mA)

10681-018

3.3V

2.8V

1.2V

1.1V

1000

10

100

10 100k10k1k100

NOISE SPECTRAL DENSITY (nV/

Hz)

FREQUENCY ( Hz )

3.3V

2.8V

1.2V

1.1V

10681-019

CH1 200mA CH2 50mV M20µs A CH1 64.0mA

T 10.00%

1

2

T

LOAD CURRENT

V

OUT

10681-020

Figure 15. Power Supply Rejection Ratio vs. Frequency, V

= 3.3 V, VIN = 3.8 V

OUT

Figure 16. Power Supply Rejection Ratio vs. Frequency at Various Output

Voltages and Load Currents, V

− VIN = 0.5 V, except for V

OUT

= 1.1 V, VIN = 2.2 V

OUT

Figure 18. Output Noise vs. Load Current and Output Voltage,

V

= 5 V, C

IN

OUT

= 1 μF

Figure 19. Output Noise Spectral Density vs. Frequency,

V

= 5 V, I

IN

= 10 mA, C

LOAD

OUT

= 1 μF

Figure 17. Power Supply Rejection Ratio vs. Frequency at Various Voltages

Figure 20. Load Transient Response, C

, C

= 1 μF, I

IN

OUT

= 1 mA to 200 mA

LOAD

Rev. 0 | Page 9 of 16

ADP151-EP Enhanced Product

CH1 1V CH2 2mV M10µs A CH1 4.56V

T 10.80%

1

2

T

INPUT VOLTAGE

V

OUT

10681-021

CH1 1V CH2 2mV M10µs A CH1 4.56V

T 10.80%

1

2

T

INPUT VOLTAGE

V

OUT

10681-022

Figure 21. Line Transient Response, CIN, C

OUT

= 1 μF, I

= 200 mA

LOAD

Figure 22. Line Transient Response, CIN, C

= 1 μF, I

OUT

LOAD

= 1 mA

Rev. 0 | Page 10 of 16

Enhanced Product ADP151-EP

01

174

0

20

40

60

80

100

120

140

0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8

JUNCTION T E M P E R ATURE, T

J

(°C)

MAXIMUM JUNCT ION TEMPE RATURE

V

IN

– V

OUT

(V)

I

LOAD

= 1mA

I

LOAD

= 50mA

I

LOAD

= 150mA

I

LOAD

= 10mA

I

LOAD

= 100mA

I

LOAD

= 200mA

10681-023

APPLICATIONS INFORMATION

THERMAL CONSIDERATIONS

In most applications, the ADP151-EP does not dissipate much
heat due to its high efficiency. However, in applications with a
high ambient temperature and a high supply voltage to output
voltage differential, the heat dissipated in the package can cause
the junction temperature of the die to exceed the maximum
junction temperature of 125°C.

When the junction temperature exceeds 150°C, the converter
enters thermal shutdown. It recovers only after the junction
temperature has decreased below 135°C to prevent any permanent
damage. Therefore, thermal analysis for the chosen application
is very important to guarantee reliable performance over all
conditions. The junction temperature of the die is the sum of
the ambient temperature of the environment and the tempera­ture rise of the package due to the power dissipation, as shown
in Equation 1.

To guarantee reliable operation, the junction temperature of
the ADP151-EP must not exceed 125°C. To ensure that the
junction temperature stays below this maximum value, the user
must be aware of the parameters that contribute to junction
temperature changes. These parameters include ambient
temperature, power dissipation in the power device, and thermal
resistances between the junction and ambient air (θ
number is dependent on the package assembly compounds that
are used and the amount of copper used to solder the package
GND pins to the PCB.

Table 6 shows typical θ

values of the 5-lead TSOT for various

JA

PCB copper sizes. Table 7 shows the typical Ψ
lead TSOT.

Table 6. Typical θ

Values

JA

Copper Size (mm2) θJA (°C/W)

). The θJA

JA

values of the 5-

JB

The junction temperature of the ADP151-EP can be calculated
from the following equation:

T

= TA + (PD × θJA) (1)

J

where:

T

is the ambient temperature.

A

P

is the power dissipation in the die, given by

D

= [(VIN − V

P

D

OUT

) × I

] + (VIN × I

LOAD

) (2)

GND

where:

I

is the load current.

LOAD

I

is the ground current.

GND

V

and V

IN

are input and output voltages, respectively.

OUT

Power dissipation due to ground current is quite small and can
be ignored. Therefore, the junction temperature equation
simplifies to the following:

T

= TA + {[(VIN − V

J

OUT

) × I

] × θJA} (3)

LOAD

As shown in Equation 3, for a given ambient temperature, input-to­output voltage differential and continuous load current, there
exists a minimum copper size requirement for the PCB to ensure
that the junction temperature does not rise above 125°C. Figure 23
through Figure 28 shows junction temperature calculations for
various ambient temperatures, load currents, V

-to-V

IN

OUT

differentials, and areas of PCB copper.

50 156
100 150
300 138
500 135

1

Device soldered to minimum size pin traces.

Table 7. Typical ΨJB Values

Model ΨJB (°C/W)
TSOT 43

Figure 23. TSOT 500 mm2 of PCB Copper, TA = 25°C

Rev. 0 | Page 11 of 16

ADP151-EP Enhanced Product

0

20

40

60

80

100

120

140

0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8

JUNCTION T E M P E R ATURE, T

J

(°C)

MAXIMUM JUNCT ION TEMPE RATURE

V

IN

– V

OUT

(V)

I

LOAD

= 1mA

I

LOAD

= 50mA

I

LOAD

= 150mA

I

LOAD

= 10mA

I

LOAD

= 100mA

I

LOAD

= 200mA

10681-024

0

20

40

60

80

100

120

140

0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8

JUNCTION T E M P E R ATURE, T

J

(°C)

MAXIMUM JUNCT ION TEMPE RATURE

VIN – V

OUT

(V)

I

LOAD

= 1mA

I

LOAD

= 50mA

I

LOAD

= 150mA

I

LOAD

= 10mA

I

LOAD

= 100mA

I

LOAD

= 200mA

10681-025

0

20

40

60

80

100

120

140

0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8

JUNCTION T E M P E R ATURE, T

J

(°C)

MAXIMUM JUNCT ION TEMPE RATURE

V

IN

– V

OUT

(V)

I

LOAD

= 1mA

I

LOAD

= 50mA

I

LOAD

= 150mA

I

LOAD

= 10mA

I

LOAD

= 100mA

I

LOAD

= 200mA

10681-026

0

20

40

60

80

100

120

140

0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8

JUNCTION T E M P E R ATURE, T

J

(°C)

MAXIMUM JUNCT ION TEMPE RATURE

V

IN

– V

OUT

(V)

I

LOAD

= 1mA

I

LOAD

= 50mA

I

LOAD

= 150mA

I

LOAD

= 10mA

I

LOAD

= 100mA

I

LOAD

= 200mA

10681-027

0

20

40

60

80

100

120

140

0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8

JUNCTION T E M P E R ATURE, T

J

(°C)

MAXIMUM JUNCT ION TEMPE RATURE

V

IN

– V

OUT

(V)

I

LOAD

= 1mA

I

LOAD

= 50mA

I

LOAD

= 150mA

I

LOAD

= 10mA

I

LOAD

= 100mA

I

LOAD

= 200mA

10681-028

0

20

40

60

80

100

120

140

0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8

JUNCTION T E M P E R ATURE, T

J

(°C)

MAXIMUM JUNCT ION TEMPE RATURE

V

IN

– V

OUT

(V)

I

LOAD

= 1mA

I

LOAD

= 50mA

I

LOAD

= 150mA

I

LOAD

= 10mA

I

LOAD

= 100mA

I

LOAD

= 200mA

10681-029

Figure 24. TSOT 100 mm2 of PCB Copper, TA = 25°C

Figure 25. TSOT 50 mm2 of PCB Copper, TA = 25°C

Figure 27. TSOT 100 mm2 of PCB Copper, TA = 50°C

Figure 28. TSOT 50 mm2 of PCB Copper, TA = 50°C

In the case where the board temperature is known, use the
thermal characterization parameter, Ψ

, to estimate the

JB

junction temperature rise (see Figure 29). Maximum junction
temperature (T
and power dissipation (P

= TB + (PD × ΨJB) (4)

T

J

The typical value of Ψ

) is calculated from the board temperature (TB)

J

) using the following formula:

D

is 43°C/W for the 5-lead TSOT package.

JB

Figure 26. TSOT 500 mm2 of PCB Copper, TA = 50°C

Figure 29. TSOT, T

= 85°C

A

Rev. 0 | Page 12 of 16

Enhanced Product ADP151-EP

10681-030

PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS

Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP151-EP.
However, as listed in Tabl e 6, a point of diminishing returns
is eventually reached, beyond which an increase in the copper
size does not yield significant heat dissipation benefits.

Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use of 0402 or 0603 size capacitors and
resistors achieves the smallest possible footprint solution on
boards where area is limited.

Figure 30. Example TSOT PCB Layout

Rev. 0 | Page 13 of 16

ADP151-EP Enhanced Product

100708-A

*

COMPLIANT TO JEDEC STANDARDS M O-193-AB WITH
THE EXCEPTION OF PACKAG E HE IGHT AND THICKNE S S .

1.60 BSC

2.80 BSC

1.90

BSC

0.95 BSC

0.20

0.08

0.60

0.45

0.30

8°
4°
0°

0.50

0.30

0.10 MAX

*

1.00 MAX

*

0.90 MAX

0.70 MIN

2.90 BSC

5 4

1 2 3

SEATING
PLANE

OUTLINE DIMENSIONS

Figure 31. 5-Lead Thin Small Outline Transistor Package [TSOT]

(UJ-5)

Dimensions show in millimeters

ORDERING GUIDE

Model1 Temperature Range Output Voltage (V)2 Package Description Package Option Branding

ADP151TUJZ3.3-EPR2 –55°C to +125°C 3.3 5-Lead TSOT UJ-5 LJ2

1

Z = RoHS Compliant Part.

2

For additional voltage options for the ADP151TUJZ package option, contact a local Analog Devices, Inc., sales or distribution representative.

Rev. 0 | Page 14 of 16

Enhanced Product ADP151-EP

NOTES

Rev. 0 | Page 15 of 16

ADP151-EP Enhanced Product

©2012 Analog Devices, Inc. All rights reserved. Trademarks and

NOTES

registered trademarks are the property of their respective owners.
D10681-0-7/12(0)

Rev. 0 | Page 16 of 16