Datasheet ADP121 Datasheet (ANALOG DEVICES)

150 mA, Low Quiescent Current,

V

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FEATURES

Input voltage range: 2.3 V to 5.5 V
Output voltage range: 1.2 V to 3.3 V
Output current: 150 mA
Low quiescent current

I

= 11 µA with 0 A load

GND

I

= 30 µA with 150 mA load

GND

Low shutdown current: <1 µA
Low dropout voltage

90 mV @ 150 mA load

High PSRR

70 dB @ 1 kHz at V

70 dB @ 10 kHz at V
Low noise: 40 µV rms at V
No noise bypass capacitor required
Output voltage accuracy: ±1%
Stable with a small 1 µF ceramic output capacitor
16 fixed output voltage options
Current limit and thermal overload protection
Logic controlled enable
5-lead TSOT package
4-ball 0.4 mm pitch WLCSP

= 1.2 V

OUT

OUT

= 1.2 V

= 1.2 V

OUT

CMOS Linear Regulator

ADP121

TYPICAL APPLICATION CIRCUITS

= 1.8VVIN = 2.3V

V

OUT

VOUT

NC

5

1µF

4

06901-001

V

= 1.8V

OUT

1µF

06901-002

1

1µF

Figure 1. ADP121 TSOT with Fixed Output Voltage, 1.8 V

VIN

2

GND

3

EN

NC = NO CONNECT

= 2.3V

IN

1µF

Figure 2. ADP121 WLCSP with Fixed Output Voltage, 1.8 V

VIN VOUT

EN GND

APPLICATIONS

Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Post regulation

GENERAL DESCRIPTION

The ADP121 is a quiescent current, low dropout, linear regulators
that operate from 2.3 V to 5.5 V and provide up to 150 mA of
output current. The low 135 mV dropout voltage at 150 mA
load improves efficiency and allows operation over a wide
input voltage range. The low 30 A of quiescent current at full
load make the ADP121 ideal for battery-operated portable
equipment.

The ADP121 is available in 16 fixed output voltage options
ranging from 1.2 V to 3.3 V. The parts are optimized for stable

operation with small 1 µF ceramic output capacitors. The
ADP121 delivers good transient performance with minimal
board area.

Short-circuit protection and thermal overload protection circuits
prevent damage in adverse conditions. The ADP121 is available
in a tiny 5-lead TSOT and 4-ball 0.4 mm pitch WLCSP pack­ages and utilizes the smallest footprint solution to meet a
variety of portable applications.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2008 Analog Devices, Inc. All rights reserved.

ADP121

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TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Typical Application Circuits ............................................................ 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 5

Thermal Data ................................................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution .................................................................................. 5

Pin Configurations and Function Descriptions ........................... 6

REVISION HISTORY

7/08—Revision 0: Initial Version

Typical Performance Characteristics ..............................................7

Theory of Operation ...................................................................... 11

Applications Information .............................................................. 12

Capacitor Selection .................................................................... 12

Undervoltage Lockout ............................................................... 13

Enable Feature ............................................................................ 13

Current Limit and Thermal Overload Protection ................. 14

Thermal Considerations ............................................................ 14

Printed Circuit Board Layout Considerations ....................... 17

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 19

Rev. 0 | Page 2 of 20

ADP121

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SPECIFICATIONS

VIN = (V

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT VOLTAGE RANGE VIN T
OPERATING SUPPLY CURRENT I
I
I
I
I
I
SHUTDOWN CURRENT I
EN = GND, TJ = −40°C to +125°C 1.5 µA
FIXED OUTPUT VOLTAGE ACCURACY V

REGULATION

Line Regulation V

Load Regulation

DROPOUT VOLTAGE

TSOT I

I

I

I

WLCSP I

I

I

I

START-UP TIME
CURRENT-LIMIT THRESHOLD
THERMAL SHUTDOWN

Thermal Shutdown Threshold TSSD T

Thermal Shutdown Hysteresis TS

EN INPUT

EN Input Logic High VIH 2.3 V ≤ VIN ≤ 5.5 V 1.2 V

EN Input Logic Low VIL 2.3 V ≤ VIN ≤ 5.5 V 0.4 V

EN Input Leakage Current V

EN = VIN or GND, TJ = −40°C to +125°C 1

UNDERVOLTAGE LOCKOUT UVLO

Input Voltage Rising UVLO

Input Voltage Falling UVLO

Hysteresis UVLO

OUTPUT NOISE OUT
10 Hz to 100 kHz, VIN = 5 V, V
10 Hz to 100 kHz, VIN = 5 V, V

+ 0.5 V) or 2.3 V, whichever is greater; EN = VIN; I

OUT

I

GND

EN = GND 0.1 µA

GND-SD

I

OUT

/VIN

OUT

1

2

V

3

T

4

I

V

/I

OUT

OUT

V

DROPOUT

V

START-UP

160 225 350 mA

LIMIT

15 °C

SD-HYS

EN = VIN or GND 0.05 µA

I-LEAKAGE

2.25 V

RISE

FAL L

120 mV

HYS

10 Hz to 100 kHz, VIN = 5 V, V

NOISE

= 10 mA; CIN = C

OUT

= −40°C to +125°C 2.3

J

= 0 µA 11 µA

OUT

= 0 µA, TJ = −40°C to +125°C 21 µA

OUT

= 10 mA 15 µA

OUT

= 10 mA, TJ = −40°C to +125°C 29 µA

OUT

= 150 mA 30 µA

OUT

= 150 mA, TJ = −40°C to +125°C 40 µA

OUT

= 10 mA −1 +1 %

OUT

100 µA < I
V

= (V

IN

100 µA < I

= (V

V

IN

T

= −40°C to +125°C

J

= (V

V

IN

= −40°C to +125°C

T

J

I

= 1 mA to 150 mA 0.001 %/mA

OUT

= 1 mA to 150 mA

I

OUT

T

= −40°C to +125°C

J

= 3.3 V

OUT

= 10 mA 8 mV

OUT

= 10 mA, TJ = −40°C to +125°C 12 mV

OUT

= 150 mA 120 mV

OUT

= 150 mA, TJ = −40°C to +125°C 180 mV

OUT

= 10 mA 6 mV

OUT

= 10 mA, TJ = −40°C to +125°C 9 mV

OUT

= 150 mA 90 mV

OUT

= 150 mA, TJ = −40°C to +125°C 135 mV

OUT

= 3.3 V 120 µs

OUT

rising 150 °C

J

< 150 mA,

OUT

+ 0.5 V) to 5.5 V

OUT

< 150 mA,

OUT

+ 0.5 V) to 5.5 V

OUT

+ 0.5 V) to 5.5 V, I

OUT

= 1 µF; TA = 25°C, unless otherwise noted.

OUT

5.5 V

−2 +2 %

−3 +3 %

= 1 mA

OUT

−0.03 +0.03 %/ V

0.005 %/mA

1.5 V

= 3.3 V 65 µV rms

OUT

= 2.5 V 52 µV rms

OUT

= 1.2 V 40 µV rms

OUT

Rev. 0 | Page 3 of 20

ADP121

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Parameter Symbol Conditions Min Typ Max Unit

POWER SUPPLY REJECTION RATIO PSRR 10 kHz, VIN = 5 V, V
10 kHz, VIN = 5 V, V
10 kHz, VIN = 5 V, V
INPUT AND OUTPUT CAPACITOR

Minimum Input and Output Capacitance CAP
Capacitor ESR R

1

Based on an end-point calculation using 1 mA and 100 mA loads. See for typical load regulation performance for loads less than 1 mA. Figure 6

2

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.3 V.

3

Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.

4

Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.

5

The minimum input and output capacitance should be greater than 0.70 F over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.

5

TJ = −40°C to +125°C 0.70 µF

MIN

T

ESR

= −40°C to +125°C 0.001 1 Ω

J

= 3.3 V 60 dB

OUT

= 2.5 V 66 dB

OUT

= 1.2 V 70 dB

OUT

Rev. 0 | Page 4 of 20

ADP121

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ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

VIN to GND −0.3 V to +6 V
VOUT to GND −0.3 V to VIN
EN to GND −0.3 V to +6 V
Storage Temperature Range −65°C to +150°C
Operating Junction Temperature Range −40°C to +125°C
Soldering Conditions JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in
combination. The ADP121 can be damaged when the junction
temperature limits are exceeded. Monitoring the ambient
temperature does not guarantee that T
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may have to be derated. In applications with moderate power
dissipation and low PCB thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long
as the junction temperature is within specification limits. The
junction temperature (T
ambient temperature (T
(P

), and the junction-to-ambient thermal resistance of the

D

package (θ
T

and PD using the following formula:

A

). TJ is calculated from

JA

= TA + (PD × θJA)

T

J

) of the device is dependent on the

J

), the power dissipation of the device

A

Junction-to-ambient thermal resistance, θ
modeling and calculation using a four-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ

is within the specified

J

, is based on

JA

may vary, depending

JA

on PCB material, layout, and environmental conditions. The
specified values of θ

are based on a 4-layer, 4” × 3”, circuit

JA

board. Refer to JESD 51-7 and JESD 51-9 for detailed
information on the board construction. For additional
information, see AN-617 Application Note, MicroCSP

TM

Wafer

Level Chip Scale Package.

Ψ

is the junction-to-board thermal characterization parameter

JB

measured in °C/W. Ψ

is based on modeling and calculation

JB

using a four-layer board. The JESD51-12 Guidelines for Reporting
and Using Package Thermal Information states that thermal
characterization parameters are not the same as thermal
resistances. Ψ

measures the component power flowing

JB

through multiple thermal paths rather than a single path as in
thermal resistance, θ

. Therefore, ΨJB thermal paths include

JB

convection from the top of the package as well as radiation
from the package, factors that make Ψ
world applications. Maximum T
temperature (T

= TB + (PD × ΨJB)

T

J

) and PD using the following formula:

B

more useful in real-

JB

is calculated from the board

J

Refer to JESD51-8 and JESD51-12 for more detailed
information about Ψ

.

JB

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.

Table 3.

Package Type θJA ΨJB Unit

5-Lead TSOT 170 43 °C/W
4-Ball 0.4 mm Pitch WLCSP 260 58 °C/W

ESD CAUTION

Rev. 0 | Page 5 of 20

ADP121

A

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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

12

1

VIN

TOP VIEW

2

GND

(Not to Scale)

3

EN

NC = NO CONNECT

Figure 3. 5-Lead TSOT Pin Configuration Figure 4. 4-Ball WLCSP Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

TSOT WLCSP

Mnemonic Description

1 A1 VIN Regulator Input Supply. Bypass VIN to GND with a 1 µF or larger capacitor.
2 B2 GND Ground.
3 B1 EN

Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic

startup, connect EN to VIN.
4 N/A NC No Connect. Not connected internally.
5 A2 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1 µF or greater capacitor.

5

4

VOUT

NC

VIN VOUT

TOP VIEW

(Not to Scale)

EN GND

B

06901-003

06901-004

Rev. 0 | Page 6 of 20

ADP121

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TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 2.3 V, V

1.804

1.802

1.800

1.798

1.796

(V)

OUT

1.794

V

1.792

1.790

1.788

1.786

= 1.8 V, I

OUT

V

= 1.8V

OUT

V

= 2.3V

IN

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

–40°C –5°C 25° C 85°C 125°C

= 10 mA, CIN = C

OUT

= 10µA
= 100µA
= 1mA
= 10mA
= 100mA
= 150mA

= 1 µF, TA = 25°C, unless otherwise noted.

OUT

T

(°C)

J

Figure 5. Output Voltage vs. Junction Temperature

40

V

= 1.8V

OUT

V

= 2.3V

IN

35

30

25

20

15

GROUND CURRENT (µA)

10

5

0

–40°C –5°C 25° C 85°C 125°C

06901-005

T

(°C)

J

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

= 10µA
= 100µA
= 1mA
= 10mA
= 100mA
= 150mA

06901-008

Figure 8. Ground Current vs. Junction Temperature

1.806
V

= 1.8V

OUT

V

= 2.3V

IN

T

= 25°C

1.804

A

1.802

(V)

1.800

OUT

V

1.798

1.796

1.794

0.001 0.01 0.1 1 10 100 1000

I

LOAD

(mA)

Figure 6. Output Voltage vs. Load Current

1.806

V

= 1.8V

OUT

T

= 25°C

A

1.804

1.802

(V)

1.800

OUT

V

1.798

1.796

1.794

2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5

V

(V)

IN

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

= 10µA
= 100µA
= 1mA
= 10mA
= 50mA
= 100mA

Figure 7. Output Voltage vs. Input Voltage

35

V

= 1.8V

OUT

V

= 2.3V

IN

30

T

= 25°C

A

25

20

15

10

GROUND CURRENT (µA)

5

0

0.001 0.01 0.1 1 10 100 1000

06901-006

I

LOAD

(mA)

06901-009

Figure 9. Ground Current vs. Load Current

35

30

25

20

15

10

GROUND CURRENT (µA)

5

0

2.3 2. 7 3.1 3.5 3.9 4.3 4.7 5. 1 5.5

06901-007

V

(V)

IN

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

I

LOAD

V

OUT

T

= 25°C

A

= 10µA
= 100µA
= 1mA
= 10mA
= 100mA
= 150mA

= 1.8V

06901-010

Figure 10. Ground Current vs. Input Voltage

Rev. 0 | Page 7 of 20

ADP121

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0.35

0.30

0.25

0.20

VIN = 2.30

= 2.50

V

IN

= 3.00

V

IN

= 3.50

V

IN

= 4.20

V

IN

= 5.50

V

IN

140

TA = 25°C

120

100

80

(mV)

0.15

0.10

SHUTDOWN CURRENT ( µA)

0.05

0
–50 –25 0 25 50 75 100 125

TEMPERATURE (°C)

06901-011

Figure 11. Shutdown Current vs. Temperature at Various Input Voltages

180

TA = 25°C

160

140

120

(mV)

100

80

DROPOUT

V

60

40

20

0

1 10 100 1000

V

I

OUT

LOAD

= 2.5V

(mA)

V

= 3.3V

OUT

Figure 12. Dropout Voltage vs. Load Current, TSOT

60

DROPOUT

V

40

20

0

1 10 100 1000

V

= 2.5V

OUT

V

= 3.3V

OUT

(mA)

I

LOAD

06901-012

Figure 14. Dropout Voltage vs. Load Current, WLCSP

3.35

3.30

3.25

(V)

3.20

OUT

V

3.15

3.10

3.05

3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60

06901-018

(V)

V

IN

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

= 3.3V

OUT

T

= 25°C

A

@ 1mA
@ 10mA
@ 20mA
@ 50mA
@ 100mA
@ 150mA

06901-013

Figure 15. Output Voltage vs. Input Voltage (In Dropout), WLCSP

3.35

3.30

3.25

(V)

3.20

OUT

V

3.15

3.10

3.05

3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60
(V)

V

IN

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

= 3.3V

OUT

T

= 25°C

A

@ 1mA
@ 10mA
@ 20mA
@ 50mA
@ 100mA
@ 150mA

06901-019

Figure 13. Output Voltage vs. Input Voltage (In Dropout), TSOT

Rev. 0 | Page 8 of 20

60

50

40

30

20

GROUND CURRENT (µA)

I

LOAD

I

LOAD

I

LOAD

= 1mA
= 10mA
= 20mA

10

0

3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60

I

LOAD

I

LOAD

I

LOAD

= 50mA
= 100mA
= 150mA

(V)

V

IN

V

OUT

T

A

= 3.3V

= 25°C

Figure 16. Ground Current vs. Input Voltage (In Dropout)

06901-020

ADP121

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0

V

= 50mV

RIPPLE

–10

V

= 5V

IN

V

= 1.2V

OUT

–20

C

= 1µF

OUT

–30

–40

–50

PSRR (dB)

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

150mA
100mA
10mA
1mA
100µA
0µA

FREQUENCY (Hz)

Figure 17. Power Supply Rejection Ratio vs. Frequency

06901-014

0

3.3V/150mA

–20

–40

–60

PSRR (dB)

–80

–100

–120

3.3V/100µA

10 100 1k 10k 100k 1M 10M

1.2V/150mA

1.2V/100µA

FREQUENCY (Hz)

1.8V/150mA

1.8V/100µA

06901-017

Figure 20. Power Supply Rejection Ratio vs. Frequency, at Various Output

Voltages and Load Currents

0

V

= 50mV

RIPPLE

–10

V

= 5V

IN

V

= 1.8V

OUT

–20

C

= 1µF

OUT

–30

–40

–50

PSRR (dB)

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

150mA
100mA
10mA
1mA
100µA
0µA

FREQUENCY (Hz)

Figure 18. Power Supply Rejection Ratio vs. Frequency

0

V

= 50mV

RIPPLE

–10

V

= 5V

IN

V

= 3.3V

OUT

–20

C

= 1µF

OUT

–30

–40

–50

PSRR (dB)

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

150mA
100mA
10mA
1mA
100µA
0µA

FREQUENCY (Hz)

Figure 19. Power Supply Rejection Ratio vs. Frequency

10

1.2V

1.8V

3.3V

1

(µV/√Hz)

0.1

0

10 100 1k 10k 100k

06901-015

Figure 21. Output Noise Spectrum, VIN = 5 V, I

70

60

50

40

(V rms)

30

NOISE

OUT

20

10

0

0.001 0.01 0. 1 1 10 100 1000

06901-016

Figure 22. Output Noise vs. Load Current and Output Voltage, VIN = 5 V, C

FREQUENCY (Hz)

(mA)

I

LOAD

= 10 mA, C

LOAD

3.3V

2.5V

1.8V

1.5V

1.2V

OUT

= 1 F

= 1 F

OUT

06901-021

06901-022

Rev. 0 | Page 9 of 20

ADP121

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I

= 1µF

LOAD

2V/µs

V

I

LOAD

2V/µs

OUT

(4µs/DIV)

06901-037

V

= 1.8V,

OUT

C

= C

= 1µF

IN

OUT

1mA TO 150mA LO AD STEP,

(150mA/DIV)(50mV/DIV)

2.5A/µs

V

OUT

(40µs/DIV )

Figure 23. Load Transient Response, CIN = C

1mA TO 150mA LO AD STEP,

(150mA/DIV)(50mV/DIV)

2.5A/µs

I

LOAD

VIN = 5V
V

= 1.8V

OUT

= 1 F

OUT

I

LOAD

4V TO 5V INPUT VOL TAGE STEP,

(1V/DIV)(10mV/DIV)

V

= 1.8V,

OUT

C

= C

IN

OUT

06901-024

Figure 25. Line Transient Response, Load Current = 150 mA

(1V/DIV)(10mV/DIV)

4V TO 5V INPUT VOLTAGE STEP,

V

OUT

(40µs/DIV)

Figure 24. Load Transient Response, CIN = C

VIN = 5V
V

= 1.8V

OUT

= 4.7 F

OUT

06901-025

Figure 26. Line Transient Response, Load Current = 1 mA

V

OUT

(10µs/DIV)

06901-038

Rev. 0 | Page 10 of 20

ADP121

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THEORY OF OPERATION

The ADP121 is a low quiescent current, low dropout linear
regulators that operate from 2.3 V to 5.5 V and provide up
to 150 mA of output current. Drawing a low 30 A quiescent
current (typical) at full load makes the ADP121 ideal for battery­operated portable equipment. Shutdown current consumption
is typically 100 nA.

Optimized for use with small 1 µF ceramic capacitors,
the ADP121 provides excellent transient performance.

VOUTVIN

R1

GND

EN

SHORT CIRCUIT ,

UVLO, AND

THERMAL
PROTECT

SHUTDOWN

Figure 27. Internal Block Diagram

0.8V REFERENCE

R2

6901-023

Internally, the ADP121 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is con­trolled by the error amplifier. The error amplifier compares the
reference voltage with the feedback voltage from the output and
amplifies the difference. If the feedback voltage is lower than
the reference voltage, the gate of the PMOS device is pulled
lower, allowing more current to flow and increasing the output
voltage. If the feedback voltage is higher than the reference
voltage, the gate of the PMOS device is pulled higher, allowing
less current to flow and decreasing the output voltage.

The ADP121 is available in 16 output voltage options ranging
from 1.2 V to 3.3 V. The ADP121 uses the EN pin to enable and
disable the VOUT pin under normal operating conditions.
When EN is high, VOUT turns on; when EN is low, VOUT
turns off. For automatic startup, EN can be tied to VIN.

Rev. 0 | Page 11 of 20

ADP121

www.BDTIC.com/ADI

APPLICATIONS INFORMATION

CAPACITOR SELECTION

Output Capacitor

The ADP121 is designed for operation with small, space-saving
ceramic capacitors, but functions with most commonly used
capacitors as long as care is taken with the effective series resistance
(ESR) value. The ESR of the output capacitor affects stability of the
LDO control loop. A minimum of 0.70 µF capacitance with an
ESR of 1 Ω or less is recommended to ensure stability of the
ADP121. The transient response to changes in load current is
also affected by output capacitance. Using a larger value of output
capacitance improves the transient response of the ADP121 to
large changes in the load current. Figure 28 and Figure 29 show
the transient responses for output capacitance values of 1 µF and

4.7 µF, respectively.

I

LOAD

1mA TO 150mA LO AD STEP,

(150mA/DIV)(50mV/DIV)

V

= 1.8V,

OUT

C

= C

= 1µF

IN

OUT

Figure 28. Output Transient Response, C

I

LOAD

2.5A/µs

V

OUT

(400ns/DIV )

1mA TO 150mA LO AD STEP,

2.5A/µs

OUT

= 1 µF

CH1 MEAN

115.7mA

06901-039

Input Bypass Capacitor

Connecting a 1 µF capacitor from VIN to GND reduces the
circuit sensitivity to the printed circuit board (PCB) layout,
especially when long input traces or high source impedance
is encountered. If output capacitance greater than 1 µF is
required, the input capacitor should be increased to match it.

Input and Output Capacitor Properties

Any good quality ceramic capacitor can be used with the
ADP121, as long as it meets the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufac­tured with a variety of dielectrics, each with a different behavior
over temperature and applied voltage. Capacitors must have an
adequate dielectric to ensure the minimum capacitance over
the necessary temperature range and dc bias conditions. X5R
or X7R dielectrics with a voltage rating of 6.3 V or 10 V are
recommended. Y5V and Z5U dielectrics are not recommended,
due to their poor temperature and dc bias characteristics.

Figure 30 depicts the capacitance vs. voltage bias characteristic
of an 0402 1 µF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the
X5R dielectric is about ±15% over the −40°C to +85°C tempera­ture range and is not a function of package or voltage rating.

1.2

1.0

0.8

0.6

0.4

CAPACITANCE (µF)

(150mA/DIV)(50mV/DIV)

V

OUT

V

= 1.8V,

OUT

C

= C

= 4.7µF

IN

OUT

(400ns/DIV )

Figure 29. Output Transient Response, C

= 4.7 µF

OUT

06901-040

Rev. 0 | Page 12 of 20

0.2

0

02 468

VOLTAGE (V)

Figure 30. Capacitance vs. Voltage Bias Characteristic

10

06901-036

ADP121

V

www.BDTIC.com/ADI

Equation 1 can be used to determine the worst-case capacitance
accounting for capacitor variation over temperature, compo­nent tolerance, and voltage.

C

= C

EFF

× (1 − TEMPCO) × (1 − TOL) (1)

BIAS

where:
C

is the effective capacitance at the operating voltage.

BIAS

TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.

In this example, TEMPCO over −40°C to +85°C is assumed to
be 15% for an X5R dielectric. TOL is assumed to be 10%, and
C

is 0.94 F at 1.8 V from the graph in Figure 30.

BIAS

Substituting these values in Equation 1 yields

C

= 0.94 F × (1 − 0.15) × (1 − 0.1) = 0.719 F

EFF

Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.

To guarantee the performance of the ADP121, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors are evaluated for each application.

UNDERVOLTAGE LOCKOUT

The ADP121 has an internal undervoltage lockout circuit that
disables all inputs and the output when the input voltage is less
than approximately 2.2 V. This ensures that the inputs of the
ADP121 and the output behave in a predictable manner during
power-up.

ENABLE FEATURE

The ADP121 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. Figure 31 shows a
rising voltage on EN crossing the active threshold, and then
VOUT turns on. When a falling voltage on EN crosses the
inactive threshold, VOUT turns off.

As shown in Figure 31, the EN pin has built in hysteresis. This
prevents on/off oscillations that may occur due to noise on the
EN pin as it passes through the threshold points.

The active/inactive thresholds of the EN pin are derived from
the VIN voltage. Therefore, these thresholds vary with changing
input voltage. Figure 32 shows typical EN active/inactive thresholds
when the input voltage varies from 2.3 V to 5.5 V.

1.10

1.05

1.00

0.95

0.90

0.85

0.80

TYPICAL EN T HRESHOLDS (V )

0.75

0.70

2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50

EN ACTIVE

EN INACTIVE

(V)

V

IN

06901-027

Figure 32. Typical EN Pin Thresholds vs. Input Voltage

The ADP121 utilizes an internal soft start to limit the inrush
current when the output is enabled. The start-up time for the

1.8 V option is approximately 120 µs from the time the EN
active threshold is crossed to when the output reaches 90% of its
final value. The start-up time is somewhat dependant on the
output voltage setting and increases slightly as the output
voltage increases.

6

5

4

EN

VIN = 5V

= 1.8V

V

OUT

= C

IN

LOAD

= 1µF

OUT

= 100mA

EN

40ms/DIV

VOUT

06901-026

C
I

500mV/DI

Figure 31. ADP121 Typical EN Pin Operation

Rev. 0 | Page 13 of 20

3

VOLTAGE (V)

2

1

0

0 20 40 60 80 100 120 140 160 180 200

3.3V

1.8V

1.2V

(µs)

Figure 33. Typical Start-Up Time

06901-041

ADP121

www.BDTIC.com/ADI

CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION

The ADP121 is protected against damage due to excessive
power dissipation by current and thermal overload protection
circuits. The ADP121 is designed to current limit when the
output load reaches 225 mA (typical). When the output load
exceeds 225 mA, the output voltage is reduced to maintain a
constant current limit.

Thermal overload protection is built-in, which limits the
junction temperature to a maximum of 150°C (typical). Under
extreme conditions (that is, high ambient temperature and
power dissipation) when the junction temperature starts to
rise above 150°C, the output is turned off, reducing the output
current to zero. When the junction temperature drops below
135°C, the output is turned on again and output current is
restored to its nominal value.

Consider the case where a hard short from VOUT to GND
occurs. At first, the ADP121 current limits, so that only
225 mA is conducted into the short. If self-heating of the
junction is great enough to cause its temperature to rise above
150°C, thermal shutdown activates turning off the output and
reducing the output current to zero. As the junction tempera­ture cools and drops below 135°C, the output turns on and
conducts 225 mA into the short, again causing the junction
temperature to rise above 150°C. This thermal oscillation
between 135°C and 150°C causes a current oscillation
between 225 mA and 0 mA that continues as long as the
short remains at the output.

Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so junction temperatures do not exceed 125°C.

THERMAL CONSIDERATIONS

In most applications, the ADP121 does not dissipate a lot of
heat due to high efficiency. However, in applications with a high
ambient temperature and high supply voltage to an output voltage
differential, the heat dissipated in the package is large enough
that it can cause the junction temperature of the die to exceed
the maximum junction temperature of 125°C.

When the junction temperature exceeds 150°C, the converter
enters thermal shutdown. It recovers only after the junction
temperature has decreased below 135°C to prevent any permanent
damage. Therefore, thermal analysis for the chosen application
is very important to guarantee reliable performance over all
conditions. The junction temperature of the die is the sum of
the ambient temperature of the environment and the tempera­ture rise of the package due to the power dissipation, as shown
in Equation 2.

To guarantee reliable operation, the junction temperature of the
ADP121 must not exceed 125°C. To ensure that the junction
temperature stays below this maximum value, the user needs
to be aware of the parameters that contribute to junction

Rev. 0 | Page 14 of 20

temperature changes. These parameters include ambient temper­ature, power dissipation in the power device, and thermal
resistances between the junction and ambient air (θ

). The θJA

JA

number is dependent on the package assembly compounds used
and the amount of copper to which the GND pins of the package
are soldered on the PCB. Tab l e 5 shows typical θ
various PCB copper sizes and Ta b le 6 shows the typical Ψ

values for

JA

values

JB

for the ADP121.

Table 5. Typical θ

Values

JA

Copper Size (mm2) TSOT (°C/W) WLCSP (°C/W)

01 170 260
50 152 159
100 146 157
300 134 153
500 131 151

1

Device soldered to minimum size pin traces.

Table 6. Typical ΨJB Values

TSOT (°C/W) WLCSP (°C/W)

42.8 58.4

The junction temperature of the ADP121 can be calculated
from the following equation:

T

= TA + (PD × θJA) (2)

J

where:

T

is the ambient temperature.

A

is the power dissipation in the die, given by

P

D

P

= [(VIN − V

D

OUT

) × I

] + (VIN × I

LOAD

) (3)

GND

where:

I

is the load current.

LOAD

is the ground current.

I

GND

V

and V

IN

are input and output voltages, respectively.

OUT

Power dissipation due to ground current is quite small and
can be ignored. Therefore, the junction temperature equation
simplifies to

T

= TA + {[(VIN − V

J

OUT

) × I

] × θJA} (4)

LOAD

As shown in Equation 4, for a given ambient temperature,
input-to-output voltage differential, and continuous load
current, there exists a minimum copper size requirement for
the PCB to ensure that the junction temperature does not rise
above 125°C. Figure 34 to Figure 47 show junction temperature
calculations for different ambient temperatures, load currents,
V

IN

-to-V

differentials, and areas of PCB copper.

OUT

In cases where the board temperature is known, the thermal
characterization parameter, Ψ
junction temperature rise. T

, can be used to estimate the

JB

is calculated from TB and PD using

J

the formula

T

= TB + (PD × ΨJB) (5)

J

ADP121

www.BDTIC.com/ADI

140

MAX JUNCTION T EMPERATURE

120

LOAD CURRENT = 1mA

(°C)

J

JUNCTION TEMPERATURE, T

LOAD CURRENT = 10mA
LOAD CURRENT = 25mA

100

LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA

80

LOAD CURRENT = 150mA

60

40

20

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

– V

(V)

IN

OUT

Figure 34. TSOT, 500 mm2 of PCB Copper, TA = 25°C

140

MAX JUNCTION T EMPERATURE

120

LOAD CURRENT = 1mA

(°C)

J

LOAD CURRENT = 10mA
LOAD CURRENT = 25mA

100

LOAD CURRENT = 50mA
LOAD CURRENT = 75mA
LOAD CURRENT = 100mA

80

LOAD CURRENT
= 150mA

60

06901-028

140

MAX JUNCTION T EMPERATURE

120

(°C)

J

100

80

60

40

LOAD CURRENT = 1mA

JUNCTION TEM PERATURE, T

LOAD CURRENT = 10mA

20

LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

– V

(V)

IN

OUT

Figure 37. TSOT, 500 mm2 of PCB Copper, TA = 50°C

140

MAX JUNCTION T EMPERATURE

120

(°C)

J

100

80

60

06901-031

40

JUNCTION TEM PERATURE, T

20

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
V

– V

(V)

IN

OUT

Figure 35. TSOT, 100 mm2 of PCB Copper, TA = 25°C

140

MAX JUNCTION T EMPERATURE

120

LOAD CURRENT = 1mA

(°C)

JUNCTION TEMPERATURE, T

LOAD CURRENT = 10mA

J

LOAD CURRENT = 25mA

100

LOAD CURRENT = 50mA

80

60

40

20

LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

0

0.5 1.0 1. 5 2.0 2.5 3.0 3.5 4.0 4.5

V

– V

(V)

IN

OUT

Figure 36. TSOT, 0 mm2 of PCB Copper, TA = 25°C

40

JUNCTION TEMPERATURE, T

06901-029

LOAD CURRENT = 1mA
LOAD CURRENT = 10mA

20

LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

– V

(V)

IN

OUT

06901-032

Figure 38. TSOT, 100 mm2 of PCB Copper, TA = 50°C

140

MAX JUNCTION T EMPERATURE

120

(°C)

J

100

80

60

40

LOAD CURRENT = 1mA

JUNCTION TEM PERATURE, T

06901-030

LOAD CURRENT = 10mA

20

LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
V

LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

– V

(V)

IN

OUT

06901-033

Figure 39. TSOT, 0 mm2 of PCB Copper, TA = 50°C

Rev. 0 | Page 15 of 20

ADP121

www.BDTIC.com/ADI

140

MAX JUNCTION T EMPERATURE

120

LOAD CURRENT = 1mA

(°C)

LOAD CURRENT = 10mA

J

LOAD CURRENT = 25mA

100

LOAD CURRENT = 50mA
LOAD CURRENT = 75mA

80

140

MAX JUNCTION T EMPERATURE

120

(°C)

J

100

80

60

40

JUNCTION TEM PERATURE, T

20

LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

0

0.5 1.0 1. 5 2.0 2.5 3.0 3.5 4.0 4.5

V

– V

(V)

IN

OUT

Figure 40. WLCSP, 500 mm2 of PCB Copper, TA = 25°C

140

MAX JUNCTION T EMPERATURE

120

LOAD CURRENT = 1mA

(°C)

JUNCTION TEM PERATURE, T

LOAD CURRENT = 10mA

J

LOAD CURRENT = 25mA

100

LOAD CURRENT = 50mA
LOAD CURRENT = 75mA

80

60

40

20

LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

0

0.5 1.0 1. 5 2.0 2.5 3.0 3.5 4.0 4.5
V

– V

(V)

IN

OUT

Figure 41. WLCSP, 100 mm2 of PCB Copper, TA = 25°C

60

40

LOAD CURRENT = 1mA

JUNCTION TEMPERATURE, T

06901-042

LOAD CURRENT = 10mA

20

LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

– V

(V)

IN

OUT

06901-045

Figure 43. WLCSP, 500 mm2 of PCB Copper, TA = 50°C

140

MAX JUNCTION T EMPERATURE

120

(°C)

J

100

80

60

40

LOAD CURRENT = 1mA

JUNCTION TEMPERATURE, T

06901-043

LOAD CURRENT = 10mA

20

LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

– V

(V)

IN

OUT

06901-046

Figure 44. WLCSP, 100 mm2 of PCB Copper, TA = 50°C

140

MAX JUNCTION
TEMPERATURE

LOAD CURRENT = 1mA

120

(°C)

JUNCTION TEM PERATURE, T

LOAD CURRENT =
10mA

J

100

80

60

40

20

LOAD CURRENT = 25mA
LOAD CURRENT = 50mA
LOAD CURRENT = 75mA

0

0.5 1.0 1. 5 2.0 2.5 3.0 3.5 4.0 4.5

V

LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

– V

(V)

IN

OUT

Figure 42. WLCSP, 0 mm2 of PCB Copper, TA = 25°C

06901-044

Rev. 0 | Page 16 of 20

140

MAX JUNCTION
TEMPERATURE

120

(°C)

J

100

80

60

40

LOAD CURRENT = 1mA

JUNCTION TEMPERATURE, T

LOAD CURRENT = 10mA

20

LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

LOAD CURRENT = 75mA
LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

– V

(V)

IN

OUT

Figure 45. WLCSP, 0 mm2 of PCB Copper, TA = 50°C

06901-047

ADP121

www.BDTIC.com/ADI

140

120

(°C)

J

100

80

LOAD CURRENT = 1mA

60

LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

40

LOAD CURRENT = 75mA

JUNCTION TEM PERATURE, T

LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

20

MAX JUNCTION T EMPERATURE

0

0.5 1.0 1. 5 2.0 2.5 3.0 3.5 4.0 4.5

V

– V

(V)

IN

OUT

Figure 46. TSOT, 100 mm2 of PCB Copper, TA = 85°C

140

120

(°C)

J

100

80

LOAD CURRENT = 1mA

60

LOAD CURRENT = 10mA
LOAD CURRENT = 25mA
LOAD CURRENT = 50mA

40

LOAD CURRENT = 75mA

JUNCTION TEMPERATURE, T

LOAD CURRENT = 100mA
LOAD CURRENT = 150mA

20

MAX JUNCTION T EMPERATURE

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

V

– V

(V)

IN

OUT

Figure 47. WLCSP, 100 mm2 of PCB Copper, TA = 85°C

ANALOG DEVICES
ADP121-xx-EVALZ

C2C1

U1

VIN VOUT

06901-048

GND

J1

EN

Figure 48. Example of TSOT PCB Layout

ADP121CB-xx-EVALZ

VIN

GND

06901-049

J1

C1

EN

U1

WLC

SP

C2

GND

VOUT

GNDGND

GND

06901-034

PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS

Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP121. How­ever, as can be seen from Tabl e 5 and Tabl e 6, a point of
diminishing returns is eventually reached, beyond which
an increase in the copper size does not yield significant heat
dissipation benefits.

Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use 0402 or 0603 size capacitors and
resistors to achieve the smallest possible footprint solution on
boards where area is limited.

Rev. 0 | Page 17 of 20

06901-035

Figure 49. Example of WLCSP PCB Layout

ADP121

www.BDTIC.com/ADI

OUTLINE DIMENSIONS

2.90 BSC

54

0.50

0.30

2.80 BSC

0.95 BSC

*

1.00 MAX

SEATING
PLANE

(UJ-5)

0.660

0.600

0.540

0.20

0.08

SEATING
PLANE

8°
4°
0°

0.60

0.45

0.30

12

1.60 BSC

123

PIN 1

*

0.90

0.87

0.84

0.10 MAX

*

COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

1.90
BSC

Figure 50. 5-Lead Thin Small Outline Transistor Package [TSOT]

Dimensions show in millimeters

0.860

A1 BALL
CORNER

0.820 SQ

0.780

TOP VIEW

(BALL SI DE DOWN)

0.280

0.260

0.240

0.230

0.200

0.170

0.40
BALL PITCH

0.050 NOM
COPLANARITY

Figure 51. 4-Ball Wafer Level Chip Scale- Package [WLCSP]

(CB-4-2)

Dimensions show in millimeters

BOTTOM VIEW

(BALL SIDE UP)

A

B

101507-A

Rev. 0 | Page 18 of 20

ADP121

www.BDTIC.com/ADI

ORDERING GUIDE

Model

ADP121-AUJZ28R7
ADP121-AUJZ30R7
ADP121-AUJZ33R7
ADP121-ACBZ12R7
ADP121-ACBZ15R7

1

1

1

1

1

ADP121-ACBZ155R7
ADP121-ACBZ16R7

1

ADP121-ACBZ165R7
ADP121-ACBZ17R7

1

ADP121-ACBZ175R7
ADP121-ACBZ18R7

1

ADP121-ACBZ188R7
ADP121-ACBZ20R7
ADP121-ACBZ25R7

1

1

ADP121-ACBZ278R7
ADP121-ACBZ28R7
ADP121-ACBZ29R7
ADP121-ACBZ30R7
ADP121-ACBZ33R7
ADP121-3.3-EVALZ
ADP121-3.0-EVALZ
ADP121-2.8-EVALZ

1

1

1

1

1

1

1

ADP121CB-3.3-EVALZ
ADP121CB-3.0-EVALZ
ADP121CB-2.8-EVALZ
ADP121CB-2.0-EVALZ
ADP121CB-1.8-EVALZ

1

Z = RoHS Compliant Part.

Te mp e ra tu r e
Range

−40°C to +125°C 2.8 5-Lead TSOT UJ-5 LA3

−40°C to +125°C 3.0 5-Lead TSOT UJ-5 LA4

−40°C to +125°C 3.3 5-Lead TSOT UJ-5 LA5

−40°C to +125°C 1.2 4-Ball WLCSP CB-4-2 LC0

−40°C to +125°C 1.5 4-Ball WLCSP CB-4-2 LC1

1

−40°C to +125°C 1.55 4-Ball WLCSP CB-4-2 LC2

−40°C to +125°C 1.6 4-Ball WLCSP CB-4-2 LC3

1

−40°C to +125°C 1.65 4-Ball WLCSP CB-4-2 LC4

−40°C to +125°C 1.7 4-Ball WLCSP CB-4-2 LC5

1

−40°C to +125°C 1.75 4-Ball WLCSP CB-4-2 LC6

−40°C to +125°C 1.8 4-Ball WLCSP CB-4-2 LC7

1

−40°C to +125°C 1.875 4-Ball WLCSP CB-4-2 LC8

−40°C to +125°C 2.0 4-Ball WLCSP CB-4-2 LC9

−40°C to +125°C 2.5 4-Ball WLCSP CB-4-2 LCA

1

−40°C to +125°C 2.775 4-Ball WLCSP CB-4-2 LCC

−40°C to +125°C 2.8 4-Ball WLCSP CB-4-2 LCD

−40°C to +125°C 2.9 4-Ball WLCSP CB-4-2 LCE

−40°C to +125°C 3.0 4-Ball WLCSP CB-4-2 LCF

−40°C to +125°C 3.3 4-Ball WLCSP CB-4-2 LCG

−40°C to +125°C 3.3 ADP121 3.3 V Output Evaluation Board

−40°C to +125°C 3.0 ADP121 3.0 V Output Evaluation Board

−40°C to +125°C 2.8 ADP121 2.8 V Output Evaluation Board

1

−40°C to +125°C 3.3 ADP121-1 3.3 V Output Evaluation Board

1

−40°C to +125°C 3.0 ADP121-1 3.0 V Output Evaluation Board

1

−40°C to +125°C 2.8 ADP121-1 2.8 V Output Evaluation Board

1

−40°C to +125°C 2.0 ADP121-1 2.0 V Output Evaluation Board

1

−40°C to +125°C 1.8 ADP121-1 1.8 V Output Evaluation Board

Output
Voltage (V) Package Description

Package
Option Branding

Rev. 0 | Page 19 of 20

ADP121

www.BDTIC.com/ADI

NOTES

©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06901-0-7/08(0)

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