Datasheet ADM6711 Datasheet (Analog Devices)

Microprocessor Supervisory

Circuit in 4-Lead SC70

ADM6711/ADM6713

FEATURES
Specified Over Temperature
Low Power Consumption (12 ␮A)
Precision Monitoring of 2.5 V, 3 V, 3.3 V, and 5 V Power

Supply Voltages

Reset Timeout

Period of 140 ms (Min)
Manual Reset Input
Output Stages

Push-Pull RESET Output (ADM6711)
Open-Drain RESET Output (ADM6713)

Reset Assertion Down to 1 V V

CC

Power Supply Glitch Immunity
4-Lead SC70 Package

APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Automotive Systems
Portable Instruments

GENERAL DESCRIPTION

The ADM6711/ADM6713 are reset generator circuits suitable
for use in microprocessor based systems. They provide a reset
signal on power-up, power-down, and whenever the supply volt­age falls below a preset threshold. In addition, both parts have a
debounced manual reset input so that a reset signal can also be
initiated with an external switch or logic signal.

With six different reset threshold options available ranging from

2.32 V to 4.63 V, the ADM6711/ADM6713 are suitable for
monitoring 2.5 V, 3 V, 3.3 V, and 5 V supplies. A reset timeout
of at least 140 ms occurs when V

rises above the threshold.

CC

This gives the supply voltage time to stabilize before the micro­processor starts up.

The ADM6711 has a push-pull output, so no additional external
components are needed. The ADM6713’s open-drain output
requires an external pull-up resistor, which can be connected to a
voltage higher than V

, if desired.

CC

FUNCTIONAL BLOCK DIAGRAMS

ADM6711

V

CC

MR

V

CC

MR

V

REF

DEBOUNCE

ADM6713

V

REF

DEBOUNCE

RESET

GENERATOR

240 ms

RESET

GENERATOR

240 ms

RESET

GND

RESET

GND

The parts are highly reliable with accurate voltage references
and immunity to fast, negative-going transients on V

CC

. Low
current consumption and space-efficient 4-lead SC70 packaging
make the ADM6711/ADM6713 ideal for use in low power
portable applications.

V

CC

V

CC

ADM6711/

ADM6713

MR

RESET

GND GND

*R

PULL-UP

*ADM6713 ONLY

RESET

V

CC

␮P

SYSTEM

Figure 1. Typical Operating Circuit

REV. 0

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Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

ADM6711/ADM6713–SPECIFICATIONS

(VCC = Full Operating Range; TA = T

MIN

to T

MAX

; VCC Typ = 5 V

for L/M, 3.3 V for T/S, 3 V for R, and 2.5 V for Z models; unless otherwise noted.)

Parameter Min Typ Max Unit Test Conditions/Comments

SUPPLY

VCC Operating Voltage Range 1.0 5.5 V TA = 0°C to 70°C

1.2 5.5 V T

Supply Current 16 35 µAV

12 30 µAV

= –40°C to +125°C

A

< 5.5 V, ADM671_L/M,

CC

= –40°C to +85°C

T

A

< 3.6 V, ADM671_R/S/T/Z,

CC

TA = –40°C to +85°C

60 µAV

60 µAV

< 5.5 V, ADM671_L/M,

CC

= 85°C to 125°C

T

A

< 3.6 V, ADM671_R/S/T/Z,

CC

TA = 85°C to 125°C

RESET VOLTAGE THRESHOLD

ADM671_L 4.56 4.63 4.70 V TA = 25°C

4.50 4.75 V T

4.44 4.82 V T

ADM671_M 4.31 4.38 4.45 V T

4.25 4.50 V T

4.20 4.56 V T

ADM671_T 3.04 3.08 3.11 V T

3.00 3.15 V T

2.95 3.21 V T

ADM671_S 2.89 2.93 2.96 V T

2.85 3.00 V T

2.81 3.05 V T

ADM671_R 2.59 2.63 2.66 V T

2.55 2.70 V T

2.52 2.74 V T

ADM671_Z 2.28 2.32 2.35 V T

2.25 2.38 V T

= –40°C to +85°C

A

= 85°C to 125°C

A

= 25°C

A

= –40°C to +85°C

A

= 85°C to 125°C

A

= 25°C

A

= –40°C to +85°C

A

= 85°C to 125°C

A

= 25°C

A

= –40°C to +85°C

A

= 85°C to 125°C

A

= 25°C

A

= –40°C to +85°C

A

= 85°C to 125°C

A

= 25°C

A

= –40°C to +85°C

A

2.22 2.42 V TA = 85°C to 125°C

RESET THRESHOLD TEMPERATURE
COEFFICIENT 30 ppm/°C

VCC to RESET DELAY 20 µsV
RESET ACTIVE TIMEOUT PERIOD 140 240 460 ms T

= VTH to (VTH – 100 mV)

CC

= –40°C to +85°C

A

100 640 ms TA = 85°C to 125°C

RESET OUTPUT VOLTAGE

Low (ADM6711/ADM6713) 0.3 V VCC = VTH min, I

= 1.2 mA,

SINK

ADM671_R/S/T/Z

0.4 V V

= VTH min, I

CC

= 3.2 mA,

SINK

ADM671_L/M

High (ADM6711) 0.8 V

CC

0.3 V V
VV

>1.0 V, I

CC

> VTH max, I

CC

SINK

= 50 µA

SOURCE

= 500 µA,

ADM6711R/S/T/Z

0.8 V

CC

VV

> VTH max, I

CC

SOURCE

= 800 µA,

ADM6711L/M

RESET OPEN-DRAIN OUTPUT
LEAKAGE CURRENT 1 µAV

> VTH, RESET deasserted

CC

MANUAL RESET (MR)

Input Threshold 0.3 V

CC

0.7 VCCVV

VV

IL

IH

Pull-Up Resistance 10 20 kΩ
Minimum Pulsewidth 1 µs
Glitch Immunity 100 ns
Reset Delay 200 ns

Specifications subject to change without notice.

REV. 0–2–

ADM6711/ADM6713

ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C, unless otherwise noted.)

VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

RESET (Push-Pull) . . . . . . . . . . . . . . –0.3 V to (V

+ 0.3 V)

CC

RESET (Open-Drain) . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

MR . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V

+ 0.3 V)

CC

Input Current

, MR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

V

CC

Output Current

Table I. RESET Threshold Options

Model RESET Threshold (V)

ADM671_L 4.63
ADM671_M 4.38
ADM671_T 3.08
ADM671_S 2.93
ADM671_R 2.63
ADM671_Z 2.32

RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

Rate of Rise, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V/µs

CC

␪JA Thermal Impedance, SC70 . . . . . . . . . . . . . . . . . 146°C/W

Operating Temperature Range . . . . . . . . . . –40°C to +125°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods of time may affect device reliability.

ORDERING GUIDE

Model RESET Threshold (V) Temperature Range Branding Quantity (k)

ADM6711LAKS-REEL 4.63 –40°C to +125°CM0B 10
ADM6711LAKS-REEL-7 4.63 –40°C to +125°CM0B 3
ADM6711MAKS-REEL 4.38 –40°C to +125°C M0C 10
ADM6711MAKS-REEL-7 4.38 –40°C to +125°C M0C 3
ADM6711TAKS-REEL 3.08 –40°C to +125°C M0D 10
ADM6711TAKS-REEL-7 3.08 –40°C to +125°C M0D 3
ADM6711SAKS-REEL 2.93 –40°C to +125°C M0E 10
ADM6711SAKS-REEL-7 2.93 –40°C to +125°C M0E 3
ADM6711RAKS-REEL 2.63 –40°C to +125°C M0F 10
ADM6711RAKS-REEL-7 2.63 –40°C to +125°C M0F 3
ADM6711ZAKS-REEL 2.32 –40°C to +125°C M0G 10
ADM6711ZAKS-REEL-7 2.32 –40°C to +125°C M0G 3
ADM6713LAKS-REEL 4.63 –40°C to +125°CM0H 10
ADM6713LAKS-REEL-7 4.63 –40°C to +125°CM0H 3
ADM6713MAKS-REEL 4.38 –40°C to +125°C M0J 10
ADM6713MAKS-REEL-7 4.38 –40°C to +125°C M0J 3
ADM6713TAKS-REEL 3.08 –40°C to +125°CM0K 10
ADM6713TAKS-REEL-7 3.08 –40°C to +125°CM0K 3
ADM6713SAKS-REEL 2.93 –40°C to +125°C M0L 10
ADM6713SAKS-REEL-7 2.93 –40°C to +125°C M0L 3
ADM6713RAKS-REEL 2.63 –40°C to +125°CM0M 10
ADM6713RAKS-REEL-7 2.63 –40°C to +125°CM0M 3
ADM6713ZAKS-REEL 2.32 –40°C to +125°C M0N 10
ADM6713ZAKS-REEL-7 2.32 –40°C to +125°C M0N 3

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM6711/ADM6713 feature proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

REV. 0

–3–

ADM6711/ADM6713

PIN CONFIGURATION

1

GND

ADM6711
ADM6713

TOP VIEW

(Not to Scale)

2

RESET

PIN FUNCTION DESCRIPTIONS

Pin No. Mnemonic Function

1GND Ground Reference for All Signals. 0 V.
2 RESET Active Low Logic Output.

RESET remains low while V

is below the reset threshold and remains low for 240 ms (typ) after VCC rises

CC

above the reset threshold.

3 MR Manual Reset.

This active low debounced input will ignore input pulses of 100 ns (typ) and is guaranteed to accept input
pulses of greater than 1 µs. Leave floating when not used.

4VCCSupply Voltage Being Monitored.

4

V

CC

3

MR

REV. 0–4–

Typical Performance Characteristics–ADM6711/ADM6713

)

289

POWER-UP RESET TIMEOUT (ms)

284

279

274

269

264

259

254

249

244

ADM671_L/M

ADM671_R/S/T/Z

TEMPERATURE (ⴗC)

–40 –20 0 20 30 50 70 85 100 120

1.007

NORMALIZED RESET THRESHOLD

1.006

1.005

1.004

1.003

1.002

1.001

1.000

0.999

0.998

0.997

0.996

0.995

TEMPERATURE (ⴗC)

–40 –20 0 20 30 50 70 85 100 120

12

10

8

(␮A)

6

DD

I

4

2

0

–40

–20 0 20 30 50 70 85 100 120

TPC 1. Supply Current vs. Temperature

1000

900

800

700

600

500

400

300

200

POWER-DOWN RESET DELAY (␮s)

100

0

–40 –20 0 20 30 50 70 85 100 120

VOD = 125mV

VOD = 200mV

TPC 2. Power-Down
ADM671_R/S/T/Z

IDD @ VCC = 5.5V

IDD @ VCC = 3V

IDD @ VCC = 1V

TEMPERATURE (ⴗC

VOD = 20mV

TEMPERATURE (ⴗC)

RESET

Delay vs. Temperature

TPC 4. Power-Up Reset Timeout vs. Temperature

TPC 5.

RESET

Threshold Deviation vs. Temperature

900

800

700

600

500

400

300

REV. 0

200

POWER-DOWN RESET DELAY (␮s)

100

VOD = 200mV

0

–40 –20 0 20 30 50 70 85 100 120

TPC 3. Power-Down
ADM671_L/M

VOD = 20mV

VOD = 125mV

TEMPERATURE (ⴗC)

RESET

Delay vs. Temperature

400

350

300

250

200

150

100

ADM671_R/S/T/Z

MAXIMUM TRANSIENT DURATION (␮s)

50

0

110 1000100

ADM671_L/M

RESET COMPARATOR OVERDRIVE, V

– V

(mV)

TH

CC

TPC 6. Maximum Transient Duration without Causing a

RESET

Pulse vs.

RESET

Comparator Overdrive

–5–

ADM6711/ADM6713

DETAILED DESCRIPTION

The ADM6711/ADM6713 are designed to protect the integrity
of a system’s operation by ensuring the proper operation of the
system during power-up, power-down, and brownout conditions.

When the ADM6711/ADM6713 are powered up, the RESET
output will remain low for a period equal to the typical reset
active timeout period. This is designed to give the system time
to power up correctly and for the power supply to stabilize
before any devices are brought out of reset and allowed to begin
executing instructions. Initializing a system in this way provides
a more reliable startup for microprocessor systems.

MANUAL RESET INPUT

The ADM6711/ADM6713’s manual reset (MR) input allows
the system operator to reset a system by means of an external
manual switch. Alternatively, a logic signal from another digital
circuit can be used to trigger a reset via the MR input.

The MR input will ignore negative-going pulses faster than
100 ns (typically) and is guaranteed to accept any negative­going input pulse of a duration greater than or equal to 1 µs.
The RESET output will remain low while MR is held low and
for 240 ms (typically) after MR returns high.

If MR is connected to long cables or is used in a noisy environ­ment, then placing a 0.1 µF capacitor between the MR input
and ground will help to remove any fast, negative-going transients.

POWER SUPPLY GLITCH IMMUNITY

The ADM6711/ADM6713 contain internal filtering circuitry
that provides immunity to fast transient glitches on the power
supply line. TPC 6 illustrates glitch immunity performance by
showing the maximum transient duration without causing a
reset pulse for glitches with amplitudes in the range of 1 mV to
1000 mV.

Glitch immunity makes the ADM6711/ADM6713 suitable for
use in noisy environments. Mounting a 0.1 µF decoupling
capacitor as close as possible to the V

pin improves glitch

CC

immunity further.

ADM6713 RESET OUTPUT LOGIC LEVELS

The ADM6713’s open-drain RESET output is designed for use
with an external pull-up resistor. This resistor can be tied to V

CC

or any other reasonable voltage level, offering the flexibility to use
the ADM6713 to drive a variety of different logic level circuitry.

ENSURING A VALID RESET OUTPUT DOWN
TO V

CC

= 0 V

When VCC falls below 0.8 V, the ADM6711’s RESET output no
longer sinks current. Therefore, a high impedance CMOS logic
input connected to RESET may drift to undetermined logic
levels. To eliminate this problem, a pull-down resistor should be
connected from RESET to ground. A 100 kΩ resistor is large
enough not to load RESET and small enough to pull RESET
to ground.

V

CC

V

CC

ADM6711

RESET

100k⍀

GND

Figure 2. Ensuring a Valid

RESET

Output Down

to VCC = 0 V

REV. 0–6–

ADM6711/ADM6713

OUTLINE DIMENSIONS

4-Lead Thin Shrink Small Outline Transistor Package [SC70]

(EIAJ SC82 body)

(KS-4)

Dimensions shown in millimeters

2.20

1.35

1.15

PIN 1

0.65 BSC

1.80

4

1

3

2

0.50 BSC

2.40

1.80

0.70

0.50

1.10

0.80

SEATING
PLANE

0.18

0.10

1.00

0.80

0.10 MAX

0.30

0.15

0.10 COPLANARITY

PACKAGE OUTLINE CORRESPONDS IN FULL TO EIAJ SC82
EXCEPT FOR WIDTH OF PIN-2 AS SHOWN

0.30

0.10

REV. 0

–7–

C03754–0–8/03(0)

–8–