Supervisory Circuits with Watchdog
and Manual Reset in 5-Lead SOT-23
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
FEATURES
26 reset threshold options:
2.5 V to 5 V in 100 mV increments
4 reset timeout options:
1 ms, 20 ms, 140 ms, and 1120 ms (min)
V
CC
4 watchdog timeout options:
6.3 ms, 102 ms, 1600 ms, and 25.6s (typ)
Manual reset input
Reset output stages:
MR
Push-pull active-low
Open-drain active-low
Push-pull active-high
Low power consumption (5 µA)
Guaranteed reset output valid to V
Power supply glitch immunity
Specified over industrial temperature range
= 1 V
CC
5-lead SOT-23 package
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
GENERAL DESCRIPTION
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 are supervisory circuits, which monitor
power supply voltage levels and code execution integrity in
microprocessor-based systems. As well as providing power on
reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A
reset signal can also be asserted by an external push-button,
through a manual reset input. The seven parts feature different
combinations of watchdog input, manual reset input, and
output stage configuration, as shown in Table 1.
Table 1. Selection Table
Part No. Watchdog Manual Reset
ADM6316 Yes Yes Push-Pull –
ADM6317 Yes Yes – Push-Pull
ADM6318 Yes – Push-Pull Push-Pull
ADM6319 – Yes Push-Pull Push-Pull
ADM6320 Yes Yes Open-Drain –
ADM6321 Yes - Open-Drain Push-Pull
ADM6322 – Yes Open-Drain Push-Pull
Each part is available in a choice of 26 reset threshold options
ranging from 2.5 V to 5 V in 100 mV increments. There are also
four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms
(min) and four watchdog timeout options of 6.3 ms, 102 ms,
1600 ms, and 25.6s (typ).
The ADM6316–ADM6322 are available in 5-lead SOT-23
packages and typically consume only 3 µA, making them
suitable for use in low power portable applications.
FUNCTIONAL BLOCK DIAGRAM
ADM6316
RESET
V
REF
DEBOUNCE
RESET
GENERATOR
WATCHDOG
DETECTOR
GND WDI
Figure 1.
Output Stage
V
CC
RESET
RESET
04533-0-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
TABLE OF CONTENTS
Specifications..................................................................................... 3
Watch d og I nput .......................................................................... 10
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Circuit Description......................................................................... 10
Reset Output ............................................................................... 10
Open-Drain
Manual Reset Input ....................................................................10
RESET
Output...................................................... 10
REVISION HISTORY
10/04—Revision 0: Initial Version
Application Information................................................................ 11
Watch d og I nput C ur r ent ........................................................... 11
Negative-Going V
Ensuring Reset Valid to V
Watchdog Software Considerations......................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
Transie n t s ................................................ 11
CC
= 0 V........................................... 11
CC
Rev. 0 | Page 2 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
SPECIFICATIONS
VCC = full operating range, TA = T
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range 1 5.5 V
Supply Current 10 20 µA VCC = 5.5 V
5 12 µA VCC = 3.6 V
RESET THRESHOLD VOLTAGE
RESET THRESHOLD TEMPERATURE COEFFICIENT 40 ppm/°C
RESET THRESHOLD HYSTERESIS 3 mV
RESET TIMEOUT PERIOD
ADM63__A 1 1.4 2 ms
ADM63__B 20 28 40 ms
ADM63__C 140 200 280 ms
ADM63__D 1120 1600 2240 ms
VCC TO RESET DELAY 40 µs VCC falling at 1 mV/µs
PUSH-PULL OUTPUT (ADM6316, ADM6317,
ADM6318, ADM6319, ADM6321, ADM6322)
RESET Output Voltage
0.3 V
0.3 V VCC ≥ 2.7 V, I
0.4 V VCC ≥ 4.5 V, I
0.8 × V
V
RESET Rise Time
RESET Output Voltage 0.3 V VCC ≥ 2.7 V, I
0.4 V VCC ≥ 4.5 V, I
0.8 × V
0.8 × V
V
OPEN-DRAIN OUTPUT (ADM6320, ADM6321,
ADM6322)
RESET Output Voltage
0.3 V VCC ≥ 1.2 V, I
0.3 V VCC ≥ 2.7 V, I
0.4 V VCC ≥ 4.5 V, I
Open-Drain Reset Output Leakage Current 1 µA
WATCHDOG INPUT (ADM6316, ADM6317,
ADM6318, ADM6320, ADM6321)
Watchdog Timeout Period 4.3 6.3 9.3 ms ADM63___W
71 102 153 ms ADM63___X
1.12 1.6 2.4 s ADM63___Y
17.9 25.6 38.4 s ADM63___Z
WDI Pulse Width 50 ns VIL = 0.3 × VCC, VIH = 0.7 × V
WDI Input Threshold 0.3 × V
WDI Input Current 120 160 µA V
to T
MIN
, unless otherwise noted.
MAX
VTH − 1.5% V
VTH − 2.5% V
TH
TH
VTH + 1.5% V TA = +25°C
VTH + 2.5% V TA = −40°C to +85°C
0.3 V
V V
CC
− 1.5 V VCC ≥ 4.5 V, I
CC
5 25 ns
V V
CC
V V
CC
– 1.5 V VCC ≥ 4.5 V, I
CC
V
≥ 1.0 V, I
CC
V
≥ 1.2 V, I
CC
≥ 2.7 V, I
CC
= 50 µA
SINK
= 100 µA
SINK
= 1.2 mA
SINK
= 3.2 mA
SINK
SOURCE
SOURCE
= 500 µA
= 800 µA
From 10% to 90% VCC, CL = 5 pF,
V
= 3.3 V
CC
= 1.2 mA
SINK
= 3.2 mA
SINK
≥ 1.8 V, I
CC
≥ 2.7 V, I
CC
SOURCE
SOURCE
SOURCE
= 150 µA
= 500 µA
= 800 µA
0.3 V V
0.7 × V
CC
V
CC
−20 −15 µA V
≥ 1.0 V, I
CC
= VCC, time average
WDI
= 0, time average
WDI
= 50 µA
SINK
= 100 µA
SINK
= 1.2 mA
SINK
= 3.2 mA
SINK
CC
Rev. 0 | Page 3 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Parameter Min Typ Max Unit Test Conditions/Comments
MANUAL RESET INPUT (ADM6316, ADM6317,
ADM6319, ADM6320, ADM6322)
MR Input Threshold
0.3 × V
MR Input Pulse Width
MR Glitch Rejection
MR Pull-up Resistance
MR to Reset Delay
0.8 2.0 V V
0.7 × V
CC
V VTH < 4.0 V
CC
> 4.0 V
TH
1 µs
100 ns
35 52 75 kΩ
230 ns V
= 5 V
CC
Rev. 0 | Page 4 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
CC
RESET (ADM6320, ADM6321, ADM6322)
All Other Pins –0.3 V to (VCC + 0.3 V)
Output Current (RESET, RESET)
Operating Temperature Range –40°C to +85°C
Storage Temperature Range –65°C to +125°C
θJA Thermal Impedance, SOT-23 270°C/W
Lead Temperature
Soldering (10 s) 300°C
Vapour Phase (60 s) 215°C
Infrared (15 s) 220°C
–0.3 V to +6 V
–0.3 V to +6 V
20 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RESET
GND
MR
1
ADM6316/
2
ADM6320
TOP VIEW
(Not to Scale)
3
V
5
CC
4
WDI
04533-0-002
Figure 2. ADM6316/ADM6320 Pin Configuration
RESET
1
ADM6318/
2
GND
ADM6321
TOP VIEW
RESET
(Not to Scale)
3
Figure 4. ADM6318/ADM6321 Pin Configuration
V
5
CC
4
WDI
04533-0-004
Figure 5. ADM6319/ADM6322 Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
RESET (ADM6316/ADM6318/
ADM6319/ADM6320/ADM6321/
ADM6322)
Active-Low Reset Output. Asserted whenever V
Push-Pull Output Stage for the ADM6316/ADM6318/ADM6319.
Open-Drain Output Stage for the ADM6320/ADM6321/ADM6322.
RESET (ADM6317) Active-High, Push-Pull Reset Output.
2 GND Ground.
3
MR (ADM6316/ADM6317/
ADM6320)
RESET (ADM6318/ADM6319/
Manual Reset Input. This is an active-low input which, when forced low for at least 1 µs,
generates a reset. It features a 52 kΩ internal pull-up.
Active-High, Push-Pull Reset Output.
ADM6321/ADM6322)
4
5 V
WDI
(ADM6316/ADM6317/
ADM6318/ADM6320/ADM6321)
MR (ADM6319/ADM6322)
CC
Watchdog Input. Generates a reset if the logic level on the pin remains low or high for
the duration of the watchdog timeout. The timer is cleared if a logic transition occurs on
this pin or if a reset is generated. Leave floating to disable the watchdog timer.
Manual Reset Input.
Power Supply Voltage Being Monitored.
RESET
GND
MR
1
ADM6317
2
TOP VIEW
(Not to Scale)
3
V
5
CC
4
WDI
04533-0-003
Figure 3. ADM6317 Pin Configuration
RESET
GND
RESET
1
ADM6319/
2
ADM6322
TOP VIEW
(Not to Scale)
3
is below the reset threshold, VTH.
CC
V
5
CC
4
MR
04533-0-004
Rev. 0 | Page 6 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
TYPICAL PERFORMANCE CHARACTERISTICS
10.0
9.5
9.0
8.5
VCC = 5V
8.0
7.5
7.0
(µA)
6.5
CC
I
(µA)
CC
I
NORMALIZED RESET THRESHOLD
6.0
5.5
5.0
4.5
4.0
3.5
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
VCC = 3V
VCC = 1.5V
–40–200 20406080
TEMPERATURE (°C)
Figure 6. Supply Current vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
5
0
VCC (V)
5.50 2.01.51.00.5 2.5 3.0 3.5 4.0 4.5 5.0
Figure 7. Supply Current vs. Supply Voltage
–40 40200–20 60 80
TEMPERATURE (°C)
Figure 8. Normalized Reset Threshold vs. Temperature
04533-0-006
04533-0-007
04533-0-008
100
90
80
70
60
50
40
30
TO RESET DELAY (µs)
CC
V
20
10
0
–40 40200–20 60 80
Figure 9. V
Falling to Reset Propagation Delay vs. Temperature
CC
TEMPERATURE (°C)
340
320
300
280
260
240
220
200
180
160
140
MANUAL RESET TO RESET DELAY (ns)
120
100
–40 40200–20 60 80
TEMPERATURE (°C)
Figure 10. Manual Reset to Reset Propagation Delay vs. Temperature
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322)
1.20
1.15
1.10
1.05
1.00
0.95
0.90
NORMALIZED RESET TIMEOUT
0.85
0.80
–40 40200–20 60 80
TEMPERATURE (°C)
Figure 11. Normalized Reset Timeout Period vs. Temperature
04533-0-009
04533-0-010
04533-0-011
Rev. 0 | Page 7 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
1.20
1.15
1.10
1.05
1.00
0.95
NORMALIZED WATCHDOG TIMEOUT
0.90
–40 6040 80200–20
TEMPERATURE (°C)
Figure 12. Normalized Watchdog Timeout Period vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
160
140
120
100
80
60
40
20
MAXIMUM TRANSIENT DURATION (µs)
VTH = 4.63V
VTH = 2.93V
0
Figure 13. Maximum V
Transient Duration vs. Reset Threshold Overdrive
CC
RESET OCCURS ABOVE CURVE
OVER DRIVE VOD (mV)
04533-0-012
100010 100
04533-0-013
190
180
170
160
150
140
130
120
MR MINIMUM PULSE WIDTH (ns)
110
100
–50 0 50
TEMPERATURE (°C)
Figure 14. Manual Reset Minimum Pulse Width vs. Temperature
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322)
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
MINIMUM PULSE WIDTH (ns)
2.2
2.0
–40 10 60
NEGATIVE PULSE
POSITIVE PULSE
TEMPERATURE (°C)
Figure 15. Watchdog Input Minimum Pulse Width vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
04533-0-014
04333-0-015
Rev. 0 | Page 8 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Table 5. Reset Threshold Options
T
= +25°C TA = −40°C to +85°C
Part No.
ADM63 _ _ _ 50 4.925 5.000 5.075 4.875 5.125
ADM63 _ _ _ 49 4.827 4.900 4.974 4.778 5.023
ADM63 _ _ _ 48 4.728 4.800 4.872 4.680 4.920
ADM63 _ _ _ 47 4.630 4.700 4.771 4.583 4.818
ADM63 _ _ _ 46 4.561 4.630 4.699 4.514 4.746
ADM63 _ _ _ 45 4.433 4.500 4.568 4.388 4.613
ADM63 _ _ _ 44 4.314 4.390 4.446 4.270 4.490
ADM63 _ _ _ 43 4.236 4.300 4.365 4.193 4.408
ADM63 _ _ _ 42 4.137 4.200 4.263 4.095 4.305
ADM63 _ _ _ 41 4.039 4.100 4.162 3.998 4.203
ADM63 _ _ _ 40 3.940 4.00 4.060 3.900 4.100
ADM63 _ _ _ 39 3.842 3.900 3.959 3.803 3.998
ADM63 _ _ _ 38 3.743 3.800 3.857 3.705 3.895
ADM63 _ _ _ 37 3.645 3.700 3.756 3.608 3.793
ADM63 _ _ _ 36 3.546 3.600 3.654 3.510 3.690
ADM63 _ _ _ 35 3.448 3.500 3.553 3.413 3.588
ADM63 _ _ _ 34 3.349 3.400 3.451 3.315 3.485
ADM63 _ _ _ 33 3.251 3.300 3.350 3.218 3.383
ADM63 _ _ _ 32 3.152 3.200 3.248 3.120 3.280
ADM63 _ _ _ 31 3.034 3.080 3.126 3.003 3.157
ADM63 _ _ _ 30 2.955 3.000 3.045 2.925 3.075
ADM63 _ _ _ 29 2.886 2.930 2.974 2.857 3.000
ADM63 _ _ _ 28 2.758 2.800 2.842 2.730 2.870
ADM63 _ _ _ 27 2.660 2.700 2.741 2.633 2.768
ADM63 _ _ _ 26 2.591 2.630 2.669 2.564 2.696
ADM63 _ _ _ 25 2.463 2.500 2.538 2.438 2.563
Min Typ Max Min Max
A
Table 6. Reset Timeout Options
Suffix Min Typ Max Unit
A 1 1.6 2 ms
B 20 30 40 ms
C 140 200 280 ms
D 1.12 1.60 2.24 s
Table 7. Watchdog Timer Options
Suffix Min Typ Max Unit
W 4.3 6.3 9.3 ms
X 71 102 153 ms
Y 1.12 1.6 2.24 s
Z 17.9 25.6 38.4 s
Table 8. Standard Models
Model Reset Threshold (V) Minimum Reset Timeout (ms) Typical Watchdog Timeout (s)
ADM6316CY29ARJ 2.93 140 1.6
ADM6316CY46ARJ 4.63 140 1.6
ADM6318CY46ARJ 4.63 140 1.6
ADM6319C46ARJ 4.63 140 1.6
ADM6320CY29ARJ 2.93 140 1.6
ADM6320CY46ARJ 4.63 140 1.6
ADM6321CY46ARJ 4.63 140 1.6
ADM6322C46ARJ 4.63 140 1.6
Rev. 0 | Page 9 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
CIRCUIT DESCRIPTION
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 provide microprocessor supply voltage
supervision by controlling the microprocessor’s reset input.
Code execution errors are avoided during power-up, powerdown, and brownout conditions by asserting a reset signal when
the supply voltage is below a preset threshold and by allowing
supply voltage stabilization with a fixed-timeout reset pulse
after the supply voltage rises above the threshold. In addition,
problems with microprocessor code execution can be monitored
and corrected with a watchdog timer (ADM6316/ADM6317/
ADM6318/ADM6320/ADM6321). If the user detects a problem
with the system’s operation, a manual reset input is available
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322) to
reset the microprocessor by means of an external push-button,
for example.
RESET OUTPUT
The ADM6316 features an active-low, push-pull reset output,
while the ADM6317/ADM6321/ADM6322 have active-high
push-pull reset outputs. The ADM6318/ADM6319 feature dual
active-low and active-high push-pull reset outputs. For activelow and active-high outputs, the reset signal is guaranteed to be
logic low and logic high, respectively, for V
The reset output is asserted when V
threshold (V
), when MR is driven low, or when WDI is not
TH
CC
serviced within the watchdog timeout period (t
down to 1 V.
CC
is below the reset
). Reset
WD
remains asserted for the duration of the reset active timeout
period (t
) after VCC rises above the reset threshold, after MR
RP
transitions from low-to-high, or after the watchdog timer times
out. Figure 16 illustrates the behavior of the reset outputs.
V
V
RESET
RESET
CC
CC
1V
0V
V
CC
0V
V
CC
1V
0V
V
TH
t
RP
t
RP
Figure 16. Reset Timing Diagram
V
TH
t
RD
t
RD
04533-0-019
OPEN-DRAIN RESET OUTPUT
The ADM6320/ADM6321/ADM6322 have an active-low opendrain reset output. This output structure requires an external
pull-up resistor to connect the reset output to a voltage rail no
higher than 6 V. The resistor should comply with the microprocessor’s logic low and logic high voltage level requirements
while supplying input current and leakage paths on the
line. A 10 kΩ resistor is adequate in most situations.
RESET
MANUAL RESET INPUT
The ADM6316/ADM6317/ADM6319/ADM6320/ADM6322
feature a manual reset input (
asserts the reset output. When
reset remains asserted for the duration of the reset active
timeout period before deasserting. The
internal pull-up so that the input is always high when unconnected. An external push-button switch can be connected
between
and ground so that the user can generate a reset.
MR
Debounce circuitry for this purpose is integrated on-chip. Noise
immunity is provided on the
transients of up to 100 ns (typ) are ignored. A 0.1 µF capacitor
between
and ground provides additional noise immunity.
MR
WATCHDOG INPUT
The ADM6316/ADM6317/ADM6318/ADM6320/ADM6321
feature a watchdog timer, which monitors microprocessor
activity. A timer circuit is cleared with every low-to-high or
high-to-low logic transition on the watchdog input pin (WDI),
which detects pulses as short as 50 ns. If the timer counts
through the preset watchdog timeout period (t
asserted. The microprocessor is required to toggle the WDI pin
to avoid being reset. Failure of the microprocessor to toggle
WDI within the timeout period, therefore, indicates a code
execution error, and the reset pulse generated restarts the
microprocessor in a known state.
As well as logic transitions on WDI, the watchdog timer is also
cleared by a reset assertion due to an undervoltage condition on
or due to MR being pulled low. When reset is asserted, the
V
CC
watchdog timer is cleared and does not begin counting again
until reset deassserts. The watchdog timer can be disabled by
leaving WDI floating or by three-stating the WDI driver.
V
RESET
WDI
V
CC
CC
1V
0V
V
CC
0V
V
CC
0V
V
TH
t
RP
Figure 17. Watchdog Timing Diagram
) which, when driven low,
MR
transitions from low to high,
MR
input has a 52 kΩ
MR
input, and fast, negative-going
MR
), reset is
WD
t
t
RD
WD
04533-0-022
Rev. 0 | Page 10 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
APPLICATION INFORMATION
WATCHDOG INPUT CURRENT
In order to minimize watchdog input current (and minimize
overall power consumption), leave WDI low for the majority
of the watchdog timeout period. When driven high, WDI can
draw as much as 160 µA. Pulsing WDI low-high-low at a low
duty cycle reduces the effect of the large input current. When
WDI is unconnected, a window comparator disconnects the
watchdog timer from the reset output circuitry so that reset is
not asserted when the watchdog timer times out.
NEGATIVE-GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply
transients, the ADM6316/ADM6317/ADM6318/ADM6319/
ADM6320/ADM6321/ADM6322 are equipped with glitch
rejection circuitry. The typical performance characteristic in
Figure 13 plots V
magnitude. The curves show combinations of transient
magnitude and duration for which a reset is not generated for
4.63 V and 2.93 V reset threshold parts. For example, with the
2.93 V threshold, a transient that goes 100 mV below the
threshold and lasts 8 µs typically does not cause a reset, but if
the transient is any bigger in magnitude or duration, a reset is
generated. An optional 0.1 µF bypass capacitor mounted close
provides additional glitch rejection.
to V
CC
ENSURING RESET VALID TO VCC = 0 V
Both active-low and active-high reset outputs are guaranteed to
be valid for V
resistor with push-pull configured reset outputs, valid outputs
as low as 0 V are possible. For an active-low reset
for V
CC
output, a resistor connected between
the output low when it is unable to sink current. For the activehigh case, a resistor connected between RESET and V
the output high when it is unable to source current. A large
resistance such as 100 kΩ should be used so that it does not
overload the reset output when V
V
CC
ADM6316/
ADM6318/
ADM6319
transient duration vs. the transient
CC
as low as 1 V. However, by using an external
CC
and ground pulls
RESET
CC
is above 1 V.
CC
V
CC
ADM6317/
RESET
100kΩ
Figure 18. Ensuring Reset Valid to V
ADM6318/
ADM6319/
ADM6321/
ADM6322
= 0 V
CC
100kΩ
RESET
pulls
04533-0-018
WATCHDOG SOFT WARE CONSIDERATIONS
In implementing the microprocessor’s watchdog strobe code,
quickly switching WDI low-high and then high-low (minimizing
WDI high time) is desirable for current consumption reasons.
However, a more effective way of using the watchdog function
can be considered.
A low-high-low WDI pulse within a given subroutine prevents
the watchdog timing out. However, if the subroutine becomes
stuck in an infinite loop, the watchdog cannot detect this because
the subroutine continues to toggle WDI. A more effective coding
scheme for detecting this error involves using a slightly longer
watchdog timeout. In the program that calls the subroutine,
WDI is set high. The subroutine sets WDI low when it is called.
If the program executes without error, WDI is toggled high and
low with every loop of the program. If the subroutine enters an
infinite loop, WDI is kept low, the watchdog times out, and the
microprocessor is reset.
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE
SET WDI
LOW
RETURN
Figure 19. Watchdog Flow Diagram
V
CC
RESET RESET
ADM6316
WDI I/OMR
Figure 20. Typical Application Circuit
RESET
INFINITE LOOP:
WATCHDOG
TIMES OUT
µP
04533-0-021
04533-0-020
Rev. 0 | Page 11 of 12
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
OUTLINE DIMENSIONS
2.90 BSC
4 5
3
0.95 BSC
0.50
0.30
ADM63
2.80 BSC
1.45 MAX
SEATING
PLANE
____
0.22
0.08
ARJ-
10°
_
5°
0°
0.60
0.45
0.30
ORDERING GUIDE
1.60 BSC
1.30
1.15
0.90
0.15MAX
1
2
PIN 1
1.90
BSC
COMPLIANT TO JEDEC STANDARDS MO-178AA
Figure 21. 5-Lead Small Outline Transistor Package
ORDERING QUANTITY
RL7: 3,000 PIECE REEL
PACKAGE CODE
RJ: 5-LEAD SOT-23
TEMPERATURE RANGE
A: –40°C TO +85°C
04533-0-023
RESET TIMEOUT PERIOD
A: 1ms (TYP)
B: 20ms (TYP)
C: 140s (TYP)
D: 1120s (TYP)
GENERIC NUMBER
WATCHDOG TIMEOUT PERIOD
(16-22)
W: 6.3ms (TYP)
X: 102ms (TYP)
Y: 1.6s (TYP)
Z: 25s (TYP)
RESET THRESHOLD NUMBER
(25 TO 50)
Figure 22. Ordering Code Structure
Model
1,2
Temperature Range Quantity
3
Package Option Branding
ADM6316 _ _ __ ARJ-RL7 −40°C to +85°C 3k SOT-23-5 N00
ADM6317 _ _ __ ARJ-RL7 −40°C to +85°C 3k SOT-23-5 N01
ADM6318 _ _ __ ARJ-RL7 −40°C to +85°C 3k SOT-23-5 N02
ADM6319 _ __ ARJ-RL7 −40°C to +85°C 3k SOT-23-5 N03
ADM6320 _ _ __ ARJ-RL7 −40°C to +85°C 3k SOT-23-5 N04
ADM6321 _ _ __ ARJ-RL7 −40°C to +85°C 3k SOT-23-5 N05
ADM6322 _ __ ARJ-RL7 −40°C to +85°C 3k SOT-23-5 N06
1
Complete the ordering code by inserting reset timeout, watchdog timeout (ADM6316/ADM6317/ADM6318/ADM6320/ADM6321), and reset threshold suffixes from
to . No watchdog timeout for ADM6319/ADM6322. Table 5 Table 7
2
Contact Sales for the availability of nonstandard models. See for a list of standard models. Table 8
3
A minimum of 12k (4 reels) must be ordered.
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04533-0-10/04(0)
Rev. 0 | Page 12 of 12
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