Datasheet ADM242AR, ADM242AN, ADM222AR, ADM222AN, ADM222AARW Datasheet (Analog Devices)
...
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADM222/ADM232A/ADM242*
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2001
High-Speed, 5 V, 0.1 F
CMOS RS-232 Drivers/Receivers
FEATURES
200 kB/s Transmission Rate
Small (0.1 F) Charge Pump Capacitors
Single 5 V Power Supply
Meets All EIA-232-E and V.28 Specifications
Two Drivers and Two Receivers
On-Board DC-DC Converters
9 V Output Swing with 5 V Supply
30 V Receiver Input Levels
Pin Compatible with MAX222/MAX232A/MAX242
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
FUNCTIONAL BLOCK DIAGRAM
*
INTERNAL 400k PULL-UP RESISTOR
ON EACH TTL/CMOS INPUT
**
INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
+5V TO +10V
VOLTAGE DOUBLER
+5V TO –10V
VOLTAGE INVERTER
C1+
C1–
V+
V–
C2+
C2–
T1
ADM2xx
T2
R1
R2
0.1F
0.1F
0.1F
GND
TTL/CMOS
OUTPUTS
R1
OUT
R2
OUT
T1
OUT
T2
OUT
R1
IN
R2
IN
T1
IN
T2
IN
TTL/CMOS
INPUTS
*
RS-232
OUTPUTS
RS-232
INPUTS
**
0.1F
5V INPUT
0.1F
EN
SHDN
(ADM242)
(ADM222, ADM242)
V
CC
GENERAL DESCRIPTION
The ADM222, ADM232A, ADM242 are a family of high-speed
RS-232 line drivers/receivers offering transmission rates up to
200 kB/s. Operating from a single 5 V power supply, a highly
efficient on-chip charge pump using small (0.1 µF) external
capacitors allows RS-232 bipolar levels to be developed. Two
RS-232 drivers and two RS-232 receivers are provided on
each device.
The devices are fabricated on BiCMOS, an advanced mixed
technology process that combines low power CMOS with highspeed bipolar circuitry. This allows for transmission rates up to
200 kB/s, yet minimizes the quiescent power supply current to
under 5 mA.
The ADM232A is a pin-compatible, high-speed upgrade for the
AD232 and for the ADM232L. It is available in 16-lead DIP
and in both narrow and wide surface-mount (SOIC) packages.
The ADM222 contains an additional shutdown (SHDN) function that may be used to disable the device, thereby reducing the
supply current to 0.1 µA. During shutdown, all transmit/receive
*Protected by U.S. Patent No. 5,237,209.
functions are disabled. The ADM222 is available in 18-lead
DIP and in a wide surface-mount (SOIC) package.
The ADM242 combines both shutdown (SHDN) and enable
(EN) functions. The shutdown function reduces the supply
current to 0.1 mA. During shutdown, the transmitters are disabled but the receivers continue to operate normally. The
enable function allows the receiver outputs to be disabled
thereby facilitating sharing a common bus. The ADM242 is
available in 18-lead DIP and in a wide surface-mount (SOIC)
package.
REV. A
–2–
ADM222/ADM232A/ADM242–SPECIFICATIONS
(VCC = 5 V 10%. C1–C4 = 0.1 F; all specifications T
MIN
to T
MAX
unless otherwise noted.)
Parameter Min Typ Max Unit Test Conditions/Comments
RS-232 TRANSMITTERS
Output Voltage Swing ± 5 ± 9 V All Transmitter Outputs Loaded with
3 kΩ to Ground
Input Logic Threshold Low, V
INL
1.7 0.8 V T
IN
Input Logic Threshold High, V
INH
2.4 1.7 V T
IN
Logic Pull-Up Current 12 40 µAT
IN
= 0 V
Data Rate 200 kB/s
Output Resistance 300 Ω V
CC
= V+ = V– = 0 V, V
OUT
= ± 2 V
Output Short Circuit Current (Instantaneous) ± 10 mA
RS-232 RECEIVERS
RS-232 Input Voltage Range –30 +30 V
RS-232 Input Threshold Low 0.8 1.2 V
RS-232 Input Threshold High 1.6 2.4 V
RS-232 Input Hysteresis 0.2 0.4 1.0 V V
CC
= 5 V
RS-232 Input Resistance 3 5 7 kΩ T
A
= 0°C to 85°C
TTL/CMOS Output Voltage Low, V
OL
0.05 0.4 V I
OUT
= 3.2 mA
TTL/CMOS Output Voltage High, V
OH
3.5 V I
OUT
= –1.0 mA
TTL/CMOS Output Short-Circuit Current –2 –85 mA Source Current (V
OUT
= GND)*
TTL/CMOS Output Short-Circuit Current 10 35 mA Sink Current (V
OUT
= VCC)*
TTL/CMOS Output Leakage Current ± 0.05 ± 10 µA SHDN = GND/EN = V
CC
0 V ≤ V
OUT
≤ V
CC
EN Input Threshold Low, V
INL
1.4 0.8 V
EN Input Threshold High, V
INH
2.0 1.4 V
POWER SUPPLY
Power Supply Current 4 8 mA No Load
13 mA 3 kΩ Load on Both Outputs
Shutdown Power Supply Current 0.1 10 µA
SHDN Input Leakage Current ± 1 µA
SHDN Input Threshold Low, V
INL
1.4 0.8 V
SHDN Input Threshold High, V
INH
2.0 1.4 V
AC CHARACTERISTICS
Transition Region Slew Rate 3 8 30 V/µsCL = 50 pF to 1000 pF, RL = 3 kΩ to 7 kΩ
Measured from +3 V to –3 V or –3 V to +3 V
Transmitter Propagation Delay TTL to RS-232 0.85 3.5 µst
PHLT
1.0 3.5 µst
PLHT
Receiver Propagation Delay RS-232 to TTL 0.1 0.5 µst
PHLR
0.3 0.5 µst
PLHR
Receiver Output Enable Time 125 500 ns t
ER
Receiver Output Disable Time 160 500 ns t
DR
Transmitter Output Enable Time 250 µs SHDN Goes High
Transmitter Output Disable Time 3.5 µs SHDN Goes Low
Transmitter + to – Propagation Delay Difference 150 ns
Receiver + to – Propagation Delay Difference 200 ns
*Guaranteed by design, not production tested.
Specifications subject to change without notice.
REV. A
ADM222/ADM232A/ADM242
–3–
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . (V
CC
– 0.3 V) to +13 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –13 V
Input Voltages
T
IN
. . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
R
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Output Voltages
T
OUT
. . . . . . . . . . . . . . . . . . . (V+, +0.3 V) to (V–, –0.3 V)
R
OUT
. . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Power Dissipation N-16 . . . . . . . . . . . . . . . . . . . . . . 400 mW
(Derate 7.5 mW/°C above 70°C)
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 80°C/W
Power Dissipation R-16N . . . . . . . . . . . . . . . . . . . . . 400 mW
(Derate 7 mW/°C above 70°C)
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 80°C/W
Power Dissipation R-16W . . . . . . . . . . . . . . . . . . . . . 400 mW
(Derate 7 mW/°C above 70°C)
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 80°CW
Power Dissipation N-18 . . . . . . . . . . . . . . . . . . . . . . 400 mW
(Derate 7 mW/°C above 70°C)
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 80°C/W
Power Dissipation R-18W . . . . . . . . . . . . . . . . . . . . . 400 mW
(Derate 7 mW/°C above 70°C)
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 80°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
ADM222AN –40°C to +85°C Plastic DIP N-18
ADM222AR –40°C to +85°C Wide SOIC R-18W
ADM232AAN –40°C to +85°C Plastic DIP N-16
ADM232AARN –40°C to +85°C Narrow SOIC R-16N
ADM232AARW –40°C to +85°C Wide SOIC R-16W
ADM242AN –40°C to +85°C Plastic DIP N-18
ADM242AR –40°C to +85°C Wide SOIC R-18W
Test Circuits
V–
V+
0V
V
OUT
3V
V
IN
t
PHLT
t
PLHT
Figure 1. Transmitter Propagation Delay Timing
0.8V
3V
3.5V
RECEIVER
OUTPUT
EN
INPUT
0V
t
ER
Figure 2. Receiver Enable Timing
t
PHLR
t
PLHR
GND
V
CC
50%
V
IN
V
OUT
3V
0V
Figure 3. Receiver Propagation Delay Timing
V
OH
– 0.5V
RECEIVER
OUTPUT
EN
INPUT
VOL + 0.5V
V
OH
V
OL
0V
3V
t
DR
Figure 4. Receiver Disable Timing
REV. A
ADM222/ADM232A/ADM242
–4–
V
IN
V
OUT
50pF
3k
SHDN
Figure 5. Shutdown Test Circuit
+ 5V
TRANSMITTER
OUTPUT
SHDN
INPUT
– 5V
V+
0V
3V
V–
t
DT
Figure 6. Transmitter Shutdown Disable Timing
2
4
6
5
12
11
13
10
3
7
15
8
14
9
18
*
INTERNAL 400k PULL-UP RESISTOR
ON EACH TTL/CMOS INPUT
**
INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
+5V TO +10V
VOLTAGE DOUBLER
+5V TO –10V
VOLTAGE INVERTER
C1+
C1–
V+
V–
C2+
C2–
T1
ADM222
T2
R1
R2
C1
0.1F
C2
0.1F
C3
0.1F
GND
TTL/CMOS
OUTPUTS
R1
OUT
R2
OUT
T1
OUT
T2
OUT
R1
IN
R2
IN
T1
IN
T2
IN
TTL/CMOS
INPUTS
*
RS-232
OUTPUTS
RS-232
INPUTS
**
5V INPUT
C5
0.1F
6.3V
SHDN
16
C4
0.1F
V
CC
17
Figure 7. ADM222 Typical Operating Circuit
PIN FUNCTION DESCRIPTION
Mnemonic Function
V
CC
Power Supply Input, 5 V ± 10%.
V+ Internally generated positive supply (+10 V
nominal).
V– Internally generated negative supply (–10 V
nominal).
GND Ground Pin. Must be connected to 0 V.
C1+ External capacitor 1, (+ terminal) is connected
to this pin.
C1– External capacitor 1, (– terminal) is connected
to this pin.
C2+ External capacitor 2, (+ terminal) is connected
to this pin.
C2– External capacitor 2, (– terminal) is connected
to this pin.
T
IN
Transmitter (Driver) Inputs. These inputs accept
TTL/CMOS levels. An internal 400 kΩ pull-up
resistor to V
CC
is connected on each input.
T
OUT
Transmitter (Driver) Outputs. These are RS-232
levels (typically ±9 V).
R
IN
Receiver Inputs. These inputs accept RS-232
signal levels. An internal 5 kΩ pull-down resistor
to GND is connected on each of these inputs.
R
OUT
Receiver Outputs. These are TTL/CMOS levels.
NC No Connect. No connections are required to
this pin.
EN (ADM242 Only) Active Low Digital Input. May
be used to enable or disable (three-state) both
receiver outputs.
SHDN (ADM222 and ADM242) Active Low Digital
Input. May be used to disable the device so that
the power consumption is minimized. On the
ADM222 all drivers and receivers are disabled.
On the ADM242 the drivers are disabled but the
receivers remain enabled.
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
TOP VIEW
(Not to Scale)
ADM222
NC = NO CONNECT
R2
IN
T2
OUT
NC
C1+
V+
C1–
V–
C2–
C2+
T2
IN
SHDN
V
CC
GND
T1
OUT
T1
IN
R1
OUT
R1
IN
R2
OUT
Figure 8. ADM222 DIP and SOIC Pin Configurations
REV. A
ADM222/ADM232A/ADM242
–5–
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
C1+
V+
C1–
C2+
C2–
V–
T2
OUT
R2
IN
V
CC
GND
T1
OUT
R1
IN
R1
OUT
T1
IN
T2
IN
R2
OUT
ADM232A
Figure 9. ADM232A DIP/SOIC Pin Configuration
1
3
5
4
11
10
12
9
2
6
14
7
13
8
*
INTERNAL 400k PULL-UP RESISTOR
ON EACH TTL/CMOS INPUT
**
INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
+5V TO +10V
VOLTAGE DOUBLER
+5V TO –10V
VOLTAGE INVERTER
C1+
C1–
V+
V–
C2+
C2–
T1
ADM232A
T2
R1
R2
C1
0.1F
C2
0.1F
C3
0.1F
GND
TTL/CMOS
OUTPUTS
R1
OUT
R2
OUT
T1
OUT
T2
OUT
R1
IN
R2
IN
T1
IN
T2
IN
TTL/CMOS
INPUTS
*
RS-232
OUTPUTS
RS-232
INPUTS
**
5V INPUT
C5
0.1F
6.3V
15
C4
0.1F
V
CC
16
Figure 10. ADM232A Typical Operating Circuit
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
TOP VIEW
(Not to Scale)
ADM242
R2
IN
T2
OUT
EN
C1+
V+
C1–
V–
C2–
C2+
T2
IN
SHDN
V
CC
GND
T1
OUT
T1
IN
R1
OUT
R1
IN
R2
OUT
Figure 11. ADM242 DIP/SOIC Pin Configuration
2
4
6
5
12
11
13
10
3
7
8
14
9
18
*
INTERNAL 400k PULL-UP RESISTOR
ON EACH TTL/CMOS INPUT
**
INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
+5V TO +10V
VOLTAGE DOUBLER
+5V TO –10V
VOLTAGE INVERTER
C1+
C1–
V+
V–
C2+
C2–
T1
ADM242
T2
R1
R2
C1
0.1F
C2
0.1F
C3
0.1F
GND
TTL/CMOS
OUTPUTS
R1
OUT
R2
OUT
T1
OUT
T2
OUT
R1
IN
R2
IN
T1
IN
T2
IN
TTL/CMOS
INPUTS
*
RS-232
OUTPUTS
RS-232
INPUTS
**
5V INPUT
C5
0.1F
6.3V
16
C4
0.1F
V
CC
EN SHDN
15
17
1
Figure 12. ADM242 Typical Operating Circuit
REV. A
ADM222/ADM232A/ADM242
–6–
–Typical Performance Characteristics
LOAD CURRENT – mA
–15
05
V+, V– – V
10 15 20 25 30
–10
–5
0
5
10
15
V+
V–
TPC 1. Charge Pump V+, V– vs. Current
LOAD CAPACITANCE – pF
–9
0 500
TRANSMITTER OUTPUT VOLTAGE – V
–7
–5
5
1000 1500 2000 2500 3000
115kBps
230kBps
115kBps
460kBps
460kBps
230kBps
–3
–1
7
9
3
1
TPC 2. Transmitter Baud Rate vs. Load Capacitance
T
CH1 10.0V CH2 5.00V M 1.00s CH2 –6.4V
: 6.2V
: 140ns
@: –3.5V
T
TPC 3. Transmitter Unloaded Slew Rate
LOAD CURRENT – mA
–15
02
Tx O/P VOLTAGE – V
4681012
–10
–5
0
5
10
15
14
Tx O/P HI
Tx O/P LO
TPC 4. Transmitter Output Voltage vs. Current
10
90
100
0%
0.010V
100s
A4
5V 5V
TPC 5. Charge Pump V+, V– Exiting Shutdown
T
CH1 10.0V CH2 5.00V M 1.00s CH2 –6.4V
: 6.0V
: 600ns
@: –2.9V
T
TPC 6. Transmitter Fully Loaded Slew Rate
REV. A
ADM222/ADM232A/ADM242
–7–
GENERAL INFORMATION
The ADM222/ADM232A/ADM242 are high-speed RS-232
drivers/receivers requiring a single digital 5 V supply. The RS-232
standard requires transmitters that will deliver ±5 V minimum
on the transmission channel and receivers that can accept signal
levels down to ± 3 V. The parts achieve this by integrating stepup voltage converters and level-shifting transmitters and receivers
onto the same chip. CMOS technology is used to keep the
power dissipation to an absolute minimum. All devices contain an internal charge pump voltage doubler and a voltage
inverter that generates ± 10 V from the 5 V input. Four external 0.1 µF capacitors are required for the internal charge pump
voltage converter.
The ADM222/ADM232A/ADM242 is a modification, enhancement and improvement to the AD230-AD241 family and
derivatives thereof. It is essentially plug-in-compatible and does
not have materially different applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of four main sections. These are:
Charge Pump Voltage Converter
TTL/CMOS to RS-232 Transmitters
RS-232 to TTL/CMOS Receivers
Enable and Shutdown Functions.
Charge Pump DC-DC Voltage Converter
The Charge Pump Voltage converter consists of an oscillator
and a switching matrix. The converter generates a ±10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique. The 5 V input supply is doubled
to 10 V using capacitor C1 as the charge storage element. The
–10 V level is also generated from the input 5 V supply using C1
and C2 as the storage elements.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output impedance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small. Please refer to
the typical performance characteristics which shows the V+, V–
output voltage vs. current.
In the shutdown mode the charge pump is disabled and V+
decays to V
CC
while V– decays to 0 V.
Transmitter (Driver) Section
The Drivers convert TTL/CMOS input levels into RS-232
output levels. With V
CC
= 5 V and driving a typical RS-232
load, the output voltage swing is ±9 V. Even under worst-case
conditions the drivers are guaranteed to meet the ±5 V RS-232
minimum requirement.
The input threshold levels are both TTL- and CMOS-compatible with the switching threshold set at V
CC
/4. With a nominal
V
CC
= 5 V, the switching threshold is 1.25 V typical. Unused
inputs may be left unconnected, as an internal 400 kΩ pull-up
resistor pulls them high forcing the outputs into a low state.
As required by the RS-232 standard, the slew rate is limited to
less than 30 V/µs without the need for an external slew limiting
capacitor, and the output impedance in the power-off state is
greater than 300 Ω.
Receiver Section
The receivers are inverting level-shifters that accept RS-232
input levels (±3 V to ± 15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
± 30 V. The guaranteed switching thresholds are 0.8 V minimum and 2.4 V maximum, which are well within the ±3 V
RS-232 requirement. The low level threshold is deliberately
positive as it ensures that an unconnected input will be interpreted as a low level.
The receivers have Schmitt trigger input with a hysteresis level
of 0.5 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times
Enable and Shutdown Functions
On the ADM222, both receivers are fully disabled during
shutdown.
On the ADM242, both receivers continue to operate normally.
This function is useful for monitoring activity so that when it
occurs, the device can be taken out of the shutdown mode.
The ADM242 also contains a receiver enable function (EN)
which can be used to fully disable the receivers, independent
of SHDN.
APPLICATIONS INFORMATION
A selection of typical operating circuits is shown in TPCs 1–6
and Figure 13.
10
90
100
0%
5V
A1
5
s
2.0V
5V
Figure 13. Transmitter Output Disable Timing
REV. A
–8–
C01213–0–1/01 (rev. A)
PRINTED IN U.S.A.
ADM222/ADM232A/ADM242
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Plastic DIP
(N-16)
16
18
9
PIN 1
0.840 (21.34)
0.745 (18.92)
0.280 (7.11)
0.240 (6.10)
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.022 (0.558)
0.014 (0.356)
0.160 (4.06)
0.115 (2.93)
0.100
(2.54)
BSC
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.325 (8.25)
0.300 (7.62)
16-Lead Wide SOIC
(R-16W)
SEATING
PLANE
0.0118 (0.30)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.1043 (2.65)
0.0926 (2.35)
0.050 (1.27)
BSC
16 9
81
0.4193 (10.65)
0.3937 (10.00)
0.2992 (7.60)
0.2914 (7.40)
PIN 1
0.4133 (10.50)
0.3977 (10.00)
0.0125 (0.32)
0.0091 (0.23)
8
0
0.0291 (0.74)
0.0098 (0.25)
45
0.0500 (1.27)
0.0157 (0.40)
16-Lead Narrow SOIC
(R-16N)
16
9
8
1
0.1574 (4.00)
0.1497 (3.80)
0.3937 (10.00)
0.3859 (9.80)
0.050 (1.27)
BSC
PIN 1
0.2440 (6.20)
0.2284 (5.80)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
8
0
0.0196 (0.50)
0.0099 (0.25)
45
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)
18-Lead Wide SOIC
(R-18W)
SEATING
PLANE
0.0118 (0.30)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.1043 (2.65)
0.0926 (2.35)
0.0500
(1.27)
BSC
18 10
91
0.4193 (10.65)
0.3937 (10.00)
0.2992 (7.60)
0.2914 (7.40)
PIN 1
0.4625 (11.75)
0.4469 (11.35)
0.0125 (0.32)
0.0091 (0.23)
8
0
0.0291 (0.74)
0.0098 (0.25)
45
0.0500 (1.27)
0.0157 (0.40)
18-Lead Plastic DIP
(N-18)
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.022 (0.558)
0.014 (0.356)
0.160 (4.06)
0.115 (2.93)
0.100
(2.54)
BSC
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
18
19
10
PIN 1
0.925 (23.49)
0.845 (21.47)
0.280 (7.11)
0.240 (6.10)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.325 (8.25)
0.300 (7.62)
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