Datasheet ADM207ARS, ADM207AR, ADM207AN, ADM206ARS, ADM206AR Datasheet (Analog Devices)
...
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
ADM205–ADM211/ADM213
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2001
a
0.1 F, 5 V Powered
CMOS RS-232 Drivers/Receivers
FEATURES
0.1 F to 10 F Capacitors
120 kB/s Data Rate
Two Receivers Active in Shutdown (ADM213)
On-Board DC-DC Converters
ⴞ9 V Output Swing with 5 V Supply
Low Power (15 mW)
Low-Power Shutdown ≤5 W
ⴞ30 V Receiver Input Levels
Latch-Up FREE
Plug-In Upgrade for MAX205-211/213
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
TYPICAL OPERATING CIRCUIT
0.1F
6.3V
+
+
0.1F
5V INPUT
+
0.1F
16V
0.1F
16V
+
0.1F
16V
+
T1
T2
T3
T4
R1
R2
R3
R4
R5
GND
ADM211
T1
IN
T2
IN
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
SD
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
+5V TO +10V
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1+
C1–
C2+
C2–
V
CC
V+
V–
GENERAL DESCRIPTION
The ADM2xx family of line drivers/receivers is intended for all
EIA-232-E and V.28 communications interfaces, especially in applications where ±12 V is not available. The ADM205, ADM206,
ADM211, and ADM213 feature a low power shutdown mode
which reduces power dissipation to less than 5 µW, making them
ideally suited for battery powered equipment. The ADM205
does not require any external components and is particularly
useful in applications where printed circuit board space is critical.
The ADM213 has an active-low shutdown and an active-high
receiver enable control. Two receivers of the ADM213 remain
active during shutdown. This feature is useful for ring indicator
monitoring.
All members of the ADM2xx family, except the ADM209,
include two internal charge pump voltage converters which
allow operation from a single 5 V supply. These converters
convert the 5 V input power to the ±10 V required for RS-232
output levels. The ADM209 is designed to operate from 5 V
and 12 V supplies. An internal +12 V to –12 V charge pump
voltage converter generates the –12 V supply.
Table I. Selection Table
No. of No. of Low Power TTL No. of Receivers
Part Power RS-232 RS-232 External Shutdown Three-State Active in
Number Supply Voltage Drivers Receivers Capacitors (SD) EN Shutdown
ADM205 5 V 5 5 None Yes Yes 0
ADM206 5 V 4 3 4 Yes Yes 0
ADM207 5 V 5 3 4 No No 0
ADM208 5 V 4 4 4 No No 0
ADM209 5 V and 9 V to 13.2 V 3 5 2 No Yes 0
ADM211 5 V 4 5 4 Yes Yes 0
ADM213 5 V 4 5 4 Yes (SD) Yes (EN) 2
REV. A
–2–
ADM205–ADM211/ADM213–SPECIFICATIONS
Parameter Min Typ Max Unit Test Conditions/Comments
Output Voltage Swing ± 5 ± 9 Volts All Transmitter Outputs Loaded with 3 kΩ to
Ground
V
CC
Power Supply Current 5 13 mA No Load
0.4 1 mA No Load, ADM209
V+ Power Supply Current 3.5 5 mA No Load, V+ = 12 V ADM209 Only
Shutdown Supply Current 1 10 µA
Input Logic Threshold Low, V
INL
0.8 V TIN, EN, SD, EN, SD
Input Logic Threshold High, V
INH
2.4 V TIN, EN, SD, EN, SD
Logic Pull-Up Current 10 25 µAT
IN
= 0 V
RS-232 Input Voltage Range
1
–30 +30 V
RS-232 Input Threshold Low 0.8 1.2 V
RS-232 Input Threshold High 1.7 2.4 V
RS-232 Input Hysteresis 0.25 V
RS-232 Input Resistance 357kΩ T
A
= 0°C to 85°C
TTL/CMOS Output Voltage Low, V
OL
0.4 V I
OUT
= 1.6 mA
TTL/CMOS Output Voltage High, V
OH
3.5 V I
OUT
= –1.0 mA
TTL/CMOS Output Leakage Current 0.05 ± 10 µA EN = V
CC
, EN = 0 V, 0 V ≤ R
OUT
≤ V
CC
Output Enable Time (TEN) 115 ns ADM205, ADM206, ADM209, ADM211
(Figure 17. C
L
= 150 pF)
Output Disable Time (T
DIS
) 165 ns ADM205, ADM206, ADM209, ADM211
(Figure 17. R
L
= 1 kΩ)
Propagation Delay 0.5 5 µs RS-232 to TTL
Transition Region Slew Rate 8 V/µsR
L
= 3 kΩ, CL = 2500 pF
Measured from +3 V to –3 V or –3 V to +3 V
Output Resistance 300 Ω V
CC
= V+ = V– = 0 V, V
OUT
= ±2 V
RS-232 Output Short Circuit Current ±12 ±60 mA
NOTES
1
Guaranteed by design.
Specifications subject to change without notice.
(VCC = 5 V ⴞ 10% (206, 207, 208, 2O9, 211,
213); VCC = 5 V ⴞ 5% (ADM205); V+ = 9 V
to 13.2 V (ADM209); C1–C4 = 0.1 F Ceramic. All Specifications T
MIN
to T
MAX
unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . (V
CC
– 0.3 V) to +14 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
T
IN
. . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
R
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Output Voltages
T
OUT
. . . . . . . . . . . . . . . . . . (V+, + 0.3 V) to (V–, –0.3 V)
R
OUT
. . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Power Dissipation
N-24 DIP (Derate 13.5 mW/°C above 70°C) . . . 1000 mW
N-24A DIP (Derate 13.5 mW/°C above 70°C) . . . 500 mW
R-24 SOIC (Derate 12 mW/°C above 70°C) . . . . . 850 mW
R-28 SOIC (Derate 12.5 mW/°C above 70°C) . . . 900 mW
RS-28 SSOP (Derate 10 mW/°C above 70°C) . . . . 900 mW
Q-24 Cerdip (Derate 12.5 mW/°C above 70°C) . . . 1000 mW
D-24 Ceramic (Derate 20 mW/°C above 70°C) . . . 1000 mW
Thermal Impedance, θ
JA
N-24 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
N-24A DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
R-24 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
R-28 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
RS-28 SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-14 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
Q-16 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-20 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-24 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
D-24 Ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature, Soldering . . . . . . . . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operation sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADM205–ADM211/ADM213 features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic discharges.
Therefore, proper ESD precautions are recommended to avoid performance degradation or loss
of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
ADM205–ADM211/ADM213
–3–
ORDERING GUIDE
Temperature Package Temperature Package Temperature Package
Model Range Option* Model Range Option* Model Range Option*
ADM205 ADM206 ADM207
ADM205AN –40°C to +85°C N-24A ADM206AN –40°C to +85°C N-24 ADM207AN –40°C to +85°C N-24
ADM206AR –40°C to +85°C R-24 ADM207AR –40°C to +85°C R-24
ADM206ARS –40°C to +85°C RS-24 ADM207ARS –40°C to +85°C RS-24
ADM208 ADM209 ADM211
ADM208AN –40°C to +85°C N-24 ADM209AN –40°C to +85°C N-24 ADM211AR –40°C to +85°C R-28
ADM208AR –40°C to +85°C R-24 ADM209AR –40°C to +85°C R-24 ADM211ARS –40°C to +85°C RS-28
ADM208ARS –40°C to +85°C RS-24 ADM209ARS –40°C to +85°C RS-24
ADM213
ADM213AR –40°C to +85°C R-28
ADM213ARS –40°C to +85°C RS-28
*N = Plastic DIP; R = Small Outline IC (SOIC); RS = Small Shrink Outline Package (SSOP).
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADM205
V
CC
GND
R1
IN
R1
OUT
T1
IN
T4
OUT
T3
OUT
T1
OUT
T2
OUT
T2
IN
R2
OUT
R2
IN
R5
IN
R5
OUT
T3
IN
T4
IN
R4
OUT
R3
IN
R3
OUT
T5
IN
SD
R4
IN
T5
OUT
EN
Figure 1. ADM205 DIP Pin Configuration
+
0.1F
5V INPUT
V
CC
T1
T2
T3
T4
R1
R2
R3
R4
R5
GND
ADM205
T1
IN
T2
IN
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
SD
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
T5
T5
IN
T5
OUT
Figure 2. ADM205 Typical Operating Circuit
ADM205–ADM211/ADM213
–4–
REV. A
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADM206
C1–
V+
C1+
V
CC
GND
T3
OUT
T1
OUT
T2
OUT
R1
IN
T1
IN
T2
IN
R1
OUT
C2+
C2–
V–
R3
IN
R3
OUT
T4
OUT
R2
IN
R2
OUT
SD
T3
IN
T4
IN
EN
Figure 3. ADM206 DIP/SOIC/SSOP Pin Configuration
0.1F
6.3V
+
+
0.1F
5V INPUT
+
0.1F
16V
0.1F
6.3V
+
0.1F
16V
+
T1
T2
T3
T4
R1
R2
R3
GND
ADM206
T1
IN
T2
IN
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
EN
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
SD
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
+5V TO +10V
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
C1+
C1–
C2+
C2–
V
CC
V+
V–
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 4. ADM206 Typical Operating Circuit
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADM207
C1–
V+
C1+
V
CC
GND
T3
OUT
T1
OUT
T2
OUT
R1
IN
T1
IN
T2
IN
R1
OUT
C2+
C2–
V–
R3
IN
R3
OUT
T4
OUT
R2
IN
R2
OUT
T5
IN
T3
IN
T4
IN
T5
OUT
Figure 5. ADM207 DIP/SOIC/SSOP Pin Configuration
0.1F
6.3V
+
+
0.1F
5V INPUT
+
0.1F
16V
0.1F
6.3V
+
0.1F
16V
+
T1
T2
T3
T4
R1
R2
R3
GND
ADM207
T1
IN
T2
IN
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
+5V TO +10V
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1+
C1–
C2+
C2–
V
CC
V+
V–
T5
T5
IN
T5
OUT
Figure 6. ADM207 Typical Operating Circuit
REV. A
ADM205–ADM211/ADM213
–5–
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADM208
C1–
V+
C1+
V
CC
GND
T2
OUT
T1
OUT
R2
IN
R2
OUT
R1
IN
R1
OUT
T1
IN
C2+
C2–
V–
R4
IN
R4
OUT
T3
OUT
R3
IN
R3
OUT
T4
IN
T2
IN
T3
IN
T4
OUT
Figure 7. ADM208 DIP/SOIC/SSOP Pin Configuration
0.1F
6.3V
+
+
0.1F
5V INPUT
+
0.1F
16V
0.1F
6.3V
+
0.1F
16V
+
T1
T2
T3
T4
R1
R2
R3
R4
GND
ADM208
T1
IN
T2
IN
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
R4
IN
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
+5V TO +10V
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1+
C1–
C2+
C2–
V
CC
V+
V–
Figure 8. ADM208 Typical Operating Circuit
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADM209
R4
IN
R4
OUT
R5
OUT
R5
IN
V–
R1
OUT
R1
IN
GND
V
CC
C–
C+
V+
T3
OUT
EN
NC
T3
IN
R3
OUT
T1
IN
T2
IN
R2
OUT
R2
IN
R3
IN
T1
OUT
T2
OUT
Figure 9. ADM209 DIP/SOIC/SSOP Pin Configuration
0.1F
16V
+
C1+
C1–
+
0.1F
5V INPUT
0.1F
16V
T1
T2
T3
R1
R2
R3
R4
R5
GND
ADM209
T1
IN
T2
IN
T3
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
T1
OUT
T2
OUT
T3
OUT
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
NC
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
+12V TO –12V
VO LTAG E
INVERTER
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
V
CC
V+
V–
+
9V TO 13.2V
INPUT
Figure 10. ADM209 Typical Operating Circuit
ADM205–ADM211/ADM213
–6–
REV. A
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ADM211
T3
OUT
T1
OUT
T4
OUT
R3
IN
T2
OUT
R2
IN
R3
OUT
SD
R2
OUT
T2
IN
EN
R4
IN
T1
IN
R1
OUT
R4
OUT
T4
IN
R1
IN
GND
T3
IN
R5
OUT
V
CC
C1+
R5
IN
V–
V+
C1–
C2–
C2+
Figure 11. ADM211 SOIC/SSOP Pin Configuration
0.1F
6.3V
+
+
0.1F
5V INPUT
+
0.1F
16V
0.1F
16V
+
0.1F
16V
+
T1
T2
T3
T4
R1
R2
R3
R4
R5
GND
ADM211
T1
IN
T2
IN
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
SD
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
+5V TO +10V
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1+
C1–
C2+
C2–
V
CC
V+
V–
Figure 12. ADM211 Typical Operating Circuit
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ADM213
T3
OUT
T1
OUT
T4
OUT
R3
IN
T2
OUT
R2
IN
R3
OUT
SD
R2
OUT
T2
IN
EN
R4
IN
*
T1
IN
R1
OUT
R4
OUT
*
T4
IN
R1
IN
GND
T3
IN
R5
OUT
*
V
CC
C1+
R5
IN
*
V–
V+
C1–
C2–
C2+
*ACTIVE IN SHUTDOWN
Figure 13. ADM213 SOIC/SSOP Pin Configuration
0.1F
6.3V
+
+
0.1F
5V INPUT
+
0.1F
16V
0.1F
16V
+
0.1F
16V
+
T1
T2
T3
T4
R1
R2
R3
R4
R5
GND
ADM213
T1
IN
T2
IN
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
3
R5
OUT
3
EN
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
R4
IN
3
R5
IN
3
SD
TTL/CMOS
INPUTS
1
TTL/CMOS
OUTPUTS
RS-232
OUTPUTS
RS-232
INPUTS
2
+5V TO +10V
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
C1+
C1–
C2+
C2–
V
CC
V+
V–
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
3
ACTIVE IN SHUTDOWN
Figure 14. ADM213 Typical Operating Circuit
REV. A
ADM205–ADM211/ADM213
–7–
PIN FUNCTION DESCRIPTIONS
Mnemonic Function
V
CC
Power Supply Input 5 V ± 10% (5 V ± 5% ADM205).
V+ Internally generated positive supply (10 V nominal) on all parts except ADM209.
ADM209 requires external 9 V to 13.2 V supply.
V– Internally generated negative supply (–10 V nominal).
GND Ground Pin. Must be connected to 0 V.
C+ (ADM209 only) External capacitor (+ terminal) is connected to this pin.
C– (ADM209 only) External capacitor (– terminal) is connected to this pin.
C1+ (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (+ terminal) is connected to this pin.
C1– (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (– terminal) is connected to this pin.
C2+ (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (+ terminal) is connected to this pin.
C2– (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (– terminal) is connected to this pin.
T
IN
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is
connected on each input.
T
OUT
Transmitter (Driver) Outputs. These are RS-232 levels (typically ±10 V).
R
IN
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected on each input.
R
OUT
Receiver Outputs. These are TTL/CMOS levels.
EN/EN Enable Input. Active low on ADM205, ADM206, ADM209, ADM211. Active high on ADM213. This input is
used to enable/disable the receiver outputs. With EN = Low (EN = High ADM213), the receiver outputs are
enabled. With EN = High (EN = Low ADM213), the outputs are placed in a high impedance state. This facility is
useful for connecting to microprocessor systems.
SD/SD Shutdown Input. Active high on ADM205, ADM206, ADM211. Active low on ADM213. With SD = high on the
ADM205, ADM206, ADM211, the charge pump is disabled, the receiver outputs are placed in a high impedance
state and the driver outputs are turned off. With SD low on the ADM213, the charge pump is disabled, the driver
outputs are turned off and all receivers except R4 and R5 are placed in a high impedance state. In shutdown, the
power consumption reduces to 5 µW.
NC No Connect. No connections are required to this pin.
Table II. ADM205, ADM206, ADM211 Truth Table
SD EN Status Transmitters T1–T5 Receivers R1–R5
0 0 Normal Operation Enabled Enabled
0 1 Normal Operation Enabled Disabled
1 0 Shutdown Disabled Disabled
Table III. ADM213 Truth Table
SD EN Status Transmitters T1-T4 Receivers R1-R3 Receivers R4, R5
0 0 Shutdown Disabled Disabled Disabled
0 1 Shutdown Disabled Disabled Enabled
1 0 Normal Operation Enabled Disabled Disabled
1 1 Normal Operation Enabled Enabled Enabled
ADM205–ADM211/ADM213
–8–
REV. A
LOAD CURRENT – mA
–15
510
V+/V– – V
V+
15
V–
200
–10
–5
0
5
10
15
TPC 1. Charge Pump V+, V– vs. Load Current
LOAD CAPACITANCE – pF
0
0 500
SLEW RATE – V/s
5
NEGATIVE
SLEW
50
1000
10
15
20
25
30
35
40
45
POSITIVE
SLEW
1500 2000 2500 3000
TPC 2. Transmitter Slew Rate vs. Load Capacitance
VCC – V
–9
4.0 4.5
Tx O/P – V
5.0 5.5 6.0
–7
–5
–3
–1
1
3
5
7
9
Tx O/P HI LOADED
Tx O/P LO LOADED
0
TPC 3. Transmitter Output Voltage vs. V
CC
LOAD CURRENT – mA
–15
02
Tx O/P – V
Tx O/P HI
468
–10
–5
0
5
10
15
Tx O/P LO
10
TPC 4. Transmitter Output Voltage vs. Load Current
VCC – V
0
4.5 4.7
IMPEDANCE – ⍀
200
100
50
V+ IMP
V– IMP
150
250
300
350
4.9 5.1 5.3 5.5
TPC 5. Charge Pump Impedance vs. V
CC
REV. A
ADM205–ADM211/ADM213
–9–
1
CH1
CH3
5.00V
5.00V
B
W
CH2 5.00V M50.0s
CH1
3.1V
V+, V– EXITING SD
T
T
T
SD
V+
V–
2
3
TPC 6. Charge Pump, V+, V– Exiting Shutdown
1
CH1
5.00V CH2 5.00V M1.00s CH1
800mV
T
T
Tx OUTPUT
Tx INPUT
2
TPC 7. Transmitter Output Loaded Slew Rate
1
CH1
5.00V CH2 5.00V M1.00s CH1
800mV
T
T
Tx OUTPUT
Tx INPUT
2
TPC 8. Transmitter Output Unloaded Slew Rate
GENERAL INFORMATION
The ADM205-ADM211 and ADM213 family of RS-232 drivers/receivers are designed to solve interface problems by meeting
the EIA-232-E specifications while using a single digital 5 V
supply. The EIA-232-E standard requires transmitters which
will deliver ± 5 V minimum on the transmission channel and
receivers which can accept signal levels down to ±3 V. The
ADM205-ADM211 and ADM213 meet these requirements by
integrating step up voltage converters and level shifting transmitters and receivers onto the same chip. CMOS technology is
used to keep the power dissipation to an absolute minimum. A
comprehensive range of transmitter/receiver combinations is
available to cover most communications needs. The ADM205–
ADM211 and ADM213 are modifications, enhancements and
improvements to the AD230–AD241 family and derivatives
thereof. They are essentially plug-in compatible and do not have
materially different applications.
The ADM205, ADM206, ADM211, and ADM213 are particularly useful in battery-powered systems as they feature a low
power shutdown mode which reduces power dissipation to less
than 5 µW.
The ADM205 is designed for applications where space saving
is important as the charge pump capacitors are molded into
the package.
The ADM209 includes only a negative charge pump converter
and are intended for applications where a positive 12 V is available.
To facilitate sharing a common line or for connection to a microprocessor data bus, the ADM205, ADM206, ADM209, ADM211,
and ADM213 feature an enable (EN) function. When disabled,
the receiver outputs are placed in a high impedance state.
CIRCUIT DESCRIPTION
The internal circuitry in the ADM205-ADM211 and ADM213
consists of three main sections. These are:
(a) A charge pump voltage converter
(b) RS-232 to TTL/CMOS receivers
(c) TTL/CMOS to RS-232 transmitters
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a ±10 V supply from
the input 5 V level. This is done in two stages using a switched
capacitor technique as illustrated in Figures 15 and 16. First,
the 5 V input supply is doubled to 10 V using capacitor C1 as
the charge storage element. The 10 V level is then inverted to
generate –10 V using C2 as the storage element.
+ +
V
CC
GND
S1
S2
C1
S3
S4
C3
V
CC
V+ = 2V
CC
INTERNAL
OSCILLATOR
Figure 15. Charge-Pump Voltage Doubler
+ +
V+
GND
S1
S2
C2
S3
S4
C4
GND
V– = –(V+)
INTERNAL
OSCILLATOR
FROM
VO LTAG E
DOUBLER
Figure 16. Charge-Pump Voltage Inverter
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output impedance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
ADM205–ADM211/ADM213
–10–
REV. A
Transmitter (Driver) Section
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With V
CC
= 5 V and driving a typical EIA-232-E
load, the output voltage swing is ±9 V. Even under worst-case
conditions the drivers are guaranteed to meet the ±5 V EIA-232-E
minimum requirement.
The input threshold levels are both TTL- and CMOS-compatible
with the switching threshold set at V
CC
/4. With a nominal VCC =
5 V the switching threshold is 1.25 V typical. Unused inputs may
be left unconnected, as an internal 400 kΩ pull-up resistor pulls
them high, forcing the outputs into a low state.
As required by the EIA-232-E standard, the slew rate is limited
to less than 30 V/µs without the need for an external slew limit-
ing capacitor and the output impedance in the power-off state is
greater than 300 Ω.
Receiver Section
The receivers are inverting level shifters which accept EIA-232-E
input levels (± 5 V to ± 15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
± 30 V. The guaranteed switching thresholds are 0.8 V minimum
and 2.4 V maximum which are well within the ±3 V EIA-232-E
requirement. The low level threshold is deliberately positive as it
ensures that an unconnected input will be interpreted as a low level.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.5 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
Shutdown (SD)
The ADM205, ADM206, ADM211, and ADM213 feature a
control input which may be used to disable the part and reduce
the power consumption to less than 5 µW. This is very useful
in battery operated systems. During shutdown the charge pump
is turned off, the transmitters are disabled and all receivers except
R4 and R5 on the ADM213 are put into a high-impedance disabled state. Receivers R4 and R5 on the ADM213 remain enabled
during shutdown. This feature allows monitoring external activity such as ring indicator monitoring while the device is in a low
power shutdown mode. The shutdown control input is active high
on all parts except the ADM213 where it is active low. Refer to
Tables II and III.
Enable Input
The ADM205, ADM209, ADM211, and ADM213 feature an
enable input used to enable or disable the receiver outputs. The
enable input is active low on the ADM205, ADM209, ADM211
and active-high on the ADM213. Refer to Tables II and III. When
disabled, all receiver outputs are placed in a high impedance state.
This function allows the outputs to be connected directly to a
microprocessor data bus. It can also be used to allow receivers
from different devices to share a common data line. The timing
diagram for the enable function is shown in Figure 17.
3V
0V
R
OUT
EN*
T
EN
T
DIS
VOH – 0.1V
V
OL
+ 0.1V
3.5V
0.8V
*POLARITY OF EN IS REVERSED FOR ADM213.
Figure 17. Enable Timing
APPLICATION HINTS
Driving Long Cables
In accordance with the EIA-232-E standard, long cables are
permissible provided that the total load capacitance does not
exceed 2500 pF. For longer cables which do exceed this, then it
is possible to trade off baud rate vs. cable length. Large load
capacitances cause a reduction in slew rate, and hence the maximum
transmission baud rate is decreased. The ADM205–ADM211
and ADM213 are designed so that the slew rate reduction with
increasing load capacitance is minimized.
For the receivers, it is important that a high level of noise immunity be inbuilt so that slow rise and fall times do not cause multiple
output transitions as the signal passes slowly through the transition region. The ADM205–ADM211 and ADM213 have 0.5 V
of hysteresis to guard against this. This ensures that, even in
noisy environments, error-free reception can be achieved.
High Baud Rate Operation
The ADM205–ADM211 and ADM213 feature high slew rates
permitting data transmission at rates well in excess of the EIA232-E specification. The drivers maintain ±5 V signal levels at
data rates up to 120 kB/s under worst-case loading conditions.
REV. A
ADM205–ADM211/ADM213
–11–
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
24-Lead Plastic DIP
(N-24)
PIN 1
24
1
13
12
0.260 ± 0.001
(6.61 ± 0.03)
0.32 (8.128)
0.30 (7.62)
0.011 (0.28)
0.009 (0.23)
15
ⴗ
0
0.02 (0.5)
0.016 (0.41)
0.130 (3.30)
0.128 (3.25)
0.07 (1.78)
0.05 (1.27)
SEATING
PLANE
1.228 (31.19)
1.226 (31.14)
0.11 (2.79)
0.09 (2.28)
NOTES
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
2. PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN PLATED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead Plastic DIP
(N-24A)
PIN 1
0.55 (13.97)
0.53 (13.47)
24
1
13
12
0.606 (15.4)
0.594 (15.09)
0.012 (0.305)
0.008 (0.203)
15ⴗ
0ⴗ
0.16 (4.07)
0.14 (3.56)
0.2
(5.08)
MAX
0.065 (1.66)
0.045 (1.15)
0.105 (2.67)
0.095 (2.42)
1.25 (31.75)
1.24 (31.5)
0.02 (0.508)
0.015 (0.381)
0.175 (4.45)
0.12 (3.05)
SEATING
PLANE
24-Lead SSOP
(RS-24)
0.328 (8.33)
0.318 (8.08)
0.0256 (0.65)
BSC
0.07 (1.78)
0.066 (1.67)
0.008 (0.203)
0.002 (0.050)
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
0.009 (0.229)
0.005 (0.127)
0.037 (0.94)
0.022 (0.559)
8ⴗ
0ⴗ
PIN 1
0.311 (7.9)
0.301 (7.64)
0.212 (5.38)
0.205 (5.207)
1
24
13
12
24-Lead Cerdip
(Q-24)
0.320 (8.128)
0.290 (7.366)
15
ⴗ
0
ⴗ
0.012 (0.305)
0.008 (0.203)
TYP
PIN 1
1
24
12
13
0.295 (7.493) MAX
0.225
(5.715)
MAX
0.125
(3.175)
MIN
0.070 (1.778)
0.020 (0.508)
0.180
(4.572)
MAX
SEATING
PLANE
1.290 (32.77) MAX
0.021 (0.533)
0.015 (0.381)
TYP
0.065 (1.651)
0.055 (1.397)
TYP
0.110 (2.794)
0.090 (2.286)
TYP
NOTES
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH.
2. CERDIP LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead SOIC
(R-24)
0.03 (0.76)
0.02 (0.51)
0.013 (0.32)
0.009 (0.23)
0.042 (1.067)
0.018 (0.447)
6ⴗ
0ⴗ
PIN 1
13
121
24
0.299 (7.6)
0.291 (7.39)
0.414 (10.52)
0.398 (10.10)
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
0.019 (0.49)
0.014 (0.35)
0.05 (1.27)
BSC
0.096 (2.44)
0.089 (2.26)
0.608 (15.45)
0.596 (15.13)
0.01 (0.254)
0.006 (0.15)
REV. A
–12–
C00067–0–4/01(A)
PRINTED IN U.S.A.
ADM205–ADM211/ADM213
28-Lead SOIC
(R-28)
0.03 (0.76)
0.02 (0.51)
0.013 (0.32)
0.009 (0.23)
0.042 (1.067)
0.018 (0.457)
6
ⴗ
0
ⴗ
0.019 (0.49)
0.014 (0.35)
0.05 (1.27)
BSC
0.708 (18.02)
0.696 (17.67)
0.01 (0.254)
0.006 (0.15)
0.096 (2.44)
0.089 (2.26)
PIN 1
0.299 (7.6)
0.291 (7.39)
0.414 (10.52)
0.398 (10.10)
14
1
1528
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
28-Lead SSOP
(RS-28)
0.407 (10.34)
0.397 (10.08)
0.0256 (0.65)
BSC
0.008 (0.203)
0.002 (0.050)
0.07 (1.78)
0.066 (1.67)
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
0.009 (0.229)
0.005 (0.127)
0.037 (0.94)
0.022 (0.559)
8
ⴗ
0
ⴗ
PIN 1
15
14
1
28
0.311 (7.9)
0.301 (7.64)
0.212 (5.38)
0.205 (5.207)
ADM205–ADM211/ADM213–Revision History
Location Page
Data Sheet changed from REV. 0 to REV. A.
Updated Figures.
Changes to numbers in Min/Typ/Max column of Specification page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
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