Datasheet ADM1486JN, ADM1486ARM, ADM1486AR, ADM1486AQ, ADM1486AN Datasheet (Analog Devices)

+5 V Low Power

PRELIMINARY TECHNICAL DATA

a

RS-485 PROFIBUS Transceiver

Preliminary Technical Data ADM1486

FEATURES
Meets & Exceeds EIA RS-485 & EIA RS-422 Standard
50 Mb/s Data Rate
Recommended for PROFIBUS Applications

2.1V Minimum Differential Output with 54
Termination
Low Power 0.5mA I
Thermal Shutdown & Short Circuit Protection
Zero Skew Driver & Receiver
Driver Propagation Delay: 8 ns
Receiver Propagation Delay: 12 ns
High Z Outputs with Drivers Disabled or Power Off
Superior Upgrade for SN65ALS1176
15kV HBM ESD Protection on I/O Pins A & B
Available in Standard 8-pin SOIC & Miniature 8-pin
Micro SOIC packages

APPLICATIONS
Industrial Field Equipment

CC

⍀⍀

⍀

⍀⍀

FUNCTIONAL BLOCK DIAGRAM

RO

RE

DE

DI

R

D

V

CC

B
A

GND

ADM1486

GENERAL DESCRIPTION

The ADM1486 is a differential line transceiver suitable
for high speed bidirectional data communication on
multipoint bus transmission lines. It is designed for
balanced data transmission, complies with EIA Standards
RS-485 and RS-422 and is recommended for PROFIBUS
applications. The part contains a differential line driver
and a differential line receiver. Both the driver and the
receiver may be enabled independently. When disabled or
with power off, the driver outputs are tristated.

The ADM1486 operates from a single +5 V power supply.
Excessive power dissipation caused by bus contention or
by output shorting is prevented by a thermal shutdown
circuit. This feature forces the driver output into a high
impedance state if during fault conditions a significant
temperature increase is detected in the internal driver
circuitry.

Up to 50 transceivers may be connected simultaneously on
a bus, but only one driver should be enabled at any time.
It is important therefore that the remaining disabled
drivers do not load the bus. To ensure this, the ADM1486
driver features high output impedance when disabled and
also when powered down.

This minimizes the loading effect when the transceiver is
not being utilized. The high impedance driver output is
maintained over the entire common-mode voltage range
from –7 V to +12 V.

The receiver contains a fail safe feature which results in a
logic high output state if the inputs are unconnected
(floating).

The ADM1486 is fabricated on BiCMOS, an advanced
mixed technology process combining low power CMOS
with fast switching bipolar technology. All inputs and
outputs contain protection against ESD; all driver outputs
feature high source and sink current capability. An epi­taxial layer is used to guard against latch-up.

The ADM1486 features extremely fast switching speeds.
Minimal driver propagation delays permit transmission at
data rates up to 50 Mbits/s while low skew minimizes
EMI interference.

The part is fully specified over the commercial and indus­trial temperature range and is available in an 8-lead
DIL/SOIC/µSOIC package.

REV Pr. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 2000

ADM1486–SPECIFICATIONS

PRELIMINARY TECHNICAL DATA

(VCC = +5 V ± 5%. All specifications T

MIN

to T

unless otherwise noted.)

MAX

Parameter Min Typ Max Unit Test Conditions/Comments

DRIVER

Differential Output Voltage, V

OD

2.0 5.0 V V

5.0 V R = Infinity, Figure 1
= 5 V, R = 50 ⍀ (RS-422), Figure 1

CC

2.1 5.0 V R = 27 ⍀ (RS-485), Figure 1

V

OD3

| for Complementary Output States 0.2 V R = 27 ⍀ or 50 ⍀, Figure 1

⌬|V

OD

Common-Mode Output Voltage V
⌬|V

| for Complementary Output States 0.2 V R = 27 ⍀ or 50 ⍀

OD

Output Short Circuit Current(V
Output Short Circuit Current(V

OC

=High) 60 150 mA –7 V ⭐ VO ⭐ +12 V

OUT

=Low) 60 150 mA –7 V ⭐ VO ⭐ +12 V

OUT

CMOS Input Logic Threshold Low, V
CMOS Input Logic Threshold High, V

2.1 5.0 V V

3 V R = 27 ⍀ or 50 ⍀, Figure 1

INL

2.0 V

INH

0.8 V

= –7 V to +12 V, Figure 2

TST

Logic Input Current (DE, DI) ±1.0 µA

RECEIVER

Differential Input Threshold Voltage, VTH–0.2 +0.2 V –7 V ⭐ VCM ⭐ +12 V
Input Voltage Hysteresis, ⌬V

TH

Input Resistance 20 k⍀ –7 V ⭐ V
Input Current (A, B) + 1 mA V

70 mV VCM = 0 V

= 12 V

–0.8 mA V

IN

= –7 V

IN

⭐ +12 V

CM

Logic Enable Input Current (RE)±1µA
CMOS Output Voltage Low, V
CMOS Output Voltage High, V

OL

OH

4.0 V I

0.4 V I

Short Circuit Output Current 7 85 mA V
Tristate Output Leakage Current ±1.0 µA 0.4 V ⭐ V

= +4.0 mA

OUT

= –4.0 mA

OUT

= GND or V

OUT

⭐ +2.4 V

OUT

CC

POWER SUPPLY CURRENT

ICC (Outputs Enabled) 1.2 2.0 mA
ICC (Outputs Disabled) 0.9 1.5 mA

Specifications subject to change without notice.

Outputs Unloaded, Digital Inputs = GND or V
Outputs Unloaded, Digital Inputs = GND or V

CC
CC

TIMING SPECIFICATIONS

(VCC = +5 V ± 5%. All specifications T

MIN

to T

unless otherwise noted.)

MAX

Parameter Min Typ Max Unit Test Conditions/Comments

DRIVER

Propagation Delay Input to Output T
Driver O/P to O/P T
Driver Rise/Fall Time T

SKEW

R

, T

F

PLH

, T

PHL

48 15 ns

02nsR
510nsR

RL Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3

Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3

L

Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3

L

Driver Enable to Output Valid 8 15 ns
Driver Disable Timing 8 15 ns

RECEIVER

Propagation Delay Input to Output T
Skew |T

PLH–TPHL

Receiver Enable T
Receiver Disable T

Specifications subject to change without notice.

|02ns

EN1

EN2

PLH

, T

PHL

81220nsC

= 15 pF, Figure 5

L

5 10 ns Figure 6
5 10 ns Figure 6

–2–

REV. B

ADM1486

WARNING!

ESD SENSITIVE DEVICE

PRELIMINARY TECHNICAL DATA

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)

VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V

Inputs

Driver Input (DI) . . . . . . . . . . . .–0.3 V to V

Control Inputs (DE, RE) . . . . . .–0.3 V to V

+ 0.3 V

CC

+ 0.3 V

CC

Receiver Inputs (A, B) . . . . . . . . . . . . . . –9 V to +14 V

Outputs

Pin Mnemonic Function

1 R O Receiver Output. When enabled if A >B

2 RE Receiver Output Enable. A low level

Driver Outputs . . . . . . . . . . . . . . . . . . . . –9 V to +14 V

Receiver Output . . . . . . . . . . . . .–0.5 V to V

Power Dissipation 8-Lead DIP . . . . . . . . . . . . . . 500 mW

, Thermal Impedance . . . . . . . . . . . . . . . . +130°C/W

θ

JA

+ 0.5 V

CC

3 D E Driver Output Enable. A high level

Power Dissipation 8-Lead SOIC . . . . . . . . . . . . 450 mW

, Thermal Impedance . . . . . . . . . . . . . . . . +170°C/W

θ

JA

Power Dissipation 8-Lead Cerdip . . . . . . . . . . . . 500 mW

θ

, Thermal Impedance . . . . . . . . . . . . . . . . +125°C/W

JA

4 D I Driver Input. When the driver is en-

Power Dissipation 8-Lead µSOIC . . . . . . . . . . . . . . mW

, Thermal Impedance . . . . . . . . . . . . . . . . . . . .+°C/W

θ

JA

Operating Temperature Range

Commercial (J Version) . . . . . . . . . . . . . . 0°C to +70°C

5 G ND Ground Connection, 0 V.

6 A Noninverting Receiver Input A/Driver

Industrial (A Version) . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . .–65°C to +150°C

7 B Inverting Receiver Input B/Driver

Lead Temperature (Soldering, 10 sec) . . . . . . . . +300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

*Stresses above those listed under Absolute Maximum Ratings may cause permanent

damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum ratings for extended
periods of time may affect device reliability.

8V

CC

Table I. Transmitting

INPUTS OUTPUTS

RERE

RE DE DI B A

RERE

X1101
X1010
X0 XZZ

PIN FUNCTION DESCRIPTION

by 200 mV, then RO = High. If A < B
by 200 mV, then RO = Low.

enables the receiver output, RO. A high
level places it in a high impedance state.

enables the driver differential outputs, A
and B. A low level places it in a high
impedance state.

abled a logic Low on DI forces A low
and B high while a logic High on DI
forces A high and B low.

Output A.

Output B.

Power Supply, 5 V ± 5%.

PIN CONFIGURATION

RO

1

V

8

CC

ADM 14 86

2

RE

TO P VIEW

3

DE

DI

(Not to scale)

45

B

7

A

6

GND

Table II. Receiving

ORDERING GUIDE

INPUTS OUTPUT

RERE

RE DE A-B RO

RERE

00 ⭓+0.2 V 1
00 ⭐ –0.2 V 0
0 0 Inputs Open 1
10 X Z

Model Range Option

ADM1486JN 0°C to +70°C N-8

ADM1486JR 0°C to +70°C SO-8

ADM1486AN –40°C to +85°C N-8

Temperature Package

ADM1486AR –40°C to +85°C SO-8

ADM1486ARM -40°C to +85°C RM-8

ADM1486AQ –40°C to +85°C Q-8

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V
readily accumulate on the human body and test equipment and can discharge without
detection. Although the ADM1486 features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

REV. PrB

–3–

ADM1486

PRELIMINARY TECHNICAL DATA

Test Circuits

R

V

OD

R

V

OC

Figure 1. Driver Voltage Measurement Test Circuit

375⍀

V

OD3

60⍀

375⍀

Figure 2. Driver Voltage Measurement Test Circuit 2

A

R

LDIFF

B

Figure 3. Driver Propagation Delay Test Circuit

V

TST

C

L1

C

L2

V

CC

R

L

S2

0V OR 3V

DE IN

DE

A

S1

C

V

L

B

OUT

Figure 4. Driver Enable/Disable Test Circuit

A

V

RE

B

OUT

C

L

Figure 5. Receiver Propagation Delay Test Circuit

+1.5V

–1.5V

RE IN

S1

RE

R

C

V

L

OUT

V

CC

L

S2

Figure 6. Receiver Enable/Disable Test Circuit

Switching Characteristics

3V

1.5V

VO

–VO

0V

B

VO

A

0V

10% POINT

1/2VO

90% POINT

T

PLH

T

SKEW

T

R

Figure 7. Driver Propagation Delay, Rise/Fall Timing

DE

A, B

A, B

1.5V

T

ZL

T

ZH

2.3V

2.3V

Figure 8. Driver Enable/Disable Timing

1.5V

T

PHL

90% POINT

T

F

3V

1.5V

T

LZ

T

HZ

0V

V

+0.5V

OL

–0.5V

V

OH

T

SKEW

10% POINT

V

OL

V

OH

0V

A, B

RO

0V

T

PLH

1.5V

Figure 9. Receiver Propagation Delay

T

T

1.5V

LZ

HZ

RE

1.5V

T

ZL

R

R

0V

1.5V
O/P LOW

T

ZH

1.5V

O/P HIGH

Figure 10. Receiver Enable/Disable Timing

0V

T

PHL

1.5V

VOL +0.5V

–0.5V

V

OH

V

OH

V

OL

3V

0V

V

OL

V

OH

–4–

REV. PrB

ADM1486

PRELIMINARY TECHNICAL DATA

RT

D

R

RR

DD

RT

D

R

Figure 11. Typical RS-485 Network

Table III. Comparison of RS-422 and RS-485 Interface Standards

Specification RS-422 RS-485 PROFIBUS

Transmission Type Differential Differential Differential
Maximum Cable Length 4000 ft. 4000 ft. ­Minimum Driver Output Voltage ±2 V ±1.5 V ±2.1 V
Driver Load Impedance 100

⍀

54

⍀

54

⍀

Receiver Input Resistance 4 k⍀ min 12 k⍀ min 200 k⍀ min
Receiver Input Sensitivity ±200 mV ±200 mV ±200 mV
Receiver Input Voltage Range –7 V to +7 V –7 V to +12 V –7 V to +12 V
No of Drivers/Receivers Per Line 1/10 32/32 50/50

REV. PrB

– 5 –

ADM1486

PRELIMINARY TECHNICAL DATA

APPLICATIONS INFORMATION

Differential Data Transmission

Differential data transmission is used to reliably transmit
data at high rates over long distances and through noisy
environments. Differential transmission nullifies the effects
of ground shifts and noise signals which appear as
common-mode voltages on the line. There are two main
standards approved by the Electronics Industries Association
(EIA) which specify the electrical characteristics of trans­ceivers used in differential data transmission.

The RS-422 standard specifies data rates up to 10 MBaud
and line lengths up to 4000 ft. A single driver can drive a
transmission line with up to 10 receivers.

In order to cater for true multipoint communications, the
RS-485 standard was defined. This standard meets or
exceeds all the requirements of RS-422 but also allows for
up to 32 drivers and 32 receivers to be connected to a
single bus. An extended common-mode range of –7 V to
+12 V is defined. The most significant difference between
RS-422 and RS-485 is the fact that the drivers may be
disabled thereby allowing more than one (32 in fact) to be
connected to a single line. Only one driver should be
enabled at time, but the RS-485 standard contains addi­tional specifications to guarantee device safety in the event
of line contention.

Cable and Data Rate

The transmission line of choice for RS-485
communications is a twisted pair. Twisted pair cable tends
to cancel common-mode noise and also causes cancella­tion of the magnetic fields generated by the current

flowing through each wire, thereby, reducing the effective
inductance of the pair.

The ADM1486 is designed for bidirectional data commu­nications on multipoint transmission lines. A typical
application showing a multipoint transmission network is
illustrated in Figure 11. An RS-485 transmission line can
have as many as 32 transceivers on the bus. Only one
driver can transmit at a particular time but multiple
receivers may be enabled simultaneously.

As with any transmission line, it is important that
reflections are minimized. This may be achieved by
terminating the extreme ends of the line using resistors
equal to the characteristic impedance of the line. Stub
lengths of the main line should also be kept as short as
possible. A properly terminated transmission line appears
purely resistive to the driver.

Thermal Shutdown

The ADM1486 contains thermal shutdown circuitry
which protects the part from excessive power dissipation
during fault conditions. Shorting the driver outputs to a
low impedance source can result in high driver currents.
The thermal sensing circuitry detects the increase in die
temperature and disables the driver outputs. The thermal
sensing circuitry is designed to disable the driver outputs
when a die temperature of 150°C is reached. As the device
cools, the drivers are re-enabled at 140°C.

Propagation Delay

The ADM1486 features very low propagation delay
ensuring maximum baud rate operation. The driver is
well balanced ensuring distortion free transmission.

Another important specification is a measure of the skew
between the complementary outputs. Excessive skew
impairs the noise immunity of the system and increases
the amount of electromagnetic interference (EMI).

Receiver Open-Circuit Fail Safe

The receiver input includes a fail-safe feature which
guarantees a logic high on the receiver when the inputs
are open circuit or floating.

– 6 –

REV. PrB

OUTLINE DIMENSIONS

PRELIMINARY TECHNICAL DATA

Dimensions shown in inches and (mm).

8-Lead SOIC (SO-8)

0.1 968 (5.00)

0.1 890 (4.80)

0.1574 (4.00)

0.1497 (3.80)

85

0.2440 (6.20)

0.2284 (5.80)

41

ADM1486

PIN 1

0.0098 (0.25)

0.0040 (0.10)
SEATING

PIN 1

0.210

(5.33)

MAX

0.160 (4.06)

0.115 (2.93)

0.200 (5.08)
MAX

0.200 (5.08)

0.125 (3.18)

0.0500 (1.27)

PLANE

BSC

0.0192 (0.49)

0.0138 (0.35)

0.0688 (1.75)

0.0532 (1.35)

8-Lead Plastic DIP (N-8)

0.430 (10.92)

0.348 (8.84)

8

0.100 (2.54)

0.022 (0.558)

0.014 (0.356)

5

0.280 (7.11)

14

BSC

0.240 (6.10)

0.060 (1.52)

0.015 (0.38)

0.070 (1.77)

0.045 (1.15)

SEATING
PLANE

8-Lead Cerdip (Q-8)

0.005 (0.13)
MIN

0.023 (0.58)

0.014 (0.36)

0.055 (1.4)

8

1

PIN 1

0.405 (10.29)
MAX

0.100
(2.54)

BSC

MAX

5

0.310 (7.87)

0.220 (5.59)

4

0.060 (1.52)

0.015 (0.38)

0.070 (1.78)

0.030 (0.76)

0.0098 (0.25)

0.0075 (0.19)

0.130
(3.30)
MIN

0.150
(3.81)
MIN

SEATING
PLANE

8ⴗ
0ⴗ

0.325 (8.25)

0.300 (7.62)

0.015 (0.381)

0.008 (0.204)

0.320 (8.13)

0.290 (7.37)

15°

0°

0.0196 (0.50)

0.0099 (0.25)

0.0500 (1.27)

0.0160 (0.41)

0.195 ( 4.95)

0.115 (2.93)

0.015 (0.38)

0.008 (0.20)

ⴛ 45ⴗ

REV. PrB

– 7 –

ADM1486

PRELIMINARY TECHNICAL DATA

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

8-Lead µSOIC (RM-8)

0.122 (3.10)

0.114 (2.90)

0.122 (3.10)

0.114 (2.90)

0.006 (0.15)

0.002 (0.05)

85

1

PIN 1

0.0256 (0.65)BSC

0.016 (0.40)

0.010 (0.25)

0.193
(4.90)

BSC

4

SEATING
PLANE

0.043
(1.10)
MAX

0.009 (0.23)

0.005 (0.13)

6ⴗⴗⴗⴗ
0ⴗⴗⴗⴗ

0.037 (0.95)

0.030 (0.75)

0.028 ( 0.70)

0.016 ( 0.40)

– 8 –

REV. PrB