Datasheet ADM1203 Datasheet (Analog Devices)

© 2005

Preliminary Technical Data

FEATURES

Enables Power Supply Tracking of multiple Supplies
Monitors Current on Supply being Tracked
Up/Down Tracking limits Supply Differences to ~100mV
Capacitor Adjustable Slew Rate
On Board Charge Pump Fully enhances FET
Ability to Track Down Supplies (ADM1203-1/3)
Emergency Shutdown Feature (ADM1203-2/4)
Auto retry after Current Fault (ADM1203-1/2)
Latch off after Current Fault (ADM1203-3/4)
Packaged in tiny 8-Lead TSOT Package

APPLICATIONS

Multi-Voltage Supply Rail Tracker
Telecoms and Datacom s Systems
Multi voltage Network Processors , FPGAs, ASICs, DSPs
PC/Server Applications

GENERAL DESCRIPTION

The ADM1203 is a cascadable Simple Tracker
ensures that voltage rails track within ~100mV of each other in
multi supply systems. Any number of these devices can be
cascaded to form a multi supply tracking solution.

The ADM1203 requires 2.7V to 16.5V on its Vcc pin to operate.
An on-board charge pump generates a high voltage GATE drive
to fully enhance FETs in the power path.

The Slew Rate of the ramp is adjustable via an external capacitor
on the C

pin and can be programmed from 100V/s to

SLEW

1000V/s. When multiple devices are cascaded the C
each subsequent device should be tied to the output rail of the
previous device to ensure that supply will track up and down
with the previous supply.

TM

device which

pin of

SLEW

Simple Tracker

TM

with

Circuit Breaker

ADM1203

every cycle determined by the capacitor on the TIMER pin and
the ADM1203-3/4 will latch off the gate until the
up/down(stop) pin is toggled.

The ADM1203 is packaged in a tiny 8-pin TSOT package.

Functional Block Diagram

R

V

IN

UP/DOWN

(ADM1203-1/3)

UP/STOP

(ADM1203-2/4)

C

SLEW

C

TIMER

C

SLEW

C

TIMER

s

V

CC

VCC

SLEWRATE

CONTROL

TIMER

CONTROL

LOGIC

GND

RS-

DRIVER

ADM1203

Applications Diagram

R

C

TIMER

V

cc

UP/DOWN

ADM1203-1

SLEW
TIMER

R

SENSE

SENSE

GND

RS-

GATE

V

OUTFB

5VIN

POWER ON/OFF

3.3VIN

C

SLEW

Q

1

GATE

FET

20nF

V

OUT

V

OUT

Q

1

5VOUT

1nF

Q

1

3.3VOUT

The ADM1203 is offered in four variants. The ADM1203-1/3
features an UP/DOWNb pin and the ADM1203-2/4 features an
Up/STOPb pin. The ADM1203-1/2 features an auto retry on
current RS fault and the ADM1203-3/4 latches off. For all
devices, a high level on the input will initiate tracking power up
sequence. A low on the UP/DOWNb pin of the ADM1203-1/3
will initiate a tracking down of the supply rails, while a low on
the UP/STOPb pin of the ADM1203-2/4 will initiate an
emergency fast shutdown of all supply rails simultaneously.

The ADM1203 features a current sense comparator, which
monitors for an over current condition on the supply. In the
event of an over current condition, a fault is flagged and the gate
is switched off. The ADM1203-1/2 will auto retry this fault at

Rev. PrD

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Anal og Devices. Trademarks and
registered trademarks are the property of their respective companies.

RS-

V

cc

POWER ON/OFF

2.7VIN

POWER ON/OFF

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

C

C

UP/DOWN

SLEW
TIMER

TIMER

UP/DOWN

SLEW
TIMER

TIMER

ADM1203-1

GND

R

SENSE

RS-

V

cc

ADM1203-1

GND

V

V

GATE

OUTFB

GATE

OUTFB

1nF

Q

1

2.7VOUT

1nF

www.analog.com

Preliminary Technical Data

ADM1203—SPECIFICATIONS

Table 1. V

Parameter Min Typ Max Units Conditions

VCC Pin

Operating Voltage Range Vcc 2.7 16.5 V
Undervoltage Lockout, V
UVLO Hysteresis 25 mV
Switched Voltage Range 0.65 16.5
Quiesent Current 0.65 1.0

Up/Downb Pin
Input Threshold 0.58 0.6 0.62
Input Threshold Hysteresis 60 mV
Input Current
RS- Pin
Hot Swap Voltage 2.7 16.5
RS- Pin Input Current, I

Circuit Breaker Limit Voltage, VCB 34 47 60
44 47 53
Over Current Limit Voltage, VOC 40 53 66
50 53 59

C

Pin

SLEW

Slew up Current
Slew down Current
Tracking Gain 1 V/V V
Minimum Tracking Voltage 0.1 V
Maximum Tracking voltage Vcc – 0.3 V
Slew Rate

V

Pin

OUTFB

Input Current
Voltage Range 0 Vcc V

GATE Pin

Gate Pullup Current 12
Gate Pulldown Current 12
Gate Pulldown Current 2
GATE Voltage, V
6 8 12 V V
5 6.5 10 V V
TIMER Pin
TIMER Pin Pull-Up Current, I

-48 -60 -72
TIMER Pin Pull-Down Current, I
100
TIMER Pin Threshold High, V
TIMER Pin Threshold Low, V

NOTES:

= Full Operating Range, TA = -40°C to +85°C, unless otherwise noted.

CC

2.4 2.525 2.65 V Vcc Rising

UVLO

INRS

5 6.5 10 V V

GATE

-4 -5 -6

TIMERUP

TIMERDN

1.235 1.3 1.365

TIMERH

0.18 0.2 0.22

TIMERL

-100 100 nA

TBD -200 TBD

10 20 30

-10
10

100 1000 V/s

-10 10

2 2.5

V

mA

V

V
µA
µA

mV
mV
mV
mV

µA
µA

µA

µA
µA

mA

µA
µA
µA
µA

V

V

Rising

VRS = VCC, V
VRS = VCC, V
VCB = (V

CC

VCB = (V

CC

V

= 0.6 V

HOTSWAP

V

> 2.2 V

HOTSWAP

HOTSWAP

HOTSWAP

– VRS) ,V
– VRS) ,V

= 0.6 V,
> 2.2 V

HOTSWAP

HOTSWAP

= 0.6 V
> 2.2 V

SLEW/VOUTFB

Vslew – Vout > 100mV
Vout – Vslew > 100mV
ADM1203-2 only –vgate = 3.0V

– VCC; VCC = 2.7V

GATE

– VCC; VCC = 5.0V

GATE

– VCC; VCC = 16.5V

GATE

Initial Cycle, V
During Current Fault, V
After Current Fault, V
Normal Operation, V

TIMER

= 1V

TIMER

TIMER

TIMER

= 1V

= 1V

= 1V

TIMER rising
TIMER falling

Rev. PrD | Page 2 of 8

Preliminary Technical Data ADM1203

Absolute Maximum Ratings

Table 2. ADM1203 Absolute Maximum Ratings

Parameter
VCC Pin 20V
TIMER Pin 20V
UP/DOWNb, UP/STOPb 20V
RS- Pin 20V
C

Pin 20V

SLEW

Gate Pin Vcc + 11V
V

Pin 20V

OUTFB

Power Dissipation TBD
Storage Temperature –65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature Range

(Soldering 10 sec)
Junction Temperature 150°C

Rating

300°C

Rev. PrD | Page 3 of 8

ADM1203 Preliminary Technical Data

ENABLING A SINGLE SUPPLY

The ADM1203 requires a supply voltage of 2.7V to 16.5V on its
Vcc pin for operation. The device may be powered from the
input supply rail that is being switched or from an auxiliary
supply.

An internal charge pump ensures that the ADM1203 is capable
of fully enhancing an external FET via the GATE pin, turning
on the output. An external capacitor may be required on the
GATE node for stability.

Power up can be externally initiated by driving the
UP/DOWNb (ADM1203-1) or UP/STOPb (ADM1203–2)
logic pin high. A low on this pin will initiate a power down.

The V

pin monitors the output voltage.

OUTFB

A single ADM1203 device may be used where a single supply
rail is required to switch on at a controlled slew rate (see Figure

1). The value of the slew rate capacitor, C

, will dictate the

SLEW

slew rate of the GATE voltage at startup. An internal current

10µA source charges C

and the GATE voltage is ramped at

SLEW

the same rate.

3.3VIN

s

RS-

V

cc

Q

1

3.3VOUT

R

ADM1203-2

GND

GATE

V

OUT

POWER ON/OFF

C

SLEW

C

TIMER

UP/STOP

C

SLEW

C

TIMER

Figure 1. ADM1203 Switching on a Single Supply

MULTI-SUPPLY TRACKING

The primary function of the ADM1203 is to provide a voltage
tracking solution for multiple supply rails. The implementation
in Figure 2 will provide this function. Each voltage rail has its
own ADM1203 device driving a FET.

The UP/DOWNb (ADM1203-1/3) or UP/STOPb (ADM1203­2/4) pins of all devices can be driven by a single logic input
which will initiate a system power-up going high or power­down going low.

In figure 2, the ADM1203 is configured to control the ramp of
the largest supply first. The output of the first device is
connected to the slew pin on the second device to allow the rate
of the first supply to control the rate of the second and so on.

5VIN

POWER ON /O FF

C

SLEW

C

3.3VIN

POWER ON/OFF

C

TIMER

2.7VIN

POWER ON/OFF

C

TIMER

Figure 2. ADM1203 Solution for Tracking 3 Supplies

A low-to-high transition on the UP/DOWNb or UP/STOPb pin
will initiate turn-on of the supplies. The ADM1203 will begin to
source current into the C
GATE pins will begin to rise, or “track” up, at the same rate, as
set by the value of C
100mV of the C

SLEW

voltage until they level off at their full

SLEW

potentials.

A high-to-low on the UP/DOWNb pin of the ADM1203-1 will
initiate a tracking down of the supply rails. The voltages will
attempt to stay with ~100mV of each other assuming the load
current will be sufficient to discharge the capacitors at the
required rate. (See Figure 3.)

A high-to-low on the UP/STOPb pin of the ADM1203-2 will
initiate an emergency fast shutdown of all supply rails
simultaneously. (See Figure 4.) Note that while the pass FETs
will be turned off immediately the actual discharge rate of each
supply rail will depend on the load.

R

S

RS-

V

cc

UP/DOWN

ADM1203-1

SLEW

TIMER

TIMER

UP/DOWN

V

GND

R

S

RS-

V

cc

ADM1203-1

SLEW
TIMER

UP/DOWN

V

OUTFB

GND

R

S

RS-

V

cc

GATE

ADM1203-1

SLEW
TIMER

SLEW

V

OUTFB

GND

capacitor. The voltages on all

GATE

OUTFB

GATE

1nF

1nF

1nF

Q

1

Q

1

Q

1

5VOUT

3.3VOUT

2.7VOUT

. All supply voltages will remain within

Rev. PrD | Page 4 of 8

Preliminary Technical Data ADM1203

UP/DOW N

3.3V

2.5V

1.5V

OUTPUT

VOLTAGES

Figure 3. ADM1203-1 Power-Up and Power-Down Waveforms

CURRENT LIMIT CIRCUIT BREAKER FUNCTION

The ADM1203 features a current limiting circuit breaker.
When there is a sudden load current surge, such as a low
impedance fault, the bus supply voltage can drop significantly
to a point where the power to an adjacent card is
affected, causing system malfunctions. The ADM1203 fast
response current RS amplifier instantly limits current by
reducing the external FET GATE pin voltage. This
minimizes the bus supply voltage drop and permits power
budgeting and fault isolation without affecting neighboring
cards. A compensation circuit should be connected to
the GATE pin for current limit loop stability.

UP/STOP

3.3V

2.5V

1.5V

OUTPUT

VOLTAGES

Figure 4. ADM1203-2 Power-Up and Power-Down Waveforms

SLEW RATE CONTROL

Voltage tracking is achieved by controlling the slew rate of a
rising or falling supply by an external capacitor on the SLEW
pin. Alternatively, this pin can be overdriven with a supply
which will result in the output following this supply. The gate
responds to maintain ~100mV between the VOUTFB pin and
the SLEW pin

CALCULATING CURRENT LIMIT

The nominal fault current limit is determined by a RS
resistor connected between V
given by the equation below:

I

LIMIT(NOM)

= V

CB(NOM)

/ RRS

The minimum load current is given by Equation 2:

I

LIMIT(MIN)

= V

CB(MIN)

/ R

RS(MAX)

The maximum load current is given by Equation 3:

I

LIMIT(MAX)

= V

CB(MAX)

/ R

RS(MIN)

Note: The power rating of the RS resistor should be rated at the
fault current level. The RS resistor power rating must exceed
V

CB(MAX

)2 /R

RS(MIN).

and the RS- pin as

CC

(2)

(3)

(1)

Figure 6. Tracking up Waveforms

Rev. PrD | Page 5 of 8

ADM1203 Preliminary Technical Data

M

ODE

TIMER FUNCTION

V

V

TIMER

IN

V

ON

The TIMER pin handles several key functions with an external
capacitor, C

. There are two comparator thresholds:

TIMER

COMP1 (0.2V) and COMP2 (1.3V). The four timing current
sources are:

• 5µA pull-up

• 60µA pull-up

• 2µA pull-down

• 100µA pull-down

The 100µA is a non-ideal current source approximating a 7k
resistor below 0.4V.

INITIAL TIMING CYCLE

When the card is being inserted into the bus connector, the
long pins mate first which brings up the supply VIN at time
point 1 of Figure 7. The ADM1203 is in reset mode as the ON
pin is low. GATE is pulled low and the TIMER pin is pulled low
with a 100µA source. At time point 2, the short pin makes
contact and ON is pulled high. At this instant, a start-up check
requires that the supply voltage be above UVLO, the ON pin
beabove1.3Vand the TIMER pin voltage be less than 0.2V.
When these three conditions are fulfilled, the initial cycle
begins and the TIMER pin is pulled high with 5µA. At time
point 3, the TIMER reaches the COMP2 threshold and the first
portion of the initial cycle ends. The 100µA current source then
pulls down the TIMER pin until it reaches 0.2V at time point 4.
The initial cycle delay (time point 2 to time point 4) is related to

by equation:

C

TIMER

~= 272.9 x C

t

INITIAL

When the initial cycle terminates, a start-up cycle is activated
and the GATE pin ramps high. The TIMER pin continues to be
pulled down towards ground.

ms/uF (4)

TIMER

V

GATE

V

OUT

V

V

V

TIMER

V

GATE

V

OUT

I

RSENSE

IN

ON

RES ET

INITIAL
CYCL E

START-UP

CYCLE

Figure 7: Normal Start-up

5µA

60µA

100µA

NORM A L

CYCLE

2µA

V

TH

100µA

RESET
MODE

INITIAL
CYCLE

START-UP

CYCLE

NORMAL

CYCLE

Figure 8: Current Limiting at Start-up

Rev. PrD | Page 6 of 8

Preliminary Technical Data ADM1203

PIN CONFIGURATIONS

TIMER

GND

UP / DOWN

V

OUT

1

ADM1203-1AUJ

2

TOP VIEW

(Not to Scale)

3

4

V

8

CC

RS-

7

6

GATE

5

C

SLEW

TIMER

UP / STOP

GND

V

OUT

1

2

3

4

PIN FUNCTIONAL DESCRIPTIONS

Pin No. Name Description

1 TIMER

2 GND Chip Ground Pin.
3 UP/DOWNb or UP/STOPb

4 VOUT Monitors the Source of the external FET
5 CSLEW

6 GATE Drives the GATE node of the external FET
7 RS-

8 VCC Chip Power Supply, 2.7V to 16.5V.

Timer Input Pin. An external capacitor C

21.7ms/µF circuit breaker delay. The GATE pin turns off whenever the TIMER pin is pulled

beyond the upper threshold, such as for overvoltage detection with an external zener.

Logic Pin. Drive high to initiate track up off all ADM1203 controlled rails. Drive low to
initiate track down of all rails (ADM1203-1) or a fast shutdown of all rails (ADM1203-2).

Connect to an external capacitor to control the slew rate of the of the GATE at turn on
(and turn-off for ADM1203-1).

Current Limit Sense Input Pin. A sense resistor between the Vcc and RS- pins sets the
analog current limit. In overload, the EA controls the external FET gate to maintain the
SENSE voltage at 47mV. When the EA is maintaining current limit, the TIMER circuit
breaker mode is activated. The current limit loop/circuit breaker mode can be disabled
by connecting the Vcc pin and RS- pin together..

V

8

CC

ADM1203-2AUJ

7

6

5

RS-

GATE

C

SLEW

TOP VIEW

(Not to Scale)

sets a 272.9ms/µF initial timing delay and a

TIMER

Rev. PrD | Page 7 of 8

Preliminary Technical Data

2005

PR05140-0-2/05(PrD)

ADM1203

OUTLINE DIMENSIONS

Figure XX. 8-Lead TSOT Package (UJ-8)—Dimensions shown in millimeters

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Table 3. Ordering Guide

Part Number Variant Temperature Package Package Description Package Outline

ADM1203-1AUJ UP/DOWNb logic input –40°C to +85°C TSOT UJ-8
ADM1203-2AUJ UP/STOPb logic input –40°C to +85°C TSOT UJ-8
ADM1203-3AUJ UP/DOWNb logic input –40°C to +85°C TSOT UJ-8
ADM1203-4AUJ UP/STOPb logic input –40°C to +85°C TSOT UJ-8

003 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.

Rev. PrD | Page 8 of 8