Datasheet ADM1171 Datasheet (Analog Devices)

© 2005

2.7V to 16V Hot Swap Controller

Preliminary Technical Data

FEATURES

Allows Safe Board Insertion and Removal from a Live
Backplane

Controls Supply Voltages from 2.7 V to 16.5V
Adjustable Analog Current Limit with Circuit Breaker
Current Sense Output
Fast Response Limits Peak Fault Current
Automatic Retry or Latch-Off On Current Fault
Adjustable Supply Voltage Power-Up Rate
Charge Pumped Gate Drive for External N-FET Switch
True Soft Start control of Initial Current Profile
TIMER pin allows control over timing functions
Undervoltage Lockout
Adjustable Overvoltage Protection
8-pin TSOT Package

APPLICATIONS

Hot Swap Board Insertion – Line Cards, Raid systems
Electronic Circuit Breaker
Industrial High Side Switch/Circuit Breaker

APPLICATIONS DIAGRAM

VIN=5V

LONG

with Current Sense Output

ADM1171

GENERAL DESCRIPTION

The ADM1171 is a Hot Swap controller that allows a board to
be safely inserted and removed from a live backplane.

An internal charge pumped driver controls the GATE of an
external high side N-channel FET for a supply voltage ranging
from 2.7V to 16.5V. The ADM1171 provides the initial timing
cycle and allows the GATE to be ramped up at an adjustable
rate.

The ADM1171 features a fast current limit loop providing
active current limiting together with a circuit breaker timer.
The magnitude of the current can be determined by the voltage
on the CSOUT pin. The signal at the ON pin turns the part on
and off and is also used for the reset function.

The SS pin allows the user to control the soft start profile of the
current ramp at start-up via an external capacitor.
A capacitor connected to the TIMER pin gives the user control
over the duty cycle of the PWM retry ratio during current fault.

This part is available in two options: the ADM1171-1 will
automatic retry for over-current fault and the ADM1171-2 will
latch-off for an over-current fault.
The ADM1171 is packaged in an 8-lead TSOT package.

R

SENSE

Q

1

V

OUT

=5V

R

SHORT

GND

Rev.PrE

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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.

LONG

ON1

R

ON2

C

SS

C

TIMER

C

LOAD

cc

SENSE-

GATE

V

ON

ADM1171

SS

CS_OUT

TIMER

GND

GND

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

www.analog.com

ADM1171 Preliminary Technical Data

ADM1171—SPECIFICATIONS

Table 1. V

Parameter Min Typ Max Units Conditions

VCC Pin

Operating Voltage Range, VCC 2.7 16.5 V
Supply Current, Icc 0.65 1.0
Undervoltage Lockout, V
Undervoltage Lockout Hysteresis, V

ON Pin
ON Pin Input Current, I
On Pin Threshold, VON 1.26 1.3 1.34
ON Pin Threshold Hysteresis, V
RS- Pin
SENSE Pin Input Current, I
Circuit Breaker Limit Voltage, VCB 44 50 56
Fast Current Limit Voltage 60 70
RS- Pin
Hot Swap Voltage 2.7 16.5
RS- Pin Input Current, I

Circuit Breaker Limit Voltage, VCB 34 47 60
44 47 53
Over Current Limit Voltage, VOC 40 53 66
50 53 59
GATE Pin
GATE Drive Voltage, V
GATE Drive Voltage, V
GATE Drive Voltage, V

Gate Pullup Current
Gate Pulldown Current
Gate Pulldown Current
Soft Start (SS) Pin

Soft Start Pullup Current 10
Current Setting Gain 20
Soft Start Completion Voltage 1
Pull-Down Current 100
TIMER Pin
TIMER Pin Pull-Up Current, I

-48 -60 -72
TIMER Pin Pull-Down Current, I
100
TIMER Pin Threshold High, V
TIMER Pin Threshold Low, V

CSOUT Pin

Total Output Voltage Error
Gain

Output Impedance

Settling Time

= 2.7V to 16.5V, TA = -40°C to +85°C, Typical Values at TA = 25°C unless otherwise noted.

CC

ON rising

V
VCB = (V

V
V
VCB = (V
VCB = (V
V
V

mA

2.4 2.525 2.65 V VCC Rising

UVLO

25

UVLOHYS

mV

INON

-100 0 100

nA

V

80

ONHYST

mV

INSENSE

10 20 30

µA

V

INSENSE

TBD -200 TBD

10 20 30

µA

µA
mV
mV
mV
mV

GATE

6 8 12 V V

GATE

5 6.5 10 V V

GATE

5 6.5 10 V V

10 12 14 uA V

2 mA V
25 mA V

µA
V/V

V

µA

Vss/Vsense

Fault

-4 -5 -6

TIMERUP

µA

µA

TIMERDN

2 2.5

µA

µA

1.235 1.3 1.365

TIMERH

0.18 0.2 0.22

TIMERL

V
V

Initial Cycle, V
During Current Fault, V
After Current Fault, V
Normal Operation, V
TIMER rising
TIMER falling

-5 0 5 % VCC-SENSE = 100mV

19 20 21 V/V VCC-SENSE = 10 to100mV

25

1

KΩ

µs

= VCC

SENSE

– V

CC

SENSE

= VCC, V

SENSE

SENSE

HOTSWAP

HOTSWAP

– VCC, VCC = 2.7V

GATE

– VCC, VCC = 5V

GATE

– VCC, VCC = 16.5V

GATE

= 0V

GATE

= 3V, Vcc > UVLO

GATE

= 3V, Vcc < UVLO

GATE

HOTSWAP

= VCC, V

HOTSWAP

– V

CC

SENSE

– V

CC

SENSE

= 0.6 V, Note
> 2.2 V

TIMER

)

= 0.6 V, Note
> 2.2 V

) ,V

HOTSWAP

) ,V

HOTSWAP

= 1V

TIMER

= 1V

TIMER

= 1V

TIMER

= 0.6 V
> 2.2 V

= 1V

Rev. PrE | Page 2 of 7

Preliminary Technical Data ADM1171

Absolute Maximum Ratings

Table 2. ADM1171 Absolute Maximum Ratings

Parameter
VCC Pin 20V
RS- Pins -0.3V to 20V
TIMER Pin -0.3V to (VCC + 0.3V)
SS Pin TBD
ON Pin -0.3V to 20V
CSOUT -0.3V to (VCC + 0.3V)
GATE Pin VCC + 11V
Power Dissipation TBD
Storage Temperature –65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature Range

(Soldering 10 sec)
Junction Temperature 150°C

Rating

300°C

HOT CIRCUIT INSERTION

When circuit boards are inserted into live backplanes, the
supply bypass capacitors can draw large transient currents
from the backplane power bus as they charge. Such transient
currents can cause permanent damage to connector pins,
glitches on the system supply or reset other boards in the
system.
The ADM1171 is designed to turn a printed circuit board’s
supply voltage ON and OFF in a controlled manner, allowing
the circuit board to be safely inserted into or removed from a
live backplane. The ADM1171 can reside either on the
backplane or on the daughter board for hot circuit insertion
applications.

OVERVIEW

The ADM1171 is designed to operate over a range of supplies
from 2.7V to 16.5V. Upon insertion, an undervoltage lockout
circuit determines if sufficient supply voltage is present. When
the ON pin goes high an initial timing cycle assures that the
board is fully seated in the backplane before the FET is turned
on. A single timer capacitor sets the periods for all of the timer
functions. After the initial timing cycle the ADM1171 can
either start up in current limit or with a lower load current.
Once the external FET is fully enhanced and the supply has
ramped up, the ADM1171 monitors the load current through
an external sense resistor. Overcurrent faults are actively
limited to 47mV/R
limit. The ADM1171-1 will automatically retry after a current
limit fault while the ADM1171-2 latches off. The ADM1171-1
timer function limits the retry duty cycle to 3.8% for FET
cooling.

for a specified circuit breaker timer

SENSE

UNDERVOLTAGE LOCKOUT

An internal undervoltage lockout (UVLO) circuit resets the
ADM1171 if the V
The UVLO has a low-to-high threshold of 2.525V, a 25mV
hysteresis. Above 2.525V supply voltage, the ADM1171 will
start if the ON pin conditions are met.

supply is too low for normal operation.

CC

ON FUNCTION

The ON pin is the input to a comparator which has a low-to­high threshold of 1.3V, an 80mV hysteresis and a high-to-

low glitch filter of 30µs and a low-to-high glitch filter of 3us. A

low input on the ON pin resets the ADM1171 TIMER status
and turns off the external FET by pulling the GATE pin to
ground. A low-to-high transition on the ON pin starts an initial
cycle followed by a start-up cycle. A 10k pull-up resistor
connecting the ON pin to the supply is recommended. The 10k
resistor shunts any potential static charge on the backplane and
reduces the overvoltage stress at the ON pin during live
insertion.
Alternatively, an external resistor divider at the ON pin can be
used to program an undervoltage lockout value higher than the
internal UVLO circuit. An RC filter can be added at the ON pin
to increase the delay time at card insertion if the internal glitch
filter delay is insufficient.

GATE FUNCTION

During hot insertion of the PCB, an abrupt application of
supply voltage charges the external FET drain/gate capacitance.
This can cause an unwanted gate voltage spike. An internal
circuit holds GATE low before the internal circuitry wakes up.
This reduces the FET current surges substantially at insertion.
The GATE pin is held low in reset mode and during the initial

Rev. PrE | Page 3 of 7

ADM1171 Preliminary Technical Data

timing cycle. In the start-up cycle the GATE pin is pulled up by

a 12µA current source. During an over-current fault condition,

the error amplifier servos the GATE pin to maintain a constant
current to the load until the circuit breaker trips. When the
circuit breaker trips, the GATE pin shuts down abruptly.

TIMER FUNCTION

The TIMER pin handles several key functions with an external
capacitor, C
COMP1 (0.2V) and COMP2 (1.3V). The four timing current
sources are:

. There are two comparator thresholds:

TIMER

CURRENT LIMIT CIRCUIT BREAKER FUNCTION

The ADM1171 features a current limiting circuit breaker.
When there is a sudden load current surge, such as a low
impedance fault, the bus supply voltage can drop significantly
to a point where the power to an adjacent card is
affected, causing system malfunctions. The ADM1171 high
bandwidth current control loop limits current by
reducing the external FET GATE pin voltage. This
minimizes the bus supply voltage drop and permits power
budgeting and fault isolation without affecting neighbouring
cards.

CALCULATING CURRENT LIMIT

The nominal fault current limit is determined by a sense
resistor connected between V
given by the equation below:

I

LIMIT(NOM)

= V

CB(NOM)

/ R

SENSE

The minimum load current is given by Equation 2:

I

LIMIT(MIN)

= V

CB(MIN)

/ R

SENSE(MAX)

The maximum load current is given by Equation 3:

I

LIMIT(MAX)

= V

CB(MAX)

/ R

SENSE(MIN)

Note: The power rating of the sense resistor should be rated at
the fault current level.

For proper operation, the minimum current limit must exceed

the circuit maximum operating load current with margin. The

sense resistor power rating must exceed V
/R

SENSE(MIN).

and the SENSE pin as

CC

(1)

(2)

(3)

CB(MAX

)2

• 5µA pull-up

• 60µA pull-up

• 2µA pull-down

• 100µA pull-down

The 100µA is a non-ideal current source approximating a 7k
resistor below 0.4V.

INITIAL TIMING CYCLE

When the card is being inserted into the bus connector, the
long pins mate first which brings up the supply VIN at time
point 1 of Figure 3. The ADM1171 is in reset mode as the ON
pin is low. GATE is pulled low and the TIMER pin is pulled low
with a 100µA source. At time point 2, the short pin makes
contact and ON is pulled high. At this instant, a start-up check
requires that the supply voltage be above UVLO, the ON pin
beabove1.3Vand the TIMER pin voltage be less than 0.2V.
When these three conditions are fulfilled, the initial cycle
begins and the TIMER pin is pulled high with 5µA. At time
point 3, the TIMER reaches the COMP2 threshold and the first
portion of the initial cycle ends. The 100µA current source then
pulls down the TIMER pin until it reaches 0.2V at time point 4.
The initial cycle delay (time point 2 to time point 4) is related to

by equation:

C

TIMER

~= 272.9 x C

t

INITIAL

When the initial cycle terminates, a start-up cycle is activated
and the GATE pin ramps high. The TIMER pin continues to be
pulled down towards ground.

ms/uF (4)

TIMER

CURRENT SENSE OUT

The ADM1171 has a Current Sense Output. The voltage across
the VCC/RS- pins is amplified by a factor of 20 and is output

Rev. PrE | Page 4 of 7

on this pin. This can then be fed to an ADC and the magnitude
of the current flowing through the sense resistor can be
obtained.

Preliminary Technical Data ADM1171

M

ODE

V

TIMER

V

GATE

V

V

V

ON

OUT

V

IN

The SS pin is used to determine the inrush current profile.
A capacitor should be attached to this pin. Whenever the FET
is requested to turn on, the SS pin is held at ground until the
SENSE pin reaches a few mV. A current source is then turned
on, which linearly ramps the capacitor up to 1V. The reference
voltage for the GATE linear control amplifier is derived from
the soft start voltage, such that the inrush linear current limit is
defined as: : I

= VSS / (20 x R

LIMIT

SENSE

)

KELVIN SENSE RESISTOR CONNECTION

When using a low-value sense resistor for high current
measurement the problem of parasitic series resistance can
arise. The lead resistance can be a substantial fraction of the

SOFT START (SS PIN)

RES ET

INITIAL
CYCL E

START-UP

CYCLE

NORM A L

CYCLE

Figure 1: Normal Start-up

IN

rated resistance making the total resistance a function of lead
length. This problem can be avoided by using a Kelvin sense
connection. This type of connection separates the current path
through the resistor and the voltage drop across the resistor.
Figure 18 below shows the correct way to connect the sense
resistor between the VCC and RS-

SENSE RESISTOR

pins of the ADM1171.

V

V

TIMER

V

GATE

V

OUT

I

RSENSE

ON

100µA

START-UP

CYCLE

60µA

RESET
MODE

5µA

INITIAL
CYCLE

Figure 2: Current Limiting at Start-up

2µA

V

TH

NORMAL

CYCLE

100µA

CURRENT

Current Flow

FLOWFROM

from source

LOAD

KELVIN SENSETRACES

SENSE V

VCC RS-

ADM107 3

CURRENT

Current Flow to

FLOW TO -48V

Load

BACKPLANE

EE

Rev. PrE | Page 5 of 7

ADM1171 Preliminary Technical Data

PIN CONFIGURATIONS

7

6

5

V

CC

RS-

CSOUT

GATE

TIMER 8

GND

SS

ON

1

ADM1171-1AUJ

2

3

TOP VIEW

(Not to Scale)

4

PIN FUNCTIONAL DESCRIPTIONS

Pin No. Name Description

1 TIMER

2 GND Chip Ground Pin
3 SS

4 ON (ON-CLR)

5 GATE

Timer Input Pin. An external capacitor C

21.7ms/µF circuit breaker delay. The GATE pin turns off whenever the TIMER pin is pulled

beyond the upper threshold, such as for overvoltage detection with an external zener.

Soft Start pin. An external capacitor between the SS pin and GND sets the ramp rate of
the load current profile at initial connection.

Input Pin. The ON pin comparator has a low-to-high threshold of 1.3V with 80mV
hysteresis and a glitch filter. When the ON pin is low, the ADM1171 is reset. When the
ON pin goes high, the GATE turns on after the initial timing cycle. On the ADM1171-2, a
rising edge on this pin has the added function of clearing a fault and restarting the
device

GATE Output Pin. This pin is the high side gate drive of an external N-channel FET. An
internal charge pump provides a 12µA pull-up current with Zener clamps to RS+ and
ground. In overload, the error amplifier (EA) controls the external FET to maintain a
constant load current.

TIMER 8

GND

ON-CLR

SS

1

ADM1171-2AUJ

2

3

TOP VIEW

(Not to Scale)

4

sets a 272.9ms/µF initial timing delay and a

TIMER

7

6

5

V

CC

RS-

CSOUT

GATE

6 CSOUT

7 R S-

8 VCC

Current Sense Analog voltage Output. This voltage represents the amplified differentail
voltage across the VCC and RS- pins.

Current Limit Sense Input Pin. A sense resistor between the Vcc and RS- pins sets the
analog current limit. In overload, the EA controls the external FET gate to maintain the
SENSE voltage at 47mV. When the EA is maintaining current limit, the TIMER circuit
breaker mode is activated. The current limit loop/circuit breaker mode can be disabled
by connecting the Vcc pin and RS- pin together.

Positive Supply Input Pin. The operating supply voltage range is between 2.7V to 16.5V.
An undervoltage lockout (UVLO) circuit with a glitch filter resets the ADM1171 when a
low supply voltage is detected.

Rev. PrE | Page 6 of 7

ADM1171

Preliminary Technical Data

2005

PR05125-0-2/05(PrE)

OUTLINE DIMENSIONS

Figure 3. 8-Lead TSOT Package (UJ-8)—Dimensions shown in millimeters

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Table 3. Ordering Guide

Part Number Version Temperature Package Package Description Package Outline

ADM1171-1AUJ Automatic Retry Version –40°C to +85°C TSOT UJ-8
ADM1171-2AUJ Latched Off Version –40°C to +85°C TSOT UJ-8

2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.