Datasheet ADM1087 Datasheet (ANALOG DEVICES)

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Simple Sequencers® in 6-Lead SC70

FEATURES

Provide programmable time delays between enable
signals
Can be cascaded with power modules for multiple
sup
ply sequencing Power supply monitoring from 0.6 V Output stages
High voltage (up to 22 V) open-drain output
ADM1085/ADM1087)
(
Push-pull output (ADM1086/ADM1088) Capacitor-adjustable time delays High voltage (up to 22 V) enable and V Low power consumption (15 μA) Specified over –40°C to +125°C temperature range 6-lead SC70 package

APPLICATIONS

Desktop/notebook computers, servers Low power portable equipment Routers Base stations Line cards Graphics cards

GENERAL DESCRIPTION

inputs
IN
ADM1085/ADM1086/ADM1087/ADM1088

FUNCTIONAL BLOCK DIAGRAMS

CC
ADM1085/ADM1086
GND
GND
CAPACITOR
ADJUSTABLE
DELAY
V
CC
CAPACITOR
ADJUSTABLE
DELAY
Figure 1.
ENOUT
ENINCEXT
ENOUT
ENINCEXT
IN
0.6V
ADM1087/ADM1088
IN
0.6V
04591-001
The ADM1085/ADM1086/ADM1087/ADM1088 are simple sequencing circuits that provide a time delay between the enabling of voltage regulators and/or dc-dc converters at power­up in multiple supply systems. When the output voltage of the first power module reaches a preset threshold, a time delay is initiated before an enable signal allows subsequent regulators to power up. Any number of these devices can be cascaded with regulators to allow sequencing of multiple power supplies.
Threshold levels can be set with a pair of external resistors in a v
oltage divider configuration. With appropriate resistor values,
the threshold can be adjusted to monitor voltages as low as 0.6 V.
The ADM1086 and ADM1088 have push-pull output stages,
ith active high (ENOUT) and active low (
w
ENOUT
) logic
outputs, respectively. The ADM1085 has an active-high (ENOUT) logic output; the ADM1087 has an active-low (
ENOUT
) output. Both the ADM1085 and ADM1087 have
open-drain output stages that can be pulled up to voltage levels as high as 22 V through an external resistor. This level-shifting property ensures compatibility with enable input logic levels of different regulators and converters.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
All four models have a dedicated enable input pin that allows
he output signal to the regulator to be controlled externally.
t This is an active high input (ENIN) for the ADM1085 and ADM1086, and an active low input (
) for the ADM1087
ENIN
and ADM1088.
The Simple Sequencers are specified over the extended
−40°C t
o +125°C temperature range. With low current consumption of 15 μA (typical) and 6-lead SC70 packaging, the parts are suitable for low-power portable applications.
Table 1. Selection Table
Output Stage Part No. Enable Input
ADM1085 ENIN
ADM1086 ENIN
ADM1087
ADM1088
ENIN
ENIN
ENOUT
Open-drain
Push-pull
ENOUT
Open-drain
Push-pull
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
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TABLE OF CONTENTS

Features .............................................................................................. 1
Capacitor-Adjustable Delay Circuit............................................9
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Circuit Information.......................................................................... 9
Timing Characteristics and Truth Tables.................................. 9

REVISION HISTORY

4/06—Rev. 0 to Rev. A
Added Lead-Free Models ..................................................Universal
Update Outline Dimensions ......................................................... 15
Changes to Ordering Guide.......................................................... 15
Open-Drain and Push-Pull Outputs ....................................... 10
Application Information................................................................ 11
Sequencing Circuits ................................................................... 11
Dual LOFO Sequencing ............................................................ 13
Simultaneous Enabling .............................................................. 13
Power Good Signal Delays........................................................ 13
Quad-Supply Power Good Indicator....................................... 14
Sequencing with FET Switches................................................. 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
7/04—Revision 0: Initial Version
Rev. A | Page 2 of 16
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SPECIFICATIONS

VCC = full operating range, TA = −40°C to +125°C, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range 2.25 3.6 V VIN Operating Voltage Range 0 22 V Supply Current 10 15 μA VIN Rising Threshold, V VIN Falling Threshold, V
TH_RISING
TH_FALLING
VIN Hysteresis 15 mV VIN to ENOUT/ENOUT Delay
VIN Rising 35 μs CEXT floating, C = 20 pF 2 ms CEXT = 470 pF
VIN Falling 20 μs VIN = V VIN Leakage Current 170 μA VIN = 22 V CEXT Charge Current 125 250 375 nA Threshold Temperature Coefficient 30 ppm/°C ENIN/ENIN to ENOUT/ENOUT
Propagation Delay ENIN/ENIN Voltage Low
ENIN/ENIN Voltage High ENIN/ENIN Leakage Current ENOUT/ENOUT Voltage Low
ENOUT/ENOUT Voltage High
(ADM1086/ADM1088)
ENOUT/ENOUT Open-Drain Output
Leakage Current (ADM1085/ADM1087)
0.56 0.6 0.64 V VCC = 3.3 V
0.545 0.585 0.625 V VCC = 3.3 V
TH_FALLING
0.5 μs V
0.3 V
0.3 V
+ 0.2 V
CC
− 0.2 V
CC
170 μA
0.4 V
0.8 V
CC
V
0.4 μA
IN
> V
TH_RISING
ENIN/ENIN = 22 V VIN < V
TH_FALLING
VIN > V I
= 1.2 mA
SINK
> V
V
IN
V
< V
IN
I
SOURCE
(ENOUT),
TH_RISING
(ENOUT),
TH_RISING
TH_FALLING
= 500 μA
ENOUT/ENOUT = 22 V
to (V
TH_FALLING
(ENOUT),
(ENOUT),
– 100 mV)
Rev. A | Page 3 of 16
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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
CC
V
IN
CEXT
ENIN, ENIN
ENOUT, ENOUT (ADM1085, ADM1087)
ENOUT, ENOUT (ADM1086, ADM1088) Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance, SC70 146°C/W Lead Temperature
Soldering (10 sec) 300°C Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C
0.3 V to +6 V
0.3 V to +25 V
0.3 V to +6 V
0.3 V to +25 V
0.3 V to +25 V
0.3 V to +6 V
40°C to +125°C
65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings ma
y cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. A | Page 4 of 16
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADM1085/
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
ENIN, ENIN
Enable Input. Controls the status of the enable output. Active high for ADM1085/ADM1086. Active low for
ADM1087/ADM1088. 2 GND Ground. 3 VIN
Input for the Monitored Voltage Signal. Can be biased via a voltage divider resistor network to customize the
ective input threshold. Can precisely monitor an analog power supply output signal and detect when it has
eff
powered up. The voltage applied at this pin is compared with a 0.6 V on-chip reference. With this reference,
digital signals with various logic level thresholds can also be detected. 4
ENOUT, ENOUT
Enable Output. Asserted when the voltage at VIN is above V
that the enable input is asserted. Active high for the ADM1085/ADM1086. Active low for the
ADM1087/ADM1088. 5 CEXT
External Capacitor Pin. The capacitance on this pin determines the time dela
is seen only when the voltage at V 6 VCC Power Supply.
ENIN/ENIN
GND
V
1
ADM1086/ ADM1087/
2
ADM1088
3
TOP VIEW
IN
(Not to Scale)
Figure 2. Pin Configuration
rises past V
IN
6
5
4
V
CC
CEXT
ENOUT/ENOUT
04591-002
and the time delay has elapsed, provided
TH_RISING
, and not when it falls below V
TH_RISING
y on the enable output. The delay
.
TH_FALLING
Rev. A | Page 5 of 16
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TYPICAL PERFORMANCE CHARACTERISTICS

700
680
660
640
620
(mV)
600
TRIP
580
V
560
540
520
500
–40 –25 –10 5 20 35 50 65 80 95 110 125
Figure 3. V
12.0
11.5
11.0
10.5
10.0
(µA)
CC
I
9.5
9.0
8.5
8.0
2.1 2.4 2.7 3.0 3.3 3.6
Figure 4. Supply Current vs. Supply Voltage
20
18
16
14
12
10
8
6
SUPPLY CURRENT (µA)
4
2
0
0246810121416182022
Figure 5. Supply Current vs. V
V
RISING
TRIP
V
FALLING
TRIP
TEMPERATURE ( °C)
Threshold vs. Temperature
IN
T
A
= –40°C
T
A
(V)
V
CC
(V)
V
IN
Voltage
IN
= +25°C
TA = +125°C
4591-003
4591-004
4591-005
200
180
160
140
120
100
80
60
LEAKAGE CURRENT (µ A)
IN
V
40
20
0
0246810121416182022
200
190
180
170
160
150
140
130
LEAKAGE CURRENT (µ A)
IN
V
120
110
100
2.1 3.63.33.02.72.4
10000
1000
100
10
OUTPUT VOLTAGE (mV)
1
0.1
0.01 100201010.1
Figure 6. V
Figure 7. V
IN
IN
OUTPUT SINK CURRENT (mA)
V
IN
Leakage Current vs. VIN Voltage
V
CC
Leakage Current vs. VCC Voltage
T
= +25°C
A
Figure 8. Output Voltage vs. Output Si
= +25°C
T
A
(V)
(V)
TA = +125°C
= –40°C
T
A
TA = +125°C
= –40°C
T
A
TA = +125°C
= +25°C
T
A
= –40°C
T
A
nk Current
4591-006
4591-007
4591-008
Rev. A | Page 6 of 16
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120
100
80
60
40
OUTPUT LOW VOLTAGE (mV)
20
0
2.1 2.4 2.7 3.0 3.3 3.6
SUPPLY VOLTAGE (V)
Figure 9. Output Low Voltage vs. Supply Voltage
100
90
80
70
60
50
40
30
PROPAGATION DELAY (µs)
20
10
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
Figure 10. V
500
450
400
350
300
250
200
FALL TIME (ns)
150
100
50
0
2.1 2.4 2.7 3.0 3.3 3.6
TEMPERATURE ( °C)
Falling Propagation Delay vs. Temperature
CC
SUPPLY VOLTAGE (V)
1mV/µs
10mV/µs
4591-009
4591-010
4591-011
200
180
160
140
120
100
80
60
ENIN/ENIN LEAKAGE (µA)
40
20
0
0246810121416182022
Figure 12. ENIN/
200
180
160
140
120
100
80
60
ENIN LEAKAGE (µA)
40
20
0
2.1 3.63.33.02.72.4
ENIN
Figure 13. ENIN/
10000
1000
100
CEXT (nF)
10
1
0.1
0.562 262004480235052024153.222.95.022.390
ENIN/ENIN (V)
Leakage Current vs. ENIN/
TA = +125°C
T
T
V
(V)
CC
ENIN
Leakage Current vs. VCC Voltage
TIMEOUT DELAY (ms)
T
= +25°C
A
= –40°C
A
= +25°C
A
TA = +125°C
= –40°C
T
A
ENIN
Voltage
4591-012
4591-013
4591-014
Figure 11. Output Fall Time vs. Supply Voltage
Rev. A | Page 7 of 16
Figure 14. CEXT Capacitance vs. Timeout Delay
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300
280
260
240
220
200
180
160
CHARGE CURRENT (nA)
140
120
100
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE ( °C)
Figure 15. CEXT Charge Current vs. Temperature
100
90
80
70
60
50
40
30
PROPAGATION DELAY (µs)
20
10
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
Figure 16. V
to ENOUT/
IN
TEMPERATURE ( °C)
ENOUT
Propagation Delay (CEXT Floating) vs.
Temperature
4591-015
4591-016
100
90
80
70
60
50
40
30
TRANSIENT DURAT ION (µs)
20
10
0
1 10 100 1000
Figure 17. Maximum V
COMPARATOR OVERDRIVE (mV)
Transient Duration vs. Comparator Overdrive
IN
4591-017
Rev. A | Page 8 of 16
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CIRCUIT INFORMATION

TIMING CHARACTERISTICS AND TRUTH TABLES

The enable outputs of the ADM1085/ADM1086/ADM1087/ ADM1088 are related to the V AND function. The enable output is asserted only if the enable input is asserted and the voltage at V the time delay elapsed. Tab le 5 and Tabl e 6 show the enable
utput logic states for different V
o when the capacitor delay has elapsed. The timing diagrams in Figure 18 and Figure 19 give a graphical representation of how
e ADM1085/ADM1086/ADM1087/ADM1088 enable outputs
th respond to V
and enable input signals.
IN
Table 5. ADM1085/ADM1086 Truth Table
V
IN
<V
TH_FALLING
<V
TH_FALLING
>V
TH_RISING
>V
TH_RISING
Table 6. ADM1087/ADM1088 Truth Table
V
IN
<V
TH_FALLING
<V
TH_FALLING
>V
TH_RISING
>V
TH_RISING
V
IN
V
TH_RISING
and enable inputs by a simple
IN
is above V
IN
/enable input combinations
IN
TH_RISING
, with
ENIN ENOUT
0 0 1 0 0 0 1 1
ENIN ENOUT
1 1 0 1 1 1 0 0
V
TH_FALLING
When VIN reaches the upper threshold voltage (V internal circuit generates a delay (t is asserted. If V (V
TH_FALLING
drops below the lower threshold voltage
IN
), the enable output is deasserted immediately.
Similarly, if the enable input is disabled while V
) before the enable output
EN
IN
threshold, the enable output deasserts immediately. Unlike V a low-to-high transition on ENIN (or high-to-low on
does not yield a time delay on ENOUT (
ENOUT

CAPACITOR-ADJUSTABLE DELAY CIRCUIT

Figure 20 shows the internal circuitry used to generate the time delay on the enable output. A 250 nA current source charges a small internal parasitic capacitance (C voltage reaches 1.2 V, the enable output is asserted. The time taken for the capacitor to reach 1.2 V, in addition to the propa­gation delay of the comparator, constitutes the enable timeout, which is typically 35 μs.
To minimize the delay between V and the enable output deasserting, an NMOS transistor is connected in parallel with C
. The output of the voltage
INT
detector is connected to the gate of this transistor so that, when V
falls below V
IN
TH_FALLING
, the transistor switches on and C
discharges quickly.
CC
SIGNAL FROM
VOLTAGE
DETECTOR
250nA
C
INT
1.2V
). When the capacitor
INT
falling below V
IN
), an
TH_RISING
is above the
ENIN
).
TH_FALLING
INT
TO AND GATE AND OUTPUT STAGE
IN
)
,
ENIN
ENOUT
ENIN
ENOUT
CEXT
C
04591-025
t
EN
Figure 18. ADM1085/ADM1086 Timing Diagram
Figure 20. Capacitor-Adjustable Delay Circuit
04591-023
Connecting an external capacitor to the CEXT pin delays the rise time—and therefore the enable timeout—further. The relationship between the value of the external capacitor and the
V
IN
Figure 19. ADM1087/ADM1088 Timing Diagram
V
TH_RISING
V
TH_FALLING
t
EN
04591-024
Rev. A | Page 9 of 16
resulting timeout is characterized by the following equation:
t
= (C × 4.8 ×106) + 35 μs
EN
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OPEN-DRAIN AND PUSH-PULL OUTPUTS

The ADM1085 and ADM1087 have open-drain output stages that require an external pull-up resistor to provide a logic high voltage level. The geometry of the NMOS transistor enables the output to be pulled up to voltage levels as high as 22 V.
The ADM1086 and ADM1088 have push-pull (CMOS) output stages that require no external components to drive other logic circuits. An internal PMOS pull-up transistor provides the logic high voltage level.
CC
ADM1085/ADM1087
Figure 21. Open-Drain Output Stage
(22V)
LOGIC
04591-026
ADM1086/ADM1088
V
CC
Figure 22. Push-Pull Output Stage
LOGIC
04591-027
Rev. A | Page 10 of 16
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APPLICATION INFORMATION

SEQUENCING CIRCUITS

The ADM1085/ADM1086/ADM1087/ADM1088 are compatible with voltage regulators and dc-to-dc converters that have active high or active low enable or shutdown inputs, with a choice of open-drain or push-pull output stages.
Figure 23 to
Figure 25 illustrate how each of the ADM1085/ADM1086/
M1087/ADM1088 simple sequencers can be used in
AD multiple-supply systems, depending on which regulators are used and which output stage is preferred.
12
IN
OUTEN
DC/DC
3.3V
3.3V
3.3V
IN
DC/DC
OUTEN
2.5V
In Figure 23, three ADM1085s are used to sequence four s
upplies on power-up. Separate capacitors on the CEXT pins
determine the time delays between enabling of the 3.3 V, 2.5 V,
1.8 V, and 1.2 V supplies. Because the dc-to-dc converters and ADM1085s are connected in a cascade, and the output of any converter is dependent on that of the previous one, an external controller can disable all four supplies simultaneously by disabling the first dc-to-dc converter in the chain.
For power-down sequencing, an external controller dictates w
hen the supplies are switched off by accessing the ENIN
inputs individually.
3.3V
3.3V
IN
DC/DC
OUTEN
1.8V
3.3V
3.3V
IN
DC/DC
OUTEN
1.2V
CONTROL
ENABLE
V
CC
V
ENOUT
IN
ADM1085
ENIN CEXT
12V
3.3V
2.5V
1.8V
1.2V
V
CC
V
ENOUT
IN
ADM1085
ENIN CEXT
t
EN1tEN2tEN3
Figure 23. Typical ADM1085 Application Circuit
EXTERNAL
DISABLE
V
CC
V
ENOUT
IN
ADM1085
ENIN CEXT
4591-028
Rev. A | Page 11 of 16
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12
CONTROL
12
ENABLE
IN
DC/DC
OUTEN
3.3V
3.3V
V
CC
V
ENOUT
IN
ADM1086
ENIN CEXT
12V
3.3V
2.5V
1.8V
1.2V
IN
OUTEN
DC/DC
t
EN1tEN2tEN3
2.5V
3.3V
V
CC
V
ENOUT
IN
ADM1086
ENIN CEXT
IN
DC/DC
EXTERNAL
DISABLE
OUTEN
1.8V
3.3V
V
CC
V
ENOUT
IN
IN
DC/DC
OUTEN
1.2V
ADM1086
ENIN CEXT
4591-029
Figure 24. Typical ADM1086 Application Circuit
12
IN
ADP3334
OUTSD
3.3V
3.3V
V
CC
V
ENOUT
IN
ADM1087
ENIN CEXT
Figure 25. Typical ADM1087 Application Circuit Using
A
DP3334 Voltage Regulators
IN
ADP3334
OUTSD
2.5V
IN
ADP3334
OUTSD
3.3V
3.3V
V
CC
V
ENOUT
IN
IN
ADP3334
OUTSD
2.5V
ADM1088
ENIN CEXT
4591-030
4591-031
Figure 26. Typical ADM1088 Application Circuit Using
A
DP3334 Voltage Regulators
Rev. A | Page 12 of 16
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DUAL LOFO SEQUENCING

A power sequencing solution for a portable device, such as a PDA, is shown in Figure 27. This solution requires that the
roprocessor power supply turn on before the LCD display
mic turns on, and that the LCD display power-down before the microprocessor powers down. In other words, the last power supply to turn on is the first one to turn off (LOFO).

SIMULTANEOUS ENABLING

The enable output can drive multiple enable or shutdown regulator inputs simultaneously.
12
IN
ADP3333
OUTSD
3.3V
3.3V
3.3V
IN
ADP3333
OUTSD
2.5V
An RC network connects the battery and the
input of the
SD
ADP3333 voltage regulator. This causes power-up and power­down transients to appear at the
input when the battery is
SD
connected and disconnected. The 3.3 V microprocessor supply turns on quickly on power-up and turns off slowly on power­down. This is due to two factors: Capacitor C1 charges up to 9 V on power-up and charges down from 9 V on power-down, and the
pin has logic high and logic low input levels of 2 V
SD
and 0.4 V.
For the display power sequencing, the ADM1085 is equipped w
ith Capacitor C2 to create the delay between the micro­processor and display power turning on. When the system is powered down, the ADM1085 turns off the display power immediately, while the 3.3 V regulator waits for C1 to discharge to 0.4 V before switching off.
C1
3.3V
9
ADP3333
ENOUT
C2
2.5VSD
ADP3333
MICROPROCESSOR POWER
9V
5VSD
DISPLAY POWER
equencing
SYSTEM
POWER SWI TCH
9V
SYSTEM
POWER
V
MICROPROCESSOR
POWER
DISPLAY
POWER
Figure 27. Dual LOFO Power-Supply S
C1
2.5V
V
IN
ADM1086
ENIN CEXT
9V
0V 9V
0V
0V
5V
0V
V
CC
V
ENOUT
ENABLE
CONTROL
IN
ADM1085
ENIN CEXT
12V
IN
ADP3333
OUTSD
1.8V
04591-033
Figure 28. Enabling a Pair of Regulators from a Single ADM1085

POWER GOOD SIGNAL DELAYS

Sometimes sequencing is performed by asserting power good signals when the voltage regulators are already on, rather than sequencing the power supplies directly. In these scenarios, a simple sequencer IC can provide variable delays so that enabling separate circuit blocks can be staggered in time.
For example, in a notebook PC application, a dedicated
ocomputer asserts a power good signal for North Bridge™
micr and South Bridge™ ICs. The ADM1086 delays the South Bridge signal, so that it is enabled after the North Bridge.
5
MICROCOMPUTER
POWER_GOOD
3.3V
V
IN
ENOUT EN
ADM1086
ENIN CEXT
Figure 29. Power Good Delay
04591-032
EN
5V
NORTH
BRIDGE
IC
5V
SOUTH
BRIDGE
IC
04591-034
Rev. A | Page 13 of 16
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ADM1085/ADM1086/ADM1087/ADM1088
V
V
www.BDTIC.com/ADI

QUAD-SUPPLY POWER GOOD INDICATOR

The enable output of the Simple Sequencers is equivalent to an AND function of V the voltage at V (ENIN) is high as well. Although ENIN is a digital input, it can tolerate voltages as high as 22 V and can detect if a supply is present. Therefore, a simple sequencer can monitor two supplies and assert what can be interpreted as a power good signal when both supplies are present. The outputs of two ADM1085s can be wire-AND’ed together to make a quad­supply power good indicator.
and ENIN. ENOUT is high only when
IN
is above the threshold and the enable input
IN
3.3V
3.3

SEQUENCING WITH FET SWITCHES

The open-drain outputs of the ADM1085 and ADM1087 can drive external FET transistors that can switch on power supply rails. All that is needed is a pull-up resistor to a voltage source that is high enough to turn on the FET.
12
3.3V
V
ENOUT
IN
ADM1085
ENIN CEXT
9V
5V
2.5V
1.8V
Figure 30. Quad-Supply Power Good Indicator
V
IN
ADM1085
ENIN
3.3V
V
IN
ADM1085
ENIN
ENOUT
ENOUT
POWER_GOOD
2.5V
Figure 31. Sequencing with a FET Switch
04591-035
04591-036
Rev. A | Page 14 of 16
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ADM1085/ADM1086/ADM1087/ADM1088
www.BDTIC.com/ADI

OUTLINE DIMENSIONS

2.20
2.00
1.80
2.40
1.35
1.25
1.15
PIN 1
1.30 BSC
1.00
0.90
0.70
0.10 MAX
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 32. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]
4 5 6
2.10
3 2 1
1.80
0.65 BSC
S-6)
0.40
0.10
0.22
0.08
1.10
0.80
0.30
0.15
Dimensions shown in millimeters
SEATING PLANE
(K
0.46
0.36
0.26

ORDERING GUIDE

Model
ADM1085AKS-REEL7
ADM1085AKSZ-REEL7
ADM1086AKS-REEL7
ADM1086AKSZ-REEL7
ADM1087AKS-REEL7
ADM1087AKSZ-REEL7
ADM1088AKS-REEL7
ADM1088AKSZ-REEL7
EVAL-ADM1087EB
1
Z = Pb-free part.
Temperature Range
40°C to +125°C
1
40°C to +125°C
40°C to +125°C
1
40°C to +125°C
40°C to +125°C
1
40°C to +125°C
40°C to +125°C
1
40°C to +125°C
Ordering Quantity
3k
3k
3k
3k
3k
3k
3k
3k
Package Description
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
6-Lead Thin Shrink Small Outline Transistor Package (SC70)
Evaluation Board for the ADM1087 device. This
rd can also be used to evaluate the other devices
boa in the family. Sample can be ordered separately.
Package
Branding
Option
KS-6 M0V
KS-6 M7R
KS-6
KS-6
M0W
M8M
KS-6 M0X
KS-6
KS-6
KS-6
M7S
M0Y
M8N
Rev. A | Page 15 of 16
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ADM1085/ADM1086/ADM1087/ADM1088
www.BDTIC.com/ADI
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04591-0-4/06(A)
T
Rev. A | Page 16 of 16
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