Page 1
V
V
V
Simple Sequencers™ in 6-Lead SC70
ADM1085/ADM1086/ADM1087/ADM1088
FEATURES
Provide programmable time delays between enable
signals
Can be cascaded with power modules for multiple
supply sequencing
Power supply monitoring from 0.6 V
Output stages:
High voltage (up to 22 V) open-drain output
(ADM1085/ADM1087)
Push-pull output (ADM1086/ADM1088)
Capacitor-adjustable time delays
High voltage (up to 22 V) Enable and V
inputs
IN
Low power consumption (15 µA)
Specified over –40°C to +125°C temperature range
6-lead SC70 package
APPLICATIONS
Desktop/notebook computers, servers
Low power portable equipment
Routers
Base stations
Line cards
Graphics cards
GENERAL DESCRIPTION
The ADM1085/ADM1086/ADM1087/ADM1088 are simple
sequencing circuits that provide a time delay between the
enabling of voltage regulators and/or dc-dc converters at powerup in multiple supply systems. When the output voltage of the
first power module reaches a preset threshold, a time delay is
initiated before an enable signal allows subsequent regulators to
power up. Any number of these devices can be cascaded with
regulators to allow sequencing of multiple power supplies.
Threshold levels can be set with a pair of external resistors in a
voltage divider configuration. By choosing appropriate resistor
values, the threshold can be adjusted to monitor voltages as low
as 0.6 V.
The ADM1086 and ADM1088 have push-pull output stages,
with active-high (ENOUT) and active-low (
ENOUT
outputs, respectively. The ADM1085 has an active-high
(ENOUT) logic output; the ADM1087 has an active-low
ENOUT
(
) output. Both the ADM1085 and ADM1087 have
open-drain output stages that can be pulled up to voltage levels
as high as 22 V through an external resistor. This level-shifting
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
) logic
FUNCTIONAL BLOCK DIAGRAMS
CC
ADM1085/ADM1086
GND
GND
CAPACITOR
ADJUSTABLE
DELAY
ENINCEXT
V
CC
CAPACITOR
ADJUSTABLE
DELAY
ENINCEXT
Figure 1.
ENIN
) for the ADM1087
Output Stage
ENOUT
Open-Drain
Push-Pull
IN
0.6V
ADM1087/ADM1088
IN
0.6V
property ensures compatibility with enable input logic levels of
different regulators and converters.
All four models have a dedicated enable input pin that allows
the output signal to the regulator to be controlled externally.
This is an active-high input (ENIN) for the ADM1085 and
ADM1086, and an active-low input (
and ADM1088.
The simple sequencers are specified over the extended −40°C to
+125°C temperature range. With low current consumption of 15
µA (typ) and 6-lead SC70 packaging, the parts are suitable for
low-power portable applications.
Table 1. Selection Table
Part No. Enable Input
ADM1085 ENIN Open-Drain
ADM1086 ENIN Push-Pull
ADM1087
ADM1088
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
ENIN
ENIN
www.analog.com
ENOUT
ENOUT
ENOUT
04591-PrG-001
Page 2
ADM1085/ADM1086/ADM1087/ADM1088
TABLE OF CONTENTS
Specifications..................................................................................... 3
Application Information................................................................ 11
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Circuit Information.......................................................................... 9
Timing Characteristics and Truth Tables.................................. 9
Capacitor-Adjustable Delay Circuit........................................... 9
Open-Drain and Push-Pull Outputs ....................................... 10
REVISION HISTORY
7/04—Revision 0: Initial Version
Sequencing Circuits................................................................... 11
Dual LOFO Sequencing ............................................................ 13
Simultaneous Enabling.............................................................. 13
Power Good Signal Delays........................................................ 13
Quad-Supply Power Good Indicator....................................... 14
Sequencing with FET Switches................................................. 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 15
Rev. 0 | Page 2 of 16
Page 3
ADM1085/ADM1086/ADM1087/ADM1088
SPECIFICATIONS
VCC = full operating range, TA = −40°C to +125°C, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range 2.25 3.6 V
VIN Operating Voltage Range 0 22 V
Supply Current 10 15 µA
VIN Rising Threshold, V
VIN Falling Threshold, V
TH_RISING
TH_FALLING
VIN Hysteresis 15 mV
VIN to ENOUT/ENOUT Delay
VIN Rising 35 µs CEXT floating, C = 20 pF
2 ms CEXT = 470 pF
VIN Falling 20 µs
VIN Leakage Current 170 µA VIN = 22 V
CEXT Charge Current 125 250 375 nA
Threshold Temperature Coefficient 30 ppm/°C
ENIN/ENIN TO ENOUT/ENOUT Propagation
Delay
ENIN/ENIN Voltage Low
ENIN/ENIN Voltage High
ENIN/ENIN Leakage Current
ENOUT/ENOUT Voltage Low
ENOUT
ENOUT/
Voltage High
(ADM1086/ADM1088)
ENOUT
ENOUT/
Open-Drain Output Leakage
Current (ADM1085/ADM1087)
0.56 0.6 0.64 V VCC = 3.3 V
0.545 0.585 0.625 V VCC = 3.3 V
= V
V
IN
TH_FALLING
100 mV)
0.5 µs V
0.3 V
0.3 V
+ 0.2 V
CC
− 0.2 V
CC
170 µA
0.4 V
0.8 V
CC
V
0.4 µA
> V
IN
ENIN
ENIN/
VIN < V
> V
V
IN
I
= 1.2 mA
SINK
> V
V
IN
< V
V
IN
I
= 500 µA
SOURCE
ENOUT/
TH_RISING
TH_FALLING
TH_RISING
TH_RISING
TH_FALLING
ENOUT
to (V
= 22 V
(ENOUT),
ENOUT
(
(ENOUT),
ENOUT
(
= 22 V
TH_FALLING
),
),
–
Rev. 0 | Page 3 of 16
Page 4
ADM1085/ADM1086/ADM1087/ADM1088
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
CC
V
IN
CEXT
ENIN, ENIN
ENOUT, ENOUT (ADM1085, ADM1087)
ENOUT, ENOUT (ADM1086, ADM1088)
Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance, SC70 146°C/W
Lead Temperature
Soldering (10 s) 300°C
Vapor Phase (60 s) 215°C
Infrared (15 s) 220°C
−0.3 V to +6 V
−0.3 V to +25 V
−0.3 V to +6 V
−0.3 V to +25 V
−0.3 V to +25 V
−0.3 V to +6 V
−40°C to +125°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 4 of 16
Page 5
ADM1085/ADM1086/ADM1087/ADM1088
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
ENIN Enable Input. Controls the status of the enable output. Active high for ADM1085/ADM1086. Active low for
ENIN,
ADM1087/ADM1088.
2 GND Ground.
3 VIN
Input for the Monitored Voltage Signal. Can be biased via a voltage divider resistor network to customize the
effective input threshold. Can precisely monitor an analog power supply output signal and detect when it has
powered up. The voltage applied at this pin is compared with a 0.6 V on-chip reference. With this reference,
digital signals with various logic-level thresholds can also be detected.
4
ENOUT,
ENOUT Enable Output. Asserted when the voltage at VIN is above V
that the enable input is asserted. Active high for the ADM1085/ADM1086. Active low for the
ADM1087/ADM1088.
5 CEXT
External Capacitor Pin. The capacitance on this pin determines the time delay on the enable output. The delay
is seen only when the voltage at V
6 VCC Power Supply.
ENIN/ENIN
GND
V
ADM1085/
1
2
3
IN
ADM1086/
ADM1087/
ADM1088
TOP VIEW
(Not to Scale)
6
5
4
Figure 2. Pin Configuration
rises past V
IN
V
CC
CEXT
ENOUT/ENOUT
04591-PrG-002
and the time delay has elapsed, provided
TH_RISING
, and not when it falls below V
TH_RISING
TH_FALLING
.
Rev. 0 | Page 5 of 16
Page 6
ADM1085/ADM1086/ADM1087/ADM1088
TYPICAL PERFORMANCE CHARACTERISTICS
700
680
660
640
620
(mV)
600
TRIP
580
V
560
540
520
500
–40 –25 –10 5 20 35 50 65 80 95 110 125
Figure 3. V
12.0
11.5
11.0
10.5
10.0
(µA)
CC
I
9.5
9.0
8.5
8.0
2.10 2.40 2.70 3.00 3.30 3.60
IN
Figure 4. Supply Current vs. Supply Voltage
20
18
16
14
12
10
8
6
SUPPLY CURRENT (µA)
4
2
0
0 2 4 6 8 10 12 14 16 18 20 22
Figure 5. Supply Current vs. V
V
RISING
TRIP
V
FALLING
TRIP
TEMPERATURE (°C)
Threshold vs. Temperature
= +25°C
T
A
T
= –40°C
A
VCC (V)
VIN (V)
Voltag e
IN
04591-PrG-003
TA = +125°C
04591-PrG-004
04591-PrG-005
200
180
160
140
120
100
80
60
LEAKAGE CURRENT (µA)
IN
V
40
20
0
0246810121416182022
Figure 6. V
IN
VIN (V)
Leakage Current vs. VIN Voltag e
= +25°C
T
A
TA = +125°C
= –40°C
T
A
200
190
180
170
160
150
140
130
LEAKAGE CURRENT (µA)
IN
V
120
110
100
2.10 3.603.303.002.702.40
Figure 7. V
VCC (V)
Leakage Current vs. VCC Voltag e
IN
TA = +125°C
= +25°C
T
A
= –40°C
T
A
10000
1000
100
10
OUTPUT VOLTAGE (mV)
1
0.1
0.01 100201010.1
= +25°C
T
A
OUTPUT SINK CURRENT (mA)
TA = +125°C
= –40°C
T
A
Figure 8. Output Voltage vs. Output Sink Current
04591-PrG-006
04591-PrG-007
04591-PrG-008
Rev. 0 | Page 6 of 16
Page 7
ADM1085/ADM1086/ADM1087/ADM1088
120
100
80
60
40
OUTPUT LOW VOLTAGE (mV)
20
0
2.10 2.40 2.70 3.00 3.30 3.60
SUPPLY VOLTAGE (V)
Figure 9. Output Low Volt age vs. S upply Volta ge
04591-PrG-009
200
180
160
140
120
100
80
60
ENIN/ENIN LEAKAGE (µA)
40
20
0
0246810121416182022
Figure 12. ENIN/
ENIN
ENIN/ENIN (V)
Leakage Current vs. ENIN/
= +25°C
T
A
TA = +125°C
T
= –40°C
A
ENIN
04591-PrG-012
Voltage
100
90
80
s)
µ
70
60
50
40
30
PROPAGATION DELAY (
20
10
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
Figure 10. V
CC
TEMPERATURE (°C)
Falling Propagation Delay vs. Temperature
1mV/µs
10mV/
µ
s
500
450
400
350
300
250
200
FALL TIME (ns)
150
100
50
0
2.10 2.40 2.70 3.00 3.30 3.60
SUPPLY VOLTAGE (V)
Figure 11. Output Fall Time vs. Supply Voltage
04591-PrG-010
04591-PrG-011
200
180
160
140
120
100
80
60
ENIN LEAKAGE (µA)
40
20
0
2.10 3.603.303.002.702.40
Figure 13. ENIN/
ENIN
TA = +125°C
T
= +25°C
A
= –40°C
T
A
VCC (V)
Leakage Current vs. VCC Voltage
04591-PrG-013
10000
1000
100
(nF)
EXT
C
10
1
0.1
0.562 262004480235052024153.222.95.022.390
TIMEOUT DELAY (ms)
04591-PrG-014
Figure 14. CEXT Capacitance vs. Timeout Delay
Rev. 0 | Page 7 of 16
Page 8
ADM1085/ADM1086/ADM1087/ADM1088
300
280
260
240
220
200
180
160
CHARGE CURRENT (nA)
140
120
100
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 15. CEXT Charge Current vs. Temperature
100
90
80
70
60
50
40
30
PROPAGATION DELAY (µs)
20
10
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
Figure 16. V
TEMPERATURE (°C)
to ENOUT/
IN
ENOUT
Propagation Delay
(CEXT Floating) vs. Temperature
04591-PrG-015
04591-PrG-016
100
90
80
70
60
50
40
30
TRANSIENT DURATION (µs)
20
10
0
1 10 100 1000
Figure 17. Maximum V
COMPARATOR OVERDRIVE (mV)
Transient Duration vs. Comparator Overdrive
IN
04591-PrG-017
Rev. 0 | Page 8 of 16
Page 9
ADM1085/ADM1086/ADM1087/ADM1088
CIRCUIT INFORMATION
TIMING CHARACTERISTICS AND TRUTH TABLES
The enable outputs of the ADM1085/ADM1086/ADM1087/
ADM1088 are related to the V
AND function. The enable output is asserted only if the enable
input is asserted and the voltage at V
the time delay elapsed. Table 5 and Table 6 show the enable
output logic states for different V
when the capacitor delay has elapsed. The timing diagrams in
Figure 18 and Figure 19 give a graphical representation of how
the ADM1085/ADM1086/ADM1087/ADM1088 enable outputs
respond to V
and enable input signals.
IN
Table 5. ADM1085/ADM1086 Truth Table
V
IN
<V
TH_FALLING
<V
TH_FALLING
>V
TH_RISING
>V
TH_RISING
ENIN ENOUT
0 0
1 0
0 0
1 1
Table 6. ADM1087/ADM1088 Truth Table
V
IN
<V
TH_FALLING
<V
TH_FALLING
>V
TH_RISING
>V
TH_RISING
ENIN ENOUT
1 1
0 1
1 1
0 0
V
IN
V
TH_RISING
and enable inputs by a simple
IN
is above V
IN
/enable input combinations
IN
TH_RISING
, with
V
TH_FALLING
When VIN reaches the upper threshold voltage (V
internal circuit generates a delay (t
is asserted. If V
(V
TH_FALLING
drops below the lower threshold voltage
IN
), the enable output is deasserted immediately.
Similarly, if the enable input is disabled while V
) before the enable output
EN
IN
threshold, the enable output deasserts immediately. Unlike V
low-to-high transition on ENIN (or high-to-low on
not yield a time delay on ENOUT (
ENOUT
).
CAPACITOR-ADJUSTABLE DELAY CIRCUIT
Figure 20 shows the internal circuitry used to generate the time
delay on the enable output. A 250 nA current source charges a
small internal parasitic capacitance, C
voltage reaches 1.2 V, the enable output is asserted. The time
taken for the capacitor to reach 1.2 V, in addition to the propagation delay of the comparator, constitutes the enable timeout,
which is typically 35 µs.
To minimize the delay between V
the enable output de-asserting, an NMOS transistor is connected in parallel with C
. The output of the voltage detector
INT
is connected to the gate of this transistor so that, when V
below V
TH_FALLING
, the transistor switches on and C
quickly.
V
CC
SIGNAL FROM
VOLTAGE
DETECTOR
250nA
C
INT
. When the capacitor
INT
falling below V
IN
1.2V
), an
TH_RISING
is above the
ENIN
) does
TH_FALLING
INT
TO AND GATE
AND OUTPUT
STAGE
and
falls
IN
discharges
, a
IN
ENIN
ENOUT
V
ENIN
ENOUT
t
EN
Figure 18. ADM1085/ADM1086 Timing Diagram
IN
V
TH_RISING
t
EN
Figure 19. ADM1087/ADM1088 Timing Diagram
04591-PrG-023
V
TH_FALLING
04591-PrG-024
Rev. 0 | Page 9 of 16
CEXT
C
Figure 20. Capacitor-Adjustable Delay Circuit
Connecting an external capacitor to the CEXT pin delays the
rise time—and therefore the enable timeout—further. The
relationship between the value of the external capacitor and the
resulting timeout is characterized by the following equation:
= (C × 4.8 ×106) + 35 µs
t
EN
04591-PrG-024
Page 10
ADM1085/ADM1086/ADM1087/ADM1088
OPEN-DRAIN AND PUSH-PULL OUTPUTS
The ADM1085 and ADM1087 have open-drain output stages
that require an external pull-up resistor to provide a logic-high
voltage level. The geometry of the NMOS transistor enables the
output to be pulled up to voltage levels as high as 22 V.
VCC(≤22V)
ADM1085/ADM1087
LOGIC
04591-PrG-026
Figure 21. Open-Drain Output Stage
The ADM1086 and ADM1088 have push-pull (CMOS) output
stages that require no external components to drive other logic
circuits. An internal PMOS pull-up transistor provides the
logic-high voltage level.
ADM1086/ADM1088
V
CC
LOGIC
04591-PrG-027
Figure 22. Push-Pull Output Stage
Rev. 0 | Page 10 of 16
Page 11
ADM1085/ADM1086/ADM1087/ADM1088
APPLICATION INFORMATION
SEQUENCING CIRCUITS
The ADM1085/ADM1086/ADM1087/ADM1088 are
compatible with voltage regulators and dc-to-dc converters that
have active-high or active-low enable or shutdown inputs, with
a choice of open-drain or push-pull output stages. Figure 23 to
Figure 25 illustrate how each of the ADM1085/ADM1086/
ADM1087/ADM1088 simple sequencers can be used in
multiple-supply systems, depending on which regulators are
used and which output stage is preferred.
12V
IN
DC/DC
OUTEN
3.3V
3.3V
3.3V
IN
DC/DC
OUTEN
2.5V
In Figure 23, three ADM1085s are used to sequence four
supplies on power-up. Separate capacitors on the CEXT pins
determine the time delays between enabling of the 3.3 V, 2.5 V,
1.8 V, and 1.2 V supplies. Because the dc/dc converters and
ADM1085s are connected in cascade, and the output of any
converter is dependent on that of the previous one, an external
controller can disable all four supplies simultaneously by
disabling the first dc/dc converter in the chain.
For power-down sequencing, an external controller dictates
when the supplies are switched off by accessing the ENIN
inputs individually.
3.3V
3.3V
IN
DC/DC
OUTEN
1.8V
3.3V
3.3V
IN
DC/DC
OUTEN
1.2V
ENABLE
CONTROL
V
CC
V
ENOUT
IN
ADM1085
ENIN CEXT
12V
3.3V
2.5V
1.8V
1.2V
V
CC
V
ENOUT
IN
ADM1085
ENIN CEXT
t
EN1tEN2tEN3
Figure 23. Typical ADM1085 Application Circuit
EXTERNAL
DISABLE
V
CC
V
ENOUT
IN
ADM1085
ENIN CEXT
04591-PrG-028
Rev. 0 | Page 11 of 16
Page 12
ADM1085/ADM1086/ADM1087/ADM1088
12V
12V
ENABLE
CONTROL
IN
DC/DC
OUTEN
3.3V
3.3V
V
CC
V
ENOUT
IN
ADM1086
ENIN CEXT
12V
3.3V
2.5V
1.8V
1.2V
IN
OUTEN
DC/DC
t
EN1tEN2tEN3
2.5V
3.3V
V
CC
V
ENOUT
IN
ADM1086
ENIN CEXT
IN
DC/DC
EXTERNAL
DISABLE
OUTEN
1.8V
3.3V
V
CC
V
ENOUT
IN
IN
DC/DC
OUTEN
1.2V
ADM1086
ENIN CEXT
04591-PrG-029
Figure 24. Typical ADM1086 Application Circuit
12V
IN
ADP3334
OUTSD
3.3V
3.3V
V
CC
V
ENOUT
IN
ADM1087
ENIN CEXT
Figure 25. Typical ADM1087 Application Circuit Using
ADP3334 Voltage Regulators
IN
ADP3334
OUTSD
2.5V
IN
ADP3334
OUTSD
3.3V
3.3V
V
CC
V
ENOUT
IN
IN
ADP3334
OUTSD
2.5V
ADM1088
ENIN CEXT
04591-PrG-030
04591-PrG-031
Figure 26. Typical ADM1088 Application Circuit Using
ADP3334 Voltage Regulators
Rev. 0 | Page 12 of 16
Page 13
ADM1085/ADM1086/ADM1087/ADM1088
9
DUAL LOFO SEQUENCING
A power sequencing solution for a portable device, such as a
PDA, is shown in Figure 27. This solution requires that the
microprocessor’s power supply turn on before the LCD display
turns on, and that the LCD display power-down before the
microprocessor powers down. In other words, the last power
supply to turn on is the first one to turn off (LOFO).
SD
An RC network connects the battery and the
ADP3333 voltage regulator. This causes power-up and powerdown transients to appear at the
SD
input when the battery is
connected and disconnected. The 3.3 V microprocessor supply
turns on quickly on power-up and turns off slowly on powerdown. This is due to two factors: Capacitor C1 charges up to 9 V
on power-up and charges down from 9 V on power-down, and
SD
pin has logic-high and logic-low input levels of 2 V and
the
0.4 V.
For the display power sequencing, the ADM1085 is equipped
with capacitor C2, which creates the delay between the microprocessor and display power turning on. When the system is
powered down, the ADM1085 turns off the display power
immediately, while the 3.3 V regulator waits for C1 to discharge
to 0.4 V before switching off.
C1
3.3V
9V
ADP3333
ENOUT
C2
2.5VSD
ADP3333
SYSTEM
POWER SWITCH
V
SYSTEM
POWER
V
MICROPROCESSOR
POWER
DISPLAY
POWER
Figure 27. Dual LOFO Power-Supply Sequencing
9V
0V
9V
C1
0V
2.5V
0V
5V
0V
V
IN
ADM1086
ENIN CEXT
input of the
MICROPROCESSOR
POWER
9V
5VSD
DISPLAY
POWER
04591-PrG-032
SIMULTANEOUS ENABLING
The enable output can drive multiple enable or shutdown
regulator inputs simultaneously.
12V
IN
ADP3333
OUTSD
3.3V
3.3V
V
V
IN
ADM1085
ENIN CEXT
ENABLE
CONTROL
Figure 28. Enabling a Pair of Regulators from a Single ADM1085
CC
ENOUT
3.3V
IN
ADP3333
12V
IN
ADP3333
OUTSD
2.5V
OUTSD
1.8V
POWER GOOD SIGNAL DELAYS
Sometimes sequencing is performed by asserting Power Good
signals when the voltage regulators are already on, rather than
sequencing the power supplies directly. In these scenarios, a
simple sequencer IC can provide variable delays so that
enabling separate circuit blocks can be staggered in time.
For example, in a notebook PC application, a dedicated
microcomputer asserts a Power Good signal for North Bridge™
and South Bridge™ ICs. The ADM1086 delays the south bridge’s
signal, so that it is enabled after the north bridge.
MICROCOMPUTER
5V
POWER_GOOD
Figure 29. Power Good Delay
3.3V
V
ENOUT EN
IN
ADM1086
ENIN CEXT
EN
NORTH
BRIDGE
SOUTH
BRIDGE
5V
IC
5V
IC
04591-PrG-034
04591-PrG-033
Rev. 0 | Page 13 of 16
Page 14
ADM1085/ADM1086/ADM1087/ADM1088
QUAD-SUPPLY POWER GOOD INDICATOR
The enable output of the simple sequencers is equivalent to an
AND function of V
voltage at V
IN
(ENIN) is high as well. Although ENIN is a digital input, it can
tolerate voltages as high as 22 V and can detect if a supply is
present. Therefore, a simple sequencer can monitor two supplies
and assert what can be interpreted as a Power Good signal
when both supplies are present. The outputs of two ADM1085s
can be wire-ANDed together to make a quad-supply Power
Good indicator.
and ENIN. ENOUT is high only when the
IN
is above the threshold and the enable input
3.3V
3.3V
SEQUENCING WITH FET SWITCHES
The open-drain outputs of the ADM1085 and ADM1087 can
drive external FET transistors, which can switch on powersupply rails. All that is needed is a pull-up resistor to a voltage
source that is high enough to turn on the FET.
12V
3.3V
V
ENOUT
IN
ADM1085
ENIN CEXT
9V
5V
2.5V
V
IN
ADM1085
ENIN
3.3V
V
IN
ENOUT
ENOUT
POWER_GOOD
2.5V
Figure 31. Sequencing with a FET Switch
04591-PrG-036
ADM1085
1.8V
Figure 30. Quad-Supply Power Good Indicator
ENIN
04591-PrG-035
Rev. 0 | Page 14 of 16
Page 15
ADM1085/ADM1086/ADM1087/ADM1088
OUTLINE DIMENSIONS
2.00 BSC
5 4
1.25 BSC
1.00
0.90
0.70
0.10 MAX
6
1
2
PIN 1
1.30 BSC
0.30
0.15
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203AB
Figure 32. 6-Lead Plastic Surface-Mount Package [SC70]
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Quantity Package Description
ADM1085AKS-REEL7
ADM1086AKS-REEL7
ADM1087AKS-REEL7
ADM1088AKS-REEL7
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
3k
3k
3k
3k
2.10 BSC
3
0.65 BSC
1.10 MAX
0.22
0.08
SEATING
PLANE
(KS-6)
6-Lead Thin Shrink Small Outline
Transistor Package (SC70)
6-Lead Thin Shrink Small Outline
Transistor Package (SC70)
6-Lead Thin Shrink Small Outline
Transistor Package (SC70)
6-Lead Thin Shrink Small Outline
Transistor Package (SC70)
0.46
8°
4°
0°
0.36
0.26
Package Option
Branding
KS-6 M0V
KS-6 M0W
KS-6 M0X
KS-6 M0Y
Rev. 0 | Page 15 of 16
Page 16
ADM1085/ADM1086/ADM1087/ADM1088
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04591–0–7/04(0)
Rev. 0 | Page 16 of 16
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