Page 1
Low Cost Microprocessor
a
FEATURES
Improved Replacement for MAX1617
On-Chip and Remote Temperature Sensing
No Calibration Necessary
1ⴗC Accuracy for On-Chip Sensor
3ⴗC Accuracy for Remote Sensor
Programmable Over/Under Temperature Limits
Programmable Conversion Rate
2-Wire SMBus Serial Interface
Supports System Management Bus (SMBus™) Alert
70 A Max Operating Current
3 A Standby Current
3 V to 5.5 V Supply
Small 16-Lead QSOP Package
APPLICATIONS
Desktop Computers
Notebook Computers
Smart Batteries
Industrial Controllers
Telecomms Equipment
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
System Temperature Monitor
ADM1021
PRODUCT DESCRIPTION
The ADM1021 is a two-channel digital thermometer and under/
over temperature alarm, intended for use in personal computers
and other systems requiring thermal monitoring and management. The device can measure the temperature of a microprocessor using a diode-connected PNP transistor, which may be
provided on-chip in the case of the Pentium
cessors, or can be a low cost discrete NPN/PNP device such as
the 2N3904/2N3906. A novel measurement technique cancels
out the absolute value of the transistor’s base emitter voltage, so
that no calibration is required. The second measurement channel measures the output of an on-chip temperature sensor, to
monitor the temperature of the device and its environment.
The ADM1021 communicates over a two-wire serial interface
compatible with SMBus
standards. Under and over temperature
limits can be programmed into the devices over the serial bus,
and an ALERT output signals when the on-chip or remote
temperature is out of range. This output can be used as an interrupt, or as an SMBus alert.
®
II or similar pro-
LOCAL TEMPERATURE
ON-CHIP TEMP.
SENSOR
D+
ANALOG MUX
D–
EXTERNAL DIODE OPEN-CIRCUIT
ADM1021
TEST
V
DD
SMBus is a trademark and Pentium is a registered trademark of Intel Corporation.
8-BIT A-TO-D
CONVERTER
BUSY RUN/STANDBY
NC GND NC NC TEST
VALUE REGISTER
REMOTE TEMPERATURE
VALUE REGISTER
GND
LOCAL TEMPERATURE
LOW LIMIT COMPARATOR
LOCAL TEMPERATURE
HIGH LIMIT COMPARATOR
REMOTE TEMPERATURE
LOW LIMIT COMPARATOR
REMOTE TEMPERATURE
HIGH LIMIT COMPARATOR
STATUS REGISTER
SDATA
SCLK ADD0 ADD1
SMBUS INTERFACE
ADDRESS POINTER
REGISTER
ONE-SHOT
REGISTER
CONVERSION RATE
REGISTER
LOCAL TEMPERATURE
LOW LIMIT REGISTER
LOCAL TEMPERATURE
HIGH LIMIT REGISTER
REMOTE TEMPERATURE
LOW LIMIT REGISTER
REMOTE TEMPERATURE
HIGH LIMIT REGISTER
CONFIGURATION
REGISTER
INTERRUPT
MASKING
STBY
ALERT
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1998
Page 2
ADM1021–SPECIFICATIONS
(TA = T
MIN
to T
, VDD = 3.0 V to 3.6 V, unless otherwise noted)
MAX
Parameter Min Typ Max Units Test Conditions/Comments
POWER SUPPLY AND ADC
Temperature Resolution 1 °C Guaranteed No Missed Codes
Temperature Error, Local Sensor ±1 °C
–3 +3 °C
Temperature Error, Remote Sensor –3 +3 °CT
= +60°C to +100°C
A
–5 +5 °C
Supply Voltage Range 3 3.6 V Note 1
Undervoltage Lockout Threshold 2.5 2.7 2.95 V V
Input, Disables ADC,
DD
Rising Edge
Undervoltage Lockout Hysteresis 25 mV
Power-On Reset Threshold 0.9 1.7 2.2 V V
, Falling Edge
DD
2
POR Threshold Hysteresis 50 mV
Standby Supply Current 3 10 µAV
= 3.3 V, No SMBus Activity
DD
4 µA SCLK at 10 kHz
Average Operating Supply Current 70 90 µA 0.25 Conversions/Sec Rate
Auto-Convert Mode, Averaged Over 4 Seconds 160 200 µA 2 Conversions/Sec Rate
Conversion Time 65 115 170 ms From Stop Bit to Conversion
Complete (Both Channels)
Remote Sensor Source Current D+ Forced to D– + 0.65 V
60 90 130 µA High Level
3.5 5.5 8 µA Low Level
D-Source Voltage 0.7 V
Address Pin Bias Current (ADD0, ADD1) 50 µA Momentary at Power-On Reset
SMBUS INTERFACE
Logic Input High Voltage, V
IH
2.2 V VDD = 3 V to 5.5 V
STBY, SCLK, SDATA
Logic Input Low Voltage, V
IL
0.8 V VDD = 3 V to 5.5 V
STBY, SCLK, SDATA
SMBus Output Low Sink Current 6 mA SDATA Forced to 0.6 V
ALERT Output Low Sink Current 1 mA ALERT Forced to 0.4 V
Logic Input Current, I
, I
IH
IL
–1 +1 µA
SMBus Input Capacitance, SCLK, SDATA 5 pF
SMBus Clock Frequency 0 100 kHz
SMBus Clock Low Time, t
SMBus Clock High Time, t
SMBus Start Condition Setup Time, t
LOW
HIGH
SU:STA
4.7 µst
4 µst
4.7 µs
Between 10% Points
LOW
Between 90% Points
HIGH
SMBus Repeat Start Condition 250 ns Between 90% and 90% Points
Setup Time, t
SMBus Start Condition Hold Time, t
SU:STA
HD:STA
4 µs Time from 10% of SDATA to
90% of SCLK
SMBus Stop Condition Setup Time, t
SU:STO
4 µs Time from 90% of SCLK to 10%
of SDATA
SMBus Data Valid to SCLK 250 ns Time from 10% or 90% of
Rising Edge Time, t
SU:DAT
SMBus Data Hold Time, t
SMBus Bus Free Time, t
BUF
HD:DAT
0 µs
4.7 µs Between Start/Stop Condition
SDATA to 10% of SCLK
SCLK Falling Edge to SDATA 1 µs Master Clocking in Data
Valid Time, t
NOTES
1
Operation at VDD = +5 V guaranteed by design, not production tested.
2
Guaranteed by design, not production tested.
Specifications subject to change without notice.
VD,DAT
–2–
REV. 0
Page 3
ADM1021
ABSOLUTE MAXIMUM RATINGS*
Positive Supply Voltage (VDD) to GND . . . . . . .–0.3 V to +6 V
D+, ADD0, ADD1 . . . . . . . . . . . . . . . . –0.3 V to V
+ 0.3 V
DD
D– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.6 V
SCLK, SDATA, ALERT, STBY . . . . . . . . . . . .–0.3 V to +6 V
Input Current, SDATA . . . . . . . . . . . . . . . . –1 mA to +50 mA
Input Current, D– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA
ESD Rating, all pins (Human Body Model) . . . . . . . . 2000 V
Continuous Power Dissipation
Up to +70°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW
Derating above +70°C . . . . . . . . . . . . . . . . . . . . 6.7 mW/°C
Operating Temperature Range . . . . . . . . . . –55°C to +125°C
Maximum Junction Temperature (T
max) . . . . . . . . . +150°C
J
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature, Soldering
Vapor Phase 60 sec . . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared 15 sec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +200°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS
16-Lead QSOP Package: θ
= 150°C/Watt.
JA
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
ADM1021ARQ 0°C to +85°C 16-Lead QSOP RQ-16
PROTOCOL
SCL
SDA
START
CONDITION
(S)
BIT 7
MSB
(A7)
t
LOWtHIGH
t
RtF
BIT 6
(A6)
1/f
SCL
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic Description
1, 16 TEST Test pin for factory use only. See
note.
2V
DD
Positive supply, +3 V to +5.5 V.
3 D+ Positive connection to remote tem-
perature sensor.
4 D– Negative connection to remote tem-
perature sensor.
5, 9, 13 NC No Connect.
6 ADD1 Three-state logic input, higher bit of
device address.
7, 8 GND Supply 0 V connection.
10 ADD0 Three-state logic input, lower bit of
device address.
11 ALERT Open-drain logic output used as
interrupt or SMBus alert.
12 SDATA Logic input/output, SMBus serial
data. Open-drain output.
14 SCLK Logic input, SMBus serial clock.
15 STBY Logic input selecting normal opera-
tion (high) or standby mode (low).
NOTE
Pins 1 and 16 are reserved for test purposes. Ideally these pins should be left
unconnected. If routing through these pins is required, then both should be at
the same potential (i.e., connected together).
PIN CONFIGURATION
1
TEST
2
V
DD
3
D+
4
D–
5
NC
6
ADD1
7
GND
8
GND
NC = NO CONNECT
ADM1021
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
TEST
STBY
SCLK
NC
SDATA
ALERT
ADD0
NC
BIT 0
ACKNOWLEDGE
PROTOCOL
SCL
SDA
LSB
(R/W)
(A)
Figure 1. Diagram for Serial Bus Timing
STOP
CONDITION
(P)
–3–REV. 0
Page 4
ADM1021–Typical Performance Characteristics
30
20
10
0
–10
–20
–30
TEMPERATURE ERROR – 8C
–40
–50
–60
1 1003.3
LEAKAGE RESISTANCE – MV
DXP TO GND
DXP TO VCC (5V)
10 30
Figure 2. Temperature Error vs. PC Board Track Resistance
6
5
4
250mV p-p REMOTE
3
2
1
TEMPERATURE ERROR – 8C
0
100mV p-p REMOTE
120
100
90
80
70
60
50
READING
40
30
20
10
0
0 11010
20 30 40 50
MEASURED TEMPERATURE
60 70 80 90 100
Figure 5. Pentium II Temperature Measurement vs.
ADM1021 Reading
25
20
15
10
5
TEMPERATURE ERROR – 8C
0
–1
50 50M500
5k
50k
FREQUENCY – Hz
500k 5M
Figure 3. Temperature Error vs. Power Supply Noise
Frequency
25
20
15
10
5
TEMPERATURE ERROR – 8C
0
–5
50 50M500
5k 50k 500k 5M
FREQUENCY – Hz
100mV p-p
50mV p-p
25mV p-p
Figure 4. Temperature Error vs. Common-Mode Noise
Frequency
–5
1102.2
3.2 4.7 7
DXP-DXN CAPACITANCE – nF
Figure 6. Temperature Error vs. Capacitance Between
D+ and D–
80
70
60
50
40
30
SUPPLY CURRENT – mA
20
10
0
0
5k 10k 25k 50k 75k 100k 250k 500k 750k
SCLK FREQUENCY – Hz
VCC = +5V
VCC = +3V
1M1k
Figure 7. Standby Supply Current vs. Clock Frequency
–4–
REV. 0
Page 5
10
9
8
TEMPERATURE ERROR – 8C
7
6
5
4
3
2
1
0
50 50M500
5k 50k 500k 5M
10mV SQ. WAVE
100k 25M
FREQUENCY – Hz
Figure 8. Temperature Error vs. Differential-Mode Noise
Frequency
200
180
160
140
120
100
80
60
SUPPLY CURRENT – mA
40
20
0
0.0625 80.125
0.25 0.5 1 2 4
CONVERSION RATE – Hz
ADM1021
–5–REV. 0
Page 6
ADM1021
IN 3 I I
BIAS
V
DD
D+
REMOTE
SENSING
TRANSISTOR
C1*
D–
CAPACITOR C1 IS OPTIONAL. IT IS ONLY NECESSARY IN NOISY ENVIRONMENTS.
*
C1 = 2.2nF TYPICAL, 3nF MAX.
BIAS
DIODE
Figure 12. Input Signal Conditioning
Figure 12 shows the input signal conditioning used to measure
the output of an external temperature sensor. This figure shows
the external sensor as a substrate transistor, provided for temperature monitoring on some microprocessors, but it could
equally well be a discrete transistor. If a discrete transistor is
used, the collector will not be grounded and should be linked to
the base. To prevent ground noise interfering with the measurement, the more negative terminal of the sensor is not referenced
to ground, but is biased above ground by an internal diode at
the D– input. If the sensor is operating in a noisy environment,
C1 may optionally be added as a noise filter. Its value is typically 2200 pF, but should be no more than 3000 pF. See the
section on layout considerations for more information on C1.
To measure ∆V
, the sensor is switched between operating
be
currents of I and N × I. The resulting waveform is passed through
a 65 kHz low-pass filter to remove noise, thence to a chopperstabilized amplifier that performs the functions of amplification
and rectification of the waveform to produce a dc voltage pro-
portional to ∆V
. This voltage is measured by the ADC to give
be
a temperature output in 8-bit twos complement format. To
further reduce the effects of noise, digital filtering is performed
by averaging the results of 16 measurement cycles.
Signal conditioning and measurement of the internal temperature sensor is performed in a similar manner.
TEMPERATURE DATA FORMAT
One LSB of the ADC corresponds to 1°C, so the ADC can
theoretically measure from –128°C to +127°C, although the
practical lowest value is limited to –65°C due to device maxi-
mum ratings. The temperature data format is shown in Table I.
The results of the local and remote temperature measurements
are stored in the local and remote temperature value registers,
and are compared with limits programmed into the local and
remote high and low limit registers.
V
OUT+
TO ADC
V
LOWPASS FILTER
f
= 65kHz
C
OUT–
Table I. Temperature Data Format
Temperature Digital Output
–128°C 1 000 0000
–125°C 1 000 0011
–100°C 1 001 1100
–75°C 1 011 0101
–50°C 1 100 1110
–25°C 1 110 0111
–1°C 1 111 1111
0°C 0 000 0000
+1°C 0 000 0001
+10°C 0 000 1010
+25°C 0 001 1001
+50°C 0 011 0010
+75°C 0 100 1011
+100°C 0 110 0100
+125°C 0 111 1101
+127°C 0 111 1111
REGISTERS
The ADM1021 contains nine registers that are used to store the
results of remote and local temperature measurements, high and
low temperature limits, and to configure and control the device.
A description of these registers follows, and further details are
given in Tables II to IV. It should be noted that the ADM1021’s
registers are dual port, and have different addresses for read and
write operations. Attempting to write to a read address, or to
read from a write address, will produce an invalid result. Register addresses above 0Fh are reserved for future use or used for
factory test purposes and should not be written to.
Address Pointer Register
The Address Pointer Register itself does not have, nor does it
require, an address, as it is the register to which the first data
byte of every Write operation is written automatically. This data
byte is an address pointer that sets up one of the other registers
for the second byte of the Write operation, or for a subsequent
read operation.
–6–
REV. 0
Page 7
ADM1021
The power-on default value of the Address Pointer Register is
00h, so if a read operation is performed immediately after power
on, without first writing to the Address Pointer, the value of the
local temperature will be returned, since its register address is
00h.
Value Registers
The ADM1021 has two registers to store the results of Local
and Remote temperature measurements. These registers are
written to by the ADC and can only be read over the SMBus.
Status Register
Bit 7 of the Status Register indicates that the ADC is busy converting when it is high. Bits 5 to 3 are flags that indicate the
results of the limit comparisons.
If the local and/or remote temperature measurement is above
the corresponding high temperature limit or below the corresponding low temperature limit, then one or more of these flags
will be set. Bit 2 is a flag that is set if the remote temperature
sensor is open-circuit. These five flags are NOR’d together, so
that if any of them is high, the ALERT interrupt latch will be set
and the ALERT output will go low. Reading the Status Register
will clear the five flag bits, provided the error conditions that
caused the flags to be set have gone away. While a limit comparator is tripped due to a value register containing an out-oflimit measurement, or the sensor is open-circuit, the corresponding
flag bit cannot be reset. A flag bit can only be reset if the corresponding value register contains an in-limit measurement, or the
sensor is good.
The ALERT interrupt latch is not reset by reading the Status
Register, but will be reset when the ALERT output has been
serviced by the master reading the device address, provided the
error condition has gone away and the Status Register flag bits
have been reset.
Table II. Status Register Bit Assignments
Bit Name Function
7 BUSY 1 When ADC Converting.
6 LHIGH* 1 When Local High Temp Limit Tripped.
5 LLOW* 1 When Local Low Temp Limit Tripped.
4 RHIGH* 1 When Remote High Temp Limit Tripped.
3 RLOW* 1 When Remote Low Temp Limit Tripped.
2 OPEN* 1 When Remote Sensor Open-Circuit.
1–0 Reserved.
*These flags stay high until the status register is read or they are reset by POR.
Configuration Register
Two bits of the configuration register are used. If Bit 6 is 0,
which is the power-on default, the device is in operating mode
with the ADC converting. If Bit 6 is set to 1, the device is in
standby mode and the ADC does not convert. Standby mode
can also be selected by taking the STBY pin low.
Bit 7 of the configuration register is used to mask the ALERT
output. If Bit 7 is 0, which is the power-on default, the ALERT
output is enabled. If Bit 7 is set to 1, the ALERT output is
disabled.
Table III. List of ADM1021 Registers
READ Address (Hex) WRITE Address (Hex) Name Power-On Default
Not Applicable Not Applicable Address Pointer Undefined
00 Not Applicable Local Temp. Value 0000 0000 (00h)
01 Not Applicable Remote Temp. Value 0000 0000 (00h)
02 Not Applicable Status Undefined
03 09 Configuration 0000 0000 (00h)
04 0A Conversion Rate 0000 0010 (02h)
05 0B Local Temp. High Limit 0111 1111 (7Fh) (+127°C)
06 0C Local Temp. Low Limit 1100 1001 (C9h) (–55°C)
07 0D Remote Temp. High Limit 0111 1111 (7Fh) (+127°C)
08 0E Remote Temp. Low Limit 1100 1001 (C9h) (–55°C)
Not Applicable 0F
10 Not Applicable Reserved Undefined
11 13 Reserved Undefined
12 14 Reserved Undefined
15 16 Reserved 1000 0000
17 18 Reserved Undefined
19 Not Applicable Reserved 0000 0000
1
One-Shot
2
2
2
2
2
2
20 21 Reserved Undefined
FE Not Applicable Manufacturer Device ID 0100 0001 (41h)
FF Not Applicable Die Revision Code Undefined
NOTES
1
Writing to address 0F causes the ADM1021 to perform a single measurement. It is not a data register as such and it does not matter what data is written to it.
2
These registers are reserved for future versions of the device.
–7–REV. 0
Page 8
ADM1021
Table IV. Configuration Register Bit Assignments
Power-On
Bit Name Function Default
7 MASK1 0 = ALERT Enabled 0
1 = ALERT Masked
6 RUN/STOP 0 = Run 0
1 = Standby
5-0 Reserved 0
Conversion Rate Register
The lowest three bits of this register are used to program the
conversion rate by dividing the ADC clock by 1, 2, 4, 8, 16, 32,
64 or 128, to give conversion times from 125 ms (Code 07h) to
16 seconds (Code 00h). This register can be written to and read
back over the SMBus. The higher five bits of this register are
unused and must be set to zero. Use of slower conversion times
greatly reduces the device power consumption, as shown in
Table V.
Table V. Conversion Rate Register Codes
Average Supply Current
Data Conversion/sec A Typ at VCC = 3.3 V
00h 0.0625 42
01h 0.125 42
02h 0.25 42
03h 0.5 48
04h 1 60
05h 2 82
06h 4 118
07h 8 170
08h to FFh Reserved
Limit Registers
The ADM1021 has four limit registers to store local and remote, high and low temperature limits. These registers can be
written to and read back, over the SMBus. The high limit registers perform a > comparison while the low limit registers perform a < comparison. For example, if the high limit register is
programmed as a limit of 80°C, measuring 81°C will result in
an alarm condition.
One-Shot Register
The one-shot register is used to initiate a single conversion and
comparison cycle when the ADM1021 is in standby mode, after
which the device returns to standby. This is not a data register
as such and it is the write operation that causes the one-shot
conversion. The data written to this address is irrelevant and is
not stored.
SERIAL BUS INTERFACE
Control of the ADM1021 is carried out via the serial bus. The
ADM1021 is connected to this bus as a slave device, under the
control of a master device, e.g., the PIIX4.
ADDRESS PINS
In general, every SMBus device has a 7-bit device address
(except for some devices that have extended, 10-bit addresses).
When the master device sends a device address over the bus, the
slave device with that address will respond. The ADM1021 has
two address pins, ADD0 and ADD1, to allow selection of the
device address, so that several ADM1021s can be used on the
same bus, and/or to avoid conflict with other devices. Although
only two address pins are provided, these are three-state, and
can be grounded, left unconnected, or tied to V
, so that a
DD
total of nine different addresses are possible, as shown in Table VI.
It should be noted that the state of the address pins is only sampled
at power-up, so changing them after power-up will have no effect.
Table VI. Device Addresses
ADD0 ADD1 Device Address
0 0 0011 000
0 NC 0011 001
0 1 0011 010
NC 0 0101 001
NC NC 0101 010
NC 1 0101 011
1 0 1001 100
1 NC 1001 101
1 1 1001 110
Note: ADD0, ADD1 sampled at power-up only.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a START
condition, defined as a high-to-low transition on the serial
data line SDATA, while the serial clock line SCLK remains
high. This indicates that an address/data stream will follow.
All slave peripherals connected to the serial bus respond to
the START condition and shift in the next eight bits, consisting of a 7-bit address (MSB first) plus an R/W bit, which
determines the direction of the data transfer, i.e., whether
data will be written to or read from the slave device.
The peripheral whose address corresponds to the transmitted
address responds by pulling the data line low during the low
period before the ninth clock pulse, known as the Acknowledge Bit. All other devices on the bus now remain idle while
the selected device waits for data to be read from or written
to it. If the R/W bit is a 0, then the master will write to the
slave device. If the R/W bit is a 1, the master will read from
the slave device.
2. Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an Acknowledge Bit
from the slave device. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, as a low-to-high transition
when the clock is high may be interpreted as a STOP signal.
The number of data bytes that can be transmitted over the
serial bus in a single READ or WRITE operation is limited
only by what the master and slave devices can handle.
3. When all data bytes have been read or written, stop conditions are established. In WRITE mode, the master will pull
the data line high during the 10th clock pulse to assert a
STOP condition. In READ mode, the master device will
override the acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse. This is
known as No Acknowledge. The master will then take the
data line low during the low period before the 10th clock
pulse, then high during the 10th clock pulse to assert a STOP
condition.
–8–
REV. 0
Page 9
ADM1021
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADM1021, write operations contain either
one or two bytes, while read operations contain one byte and
perform the following functions:
To write data to one of the device data registers or read data
from it, the Address Pointer Register must be set so that the
correct data register is addressed, then data can be written into
that register or read from it. The first byte of a write operation
always contains a valid address that is stored in the Address
Pointer Register. If data is to be written to the device, the write
operation contains a second data byte that is written to the
register selected by the address pointer register.
This is illustrated in Figure 13. The device address is sent over
the bus followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the Address Pointer
Register. The second data byte is the data to be written to the
internal data register.
When reading data from a register there are two possibilities:
1. If the ADM1021’s Address Pointer Register value is unknown
or not the desired value, it is first necessary to set it to the
correct value before data can be read from the desired data
register. This is done by performing a write to the ADM1021
as before, but only the data byte containing the register read
address is sent, as data is not to be written to the register.
This is shown in Figure 14.
A read operation is then performed consisting of the serial
bus address, R/W bit set to 1, followed by the data byte read
from the data register. This is shown in Figure 15.
2. If the Address Pointer Register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the Address Pointer
Register, so Figure 14 can be omitted.
NOTES
1. Although it is possible to read a data byte from a data register
without first writing to the Address Pointer Register, if the
Address Pointer Register is already at the correct value, it is
not possible to write data to a register without writing to the
Address Pointer Register, because the first data byte of a
write is always written to the Address Pointer Register.
2. Don’t forget that the ADM1021 registers have different
addresses for read and write operations. The write address of
a register must be written to the Address Pointer if data is to
be written to that register, but it is not possible to read data
from that address. The read address of a register must be
written to the Address Pointer before data can be read from
that register.
D0
9
9
ACK. BY
ADM1021
STOP BY
MASTER
SCLK
SDATA
START BY
MASTER
191
A6
A5 A4 A3 A2 A1 A0 D7
FRAME 1
SERIAL BUS ADDRESS BYTE
SCL (CONTINUED)
SDA (CONTINUED)
R/W
ACK. BY
ADM1021
1
D7 D6
D6
D5 D4 D3 D2 D1
ADDRESS POINTER REGISTER BYTE
D5 D4 D3 D2 D1
FRAME 2
FRAME 3
DATA BYTE
D0
ACK. BY
ADM1021
Figure 13. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
191
SCLK
SDATA A5 A4
START BY
MASTER
A6
SERIAL BUS ADDRESS BYTE
A3 A2
FRAME 1
A1 A0
R/W
ACK. BY
ADM1021
D7 D6
D4
D5
ADDRESS POINTER REGISTER BYTE
FRAME 2
D3
D2
D1
D0
9
ACK. BY
ADM1021
STOP BY
MASTER
Figure 14. Writing to the Address Pointer Register Only
–9–REV. 0
Page 10
ADM1021
19
SCLK
A6
SDATA
START BY
MASTER
A5 A4 A3 A2 A1 A0 D7
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
ACK. BY
ADM1021
Figure 15. Reading Data from a Previously Selected Register
ALERT OUTPUT
The ALERT output goes low whenever an out-of limit measurement is detected, or if the remote temperature sensor is opencircuit. It is an open-drain and requires a 10 kΩ pull-up to V
DD
.
Several ALERT outputs can be wire-ANDED together, so that
the common line will go low if one or more of the ALERT outputs goes low.
The ALERT output can be used as an interrupt signal to a
processor, or it may be used as an SMBALERT. Slave devices
on the SMBus can normally not signal to the master that they
want to talk, but the SMBALERT function allows them to do
so.
One or more ALERT outputs are connected to a common
SMBALERT line connected to the master. When the SMBALERT
line is pulled low by one of the devices, the following procedure
occurs as illustrated in Figure 16.
MASTER
RECEIVES
SMBALERT
START ALERT RESPONSE ADDRESSRDACK DEVICE ADDRESS STOP
MASTER SENDS
ARA AND READ
COMMAND
Figure 16. Use of
DEVICE SENDS
ITS ADDRESS
SMBALERT
NO
ACK
1. SMBALERT pulled low.
2. Master initiates a read operation and sends the Alert Response Address (ARA = 0001 100). This is a general call
address that must not be used as a specific device address.
3. The device whose ALERT output is low responds to the
Alert Response Address and the master reads its device address. The address of the device is now known and it can be
interrogated in the usual way.
4. If more than one device’s ALERT output is low, the one with
the lowest device address, will have priority, in accordance
with normal SMBus arbitration.
5. Once the ADM1021 has responded to the Alert Response
Address, it will reset its ALERT output, provided that the
error condition that caused the ALERT no longer exists. If
the SMBALERT line remains low, the master will send
ARA again, and so on until all devices whose ALERT outputs were low have responded.
1
D6
D5
D4 D3
DATA BYTE FROM ADM1021
FRAME 2
D2
D1 D0
9
NO ACK.
BY MASTER
STOP BY
MASTER
LOW POWER STANDBY MODES
The ADM1021 can be put into a low power standby mode
using hardware or software, that is by taking the STBY input
low, or by setting Bit 6 of the Configuration Register. When
STBY is high, or Bit 6 is low, the ADM1021 operates normally.
When STBY is pulled low or Bit 6 is high, the ADC is inhibited,
any conversion in progress is terminated without writing the
result to the corresponding value register.
The SMBus is still enabled. Power consumption in the standby
mode is reduced to less than 10 µA if there is no SMBus activity, or 100 µA if there are clock and data signals on the bus.
These two modes are similar but not identical. When STBY is
low, conversions are completely inhibited. When Bit 6 is set but
STBY is high, a one-shot conversion of both channels can be
initiated by writing XXh to the One-Shot Register (address 0Fh).
SENSOR FAULT DETECTION
The ADM1021 has a fault detector at the D+ input that detects
if the external sensor diode is open-circuit. This is a simple
voltage comparator that trips if the voltage at D+ exceeds V
CC
–
1 V (typical). The output of this comparator is checked when a
conversion is initiated, and sets Bit 2 of the Status Register if a
fault is detected.
If the remote sensor voltage falls below the normal measuring
range, for example due to the diode being short-circuited, the
ADC will output –128°C (1000 0000). Since the normal operating temperature range of the device only extends down to –55°C,
this output code should never be seen in normal operation, so it
can be interpreted as a fault condition. Since it will be outside
the power-on default low temperature limit (–55°C) and any
low limit that would normally be programmed, a short-circuit
sensor will cause an SMBus alert.
In this respect, the ADM1021 differs from and improves upon
competitive devices that output zero if the external sensor goes
short-circuit. These devices can misinterpret a genuine 0°C
measurement as a fault condition.
If the external diode channel is not being used and it is shorted
out, then the resulting ALERT may be cleared by writing 80h
(–128°C) to the low limit register.
–10–
REV. 0
Page 11
ADM1021
APPLICATIONS INFORMATION
FACTORS AFFECTING ACCURACY
Remote Sensing Diode
The ADM1021 is designed to work with substrate transistors
built into processors, or with discrete transistors. Substrate
transistors will generally be PNP types with the collector connected to the substrate. Discrete types can be either PNP or
NPN, connected as a diode (base shorted to collector). If an
NPN transistor is used then the collector and base are connected to D+ and the emitter to D–. If a PNP transistor is used
then the collector and base are connected to D– and the emitter
to D+.
The user has no choice in the case of substrate transistors, but if
a discrete transistor is used the best accuracy will be obtained by
choosing devices according to the following criteria:
1. Base-emitter voltage greater than 0.25 V at 6 µA, at the high-
est operating temperature.
2. Base-emitter voltage less than 0.95 V at 100 µA, at the lowest
operating temperature.
3. Base resistance less than 100 Ω.
4. Small variation in h
control of V
be
Transistors such as 2N3904, 2N3906 or equivalents in SOT-23
package are suitable devices to use.
Thermal Inertia and Self-Heating
Accuracy depends on the temperature of the remote-sensing
diode and/or the internal temperature sensor being at the same
temperature as that being measured, and a number of factors
can affect this. Ideally, the sensor should be in good thermal
contact with the part of the system being measured, for example
the processor. If it is not, the thermal inertia caused by the mass
of the sensor will cause a lag in the response of the sensor to a
temperature change. In the case of the remote sensor this should
not be a problem, as it will be either a substrate transistor in the
processor or a small package device such as SOT-23 placed in
close proximity to it.
The on-chip sensor, however, will often be remote from the
processor and will only be monitoring the general ambient temperature around the package. The thermal time constant of the
QSOP-16 package is about 10 seconds.
In practice, the package will have electrical, and hence thermal,
connection to the printed circuit board, so the temperature rise
due to self-heating will be negligible.
LAYOUT CONSIDERATIONS
Digital boards can be electrically noisy environments, and the
ADM1021 is measuring very small voltages from the remote
sensor, so care must be taken to minimize noise induced at the
sensor inputs. The following precautions should be taken:
1. Place the ADM1021 as close as possible to the remote sensing diode. Provided that the worst noise sources such as
clock generators, data/address buses and CRTs are avoided,
this distance can be four to eight inches.
(say 50 to 150) which indicates tight
fe
characteristics.
2. Route the D+ and D– tracks close together, in parallel, with
grounded guard tracks on each side. Provide a ground plane
under the tracks if possible.
3. Use wide tracks to minimize inductance and reduce noise
pickup. 10 mil track minimum width and spacing is recommended.
GND
D+
D-
GND
10 mil.
10 mil.
10 mil.
10 mil.
10 mil.
10 mil.
10 mil.
Figure 17. Arrangement of Signal Tracks
4. Try to minimize the number of copper/solder joints, which
can cause thermocouple effects. Where copper/solder joints
are used, make sure that they are in both the D+ and D–
path and at the same temperature.
Thermocouple effects should not be a major problem as 1°C
corresponds to about 240 µV, and thermocouple voltages are
about 3 µV/°C of temperature difference. Unless there are
two thermocouples with a big temperature differential between them, thermocouple voltages should be much less
than 240 µV.
5. Place a 0.1 µF bypass capacitor close to the V
pin and
DD
2200 pF input filter capacitors across D+, D– close to the
ADM1021.
6. If the distance to the remote sensor is more than eight inches,
the use of twisted pair cable is recommended. This will work
up to about 6 to 12 feet.
7. For really long distances (up to 100 feet), use shielded twisted
pair such as Belden #8451 microphone cable. Connect the
twisted pair to D+ and D– and the shield to GND close to
the ADM1021. Leave the remote end of the shield unconnected to avoid ground loops.
Because the measurement technique uses switched current
sources, excessive cable and/or filter capacitance can affect the
measurement. When using long cables, the filter capacitor may
be reduced or removed.
Cable resistance can also introduce errors. 1 Ω series resistance
introduces about 0.5°C error.
–11–REV. 0
Page 12
ADM1021
V
DD
STBY
SCLK
SDATA
ALERT
ADD0
ADD1
GND
D+
D–
0.1mF
ALL 10kV
3.3V
TO PIIX4
CHIP
SET TO REQUIRED
ADDRESS
IN
OUT
I/O
C1*
SHIELD
2N3904
*C1 IS OPTIONAL
ADM1021
APPLICATION CIRCUITS
Figure 18 shows a typical application circuit for the ADM1021,
using a discrete sensor transistor connected via a shielded,
twisted pair cable. The pull-ups on SCLK, SDATA and ALERT
are required only if they are not already provided elsewhere in
the system.
The SCLK, and SDATA pins of the ADM1021 can be interfaced directly to the SMBus of an I/O controller such as the
Intel PCI ISA IDE Xcelerator (PIIX4) chip type 82371AB.
Figure 19 shows how the ADM1021 might be integrated into a
system using this type of I/O controller.
Figure 18. Typical ADM1021 Application Circuit
C3354–3–7/98
HOST BUS
SECOND LEVEL
CACHE
PCI BUS (3.3V OR 5V 30/33MHz)
CD ROM
HARD
DISK
HARD
DISK
BMI IDE
ULTRA DMA/33
ISA/EIO BUS
(3.3V, 5V TOLERANT)
PROCESSOR
8237 1AB
(PIIX4)
BUILT-IN
SENSOR
HOST-TO-PCI
BRIDGE
MAIN MEMORY
(DRAM)
MAIN MEMORY
(DRAM)
PCI SLOTS
D– D+
ADM1021
USB PORT 1
USB PORT 2
GPI[I,O] (30+)
SMBUS
ALERT
SCLK SDATA
AUDIO
Figure 19. Typical System Using ADM1021
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
KEYBOARD
SERIAL PORT
PARALLEL PORT
FLOPPY DISK
CONTROLLER
INFRARED
BIOS
0.157 (3.99)
0.150 (3.81)
0.010 (0.25)
0.004 (0.10)
16-Lead Shrink Small Outline Package
(RQ-16)
0.197 (5.00)
0.189 (4.80)
9
8
0.069 (1.75)
0.053 (1.35)
0.012 (0.30)
0.008 (0.20)
0.244 (6.20)
0.228 (5.79)
SEATING
PLANE
0.010 (0.20)
0.007 (0.18)
0.059 (1.50)
MAX
16
1
PIN 1
0.025
(0.64)
BSC
–12–
PRINTED IN U.S.A.
88
08
0.050 (1.27)
0.016 (0.41)
REV. 0
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