Operation from 1800 MHz to 2700 MHz
Gain of 24.3 dB at 2140 MHz
OIP3 of 45.5 dBm at 2140 MHz
P1dB of 30.8 dBm at 2140 MHz
Noise figure of 4.7 dB at 2140 MHz
Power supply: 5 V
Power supply current: 362 mA typical
Internal active biasing
Fast power-up/power-down function
Compact 4 mm × 4 mm, 16-lead LFCSP
ESD rating of ±1 kV (Class 1C)
Pin-compatible with the ADL5605 (700 MHz to 1000 MHz)
APPLICATIONS
Wireless infrastructure
Automated test equipment
ISM/AMR applications
GENERAL DESCRIPTION
The ADL5606 is a broadband, two-stage, 1 W RF driver
amplifier that operates over a frequency range of 1800 MHz
to 2700 MHz. The device can be used in a wide variety of
wired and wireless applications, including ISM, MC-GSM,
W-CDMA, TD-SCDMA, and LTE.
The ADL5606 operates on a 5 V supply voltage and a supply
current of 362 mA. The driver also incorporates a fast powerup/power-down function for TDD applications, applications
that require a power saving mode, and applications that
intermittently transmit data.
The ADL5606 is fabricated on a GaAs HBT process and is
packaged in a compact 4 mm × 4 mm, 16-lead LFCSP that
uses an exposed paddle for excellent thermal impedance. The
ADL5606 operates from −40°C to +85°C. A fully populated
evaluation board tuned to 2140 MHz is also available.
1 W RF Driver Amplifier
FUNCTIONAL BLOCK DIAGRAM
NC
NC
NC
NC
14
13
15
16
1RFIN
PWDN
2DISABLE
3VCC
4VBIAS
0
–10
–20
–30
–40
ACPR (dBc)
–50
–60
–70
–80
0 2 4 6 8 10121416182022
Figure 2. ACPR vs. Output Power, 3GPP, TM1-64, at 2140 MHz
VBIAS
ADL5606
5
6
NC
NC
Figure 1.
2140 MHz
P
OUT
7
NC
(dBm)
8
NC
ADL5606
12 RFOUT
11 RFOUT
10 RFOUT
9RFOUT
09968-001
09968-002
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VCC1 is the supply to the DUT through the RFOUT pins.
S11 S21 S12 S22
Rev. 0 | Page 5 of 20
Page 6
ADL5606
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, VCC11 6.5 V
Input Power (50 Ω Impedance) 18 dBm
Internal Power Dissipation (Paddle Soldered) 3.5 W
Maximum Junction Temperature 150°C
Lead Temperature (Soldering 60 sec) 240°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
1
VCC1 is the supply to the DUT through the RFOUT pins.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Tabl e 4 lists the junction-to-air thermal resistance (θJA) and the
junction-to-paddle thermal resistance (θ
) for the ADL5606.
JC
For more information, see the Thermal Considerations section.
Table 4. Thermal Resistance
Package Type θJA θ
Unit
JC
16-Lead LFCSP (CP-16-10) 52.9 12.9 °C/W
ESD CAUTION
Rev. 0 | Page 6 of 20
Page 7
ADL5606
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
NC
NC
NC
14
13
15
16
PIN 1
INDICATOR
1RF IN
2DISABLE
ADL5606
3VCC
TOP VIEW
(Not to Scale)
4VBIAS
5
6
NC
NC
NOTES
1. THE EXPOSED PADDLE SHOULD BE SOLDERED
TO A LOW IMPEDANCE EL ECTRICAL AND T HERMAL
GROUND PLANE.
2. NC = NO CONNEC T. DO NOT CONNECT TO THIS PIN.
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 RFIN RF Input. Requires a dc blocking capacitor.
2 DISABLE
Connect this pin to 5 V to disable the part. In the disabled state, the part draws approximately 4 mA
of current from the power supply and 1.4 mA from the DISABLE pin.
3 VCC
Under normal operation, this pin is connected to the power supply and draws a combined 362 mA
of current. When this pin is grounded along with the VBIAS pin, the device is disabled and draws
approximately 1.4 mA from the DISABLE pin.
4 VBIAS Applying 5 V to this pin enables the bias circuit. When this pin is grounded, the device is disabled.
5, 6, 7, 8, 13,
NC No Connect. Do not connect to this pin.
14, 15, 16
9, 10, 11, 12 RFOUT
RF Output. DC bias is provided to this pin through an inductor that is connected to the 5 V power
supply. The RF path requires a dc blocking capacitor.
EP The exposed paddle should be soldered to a low impedance electrical and thermal ground plane.
7
NC
8
NC
12 RFOUT
11 R FOUT
10 RFOUT
9RFOUT
09968-003
Rev. 0 | Page 7 of 20
Page 8
ADL5606
TYPICAL PERFORMANCE CHARACTERISTICS
1960 MHZ FREQUENCY TUNING BAND
50
45
40
35
30
25
20
15
10
5
NOISE FIGURE, GAIN, P1dB, OIP3 (dB, dBm)
0
19301990
19401950196019701980
OIP3 (dBm)
P1dB (dBm)
GAIN (dB)
NF (dB)
FREQUENCY (MHz)
Figure 4. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
(OIP3 at P
= 14 dBm per Tone)
OUT
46
44
42
40
38
36
34
P1dB (dBm)
32
30
28
26
1930194019501960197019801990
09968-004
+25°C
+85°C
–40°C
+25°C
–40°C
+85°C
FREQUENCY (MHz )
Figure 7. P1dB and OIP3 vs. Frequency and Temperature
(OIP3 at P
= 14 dBm per Tone)
OUT
50
48
46
44
42
40
38
OIP3 (dBm)
36
34
32
30
09968-007
26.5
26.0
25.5
25.0
24.5
GAIN (dB)
24.0
23.5
23.0
22.5
1930194019501960197019801990
–40°C
+25°C
+85°C
FREQUENCY (MHz )
Figure 5. Gain vs. Frequency and Temperature
0
S22
–10
–20
–30
–40
S-PARAMETERS ( dB)
–50
S11
S12
48
1930MHz
1960MHz
47
1990MHz
46
45
44
OIP3 (dBm)
43
42
41
40
–505101520
09968-005
Figure 8. OIP3 vs. P
7
6
5
NOISE FIGURE (dB)
4
P
PER TONE (d Bm)
OUT
OUT
+85°C
+25°C
–40°C
09968-008
and Frequency
–60
19301990
19401950196019701980
FREQUENCY (MHz )
Figure 6. Input Return Loss (S11), Output Return Loss (S22),
and Reverse Isolation (S12) vs. Frequency
09968-006
Rev. 0 | Page 8 of 20
3
19401950196019701980
19301990
FREQUENCY (MHz )
Figure 9. Noise Figure vs. Frequency and Temperature
09968-009
Page 9
ADL5606
2140 MHZ FREQUENCY TUNING BAND
60
50
40
30
20
10
NOISE FIGURE, GAIN, P1dB, OIP3 (dB, dBm)
0
21202130214021502160
21102170
OIP3 (dBm)
P1dB (dBm)
GAIN (dB)
NF (dB)
FREQUENCY (MHz)
Figure 10. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
(OIP3 at P
= 14 dBm per Tone)
OUT
46
44
42
40
38
36
34
P1dB (dBm)
32
30
28
26
2110212021302140215021602170
09968-010
FREQUENCY (MHz)
+25°C
+25°C
–40°C
+85°C
–40°C
+85°C
Figure 13. P1dB and OIP3 vs. Frequency and Temperature
(OIP3 at P
= 14 dBm per Tone)
OUT
50
48
46
44
42
40
38
OIP3 (dBm)
36
34
32
30
09968-013
28
27
26
25
24
GAIN (dB)
23
22
21
20
2110212021302140215021602170
–40°C
+25°C
+85°C
FREQUENCY (MHz )
Figure 11. Gain vs. Frequency and Temperature
0
–10
–20
–30
S22
S11
50
48
46
44
42
40
38
OIP3 (dBm)
36
34
32
30
09968-011
2110MHz
2140MHz
2170MHz
–505101520
Figure 14. OIP3 vs. P
7
6
5
P
PER TONE (d Bm)
OUT
and Frequency
OUT
+85°C
+25°C
09968-014
–40
S-PARAMETERS (d B)
–50
–60
21102170
21202130214021502160
FREQUENCY (MHz )
Figure 12. Input Return Loss (S11), Output Return Loss (S22),
and Reverse Isolation (S12) vs. Frequency
S12
09968-012
Rev. 0 | Page 9 of 20
NOISE FIGURE (dB)
4
3
21202130214021502160
21102170
FREQUENCY (MHz )
–40°C
Figure 15. Noise Figure vs. Frequency and Temperature
09968-015
Page 10
ADL5606
2630 MHZ FREQUENCY TUNING BAND
60
50
40
30
20
10
NOISE FIGURE, GAIN, P1dB, OIP3 (dB, dBm)
0
25702690
2590261026302650
OIP3 (dBm)
P1dB (dBm)
GAIN (dB)
NF (dB)
2670
FREQUENCY ( MHz)
Figure 16. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
(OIP3 at P
= 14 dBm per Tone)
OUT
09968-016
52
49
46
43
40
37
34
P1dB (dBm)
31
28
25
22
2570259026102630265026702690
+25°C
+25°C
–40°C
+85°C
–40°C
+85°C
FREQUENCY ( MHz)
Figure 19. P1dB and OIP3 vs. Frequency and Temperature
(OIP3 at P
= 14 dBm per Tone)
OUT
54
51
48
45
42
39
36
OIP3 (dBm)
33
30
27
24
09968-019
23.0
22.5
22.0
21.5
21.0
20.5
20.0
19.5
GAIN (dB)
19.0
18.5
18.0
17.5
17.0
25702690
2590261026302650
FREQUENCY ( MHz)
–40°C
+25°C
+85°C
2670
Figure 17. Gain vs. Frequency and Temperature
0
–10
–20
–30
–40
S-PARAMETERS (dB)
–50
S22
S11
S12
49
47
45
43
41
OIP3 (dBm)
39
37
2570MHz
2630MHz
2690MHz
35
09968-017
–520
7
6
5
NOISE FIGURE (dB)
4
051015
P
PER TONE (dBm)
OUT
Figure 20. OIP3 vs. P
and Frequency
OUT
+85°C
+25°C
–40°C
09968-020
–60
25702690
2590261026302650
FREQUENCY ( MHz)
Figure 18. Input Return Loss (S11), Output Return Loss (S22),
and Reverse Isolation (S12) vs. Frequency
2670
09968-018
Rev. 0 | Page 10 of 20
3
2590261026302650
25702690
FREQUENCY ( MHz)
2670
Figure 21. Noise Figure vs. Frequency and Temperature
Figure 28. Supply Current vs. Temperature and Supply Voltage at 2140 MHz
3
3
2
CH3 1V Ω
CH2 1V Ω
M20ns 10GS/ sIT 4ps/p t
A CH2 2.5V
Figure 30. Turn-On Time, 10% of Control Pulse to 90% of RFOUT
9968-030
2
CH3 1V Ω
CH2 1V Ω
M20ns 10GS/ sIT 4ps/p t
A CH2 2.5V
Figure 29. Turn-Off Time, 10% of Control Pulse to 90% of RFOUT
9968-029
Rev. 0 | Page 12 of 20
Page 13
ADL5606
APPLICATIONS INFORMATION
BASIC LAYOUT CONNECTIONS
The basic connections for operating the ADL5606 are shown
in Figure 31. The RF matching components correspond to the
2140 MHz frequency tuning band.
Power Supply
The voltage supply for the ADL5606, which ranges from 4.75 V
to 5.25 V, should be connected to the VCC1 test pin. The dc bias
to the output stage is supplied through L1 and is connected to
the RFOUT pin. Three decoupling capacitors (C7, C8, and C9)
are used to prevent RF signals from propagating on the dc lines.
The VBIAS and VCC pins can be directly connected to the main
supply voltage. Additional decoupling capacitors (C5, C6, and
C11) are required on the VCC pin.
RF Input Interface
Pin 1 is the RF input pin for the ADL5606. The RF input is easily
matched with one capacitor, in a series or shunt configuration,
and a microstrip line used as an inductor. For the 1960 MHz and
2140 MHz frequency tuning bands, a shunt capacitor is used to
match the input to 50 Ω; for the 2630 MHz frequency tuning
band, a series capacitor is used.
For complete information about component values and spacing
for the different frequency tuning bands, see the ADL5606
Matching section.
RF Output Interface
Pin 9 to Pin 12 are the RF output pins. The RF output requires
only one shunt capacitor and a microstrip line used as an inductor
to match to 50 Ω. For complete information about component
values and spacing for the different frequency tuning bands, see
the ADL5606 Matching section.
Power-Down
The ADL5606 can be disabled by connecting the DISABLE pin
to 5 V. When disabled, the ADL5606 draws approximately 4 mA
of current from the power supply and 1.4 mA from the DISABLE
pin. Decoupling Capacitor C3 is recommended to prevent the
propagation of RF signals. To completely shut down the device,
connect the VCC pin, the VBIAS pin, and the VCC1 test pin to
ground. In this state, the part draws approximately 1.4 mA from
the DISABLE pin.
RFIN
DISABLE
VCC
C11
10µF
C1
20pF
C6
0.01µF
C3
10pF
C
IN
1.3pF
C5
100pF
NC NC NC NC
1
RFIN
DISABLE
2
ADL5606
VCC
3
VBIAS
4
NC NC NC NC
13
RFOUT
RFOUT
RFOUT
RFOUT
8147156165
12
11
10
9
VCC1
L1
18nH
C7
100pF
C8
0.01µF
C9
10µF
C
OUT
3.9pF
C2
20pF
RFOUT
09968-031
Figure 31. Basic Connections
Rev. 0 | Page 13 of 20
Page 14
ADL5606
ADL5606 MATCHING
The RF input and output of the ADL5606 can be easily matched
to 50 Ω with at most one external component and the microstrip line used as an inductor. Tab le 6 lists the required matching
component values. Capacitors C
series (0402 size).
For all frequency tuning bands, the placement of C
is critical. Table 7 lists the recommended component spacing
for the various frequency tuning bands. The component spacing
is referenced from the center of the component to the edge of
the package.
Figure 32 to Figure 34 show the matching networks.
RFIN
20pF
and C
IN
C1
C
IN
2pF
are Murata GRM155
OUT
and C
IN
16
NCNCNCNC
1
2
RFIN
DISABLE
λ
1
OUT
ADL5606
Table 6. Recommended Components for Basic Connections
Frequency (MHz) CIN (pF) C
OUT
(pF)
1930 to 1990 2.0 3.6
2110 to 2170 1.3 3.9
2570 to 2690 2.0 3.3
Table 7. Matching Component Spacing
Frequency (MHz) λ1 (mils) λ2 (mils)
1930 to 1990 394 197
2110 to 2170 268 138
2570 to 2690 382 83
131415
12
RFOUT
L1
18nH
C
OUT
3.6pF
C2
20pF
RFOUT
RFOUT
RFOUT
RFOUT
11
10
9
λ
2
09968-032
Figure 32. ADL5606 Match Parameters, 1960 MHz Frequency Tuning Band
RFIN
C1
20pF
C
1.3pF
16
NCNCNCNC
1
2
RFIN
DISABLE
λ
1
IN
ADL5606
Figure 33. ADL5606 Match Parameters, 2140 MHz Frequency Tuning Band
131415
RFOUT
RFOUT
RFOUT
RFOUT
12
L1
18nH
C
OUT
3.9pF
C2
20pF
RFOUT
09968-033
11
10
9
λ
2
RFIN
C1
20pF
C
2pF
16
NCNCNCNC
1
2
RFIN
DISABLE
λ
1
IN
ADL5606
131415
RFOUT
RFOUT
RFOUT
RFOUT
12
L1
18nH
C
OUT
3.3pF
C2
20pF
RFOUT
11
10
9
λ
2
09968-034
Figure 34. ADL5606 Match Parameters, 2630 MHz Frequency Tuning Band
Rev. 0 | Page 14 of 20
Page 15
ADL5606
ACPR AND EVM
All adjacent channel power ratio (ACPR) and error vector
magnitude (EVM) measurements were made using a single
W-CDMA carrier and Test Model 1-64.
The signal is generated by a very low ACPR source and is measured at the output by a high dynamic range spectrum analyzer.
For ACPR measurements, the filter setting was chosen for low
ACPR; for EVM measurements, the low EVM setting was selected.
The spectrum analyzer incorporates an instrument noise correction function, and highly linear amplifiers were used to boost
the power levels for ACPR measurements.
Figure 26 shows ACPR vs. P
For power levels up to 18 dBm, an ACPR of 50 dBc or better
can be achieved at 1960 MHz and 2140 MHz.
Figure 27 shows EVM vs. P
The EVM measured is 0.5% for power levels up to 18 dBm at
1960 MHz and 2140 MHz. The baseline composite EVM for
the signal source was approximately 0.5%. When operated in
the linear region, there is little or no contribution to EVM by
the amplifier.
at 1960 MHz and 2140 MHz.
OUT
at 1960 MHz and 2140 MHz.
OUT
For optimal performance, it is recommended that the thermal
vias be filled with a conductive paste of the equivalent thermal
conductivity specified earlier in this section; alternatively, an
external heat sink can be used to dissipate heat quickly without
affecting the die junction temperature. It is also recommended
that the ground pattern be extended above and below the device
to improve thermal efficiency (see Figure 35).
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 35 shows the recommended land pattern for the ADL5606.
To minimize thermal impedance, the exposed paddle on the
4 mm × 4 mm LFCSP is soldered to a ground plane along with
Pin 5 to Pin 8 and Pin 13 to Pin 16. To improve thermal dissipation, 25 thermal vias are arranged in a 5 × 5 array under the
exposed paddle. Areas above and below the paddle are tied with
regular vias. If multiple ground layers exist, they should be tied
together using vias. For more information about land pattern
design and layout, see the AN-772 Application Note, A Design
and Manufacturing Guide for the Lead Frame Chip Scale Package
(LFCSP).
THERMAL CONSIDERATIONS
The ADL5606 is packaged in a thermally efficient 4 mm ×
4 mm, 16-lead LFCSP. The thermal resistance from junction
to air (θ
was extracted assuming a standard 4-layer JEDEC board with
25 copper plated thermal vias. The thermal vias are filled with
conductive copper paste (AE3030 with thermal conductivity of
7.8 W/mK and thermal expansion α1 of 4 × 10
8.6 × 10
is 12.9°C/W, where the case is the exposed pad of the lead frame
package.
For the best thermal performance, it is recommended that as
many thermal vias as possible be added under the exposed pad
of the LFCSP. The thermal resistance values assume a minimum
of 25 thermal vias arranged in a 5 × 5 array with a via diameter
of 8 mils, via pad of 16 mils, and a pitch of 20 mils. The vias are
plated with copper, and the drill hole is filled with a conductive
copper paste.
) is 52.9°C/W. The thermal resistance for the product
JA
−5
−5
/°C). The thermal resistance from junction to case (θJC)
/°C and α2 of
RFIN
16 MIL VIA PAD
WITH 8 MIL VIA
Figure 35. Recommended Land Pattern
1613
RFOUT
58
09968-035
Rev. 0 | Page 15 of 20
Page 16
ADL5606
EVALUATION BOARD
The schematic of the ADL5606 evaluation board is shown in
Figure 36. The evaluation board uses 25 mils wide, 50 traces
and is made from IS410 material with a 20 mils gap to ground.
The evaluation board is tuned for operation at 2140 MHz. The
inputs and outputs should be ac-coupled with appropriately
sized capacitors; therefore, for low frequency applications, the
value of C1 and C2 may need to be increased. DC bias is
provided to the output stage via an inductor (L1) connected
to the RFOUT pin. A bias voltage of 5 V is recommended.
The evaluation board has a short, non-50 line on its output to
accommodate the four output pins and to allow for easier low
inductance output matching. The pads for Pin 9 to Pin 12 are
included on this microstrip line and are included in all matches.
The evaluation board uses numbers as identifiers to aid in the
placement of matching components at both the RF input and
RF output of the device. Figure 37 and Figure 38 show images
of the board layout.
13
RFOUT
RFOUT
RFOUT
RFOUT
8147156165
12
11
10
9
VCC1
L1
18nH
C7
100pF
C8
0.01µF
C9
10µF
C
OUT
3.9pF
C2
20pF
RFOUT
09968-036
VCC3
R4
OPEN
DISABLE
R1
0Ω
VCC2
RFIN
OPEN
R5
C10
OPEN
C11
10µF
C1
20pF
C4
OPEN
C6
0.01µF
C14
OPEN
C3
10pF
C
IN
1.3pF
C5
100pF
C13
OPEN
C12
OPEN
R2
0Ω
1
2
3
4
NC NC NC NC
RFIN
DISABLE
ADL5606
VCC
VBIAS
NC NC NC NC
Figure 36. Evaluation Board, 2140 MHz Frequency Tuning Band
Table 8. Evaluation Board Configuration Options, 2140 MHz Frequency Tuning Band
Power supply decoupling capacitors. Power supply decoupling capacitors are required to
filter out the high frequency noise on the power supply. The smallest capacitor should be the
closest to the ADL5606. The main bias that goes through RFOUT is the most sensitive to noise
because the bias is connected directly to the RF output. For the 1960 MHz and 2140 MHz
frequency tuning bands, Capacitors C12, C13, and C14 are open; for the 2630 MHz frequency
tuning band, it is recommended that the bypassing capacitors be added as follows:
Input matching capacitor. To match the ADL5606 at the 2140 MHz frequency tuning band,
Shunt Capacitor C
is required at a distance of 268 mils. If space is at a premium, an inductor
IN
C
= 1.3 pF HQ
IN
can take the place of the microstrip line.
C
OUT
Output matching capacitor. C
is set at a specific distance from the device so that the micro-
OUT
= 3.9 pF HQ
C
OUT
strip line can act as inductance for the matching network (see Ta ble 7 ). If space is at a premium,
an inductor can take the place of the microstrip line. A short length of low impedance line on
the output is embedded in the match.
L1
The main bias for the ADL5606 comes through L1 to the output stage. L1 should be high
L1 = 18 nH
impedance for the frequency of operation while providing low resistance for the dc current.
The evaluation board uses a Coilcraft® 0603HP-18NX_LU inductor; this 18 nH inductor provides
some of the match at 2140 MHz.
R1, R2, R4, R5
To provide bias to all stages through just one supply, set R1 and R2 to 0 Ω, and leave R4 and
R5 open. To provide separate bias to stages, set R1 and R2 to open and R4 and R5 to 0 Ω.
R1, R2 = 0 Ω
R4, R5 = open
Exposed Paddle The paddle should be connected to both thermal and electrical ground.
Rev. 0 | Page 16 of 20
Page 17
ADL5606
Figure 37. Evaluation Board Layout, Top
09968-037
Figure 38. Evaluation Board Layout, Bottom
09968-038
Rev. 0 | Page 17 of 20
Page 18
ADL5606
OUTLINE DIMENSIONS
PIN 1
INDICATOR
1.00
0.85
0.80
12° MAX
SEATING
PLANE
4.00
BSC SQ
TOP
VIEW
0.80 MAX
0.65 TYP
0.35
0.30
0.25
3.75
BSC SQ
0.20 REF
0.60 MAX
0.65 BSC
0.05 MAX
0.02 NOM
COPLANARITY
0.50
0.40
0.30
0.08
0.60 MAX
13
12
EXPOSED
(BOTTOM VIEW)
9
8
1.95 BSC
PIN 1
16
1
PA D
4
5
FOR PROPER CONNECT ION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
INDICATOR
2.50
2.35 SQ
2.20
0.25 MIN
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
082008-A
Figure 39. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(CP-16-10)
Dimensions shown in millimeters
ORDERING GUIDE
1
Model
ADL5606ACPZ-R7 −40°C to +85°C 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-16-10
ADL5606-EVALZ Evaluation Board
1
Z = RoHS Compliant Part.
Temperature Range Package Description Package Option