Fixed gain of 20 dB
Operation from 50 MHz to 4.0 GHz
Highest dynamic range gain block
Input/output internally matched to 50 Ω
Integrated bias control circuit
OIP3 of 42.0 dBm at 2.0 GHz
P1dB of 19.3 dBm at 2.0 GHz
Noise figure of 3.3 dB at 2.0 GHz
Single 5 V power supply
Low quiescent current of 89 mA
Thermally efficient SOT-89 package
ESD rating of ±1.5 kV (Class 1C)
GENERAL DESCRIPTION
The ADL5602 is a broadband 20 dB linear amplifier that operates
at frequencies up to 4 GHz. The device can be used in a wide
variety of cellular, CATV, military, and instrumentation equipment.
The ADL5602 provides the highest dynamic range available
from an internally matched gain block. This is accomplished
by providing extremely low noise figures and very high OIP3
specifications simultaneously, across the entire 4 GHz
frequency range.
The ADL5602 provides a gain of 20 dB, which is stable over
frequency, temperature, power supply, and from device to
device. The device is internally matched to 50 Ω at the input
and output, making the ADL5602 very easy to implement in a
wide variety of applications. Only input/output ac coupling
capacitors, power supply decoupling capacitors, and an external
inductor are required for operation.
RF/IF Gain Block
ADL5602
FUNCTIONAL BLOCK DIAGRAM
GND
(2)
ADL5602
BIAS
12
RFINGNDRFOUT
Figure 1.
The ADL5602 is fabricated on an InGaP HBT process and has
an ESD rating of ±1.5 kV (Class 1C). The device is available in a
thermally efficient SOT-89 package.
The ADL5602 consumes 89 mA on a single 5 V supply and is
fully specified for operation from −40°C to +85°C.
A fully populated RoHS-compliant evaluation board is available.
3
8190-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Gain 18.3 dB
Output 1 dB Compression Point (P1dB) 18.0 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −40.5 dBc
OUT
= 0 dBm −46.1 dBc
OUT
Noise Figure 2.9 dB
FREQUENCY = 140 MHz
Gain 17.0 dB
vs. Frequency ±50 MHz ±1.2 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.03 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.04 dB
Output 1 dB Compression Point (P1dB) 18.3 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −45.1 dBc
OUT
= 0 dBm −55.1 dBc
OUT
Noise Figure 2.9 dB
FREQUENCY = 350 MHz
Gain 19.7 dB
vs. Frequency ±50 MHz ±0.20 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.31 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.01 dB
Output 1 dB Compression Point (P1dB) 20.0 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −49.9 dBc
OUT
= 0 dBm −83.7 dBc
OUT
Noise Figure 3.0 dB
FREQUENCY = 700 MHz
Gain 19.0 20.2 21.0 dB
vs. Frequency ±50 MHz ±0.01 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.28 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.01 dB
Output 1 dB Compression Point (P1dB) 19.0 20.1 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −50.3 dBc
OUT
= 0 dBm −78.4 dBc
OUT
Noise Figure 3.0 dB
) = 0 dBm per tone 27.5 dBm
OUT
) = 0 dBm per tone 25.0 dBm
OUT
) = 0 dBm per tone 36.5 dBm
OUT
) = 0 dBm per tone 38.5 dBm
OUT
Rev. 0 | Page 3 of 16
Page 4
ADL5602
Parameter Conditions Min Typ Max Unit
FREQUENCY = 900 MHz
Gain 19.0 20.2 21.0 dB
vs. Frequency ±50 MHz ±0.01 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.28 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.01 dB
Output 1 dB Compression Point (P1dB) 19.0 20.1 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −59.4 dBc
OUT
= 0 dBm −77.3 dBc
OUT
Noise Figure 2.9 dB
FREQUENCY = 2000 MHz
Gain 19.5 dB
vs. Frequency ±50 MHz ±0.04 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.35 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.04 dB
Output 1 dB Compression Point (P1dB) 19.3 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −53.1 dBc
OUT
= 0 dBm −60.7 dBc
OUT
Noise Figure 3.3 dB
FREQUENCY = 2600 MHz
Gain 19.2 dB
vs. Frequency ±50 MHz ±0.01 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.28 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.05 dB
Output 1 dB Compression Point (P1dB) 18.7 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −52.8 dBc
OUT
= 0 dBm −67.4 dBc
OUT
Noise Figure 3.4 dB
FREQUENCY = 3500 MHz
Gain 19.3 dB
vs. Frequency ±50 MHz ±0.03 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.37 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.07 dB
Output 1 dB Compression Point (P1dB) 17.4 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −42.9 dBc
OUT
= 0 dBm −66.4 dBc
OUT
Noise Figure 3.8 dB
FREQUENCY = 4000 MHz
Gain 18.5 dB
vs. Frequency ±50 MHz ±0.19 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.73 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.08 dB
Output 1 dB Compression Point (P1dB) 15.2 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (P
Second Harmonic P
Third Harmonic P
= 0 dBm −44.1 dBc
OUT
= 0 dBm −64.0 dBc
OUT
Noise Figure 4.2 dB
) = 0 dBm per tone 40.0 dBm
OUT
) = 0 dBm per tone 42.0 dBm
OUT
) = 0 dBm per tone 36.5 dBm
OUT
) = 0 dBm per tone 31.5 dBm
OUT
) = 0 dBm per tone 28.0 dBm
OUT
Rev. 0 | Page 4 of 16
Page 5
ADL5602
Parameter Conditions Min Typ Max Unit
POWER INTERFACE VCC
Supply Voltage (VCC) 4.5 5 5.5 V
Supply Current 89 106 mA
vs. Temperature −40°C ≤ TA ≤ +85°C ±3 mA
Power Dissipation VCC = 5 V 0.45 W
TYPICAL SCATTERING PARAMETERS (S PARAMETERS)
VCC = 5 V and TA = 25°C, the effects of the test fixture have been de-embedded up to the pins of the device.
Internal Power Dissipation (Paddle Soldered) 600 mW
θ
(Junction to Air) 30.7°C/W
JA
θ
(Junction to Paddle) 5.0°C/W
JC
Maximum Junction Temperature 150°C
Lead Temperature (Soldering, 60 sec) 240°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 7 of 16
Page 8
ADL5602
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
RFIN
ADL5602
2
GND
RFOUT
TOP VIEW
(Not to Scale)
3
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 RFIN RF Input. This pin requires a dc blocking capacitor.
2 GND Ground. Connect this pin to a low impedance ground plane.
3 RFOUT
RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is connected to
the external power supply. The RF path requires a dc blocking capacitor.
(2) Exposed Paddle Exposed Paddle. Internally connected to GND. Solder to a low impedance ground plane.
(2)
GND
08190-002
Rev. 0 | Page 8 of 16
Page 9
ADL5602
TYPICAL PERFORMANCE CHARACTERISTICS
45
40
35
30
25
20
15
10
NF, GAIN, P1dB, OIP3 (dB, dBm)
5
0
00.4 0.8 1.2 1.6 2.0 2.4 2.83.2 3.6 4.0
FREQUENCY (GHz)
OIP3
GAIN
P1dB
NF
Figure 3. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
21.0
20.5
20.0
19.5
19.0
18.5
GAIN (dB)
18.0
17.5
17.0
16.5
00.4 0.8 1.2 1.6 2.0 2.4 2.83.2 3.6 4.0
+25°C
FREQUENCY (GHz)
–40°C
+85°C
Figure 4. Gain vs. Frequency and Temperature
30
28
26
24
22
20
P1dB (dBm)
18
16
14
12
00.51.01.52.02.53.03.54.0
08190-003
FREQUENCY (GHz)
+25°C
+85°C
–40°C
+25°C
+85°C
Figure 6. P1dB and OIP3 vs. Frequency and Temperature
44
2600MHz
140MHz
900MHz
700MHz
4000MHz
P
PER TONE (d Bm)
OUT
350MHz
2000MHz
3500MHz
) and Frequency
OUT
42
40
38
36
34
32
30
OIP3 (dBm)
28
26
24
22
50MHz
20
–5–3–11357911131517
08190-004
Figure 7. OIP3 vs. Output Power (P
–40°C
45
40
35
30
25
20
OIP3 (dBm)
15
10
5
0
08190-006
8190-007
0
–5
–10
–15
–20
–25
–30
S-PARAMETERS (dB)
–35
–40
–45
–50
00.4 0.8 1.2 1.62.02.4 2.83.23.6 4.0
S11
S12
S22
FREQUENCY (GHz)
Figure 5. Input Return Loss (S11), Output Return Loss (S22), and
Reverse Isolation (S12) vs. Frequency
08190-005
Rev. 0 | Page 9 of 16
5.6
5.2
4.8
4.4
4.0
3.6
3.2
NOISE FIGURE (dB)
2.8
2.4
2.0
00.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0
FREQUENCY (GHz)
+85°C
+25°C
–40°C
Figure 8. Noise Figure vs. Frequency and Temperature
08190-008
Page 10
ADL5602
–
30
–40
–50
–60
–70
HARMONICS (d Bc)
–80
–90
0.501.01.52.02.53.03.54.0
FREQUENCY ( GHz)
Figure 9. Single Tone Harmonics vs. Frequency , P
H2
H3
OUT
08190-009
= 0 dBm
45
40
35
30
25
20
15
PERCENTAGE (%)
10
5
0
32343638404244464850
OIP3 (dBm)
Figure 12. OIP3 Distribution at 2000 MHz, P
= 0 dBm
OUT
08190-020
30
25
20
15
10
PERCENTAGE (%)
5
0
18.819.019.219.419.619.820.0
GAIN (dB)
Figure 10. Gain Distribution at 2000 MHz
30
25
20
15
10
PERCENTAGE (%)
5
0
18.518.718.919.119.319.519.719.9
P1dB (dBm)
Figure 11. P1dB Distribution at 2000 MHz
80
70
60
50
40
30
PERCENTAGE (%)
20
10
0
2.62.83.03.23.43.63.84.0
8190-010
NOISE FIGURE (dB)
08190-021
Figure 13. Noise Figure Distribution at 2000 MHz
98
96
94
92
90
88
86
SUPPLY CURRENT (mA)
84
82
80
–40–30–20–100 102030405060708090
8190-011
5.25V
5V
4.75V
TEMPERATURE (°C)
8190-014
Figure 14. Supply Current vs. Temperature
Rev. 0 | Page 10 of 16
Page 11
ADL5602
VCC
BASIC CONNECTIONS
The basic connections for operating the ADL5602 are shown in
Figure 15. Recommended components are listed in Tabl e 5. The
input and output should be ac-coupled with appropriately sized
capacitors (device characterization was performed with 0.1 F
capacitors). A 5 V dc bias is supplied to the amplifier through
the bias inductor connected to RFOUT (Pin 3). The bias voltage
should be decoupled using a 1 µF capacitor, a 1.2 nF capacitor,
and a 68 pF capacitor.
RFIN
C1
0.1µF
GND
GND
(2)
ADL5602
2
1
RFIN
3
GND
RFOUT
Figure 15. Basic Connections
C6
1µF
C5
1.2nF
C4
68pF
L1
470nH
C2
0.1µF
RFOUT
08190-015
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 16 shows the recommended land pattern for the ADL5602.
To minimize thermal impedance, the exposed paddle on the
package underside should be soldered down to a ground plane
along with Pin 2. If multiple ground layers exist, they should be
stitched together using vias. For more information on land
pattern design and layout, refer to AN-772 Application Note, A
Design and Manufacturing Guide for the Lead Frame Chip Scale
Package (LFCSP).
1.80mm
3.48mm
5.56mm
0.20mm
0.86mm
0.62mm
1.27mm
1.50mm
3.00mm
08190-016
Figure 16. Recommended Land Pattern
Table 5. Recommended Components for Basic Connections
Frequency (MHz) C1 C2 L1 C4 C5 C6
50 to 4000 0.1 µF 0.1 µF 470 nH (Coilcraft 0603LS-NX or equivalent) 68 pF 1.2 nF 1 µF
Rev. 0 | Page 11 of 16
Page 12
ADL5602
–
A
W-CDMA ACPR PERFORMANCE
Figure 17 shows a plot of adjacent channel power ratio (ACPR)
vs. P
for the ADL5602. The signal type being used is a single
OUT
W-CDMA carrier (Test Model 1-64) at 2140 MHz. This signal is
generated by a very low ACPR source. ACPR is measured at the
output by a high dynamic range spectrum analyzer, which
incorporates an instrument noise correction function.
The ADL5602 achieves an ACPR of −75 dBc at −5 dBm output,
at which point device noise and not distortion is beginning to
dominate the power in the adjacent channels. At an output
power of +5 dBm, ACPR is still very low at −61 dBc, making
the device particularly suitable for PA driver applications.
40
–45
–50
–55
–60
–65
T 5MHz CARRIER O FFSET ( dBc)
–70
–75
ACPR
–80
–20–15–10–50510
Figure 17. ACPR vs. P
P
(dBm)
OUT
, Single Carrier W-CDMA (Test Model 1-64) at
OUT
2140 MHz Evaluation Board
08190-017
Rev. 0 | Page 12 of 16
Page 13
ADL5602
V
EVALUATION BOARD
GND
Figure 19 shows the schematic for the ADL5602 evaluation
board. The board is powered by a single 5 V supply.
The components used on the board are listed in Tab le 6 .
Power can be applied to the board through clip-on leads
GND
(2)
(VCC and GND).
ADL5602
RFIN
C1
0.1µF
1
RFIN
3
GND
RFOUT
2
Figure 19. Evaluation Board Schematic
08190-018
Figure 18. Evaluation Board Layout (Top)
Table 6. Evaluation Board Configuration Options
Component Description Default Value
C1, C2 AC-coupling capacitors 0.1 F, 0402
L1 DC bias inductor 470 nH, 0603 (Coilcraft 0603LS-NX or equivalent)
VCC and GND Clip-on terminals for power supply
C4, C5, C6 Power supply decoupling capacitors C4 = 68 pF, 0603; C5 = 1.2 nF, 0603; C6 = 1 F, 1206
CC
1.2nF
C6
1µF
C5
C4
68pF
L1
470nH
C2
0.1µF
RFOUT
8190-019
Rev. 0 | Page 13 of 16
Page 14
ADL5602
OUTLINE DIMENSIONS
*
1.75
1.55
4.25
3.94
1.50 TYP
(2)
12
3.00 TYP
4.60
4.40
*
0.56
0.36
*
COMPLIANT TO JEDEC S TANDARDS TO-243 W ITH
EXCEPTIO N TO DIMENSIONS INDICATED BY AN ASTERIS K.
2.60
2.30
3
1.20
0.75
2.29
2.14
0.44
0.35
*
0.52
0.32
END VIEW
1.60
1.40
121808-B
Figure 20. 3-Lead Small Outline Transistor Package [SOT-89]
(RK-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADL5602ARKZ-R71 −40°C to +85°C 3-Lead SOT-89, 7“ Tape and Reel RK-3
ADL5602-EVALZ1 Evaluation Board