Gain: 29 dB
Operation from 2.5 GHz to 2.7 GHz
EVM ≤ 3% with 16 QAM OFDMA
@ P
= 25 dBm (3.3 V, 2.6 GHz)
OUT
@ P
= 27 dBm (5 V, 2.6 GHz)
OUT
Input matched to 50 Ω
Power supply: 3.2 V to 5 V
Quiescent current: 135 mA
Power-added efficiency (PAE)
21% @ P
Multiple operating modes to reduce battery drain
Standby mode: 9 mA
Sleep mode: <1 μA
APPLICATIONS
WiMAX mobile terminals and CPEs
= 25 dBm (3.3 V, 2.6 GHz)
OUT
WiMAX Power Amplifier
ADL5571
GENERAL DESCRIPTION
The ADL5571 is a high linearity 2.5 GHz to 2.7 GHz power
amplifier designed for WiMAX mobile terminals and CPEs
using TDD operation at a duty cycle of 50% or lower. With a
gain of 29 dB and an output compression point of 31 dBm, it
can operate at an output power level up to 27 dBm while
maintaining an EVM of ≤3% with a supply voltage of 5 V. PAE
is 21% at P
The ADL5571 RF input is matched to provide an input return
loss of better than 10 dB. The open-collector output is externally
matched with a microstrip line and an external shunt capacitor.
The ADL5571 operates over a supply voltage range from 3.2 V
to 5 V with a current of 450 mA burst rms when delivering
25 dBm (3.3 V supply). A standby mode is available that reduces
the quiescent current to 9 mA, which is useful when a TDD
terminal is receiving data.
The ADL5571 is fabricated in a GaAs HBT process and is packaged
in a 4 mm × 4 mm, 16-lead, Pb-free, RoHS-compliant LFCSP
that uses an exposed paddle for excellent thermal impedance. It
operates from −40°C to +85°C.
= 25 dBm with a 3.3 V supply voltage.
OUT
FUNCTIONAL BLOCK DIAGRAM
CC1
ADL5571
RFIN
STBY
VREG
FIRST
IM1IM2IM3
STAGE
SECOND
STAGE
BIAS_2BIAS_1BIAS_3
Figure 1.
CC2
THIRD
STAGE
RFOUT
CFLT
OM
06956-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
FREQUENCY RANGE See Tab le 5 for tuning details 2.5 2.7 GHz
LINEAR OUTPUT POWER
GAIN 29 dB
vs. Frequency ±5 MHz ±0.2 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±2 dB
vs. Supply 3.2 V to 4.2 V ±0.3 dB
OUTPUT P1dB Unmodulated pulse input 31 dBm
EVM P
INPUT RETURN LOSS 20 dB
ACPR P
HARMONIC DISTORTION 45 dBc
SUPPLY CURRENT P
QUIESCENT CURRENT No signal at RF input 135 mA
PAE P
STANDBY MODE CURRENT VREG = 2.85 V, STBY = 2.5 V 9 mA
SLEEP MODE CURRENT VREG = 0 V <1 μA
TURN-ON/-OFF TIME 1 μs
VSWR SURVIVABILITY 10:1
FREQUENCY RANGE See Tab le 5 for tuning details 2.5 2.7 GHz
LINEAR OUTPUT POWER EVM ≤ 3% 27 dBm
GAIN 27.5 dB
vs. Frequency ±5 MHz ±0.1 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±2.5 dB
vs. Supply 4.5 V to 5.5 V ±0.2 dB
OUTPUT P1dB Unmodulated input 32 dBm
EVM P
INPUT RETURN LOSS P
ACPR P
HARMONIC DISTORTION P
SUPPLY CURRENT P
QUIESCENT CURRENT No signal at RF input 135 mA
PAE P
STANDBY MODE CURRENT VREG = 2.85 V, STBY = 2.5 V 9 mA
SLEEP MODE CURRENT VREG = 0 V <1 μA
TURN-ON/-OFF TIME 1 μs
VSWR SURVIVABILITY 10:1
STBY 3 V
RFOUT (Modulated—Normal Power Mode)129 dBm
Output Load VSWR 10:1
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Maximum Solder Reflow Temperature 260°C (30 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 16
Page 6
ADL5571
V
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
2
GND
STBY
NC
VCC
2
1
4
3
PIN 1
5VCC1
INDICATOR
6RFIN
ADL5571
7GND
TOP VIEW
8
REG
NC = NO CONNECT
(Not to S cale)
9
CFLT1
10
CFLT2
16 NC
15 RFOUT
14 RFOUT
13 NC
11
12
NC
NC
06956-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 11, 12, 13, 16 NC No Connect. Do not connect these pins.
2 VCC2 This power supply pin should be connected to the supply via a choke circuit (see Figure 19).
3, 7 GND Connected to Ground.
4 STBY
When STBY is low (0 V), the device operates in transmit mode. When the radio is receiving data, STBY
can be taken high (2.5 V), reducing the supply current to 9 mA.
5 VCC1 Connect to Power Supply.
6 RFIN RF Input.
8 VREG
When VREG is low, the device goes into sleep mode, reducing the supply current to less than 1 μA.
When VREG is high (2.85 V), the device operates in its normal transmit mode. When high, VREG draws
a bias current of approximately 9 mA.
9, 10 CFLT1, CFLT2 Ground-Referenced Capacitors. These should be connected to reduce bias line noise.
14, 15 RFOUT
Unmatched RF Outputs. These parallel outputs are matched to 50 Ω using a microstrip line and shunt
capacitor. The power supply voltage should be connected to these pins through a choke inductor.
Exposed
Paddle
The exposed paddle should be soldered down to a low impedance ground plane (use multiple vias,
at least 9, to stitch together the ground planes) for optimum electrical and thermal performance.
Figure 19 shows the basic connections for the ADL5571.
POS
STBY
C6
L1
VCC1
RFIN
GND
VREG
C2
1nH
4
3
GND
STBY
ADL5571
CFLT1
9
2
CFLT
10
C10
0.01µF
2
VCC2
RFOUT
RFOUT
NC
11
VPOS1
VPOS
C7
0.01µF
RFIN
L3
2.7nH
VREG
C9
0.01µF
NC = NO CONNEC T
C8
0.01µF
5
6
7
8
2.2pF
Figure 19. Basic Connections
Power Supply
The voltage supply on the ADL5571, which ranges from
3.2 V to 4.2 V, should be connected to the VCCx pins. VCC1 is
decoupled with Capacitor C7, whereas VCC2 uses a tank circuit
to prevent RF signals from propagating on the dc lines.
RF Input Interface
The RFIN pin is the port for the RF input signal to the power
amplifier. The L3 inductor, 2.7 nH, matches the input
impedance to 50 Ω.
2.7nH
L3
Figure 20. RF Input with Matching Component
3.3pF
1
NC
NC
12
C11
1µF
VPOS1
L2
C5
11nH
16
NC
15
14
13
NC
W1
6
RFIN
06956-004
2.7pF
C4
39pF
C3
OPEN
VPOS
RFOUT
C12
1µF
06956-003
RF Output Interface
The parallel RF output ports have a shunt capacitor, C3 (2.7 pF),
and the line inductance of the microstrip line for optimized
output power and linearity. The characteristics of the ADL5571
are described for 50 Ω impedance after the output matching
capacitor (load after C3). C4 provides dc blocking on the
RF output.
POS1
RFOUT
RFOUT
15
14
11nH
L2
C4
39pF
C3
2.7pF
C5
OPEN
C12
1µF
RFOUT
06956-005
Figure 21. RF Output
Transmit/Standby Enable
During normal transmit mode, the STBY pin is biased low
(0 V). However, during receive mode, the pin can be biased
high (2.5 V) to shift the device into standby mode, which
reduces current consumption to 9 mA.
VREG Enable
During normal transmit, the VREG pin is biased to 2.85 V and
draws 9 mA of current. When the VREG pin is low (0 V), the
device suspends itself into sleep mode (irrespective of supply
biasing). In this mode, the device draws less than 1 μA of
current.
Rev. 0 | Page 11 of 16
Page 12
ADL5571
×−Ι
64 QAM OFDMA PERFORMANCE
The ADL5571 shows exceptional performance when used with
a higher order modulation scheme, such as a 64 QAM system.
Figure 22, Figure 23, and Figure 24 illuminate the EVM, gain,
and current consumption performance within the context of a
64 QAM OFDMA system.
The efficiency of the ADL5571 is defined on the current that it
draws during the data burst of an 802.16e OFDMA signal. In
typical test setup, the average rms current, I
However,
= Duty Cycle (in decimal) × I
I
AVG
(1 − Duty Cycle [in decimal]) × I
BURST
DEFAULT
where:
I
is the rms current during the data burst of an OFDMA
BURST
signal.
I
can be the quiescent current drawn when there is no
DEFAULT
data burst and the device remains biased, the sleep current
(<1 μA) if the device is defaulted to sleep mode, or the standby
current.
For example, in a 31% duty cycle 802.16e OFDMA signal,
the burst current is calculated by rearranging the previous
equation to get
AVG
=
I
BURST
I
0.31
DEFAULT
)0.69(
Finally, the PAE is calculated by
(%)
PAE
=
−
(mA)(V)
×
CC
IV
BURST
When RF is 2.6 GHz, 31% 16 QAM OFDMA signal,
is 3.3 V, RF Output Power is 25 dBm, and RF Input
V
CC
Power is −4 dBm, the ADL5571 consumes a burst current,
is 450 mA and PAE = 21%.
I
BURST
, is measured.
AVG
+
(mW)(mW)
PowerInputRFPowerOutputRF
100
×
Rev. 0 | Page 12 of 16
Page 13
ADL5571
EVALUATION BOARD
The ADL5571 performance data was taken on a FR4 board
layout. Care should be taken to ensure 50 Ω impedance for
all RF traces. For optimal performance in linearity, gain, and
efficiency, the output matching capacitor, C3, should be placed
35 mils from the edge of the package.
L3 Input Interface. L3 matches the input to 50 Ω. L3 = 2.7 nH (Size 0402)
C3, C4 Output Interface. C4 provides dc blocking. C3 matches the output to 50 Ω.
C2, C10
C7, C8, C9, C11, C12
L1, C6, L2, C5
RFIN, RFOUT RF Input and Output SMA Connections.
Transmit/Standby Mode. When STBY is low (0 V), the device operates in transmit mode.
When the radio is receiving data, STBY can be taken high (2.5 V), reducing the supply
current to 9 mA.
Normal/Sleep Mode. When VREG is low, the device goes into sleep mode, reducing
the supply current to 10 μA. When VREG is high (2.85 V), the device operates in its
normal transmit mode and the VREG pin draws a bias current of approximately 9 mA.
Filter Interface. A ground-referenced capacitor should be connected to this node to
reduce bias line noise.
Power Supply Decoupling. Capacitors C7 through C12 are used for power supply
decoupling. They should be placed as close as possible to the DUT.
RF Trap. L1, C6 and L2, C5 form tank circuits and prevent RF from propagating on
the dc supply lines