Page 1
20 MHz to 500 MHz
FEATURES
Fixed gain of 20 dB
Operation up to 500 MHz
Input/output internally matched to 50 Ω
Integrated bias control circuit
Output IP3
41 dBm at 70 MHz
39 dBm at 190 MHz
Output 1 dB compression: 20.6 dB at 190 MHz
Noise figure: 2.5 dB at 190 MHz
Single 5 V power supply
Small footprint 8-lead LFCSP
ADL5534 20 dB gain dual-channel version
±2 kV ESD (Class 2)
GENERAL DESCRIPTION
The ADL5531 is a broadband, fixed-gain, linear amplifier
that operates at frequencies up to 500 MHz. The device can be
used in a wide variety of equipment, including cellular, satellite,
broadband, and instrumentation equipment.
The ADL5531 provides a gain of 20 dB, which is stable over
frequency, temperature, power supply, and from device to device.
This amplifier is single ended and internally matched to 50 Ω.
Only input/output ac coupling capacitors, power supply decoupling
capacitors, and external inductors are required for operation.
IF Gain Block
ADL5531
FUNCTIONAL BLOCK DIAGRAM
ADL5531
NC 1
RFIN 2
NC 3
NC
NC = NO CONNECT
BIAS
CONTROL
4
LINEARIZE R
Figure 1.
The ADL5531 is fabricated on a GaAs HBT process and has
an ESD rating of ±2 kV (Class 2). The device is packaged in an
8-lead 3 mm × 3 mm LFCSP that uses an exposed paddle for
excellent thermal impedance.
The ADL5531 consumes 100 mA on a single 5 V supply and is
fully specified for operation from −40°C to +85°C.
The dual-channel 20 dB gain version, ADL5534, is also available
from Analog Devices, Inc.
8NC
7RFOUT
6NC
5CLIN
06833-001
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved.
Page 2
ADL5531
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Typical Scattering Parameters ..................................................... 4
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
REVISION HISTORY
8/08—Rev. 0 to Rev. A
Changes to Features Section and General Description
Section ................................................................................................ 1
Added Exposed Pad Notation to Outline Dimensions ............. 11
8/07—Revision 0: Initial Version
Typical Performance Characteristics ..............................................7
Basic Connections .............................................................................9
Soldering Information and Recommended PCB
Land Pattern ...................................................................................9
Evaluation Board ............................................................................ 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
Rev. A | Page 2 of 12
Page 3
ADL5531
SPECIFICATIONS
VPOS = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 20 500 MHz
Gain (S21) 190 MHz 20.3 dB
Input Return Loss (S11) 190 MHz −19.5 dB
Output Return Loss (S22) 190 MHz −26.5 dB
Reverse Isolation (S12) 190 MHz −23.0 dB
FREQUENCY = 70 MHz
Gain 20.9 dB
vs. Frequency ± 5 MHz ±0.03 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.22 dB
vs. Supply 4.75 V to 5.25 V ±0.19 dB
Output 1 dB Compression Point 20.4 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (P
Noise Figure 2.5 dB
FREQUENCY = 190 MHz
Gain 19.7 20.3 21.0 dB
vs. Frequency ± 50 MHz ±0.12 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.22 dB
vs. Supply 4.75 V to 5.25 V ±0.17 dB
Output 1 dB Compression Point 20.6 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (P
Noise Figure 2.5 dB
FREQUENCY = 380 MHz
Gain 19.2 19.7 20.5 dB
vs. Frequency ± 50 MHz ±0.15 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.24 dB
vs. Supply 4.75 V to 5.25 V ±0.15 dB
Output 1 dB Compression Point 20.4 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (P
Noise Figure 3.0 dB
POWER INTERFACE Pin RFOUT
Supply Voltage 4.75 5 5.25 V
Supply Current 100 110 mA
vs. Temperature −40°C ≤ TA ≤ +85°C ±15 mA
Power Dissipation VPOS = 5 V 0.5 W
) = 0 dBm per tone 41.0 dBm
OUT
) = 0 dBm per tone 39.0 dBm
OUT
) = 0 dBm per tone 36.0 dBm
OUT
Rev. A | Page 3 of 12
Page 4
ADL5531
TYPICAL SCATTERING PARAMETERS
VPOS = 5 V and TA = 25°C. The effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Frequency
(MHz)
20 −19.9933 −132.614 21.99753 173.7349 −24.2574 4.854191 −19.1444 −46.7161
50 −19.6622 −151.093 21.20511 170.3258 −23.4894 5.603544 −21.4752 −89.9497
100 −17.9244 −166.031 20.83152 167.5595 −23.22 6.119636 −23.0386 −115.741
150 −18.4041 −177.116 20.67117 164.1871 −23.0914 6.631844 −23.335 −119.722
200 −18.6386 +179.6269 20.56097 160.4721 −22.9921 7.784913 −22.8555 −115.855
250 −19.2303 +175.3384 20.45422 156.5272 −22.9219 8.763143 −21.6619 −111.307
300 −19.4456 +175.0622 20.34563 152.4398 −22.8475 9.908631 −20.2707 −106.681
350 −20.1783 +173.422 20.21365 148.3008 −22.7662 11.21706 −18.7007 −104.369
400 −20.2409 +174.1593 20.07116 144.2311 −22.665 12.36953 −17.1242 −103.565
450 −20.7266 +175.6233 19.90932 140.0789 −22.5569 13.57857 −15.726 −103.863
500 −20.6064 +175.853 19.72779 135.9952 −22.4519 14.73385 −14.41 −105.079
Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°)
S11 S21 S12 S22
Rev. A | Page 4 of 12
Page 5
ADL5531
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage on RFOUT 5.5 V
Input Power on RFIN 10 dBm
Internal Power Dissipation (Paddle Soldered) 600 mW
θ
(Junction to Air) 103°C/W
JA
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
ESD Rating—Human Body Model ±2 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. A | Page 5 of 12
Page 6
ADL5531
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
1NC
RFIN 2 7 RFOUT
NC 3
NC
4
INDICATOR
ADL5531
TOP VIEW
(Not to Scale)
8NC
6NC
5CLIN
NC = NO CONNECT
Figure 2. Pin Configuration
06833-002
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 3, 4, 6, 8 NC No Connect.
2 RFIN RF Input. Requires a 10 nF dc blocking capacitor.
5 CLIN A 1 nF capacitor connected between Pin 5 and ground provides decoupling for the on-board linearizer.
7 RFOUT
RF Output and Bias. DC bias is provided to this pin through a 470 nH inductor (Coilcraft 1008CS-471XJLC or
equivalent). The RF path requires a 10 nF dc blocking capacitor.
EP Exposed Pad GND. Solder this pad to a low impedance ground plane.
Rev. A | Page 6 of 12
Page 7
ADL5531
TYPICAL PERFORMANCE CHARACTERISTICS
22
20
18
16
14
12
10
8
6
NOISE FI GURE, GAI N (dB)
4
2
0
0 50 100 150 200 250 300 350 400 450 500
FREQUENCY (MHz )
Figure 3. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
21.4
21.2
21.0
20.8
20.6
20.4
20.2
20.0
GAIN (dB)
19.8
19.6
19.4
19.2
19.0
0 50 100 150 200 250 300 350 400 450 500
–40°C
+85°C
FREQUENCY (MHz )
Figure 4. Gain vs. Frequency an d Temperature
0
–5
–10
–15
–20
–25
S-PARAMETERS (dB)
–30
–35
S22 (dB)
–40
0 50 100 150 200 250 300 350 400 450 500
S11 (dB)
S12 (dB)
FREQUENCY (MHz )
Figure 5. Input Return Loss (S11), Reverse Isolation (S12), and
Output Return Loss (S22) vs. Frequency
GAIN
OIP3
P1dB
NOISE
FIGURE
+25°C
45
42
39
36
33
30
27
24
P1dB, OIP3 (dBm)
21
18
15
12
06833-003
6833-004
06833-005
23.0
22.5
22.0
21.5
21.0
P1dB (dBm)
20.5
20.0
19.5
19.0
0 50 100 150 200 250 300 350 400 450 500
+25°C
+85°C
+85°C
–40°C
FREQUENCY (MHz )
–40°C
+25°C
Figure 6. P1dB and OIP3 vs. Frequency and Temperature
42
20MHz
40
38
36
34
32
OIP3 (dBm)
30
28
26
24
–8–6–4–202468101214161820
190MHz
380MHz
500MHz
P
PER TONE (d Bm)
OUT
Figure 7. OIP3 vs. Output Power (P
70MHz
) and Frequency
OUT
5.0
4.5
4.0
3.5
3.0
NOISE FI GURE (dB)
2.5
2.0
1.5
0 50 100 150 200 250 300 350 400 450 500
+85°C
+25°C
–40°C
FREQUENCY (MHz )
Figure 8. Noise Fi gure vs. Frequency and Temperatu re
42
40
38
36
34
OIP3 (dBm)
32
30
28
26
06833-007
6833-008
06833-006
Rev. A | Page 7 of 12
Page 8
ADL5531
45
40
35
30
25
20
15
PERCENTAGE (%)
10
5
0
37.5 37.9 38.3 38.7 39.1 39. 5 39.9 40.3
OIP3 (dBm)
06833-009
Figure 9. OIP3 Distribution at 190 MHz
60
50
40
30
20
PERCENTAGE (%)
10
0
20.0 20.2 20.4 20.6 20.8 21. 0 21.2 21.4
P1dB (dBm)
06833-010
Figure 10. P1dB Distribution at 190 MHz
50
45
40
35
30
25
20
PERCENTAGE (%)
15
10
5
0
19.7 19.9 20.1 20.3 20.5 20. 7 20.9
19.8 20.0 20.2 20.4 20.6 20. 8 21.0
GAIN (dB)
06833-011
Figure 11. Gain Distribution at 190 MHz
5.0
4.5
4.0
3.5
3.0
2.5
NOISE FI GURE (dB)
2.0
1.5
1.0
0 50 100 150 200 250 300 350 400 450 500
FREQUENCY (MHz )
Figure 12. Noise Figure vs. Frequency at 25°C, Multiple Devices Shown
150
140
130
120
110
100
90
80
SUPPLY CURRENT (mA)
70
60
50
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
5.25V
5V
4.75V
TEMPERATURE ( °C)
Figure 13. Supply Current vs. Supply Voltage and Temperature
06833-012
6833-013
Rev. A | Page 8 of 12
Page 9
ADL5531
m
V
BASIC CONNECTIONS
1.85mm
2.03mm
8
1.78mm
The basic connections for operating the ADL5531 are shown
in Figure 15. The input and output are ac-coupled with 10 nF
(0402) capacitors. DC bias is provided to the amplifier via an
inductor (Coilcraft 1008CS-471XJLC or equivalent) connected
to the RFOUT pin. The bias voltage should be decoupled using
10 nF and 1 μF capacitors.
1
0.5m
SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN
Figure 14 shows the recommended land pattern for ADL5531.
To minimize thermal impedance, the exposed pad on the
package underside is soldered down to a ground plane. If
multiple ground layers exist, they are stitched together using
vias (a minimum of five vias is recommended). Pin 1, Pin 3,
Pin 4, Pin 6, and Pin 8 can be left unconnected or can be connected
to ground. Connecting these pins to ground slightly enhances
thermal impedance. For more information on land pattern design
and layout, refer to AN-772 Application Note, A Design and
Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP).
470nH
ADL5531
C1
10nF
1
RFIN2
NC3
NC
4
RFIN RFOUT
NC = NO CONNECT
NC
8NC
7RFOUT
6NC
5CLIN
Figure 15. Basic Connections
4 5
0.71mm
1.53mm
06833-015
Figure 14. Recommended Land Pattern
POS
W1
(TESTLOOP RED)
GND
(TESTLOOP BLACK)
06833-014
C6
C2
10nF
C3
1nF
C5
10nF
1µF
L1
Rev. A | Page 9 of 12
Page 10
ADL5531
EVALUATION BOARD
Figure 18 shows the schematic for the ADL5531 evaluation
board. The board is powered by a single 5 V supply.
The components used on the board are listed in Tab le 5 . Power
can be applied to the board through clip-on leads or through
Jumper W1. Note that C4, C7, C8, L3, L4, L5, R1, and R2 have
no function.
06833-017
Figure 17. Evaluation Board Layout (Top)
06833-016
Figure 16. Evaluation Board Layout (Bottom)
L5
C4
OPEN
OPEN
470nH
C5
10nF
C6
1µF
L1
ADL5531
C8
OPEN
L2
0Ω
R1
OPEN
L3
OPEN
C7
OPEN
RFIN RFOUT
C1
10nF
NC
1
RFIN2
NC3
NC
4
Z1
8NC
7RFOUT
R2
6NC
OPEN
5CLIN
C3
1nF
OPEN
C2
10nF
L4
W1
VPOS
(TESTLOOP RED)
GND
(TESTLO OP BLACK)
NC = NO CONNECT
06833-018
Figure 18. Evaluation Board Schematic
Table 5. Evaluation Board Configuration Options
Component Function Default Value
Z1 DUT ADL5531
C1, C2 AC coupling capacitors 10 nF, 0402
C3 Linearizer capacitor 1 nF, 0603
C5 Power supply decoupling capacitor 10 nF, 0603
C6 Power supply decoupling capacitor 1 μF, 0603
C4, C7, C8 Open
R1, R2 Open
L1 DC bias inductor 470 nH, 1008 (Coilcraft 1008CS-471XJLC or equivalent)
L2 0 Ω, 0402
L3, L4, L5 Open
VPOS, GND Clip-on terminals for power supply VPOS, GND
W1 2-pin jumper for connection of ground and supply via cable W1
RFIN, RFOUT 50 Ω SMA female connectors RFIN, RFOUT
Rev. A | Page 10 of 12
Page 11
ADL5531
OUTLINE DIMENSIONS
3.25
3.00 SQ
INDICATOR
0.90 MAX
0.85 NOM
SEATING
PLANE
PIN 1
12° MAX
2.75
TOP
VIEW
0.70 MAX
0.65 TYP
0.30
0.23
0.18
2.95
2.75 SQ
2.55
0.05 MAX
0.01 NOM
0.20 REF
0.60 MAX
Figure 19. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADL5531ACPZ-R7
ADL5531-EVALZ
1
Z = RoHS Compliant Part.
1
−40°C to +85°C 8-Lead LFCSP_VD, 7” Tape and Reel CP-8-2 Q16
1
Evaluation Board
0.50
0.40
0.30
CP-8-2
0.60 MAX
5
EXPOSED
(BOTTOM VIEW)
4
FOR PROPER CONNECTION O F
THE EXPOSED PAD, REFER TO
THE PIN CONF IGURATIO N AND
FUNCTION DESCRIPTIO NS
SECTION OF THIS DATA SHEET.
PA D
0.50
BSC
8
1
1.89
1.74
1.59
1.60
1.45
1.30
PIN 1
INDICATOR
72408-B
Rev. A | Page 11 of 12
Page 12
ADL5531
NOTES
©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06833-0-8/08(A)
Rev. A | Page 12 of 12
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