0.01% nonlinearity
Triaxial, digital accelerometer, ±18 g
Triaxial, delta angle and delta velocity outputs
Triaxial, digital magnetometer, ±2.5 gauss
Digital pressure sensor, 300 mbar to 1100 mbar
Fast start-up time, ~500 ms
Factory-calibrated sensitivity, bias, and axial alignment
Calibration temperature range: −40°C to +70°C
SPI-compatible serial interface
Embedded temperature sensor
Programmable operation and control
Automatic and manual bias correction controls
4 FIR filter banks, 120 configurable taps
Digital I/O: data-ready alarm indicator, external clock
Alarms for condition monitoring
Power-down/sleep mode for power management
Optional external sample clock input: up to 2.4 kHz
Single-command self-test
Single-supply operation: 3.0 V to 3.6 V
2000 g shock survivability
Operating temperature range: −40°C to +85°C
Tactical Grade
GENERAL DESCRIPTION
The ADIS16488 iSensor® device is a complete inertial system
that includes a triaxis gyroscope, a triaxis accelerometer, triaxis
magnetometer, and pressure sensor. Each inertial sensor in the
with signal conditioning that optimizes dynamic performance.
The factory calibration characterizes each sensor for sensitivity,
bias, alignment, and linear acceleration (gyroscope bias). As a
result, each sensor has its own dynamic compensation formulas
that provide accurate sensor measurements.
The ADIS16488 provides a simple, cost-effective method for
integrating accurate, multiaxis inertial sensing into industrial
systems, especially when compared with the complexity and
investment associated with discrete designs. All necessary motion
testing and calibration are part of the production process at
the factory, greatly reducing system integration time. Tight
orthogonal alignment simplifies inertial frame alignment in
navigation systems. The SPI and register structure provide a
simple interface for data collection and configuration control.
The ADIS16488 uses the same footprint and connector system as
the ADIS16375, which greatly simplifies the upgrade process. It
comes in a module that is approximately 47 mm × 44 mm ×
14 mm and has a standard connector interface.
APPLICATIONS
Platform stabilization and control
Navigation
Personnel tracking
Instrument
Robotics
FUNCTIONAL BLOCK DIAGRAM
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Page 2
ADIS16488 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Bias Temperature Coefficient −40°C ≤ TA ≤ +70°C, 1 σ ±0.0025 °/sec/°C
Output Noise No filtering 0.16 °/sec rms
Rate Noise Density f = 25 Hz, no filtering 0.0066 °/sec/√Hz rms
3 dB Bandwidth 330 Hz
Sensor Resonant Frequency 18 kHz
ACCELEROMETERS Each axis
Dynamic Range ±18
Sensitivity x_ACCL_OUT and x_ACCL_LOW (32-bit) 1.221 × 10−8 g/LSB
g
Sensitivity Temperature Coefficient −40°C ≤ TA ≤ +85°C, 1 σ ±25 ppm/°C
Misalignment Axis-to-axis ±0.035 Degrees
Axis-to-frame (package) ±1.0 Degrees
Nonlinearity Best-fit straight line, ±10 g 0.1 % of FS
Best-fit straight line, ±18 g0.5 % of FS
In-Run Bias Stability 1 σ 0.1 mg
Velocity Random Walk 1 σ 0.029 m/sec/√hr
Bias Temperature Coefficient −40°C ≤ TA ≤ +85°C ±0.1 mg/°C
Output Noise No filtering 1.5 mg rms
Noise Density f = 25 Hz, no filtering 0.067 mg/√Hz rms
3 dB Bandwidth 330 Hz
Sensor Resonant Frequency 5.5 kHz
Dynamic Range
Sensitivity
Initial Sensitivity Tolerance
Sensitivity Temperature Coefficient
Misalignment Axis to axis 0.25 Degrees
Axis to frame (package) 0.5 Degrees
Nonlinearity Best fit straight line 0.5 % of FS
Initial Bias Error 0 gauss stimulus ±15 mgauss
Bias Temperature Coefficient −40°C ≤ TA ≤ +85°C, 1 σ 0.3 mgauss/°C
Output Noise
Noise Density
3 dB Bandwidth 330 Hz
±2.5 gauss
0.1 mgauss/LSB
±2 %
1 σ 275 ppm/°C
No filtering
f = 25 Hz, no filtering
0.45 mgauss
0.054 mgauss/√Hz
Rev. B | Page 3 of 36
Page 4
ADIS16488 Data Sheet
Error with Supply
0.04 %/V
Noise
0.025
mbar rms
Input Capacitance, CIN
10 pF
Output Low Voltage, VOL
I
= 2.0 mA
0.4
V
Power-down mode, VDD = 3.3 V
45 µA
Parameter Test Conditions/Comments Min Typ Max Unit
BAROMETER
Pressure Range 300 1100 mbar
Extended 10 1200 mbar
Sensitivity BAROM_OUT and BAROM_LOW (32-bit) 6.1 × 10−7 mbar/LSB
Total Error 4.5 mbar
Relative Error1 −40°C to +85°C 2.5 mbar
Linearity2 Best fit straight line, FS = 1100 mbar 0.1 % of FS
−40°C to +85°C 0.2 % of FS
Linear-g Sensitivity ±1 g, 1 σ 0.005 mbar/g
TEMPERATURE SENSOR
Scale Factor Output = 0x0000 at 25°C (±5°C) 0.00565 °C/LSB
LOGIC INPUTS3
Input High Voltage, VIH 2.0 V
Input Low Voltage, VIL 0.8 V
CS Wake-Up Pulse Width
Logic 1 Input Current, IIH VIH = 3.3 V 10 µA
Logic 0 Input Current, IIL VIL = 0 V
All Pins Except RST
RST Pin
20 µs
10 µA
0.33 mA
DIGITAL OUTPUTS
Output High Voltage, VOH I
= 0.5 mA 2.4 V
SOURCE
SINK
FLASH MEMORY Endurance4 100,000 Cycles
Data Retention5 TJ = 85°C 20 Ye ars
FUNCTIONAL TIMES6 Time until data is available
Power-On Start-up Time 500 ms
Reset Recovery Time 500 ms
Sleep Mode Recovery Time 500 µs
Flash Memory Update Time 375 ms
Flash Memory Test Time 50 ms
Automatic Self-Test Time Using internal clock, 100 SPS 12 ms
POWER SUPPLY, VDD Operating voltage range 3.0 3.6 V
Power Supply Current8 Normal mode, VDD = 3.3 V, µ ± σ 254 mA
Sleep mode, VDD = 3.3 V 12.2 mA
POWER SUPPLY, VDDRTC Operating voltage range 3.0 3.6 V
Real-Time Clock Supply Current Normal mode, VDDRTC = 3.3 V 13 µA
1
The relative error assumes that the initial error, at 25°C, is corrected in the end application.
2
Linearity errors assume a full scale (FS) of 1000 mbar.
3
The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant.
4
Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.
5
The data retention specification assumes a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ.
6
These times do not include thermal settling and internal filter response times, which may affect overall accuracy.
7
Device functions at clock rates below 0.7 kHz, but at reduced performance levels.
8
Supply current transients can reach 450 mA for 400 µs during start-up and reset recovery.
Rev. B | Page 4 of 36
Page 5
Data Sheet ADIS16488
t
Serial clock high period
31
ns
t
DIN setup time before SCLK rising edge
2
ns
CS
SCLK
DOUT
DIN
1234561516
R/WA5A6A4A3A2
D2
MSB
DB14
D1LSB
DB13DB12DB10DB11DB2LSBDB1
t
CS
t
DSHI
t
DAV
t
HD
t
CHS
t
CLS
t
DSOE
t
DHD
t
DSU
10277-002
CS
SCLK
t
STALL
10277-003
t
3
t
2
t
1
SYNC
CLOCK (CLKIN)
DATA
READY
OUTPUT
REGISTERS
10277-004
DATA VALIDDATA VALID
TIMING SPECIFICATIONS
TA = 25°C, VDD = 3.3 V, unless otherwise noted.
Table 2.
Normal Mode
Parameter Description Min1 Typ Max1 Unit
CS assertion to data out active
tHD SCLK edge to data out invalid 0 ns
t
DSHI
t
1
t
2
t
3
1
Guaranteed by design and characterization, but not tested in production.
CS deassertion to data out high impedance
Input sync pulse width 5 µs
Input sync to data-ready output 490 µs
Input sync period 417 µs
0 11 ns
0 9 ns
Timing Diagrams
Figure 2. SPI Timing and Sequence
Figure 3. Stall Time and Data Rate
Figure 4. Input Clock Timing Diagram
Rev. B | Page 5 of 36
Page 6
ADIS16488 Data Sheet
Any Axis, Unpowered
2000 g
Storage Temperature Range
−65°C to +150°C
24-Lead Module (ML-24-6)
22.8°C/W
10.1°C/W
48 g
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Acceleration
Any Axis, Powered 2000 g
VDD to GND −0.3 V to +3.6 V
Digital Input Voltage to GND −0.3 V to VDD + 0.2 V
Digital Output Voltage to GND −0.3 V to VDD + 0.2 V
Operating Temperature Range −40°C to +85°C
Barometric Pressure 6 bar
1
Extended exposure to temperatures that are lower than −40°C or higher
than +105°C can adversely affect the accuracy of the factory calibration.
1
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Package Characteristics
Device
Package Type θJA θJC
Weight
ESD CAUTION
Rev. B | Page 6 of 36
Page 7
Data Sheet ADIS16488
1
DIO3
SCLK
DIN
DIO1
DIO2
VDD
GND
GND
DNC
DNC
DNC
VDDRTC
DIO4
DOUT
CS
RST
VDD
VDD
GND
DNC
DNC
DNC
DNC
DNC
2
3456789
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
ADIS16488
TOP VIEW
(Not to S cale)
NOTES
1. THIS REPRESENTATION DISPLAYS T HE TOP VIEW PINOUT
FOR THE MATING SO CKE T CONNECTOR.
2. THE ACTUAL CONNEC TO R P INS ARE NOT VISIBLE FROM
THE TOP VIEW.
3. MATING CONNECTOR: SAMTEC CLM-112-02 OR EQUIVALENT.
4. DNC = DO NOT CONNECT TO THESE PINS.
10277-005
10277-006
PIN 1
PIN 23
2
DIO4
Input/output
Configurable Digital Input/Output.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 5. Mating Connector Pin Assignments
Figure 6. Axial Orientation (Top Side Facing Up)
Table 5. Pin Function Descriptions
Pin No. Mnemonic Type Description
1 DIO3 Input/output Configurable Digital Input/Output.
3 SCLK Input SPI Serial Clock.
4 DOUT Output SPI Data Output. Clocks output on SCLK falling edge.
5 DIN Input SPI Data Input. Clocks input on SCLK rising edge.
6
CS
Input SPI Chip Select.
7 DIO1 Input/output Configurable Digital Input/Output.
8
RST
Input Reset.
9 DIO2 Input/output Configurable Digital Input/Output.
10, 11, 12 VDD Supply Power Supply.
13, 14, 15 GND Supply Power Ground.
16 to 22, 24 DNC Not applicable Do Not Connect to These Pins.
23 VDDRTC Supply Real-Time Clock Power Supply.
Rev. B | Page 7 of 36
Page 8
ADIS16488 Data Sheet
1000
1
10
100
0.010.1110100100010000
ROOT AL LAN VARIANCE (° /Hour)
INTEGRATION PERIOD (Seconds)
10277-007
+1σ
–1σ
AVERAGE
0.001
0.00001
0.0001
0.010.1110100100010000
ROOT AL LAN VARIANCE (g)
INTEGRATION PERIOD (Seconds)
10277-008
+1σ
–1σ
AVERAGE
0.8
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80
GYRO SCAL E E RROR (% FS)
TEMPERATURE (°C)
10277-109
INITI AL ERROR = ±0.5%
TEMPCO = 35ppm/°C
0.6
–0.6
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
0.5
–40 –30 –20 –10 0 10 20 30 40 50
60 70 80
GYRO BIAS E RROR (°/sec)
TEMPERATURE (°C)
10277-110
INITI AL ERROR = ±0.2°/sec
TEMPCO = 0.0025°/sec/°C
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7. Gyroscope Allan Variance, 25°C
Figure 8. Accelerometer Allan Variance, 25°C
Figure 9. Gyroscope Scale (Sensitivity) Error and Hysteresis vs. Temperature
Figure 10. Gyroscope Bias Error and Hysteresis vs. Temperature
Rev. B | Page 8 of 36
Page 9
Data Sheet ADIS16488
BASIC OPERATION
The ADIS16488 is an autonomous sensor system that starts up
on its own when it has a valid power supply. After running through
its initialization process, it begins sampling, processing, and
loading calibrated sensor data into the output registers, which
are accessible using the SPI port. The SPI port typically connects to
a compatible port on an embedded processor, using the connection
diagram in Figure 11. The four SPI signals facilitate synchronous,
serial data communication. Connect
RST
(see Table 5) to VDD
or leave it open for normal operation. The factory default
configuration provides users with a data-ready signal on the
DIO2 pin, which pulses high when new data is available in the
output data registers.
VDD
SYSTEM
PROCESSOR
SPI MASTER
I/O LINES ARE COMPATIBLE WITH
3.3V LOGIC LEVELS
SS
SCLK
MOSI
MISO
IRQDIO2
Figure 11. Electrical Connection Diagram
6
3
5
4
9
10
CS
SCLK
DIN
DOUT
131415
+3.3V
111223
ADIS16488
10277-009
Table 6. Generic Master Processor Pin Names and Functions
Embedded processors typically use control registers to configure
their serial ports for communicating with SPI slave devices
such as the ADIS16488. Table 7 provides a list of settings, which
describe the SPI protocol of the ADIS16488. The initialization
routine of the master processor typically establishes these settings
using firmware commands to write them into its serial control
registers.
Table 7. Generic Master Processor SPI Settings
Processor Setting Description
Master The ADIS16488 operates as a slave.
SCLK ≤ 15 MHz Maximum serial clock rate.
SPI Mode 3 CPOL = 1 (polarity), and CPHA = 1 (phase).
MSB-First Mode Bit sequence.
16-Bit Mode Shift register/data length.
REGISTER STRUCTURE
The register structure and SPI port provide a bridge between
the sensor processing system and an external, master processor.
It contains both output data and control registers. The output
data registers include the latest sensor data, a real-time clock, error
flags, alarm flags, and identification data. The control registers
include sample rate, filtering, input/output, alarms, calibration,
and diagnostic configuration options. All communication
between the ADIS16488 and an external processor involves
either reading or writing to one of the user registers.
TRIAXIS
GYRO
TRIAXIS
ACCEL
TRIAXIS
MAGN
BARO
TEMP
SENSOR
CONTROLLER
Figure 12. Basic Operation
DSP
The register structure uses a paged addressing scheme that is
composed of 13 pages, with each one containing 64 register
locations. Each register is 16 bits wide, with each byte having its
own unique address within that page’s memory map. The SPI
port has access to one page at a time, using the bit sequence in
Figure 17. Select the page to activate for SPI access by writing its
code to the PAGE_ID register. Read the PAGE_ID register to
determine which page is currently active. Table 8 displays the
PAGE_ID contents for each page, along with their basic functions.
The PAGE_ID register is located at Address 0x00 on every page.
Table 8. User Register Page Assignments
Page PAGE_ID Function
0 0x00 Output data, clock, identification
1 0x01 Reserved
2 0x02 Calibration
3 0x03 Control: sample rate, filtering, I/O, alarms
4 0x04 Serial number
5 0x05 FIR Filter Bank A Coefficient 0 to Coefficient 59
6 0x06 FIR Filter Bank A, Coefficient 60 to Coefficient 119
7 0x07 FIR Filter Bank B, Coefficient 0 to Coefficient 59
8 0x08 FIR Filter Bank B, Coefficient 60 to Coefficient 119
9 0x09 FIR Filter Bank C, Coefficient 0 to Coefficient 59
10 0x0A FIR Filter Bank C, Coefficient 60 to Coefficient 119
11 0x0B FIR Filter Bank D, Coefficient 0 to Coefficient 59
12 0x0C FIR Filter Bank D, Coefficient 60 to Coefficient 119
OUTPUT
REGISTERS
CONTROL
REGISTERS
SPI
10277-010
Rev. B | Page 9 of 36
Page 10
ADIS16488 Data Sheet
10277-011
SCLK
CS
DIN
DIN = 1000 0000 0000 0011 = 0x8003, WRITES 0x03 TO ADDRESS 0x00
1. DOUT BITS ARE PRO DUCE D ONLY WHEN THE PREVIOUS 16-BIT DI N S E QUENCE START S WITH R/W = 0.
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE
FOR OT HE R DE V ICES.
SPI COMMUNICATION
The SPI port supports full duplex communication, as shown in
Figure 17, which enables external processors to write to DIN
while reading DOUT, if the previous command was a read
request. Figure 17 provides a guideline for the bit coding on
both DIN and DOUT.
DEVICE CONFIGURATION
The SPI provides write access to the control registers, one byte at
a time, using the bit assignments shown in Figure 17. Each register
has 16 bits, where Bits[7:0] represent the lower address (listed in
Tabl e 9) and Bits[15:8] represent the upper address. Write to the
lower byte of a register first, followed by a write to its upper byte
second. The only register that changes with a single write to its
lower byte is the PAGE_ID register. For a write command, the
first bit in the DIN sequence is set to 1. Address Bits[A6:A0]
represent the target address, and Data Command Bits[DC7:DC0]
represent the data being written to the location. Figure 13
provides an example of writing 0x03 to Address 0x00 (PAG E_ I D
[7:0]), using DIN = 0x8003. This write command activates the
control page for SPI access.
Figure 13. SPI Sequence for Activating the Control Page (DIN = 0x8003)
Dual Memory Structure
Writing configuration data to a control register updates its SRAM
contents, which are volatile. After optimizing each relevant control
register setting in a system, use the manual flash update command,
which is located in GLOB_CMD[3] on Page 3 of the register map.
Activate the manual flash update command by turning to Page 3
(DIN = 0x8003) and setting GLOB_CMD[3] = 1 (DIN = 0x8208,
then DIN = 0x8300). Make sure that the power supply is within
specification for the entire 375 ms processing time for a flash
memory update. Ta b le 9 provides a memory map for all of
the user registers, which includes a column of flash backup
information. A yes in this column indicates that a register
has a mirror location in flash and, when backed up properly,
automatically restores itself during startup or after a reset.
Figure 14 provides a diagram of the dual memory structure
used to manage operation and store critical user settings.
Figure 14. SRAM and Flash Memory Diagram
READING SENSOR DATA
The ADIS16488 automatically starts up and activates Page 0 for
data register access. Write 0x00 to the PAGE_ID register (DIN =
0x8000) to activate Page 0 for data access after accessing any other
page. A single register read requires two 16-bit SPI cycles. The
first cycle requests the contents of a register using the bit assignments
in Figure 17, and then the register contents follow DOUT during
the second sequence. The first bit in a DIN command is zero,
followed by either the upper or lower address for the register.
The last eight bits are don’t care, but the SPI requires the full set
of 16 SCLKs to receive the request. Figure 15 includes two register
reads in succession, which starts with DIN = 0x1A00 to request
the contents of the Z_GYRO_OUT register and follows with
0x1800 to request the contents of the Z_GYRO_LOW register.
Figure 15. SPI Read Example
Figure 16 provides an example of the four SPI signals when reading
PROD_ID in a repeating pattern. This is a good pattern to use
for troubleshooting the SPI interface setup and communications
because the contents of PROD_ID are predefined and stable.
Figure 16. SPI Read Example, Second 16-Bit Sequence
Figure 17. SPI Communication Bit Sequence
Rev. B | Page 10 of 36
Page 11
Data Sheet ADIS16488
Name
R/W
Flash
PAGE_ID
Address
Default
Register Description
Format
Reserved
N/A
N/A
0x00
0x02 to 0x04
N/A
Reserved
N/A
X_GYRO_LOW
R
No
0x00
0x10
N/A
Output, x-axis gyroscope, low word
Table 14
X_ACCL_LOW
R
No
0x00
0x1C
N/A
Output, x-axis accelerometer, low word
Table 21
Z_ACCL_OUT
R
No
0x00
0x26
N/A
Output, z-axis accelerometer, high word
Table 19
Reserved
N/A
N/A
0x00
0x32 to 0x3E
N/A
Reserved
N/A
Z_DELTVEL_LOW
R
No
0x00
0x54
N/A
Output, z-axis delta velocity, low word
Table 37
Y_GYRO_SCALE
R/W
Yes
0x02
0x06
0x0000
Calibration, scale, y-axis gyroscope
Table 72
USER REGISTERS
Table 9. User Register Memory Map (N/A = Not Applicable)
PAGE_ID R/W No 0x00 0x00 0x00 Page identifier N/A
SEQ_CNT R No 0x00 0x06 N/A Sequence counter Table 56
SYS_E_FLAG R No 0x00 0x08 0x0000 Output, system error flags Table 47
DIAG_STS R No 0x00 0x0A 0x0000 Output, self-test error flags Table 48
ALM_STS R No 0x00 0x0C 0x0000 Output, alarm error flags Table 49
TEMP_OUT R No 0x00 0x0E N/A Output, temperature Table 45
X_GYRO_OUT R No 0x00 0x12 N/A Output, x-axis gyroscope, high word Table 10
Y_GYRO_LOW R No 0x00 0x14 N/A Output, y-axis gyroscope, low word Table 15
Y_GYRO_OUT R No 0x00 0x16 N/A Output, y-axis gyroscope, high word Table 11
Z_GYRO_LOW R No 0x00 0x18 N/A Output, z-axis gyroscope, low word Table 16
Z_GYRO_OUT R No 0x00 0x1A N/A Output, z-axis gyroscope, high word Table 12
X_ACCL_OUT R No 0x00 0x1E N/A Output, x-axis accelerometer, high word Table 17
Y_ACCL_LOW R No 0x00 0x20 N/A Output, y-axis accelerometer, low word Table 22
Y_ACCL_OUT R No 0x00 0x22 N/A Output, y-axis accelerometer, high word Table 18
Z_ACCL_LOW R No 0x00 0x24 N/A Output, z-axis accelerometer, low word Table 23
X_MAGN_OUT R No 0x00 0x28 N/A Output, x-axis magnetometer, high word Table 38
Y_MAGN_OUT R No 0x00 0x2A N/A Output, y-axis magnetometer, high word Table 39
Z_MAGN_OUT R No 0x00 0x2C N/A Output, z-axis magnetometer, high word Table 40
BAROM_LOW R No 0x00 0x2E N/A Output, barometer, low word Table 44
BAROM_OUT R No 0x00 0x30 N/A Output, barometer, high word Table 42
X_DELTANG_LOW R No 0x00 0x40 N/A Output, x-axis delta angle, low word Table 28
X_DELTANG_OUT R No 0x00 0x42 N/A Output, x-axis delta angle, high word Table 24
Y_DELTANG_LOW R No 0x00 0x44 N/A Output, y-axis delta angle, low word Table 29
Y_DELTANG_OUT R No 0x00 0x46 N/A Output, y-axis delta angle, high word Table 25
Z_DELTANG_LOW R No 0x00 0x48 N/A Output, z-axis delta angle, low word Table 30
Z_DELTANG_OUT R No 0x00 0x4A N/A Output, z-axis delta angle, high word Table 26
X_DELTVEL_LOW R No 0x00 0x4C N/A Output, x-axis delta velocity, low word Table 35
X_DELTVEL_OUT R No 0x00 0x4E N/A Output, x-axis delta velocity, high word Table 31
Y_DELTVEL_LOW R No 0x00 0x50 N/A Output, y-axis delta velocity, low word Table 36
Y_DELTVEL_OUT R No 0x00 0x52 N/A Output, y-axis delta velocity, high word Table 32
Reserved N/A N/A 0x03 0x7E N/A Reserved N/A
Reserved N/A N/A 0x04 0x00 to 0x18 N/A Reserved N/A
SERIAL_NUM R Yes 0x04 0x20 N/A Serial number Table 54
Reserved N/A N/A 0x04 0x22 to 0x7F N/A Reserved N/A
FIR_COEF_Axxx R/W Yes 0x05 0x00 to 0x7E N/A FIR Filter Bank A, Coefficients 0 through 59 Table 59
FIR_COEF_Axxx R/W Yes 0x06 0x00 to 0x7E N/A FIR Filter Bank A, Coefficients 60 through 119 Table 59
FIR_COEF_Bxxx R/W Yes 0x07 0x00 to 0x7E N/A FIR Filter Bank B, Coefficients 0 through 59 Table 60
FIR_COEF_Bxxx R/W Yes 0x08 0x00 to 0x7E N/A FIR Filter Bank B, Coefficients 60 through 119 Table 60
FIR_COEF_Cxxx R/W Yes 0x09 0x00 to 0x7E N/A FIR Filter Bank C, Coefficients 0 through 59 Table 61
FIR_COEF_Cxxx R/W Yes 0x0A 0x00 to 0x7E N/A FIR Filter Bank C, Coefficients 60 through 119 Table 61
FIR_COEF_Dxxx R/W Yes 0x0C 0x00 to 0x7E N/A FIR Filter Bank D, Coefficients 60 through 119 Table 62
1
The GPIO_CTRL[7:4] bits reflect the logic levels on the DIOx lines and do not have a default setting.
Rev. B | Page 13 of 36
Page 14
ADIS16488 Data Sheet
10277-016
X-AXIS GYROSCOPE DATA
0 15150
X_GYRO_OUTX_GYRO_LOW
PIN 1
PIN 23
a
Y
m
Y
g
Y
Y-AXIS
g
X
X-AXIS
a
X
m
X
Z-AXIS
a
Z
m
Z
g
Z
10277-017
OUTPUT DATA REGISTERS
After the ADIS16488 completes its start-up process, the PAGE_ID
register contains 0x0000, which sets Page 0 as the active page
for SPI access. Page 0 contains the output data, real-time clock,
status, and product identification registers.
INERTIAL SENSOR DATA FORMAT
The gyroscope, accelerometer, delta angle, delta velocity, and
barometer output data registers use a 32-bit, twos complement
format. Each output uses two registers to support this resolution.
Figure 18 provides an example of how each register contributes
to each inertial measurement. In this case, X_GYRO_OUT is
the most significant word (upper 16 bits), and X_GYRO_LOW is
the least significant word (lower 16 bits). In many cases, using
the most significant word registers alone provide sufficient
resolution for preserving key performance metrics.
Figure 18. Gyroscope Output Format Example, DEC_RATE > 0
The arrows in Figure 19 describe the direction of the motion,
which produces a positive output response in each sensor’s
output register. The accelerometers respond to both dynamic
and static forces associated with acceleration, including gravity.
When lying perfectly flat, as shown in Figure 19, the z-axis
accelerometer output is 1 g, and the x and y accelerometers are 0 g.
ROTATION RATE (GYROSCOPE)
The registers that use the x_GYRO_OUT format are the primary
registers for the gyroscope measurements (see Table 10, Tabl e 11,
and Table 12). When processing data from these registers, use
a 16-bit, twos complement data format. Ta b le 13 provides
x_GYRO_OUT digital coding examples.
Table 10. X_GYRO_OUT (Page 0, Base Address = 0x12)
The registers that use the x_GYRO_LOW naming format provide
additional resolution for the gyroscope measurements (see
Tabl e 14, Tab l e 15, and Tab l e 16). The MSB has a weight of
0.01°/sec, and each subsequent bit has ½ the weight of the
previous one.
Table 14. X_GYRO_LOW (Page 0, Base Address = 0x10)
Figure 19. Inertial Sensor Direction Reference Diagram
Rev. B | Page 14 of 36
Page 15
Data Sheet ADIS16488
+0.8 mg
+1
0x0001
0000 0000 0000 0001
()
S
Snxnx
S
x
f
RATEDEC
Δt
t1_
;
2
,1,
+
=+×
∆
=∆
+
ωωθ
[15:0]
X-axis delta angle data; twos complement,
−720
−32,768
0x8000
1000 0000 0000 0000
ACCELERATION
The registers that use the x_ACCL_OUT format are the primary
registers for the accelerometer measurements (see Ta bl e 17,
Tabl e 18, and Tab l e 19). When processing data from these
registers, use a 16-bit, twos complement data format. Tab le 20
provides x_ACCL_OUT digital coding examples.
DELTA ANGLES
The delta angle outputs represent an integration of the gyroscope measurements and use the following formula for all
three axes (x-axis displayed):
Table 17. X_ACCL_OUT (Page 0, Base Address = 0x1E)
Bits Description
[15:0]
X-axis accelerometer data; twos complement,
±18 g range, 0 g = 0x0000, 1 LSB = 0.8 mg
Table 18. Y_ACCL_OUT (Page 0, Base Address = 0x22)
Bits Description
[15:0]
Y-axis accelerometer data; twos complement,
±18 g range, 0 g = 0x0000, 1 LSB = 0.8 mg
Table 19. Z_ACCL_OUT (Page 0, Base Address = 0x26)
Bits Description
[15:0]
Z-axis accelerometer data; twos complement,
±18 g range, 0 g = 0x0000, 1 LSB = 0.8 mg
The registers that use the x_ACCL_LOW naming format
provide additional resolution for the accelerometer
measurements (see Tab l e 21, Ta b le 22, and Tab le 23). The
MSB has a weight of 0.4 mg, and each subsequent bit has ½
the weight of the previous one.
Table 21. X_ACCL_LOW (Page 0, Base Address = 0x1C)
When using the external clock option, the time between samples
is the time between active edges on the input clock signal, as
measured by the internal clock (252 MHz). See Ta b l e 55 for
more information on the DEC_RATE register. The registers
that use the x_DELTANG_OUT format are the primary
registers for the delta angle calculations. When processing data
from these registers, use a 16-bit, twos complement data format
(see Table 24, Tab l e 25, and Tab l e 26). Tabl e 27 provides
x_DELTANG_OUT digital coding examples.
Table 24. X_DELTANG_OUT (Page 0, Base Address = 0x42)
The registers that use the x_DELTANG_LOW format provide
additional resolution for the gyroscope measurements (see
Tabl e 28, Tab l e 29, and Tabl e 30). The MSB has a weight of
~0.011° (720°/2
16
), and each subsequent bit carries a weight of
½ of the previous one.
Table 28. X_DELTANG_LOW (Page 0, Base Address = 0x40)
Bits Description
Table 29. Y_DELTANG_LOW (Page 0, Base Address = 0x44)
The delta velocity outputs represent an integration of the
accelerometer measurements and use the following formula
for all three axes (x-axis displayed):
where:
is the accelerometer, x-axis.
a
x
Δt
is the time between samples.
S
When using the internal sample clock, f
When using the external clock option, the time between samples
is the time between active edges on the input clock signal, as
measured by the internal clock (252 MHz). See Tabl e 55 for
more information on the DEC_RATE register. The registers
that use the x_DELTVEL_OUT format are the primary registers
for the delta velocity calculations. When processing data from
these registers, use a 16-bit, twos complement data format (see
Tabl e 31, Tab l e 32, and Tab l e 33). Tab le 34 provides
x_DELTVEL_OUT digital coding examples.
is equal to 2.46 kHz.
S
Table 31. X_DELTVEL_OUT (Page 0, Base Address = 0x4E)
The registers that use the x_DELTVEL_LOW naming format
provide additional resolution for the gyroscope measurements
(see Tabl e 35, Tab l e 36, and Tabl e 37). The MSB has a weight
of ~3.052 mm/sec (200 m/sec ÷ 2
16
), and each subsequent bit
carries a weight of ½ of the previous one.
Table 35. X_DELTVEL_LOW (Page 0, Base Address = 0x4C)
The registers that use the x_MAGN_OUT format are the primary
registers for the magnetometer measurements. When processing
data from these registers, use a 16-bit, twos complement data
format. Ta b le 38, Ta bl e 39, and Tabl e 40 provide each register’s
numerical format, and Tab le 41 provides x_MAGN_OUT digital
coding examples.
Table 38. X_MAGN_OUT (Page 0, Base Address = 0x28)
Bits Description
[15:0]
Table 39. Y_MAGN_OUT (Page 0, Base Address = 0x2A)
The BAROM_LOW register provides additional resolution for the
barometric pressure measurement. The MSB has a weight of
20 µbar, and each subsequent bit carries a weight of ½ of the
previous one.
Table 40. Z_MAGN_OUT (Page 0, Base Address = 0x2C)
The BAROM_OUT register (see Table 42) and BAROM_LOW
register (see Tab l e 44) provide access to the barometric pressure
data. These two registers combine to provide a 32-bit, twos
complement format. Some applications are able to use
BAROM_OUT by itself. For cases where the finer resolution
available from BAROM_LOW is valuable, combine them in
the same manner as the gyroscopes (see Figure 18). When
processing data from the BAROM_OUT register alone, use a
16-bit, twos complement data format. Tab le 42 provides the
numerical format in BAROM_OUT, and Table 43 provides
digital coding examples.
The TEMP_OUT register provides an internal temperature
measurement that can be useful for observing relative temperature
changes inside of the ADIS16488 (see Ta b le 45). Tab l e 46
provides TEMP_OUT digital coding examples. Note that this
temperature reflects a higher temperature than ambient, due to
self-heating.
Y-axis accelerometer alarm flag (1 = alarm is active)
STATUS/ALARM INDICATORS
The SYS_E_FLAG register in Tabl e 47 provides the system error
flags and new data bits for the magnetometer and barometer
outputs. The new data flags are useful for triggering data collection of the magnetometer and barometer (x_MAGN_OUT and
BARO_xxx registers) because they update at a fixed rate that is
not dependent on the DEC_RATE setting. Note that reading
SYS_E_FLAG also resets it to 0x0000.
Table 47. SYS_E_FLAG (Page 0, Base Address = 0x08)
Bits Description (Default = 0x0000)
[15] Watch dog timer flag (1 = timed out)
[14:10] Not used
9 New data flag, barometer (1 = new, unread data)1
8 New data flag, magnetometer (1 = new, unread data)2
7 Processing overrun (1 = error)
6 Flash memory update, result of GLOB_CMD[3] = 1
(1 = failed update, 0 = update successful)
5 Inertial self-test failure (1 = DIAG_STS ≠ 0x0000)
4 Sensor overrange (1 = at least one sensor overranged)
3 SPI communication error
(1 = error condition, when the number of SCLK pulses
is not equal to a multiple of 16)
The ALM_STS register in Table 49 provides the alarm bits
for the programmable alarm levels of each sensor. Note that
reading ALM_STS also resets it to 0x0000.
Table 49. ALM_STS (Page 0, Base Address = 0x0C)
Bits Description (Default = 0x0000)
[15:12] Not used
11 Barometer alarm flag (1 = alarm is active)
10 Z-axis magnetometer alarm flag (1 = alarm is active)
9 Y-axis magnetometer alarm flag (1 = alarm is active)
8 X-axis magnetometer alarm flag (1 = alarm is active)
[7:6] Not used
5 Z-axis accelerometer alarm flag (1 = alarm is active)
3 X-axis accelerometer alarm flag (1 = alarm is active)
2 Z-axis gyroscope alarm flag (1 = alarm is active)
1 Y-axis gyroscope alarm flag (1 = alarm is active)
0 X-axis gyroscope alarm flag (1 = alarm is active)
0 Alarm status flag (1 = ALM_STS ≠ 0x0000)
1
This flag restores to zero after reading the contents on BAROM_OUT.
2
This flag restores to zero after reading one x_MAGN_OUT register.
The DIAG_STS register in Tab l e 48 provides the flags for the
internal self-test function, which is from GLOB_CMD[1] (see
Tabl e 114). Note that the barometer’s flag, DIAG_STS[11], only
updates after start-up and reset operations. Note that reading
DIAG_STS also resets it to 0x0000.
Table 48. DIAG_STS (Page 0, Base Address = 0x0A)
Bits Description (Default = 0x0000)
[15:12] Not used
11 Self-test failure, barometer (1 = failed at start-up)
10 Self-test failure, Z-axis magnetometer (1 = failure)
The FIRM_REV register (see Tabl e 50) provides the firmware
revision for the internal processor. Each nibble represents a
digit in this revision code. For example, if FIRM_REV =
0x0102, the firmware revision is 1.02.
The FIRM_DM register (see Tabl e 51) contains the month and
day of the factory configuration date. FIRM_DM[15:12] and
FIRM_DM[11:8] contain digits that represent the month
of factory configuration. For example, November is the 11
month in a year and represented by FIRM_DM[15:8] = 0x11.
FIRM_DM[7:4] and FIRM_DM[3:0] contain digits that represent
the day of factory configuration. For example, the 27
the month is represented by FIRM_DM[7:0] = 0x27.
Table 51. FIRM_DM (Page 3, Base Address = 0x7A)
Bits Description
[15:12] Binary, month 10’s digit, range: 0 to 1
[11:8] Binary, month 1’s digit, range: 0 to 9
[7:4] Binary, day 10’s digit, range: 0 to 3
[3:0] Binary, day 1’s digit, range: 0 to 9
th
day of
th
The FIRM_Y register (see Tab l e 52) contains the year of the
factory configuration date. For example, the year of 2013 is
represented by FIRM_Y = 0x2013.
Table 52. FIRM_Y (Page 3, Base Address = 0x7C)
Bits Description
[15:12] Binary, year 1000’s digit, range: 0 to 9
[11:8] Binary, year 100’s digit, range: 0 to 9
[7:4] Binary, year 10’s digit, range: 0 to 9
[3:0] Binary, year 1’s digit, range: 0 to 9
PRODUCT IDENTIFICATION
The PROD_ID register (see Tabl e 53) contains the binary
equivalent of the part number (16,488 = 0x4068), and the
SERIAL_NUM register (see Tab le 54) contains a lot-specific
serial number.
Table 53. PROD_ID (Page 0, Base Address = 0x7E)
Bits Description (Default = 0x4068)
[15:0] Product identification = 0x4068
Table 54. SERIAL_NUM (Page 4, Base Address = 0x20)
Bits Description
[15:0] Lot-specific serial number
Rev. B | Page 19 of 36
Page 20
ADIS16488 Data Sheet
[15:11]
Don’t care
MEMS
SENSOR
330Hz
÷4
2.46kHz, f
s
GYROSCOPE
2-POLE: 404Hz , 757Hz
ACCELEROMETER
1-POLE: 330Hz
4×
AVERAGE
DECIMATION
FILTER
SELECTABLE
FIR FILT E R BANK
FILTR_BNK_0
FILTR_BNK_1
AVERAGE/DECIMATION FILTER
D = DEC_RATE[10:0] + 1
1
4
4
÷D
1
D
D
FIR
FILTER
BANK
10277-018
f
s
INTERNAL
CLOCK
9.84kHz
DIOx
OPTIONAL INPUT CLOCK
FNCTIO _CTRL[7] = 1
f
s
< 2400Hz
NOTES
1. WHEN FNCTIO_CTRL [ 7] = 1, EACH CLOCK PULSE ON THE DE S IGNATED DIOx LINE (FNCTIO_CTRL[5:4]) STARTS A 4-SAMPLE BURST,
AT A SAMPLE RATE OF 9.84kHz. THESE FOUR SAMPLES FEED INTO T HE 4x AVERAGE/DECIMATION FILTER, W HICH PRODUCES A
DATA RATE THAT IS EQUAL TO THE INPUT CLOCK FREQUENCY.
DIGITAL SIGNAL PROCESSING
GYROSCOPES/ACCELEROMETERS
Figure 20 provides a signal flow diagram for all of the components and settings that influence the frequency response for
the accelerometers and gyroscopes. The sample rate for each
accelerometer and gyroscope is 9.84 kHz. Each sensor has
its own averaging/decimation filter stage, which reduces the
update rate to 2.46 kSPS. When using the external clock option
(FNCTIO_CTRL[7:4], see Tabl e 117), the input clock drives a
4-sample burst at a sample rate of 9.84kSPS, which feeds into
the 4x averaging/decimation filter. This results in a data rate
that is equal to the input clock frequency.
AVERAGING/DECIMATION FILTER
The DEC_RATE register (see Ta b le 55) provides user control for
the final filter stage (see Figure 20), which averages and decimates
the accelerometers, gyroscopes, delta angle, and delta velocity data.
The output sample rate is equal to 2460/(DEC_RATE + 1). When
using the external clock option (FNCTIO_CTRL[7:4], see Ta b le
117), replace the “2460” number in this relationship, with the input
clock frequency. For example, turn to Page 3 (DIN = 0x8003),
and set DEC_RATE = 0x18 (DIN = 0x8C18, then DIN = 0x8D00)
to reduce the output sample rate to 98.4 SPS (2460 ÷ 25).
Table 55. DEC_RATE (Page 3, Base Address = 0x0C)
Bits Description (Default = 0x0000)
[15:11] Don’t care
[10:0]
Decimation rate, binary format, maximum = 2047
See Figure 20 for impact on sample rate
MAGNETOMETER/BAROMETER
When using the internal sampling clock, the magnetometer
output registers (xMAGN_OUT) update at a rate of 102.5 SPS
and the barometer output registers (BARO_xxx) update at a rate
of 51.25 SPS. When using the external clock, the magnetometers update at a rate of 1/24th of the input clock frequency and
the barometers update at a rate that is 1/48th of the input clock
frequenc y. The update rates for the magnetometer and barometers do not change with the DEC_RATE register settings.
SYS_E_FLAG[9:8] (see Tab le 47) offers new data bits for these
registers and the SEQ_CNT register provides a counter function
to help determine when there is new data in the magnetometer
and barometer registers. When SEQ_CNT = 0x0001, there is
new data in the magnetometer and barometer output registers.
The SEQ_CNT register can be useful during initialization to
help synchronize read loops for new data in both magnetometer
and barometer outputs. When beginning a continuous read loop,
read SEQ_CNT, then subtract this value from the maximum value
shown (range) in Tabl e 56 to calculate the number of internal
sample cycles until both magnetometer and barometer data is
ne w.
Table 56. SEQ_CNT (Page 0, Base Address = 0x06)
Bits Description
[6:0] Binary counter: range = 1 to 48/(DEC_RATE + 1)
Figure 20. Sampling and Frequency Response Block Diagram
Rev. B | Page 20 of 36
Page 21
Data Sheet ADIS16488
[7:6]
8
0x08
0x02 to 0x07
Not used
8
0x08
0x7E
FIR_COEF_B119
9
0x09
0x00
PAGE_ID
10
0x0A
0x0C to 0x7C
FIR FILTER BANKS
The ADIS16488 provides four configurable, 120-tap FIR filter
banks. Each coefficient is 16 bits wide and occupies its own
register location with each page. When designing a FIR filter for
these banks, use a sample rate of 2.46 kHz and scale the coefficients
so that their sum equals 32,768. For filter designs that have less
than 120 taps, load the coefficients into the lower portion of
the filter and start with Coefficient 1. Make sure that all unused
taps are equal to zero, so that they do not add phase delay to the
response. The FILTR_BNK_x registers provide three bits per
sensor, which configure the filter bank (A, B, C, D) and turn
filtering on and off. For example, turn to Page 3 (DIN =
0x8003), then write 0x0057 to FILTR_BNK_0 (DIN = 0x9657,
DIN = 0x9700) to set the x-axis gyroscope to use the FIR filter
in Bank D, to set the y-axis gyroscope to use the FIR filter in
Bank B, and to enable these FIR filters in both x- and y-axis
gyroscopes. Note that the filter settings update after writing to
the upper byte; therefore, always configure the lower byte first.
In cases that require configuration to only the lower byte of
either FILTR_BNK_0 or FILTR_BNK_1, complete the process
by writing 0x00 to the upper byte.
Table 57. FILTR_BNK_0 (Page 3, Base Address = 0x16)
Y-axis accelerometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
X-axis accelerometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Z-axis gyroscope filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Y-axis gyroscope filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
X-axis gyroscope filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Z-axis magnetometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Y-axis magnetometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
X-axis magnetometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Z-axis accelerometer filter bank selection:
00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D
Rev. B | Page 21 of 36
Filter Memory Organization
Each filter bank uses two pages of the user register structure.
See Tab l e 59, Ta b l e 60, Tab l e 61, and Ta b le 62 for the register
addresses in each filter bank.
Table 59. Filter Bank A Memory Map
Page PAGE _ID Address Register
5 0x05 0x00 PAGE_ID
5 0x05 0x02 to 0x07 Not used
5 0x05 0x08 FIR_COEF_A000
5 0x05 0x0A FIR_COEF_A001
5 0x05 0x0C to 0x7C
5 0x05 0x7E FIR_COEF_A059
6 0x06 0x00 PAGE_ID
6 0x06 0x02 to 0x07 Not used
6 0x06 0x08 FIR_COEF_A060
6 0x06 0x0A FIR_COEF_A061
6 0x06 0x0C to 0x7C
6 0x06 0x7E FIR_COEF_D119
FIR_COEF_A002 to
FIR_COEF_A058
FIR_COEF_A062 to
FIR_COEF_A118
Table 60. Filter Bank B Memory Map
Page PAGE _ID Address Register
7 0x07 0x00 PAGE_ID
7 0x07 0x02 to 0x07 Not used
7 0x07 0x08 FIR_COEF_B000
7 0x07 0x0A FIR_COEF_B001
7 0x07 0x0C to 0x7C
9 0x09 0x02 to 0x07 Not used
9 0x09 0x08 FIR_COEF_C000
9 0x09 0x0A FIR_COEF_C001
9 0x09 0x0C to 0x7C
9 0x09 0x7E FIR_COEF_C059
10 0x0A 0x00 PAGE_ID
10 0x0A 0x02 to 0x07 Not used
10 0x0A 0x08 FIR_COEF_C060
10 0x0A 0x0A FIR_COEF_C061
10 0x0A 0x7E FIR_COEF_C119
FIR_COEF_C002 to
FIR_COEF_C058
FIR_COEF_C062 to
FIR_COEF_C118
Page 22
ADIS16488 Data Sheet
12
0x0C
0x08
FIR_COEF_D060
NO FIR
FILTERING
0
–10
–20
MAGNITUDE ( dB)
–30
–40
–50
–60
–70
–80
–90
–100
020040060080010001200
FREQUENCY (Hz)
10277-019
ADCB
Table 62. Filter Bank D Memory Map
Page PAGE _ID Address Register
11 0x0B 0x00 PAGE_ID
11 0x0B 0x02 to 0x07 Not used
11 0x0B 0x08 FIR_COEF_D000
11 0x0B 0x0A FIR_COEF_D001
11 0x0B 0x0C to 0x7C
FIR_COEF_D002 to
FIR_COEF_D058
11 0x0B 0x7E FIR_COEF_D059
12 0x0C 0x00 PAGE_ID
12 0x0C 0x02 to 0x07 Not used
12 0x0C 0x0A FIR_COEF_D061
12 0x0C 0x0C to 0x7C
FIR_COEF_D062 to
FIR_COEF_D118
12 0x0C 0x7E FIR_COEF_D119
Default Filter Performance
The FIR filter banks have factory-programmed filter designs. They
are all low-pass filters that have unity dc gain. Tab le 63 provides
a summary of each filter design, and Figure 21 shows the frequency
response characteristics. The phase delay is equal to ½ of the total
number of taps.
Table 63. FIR Filter Descriptions, Default Configuration
The ADIS16488 factory calibration produces correction formulas
for the gyroscopes, accelerometers, magnetometers, and
barometers, and then programs them into the flash memory.
In addition, there are a series of user-configurable calibration
registers, for in-system tuning.
GYROSCOPES
The user-calibration for the gyroscopes includes registers for
adjusting bias and sensitivity, as shown in Figure 22.
Figure 22. User Calibration Signal Path, Gyroscopes
Manual Bias Correction
The xG_BIAS_HIGH registers (see Tabl e 64, Tab l e 65, and
Tabl e 66) and xG_BIAS_LOW registers (see Tab l e 67, Tab l e 68,
and Table 69) provide a bias adjustment function for the output
of each gyroscope sensor.
Table 64. XG_BIAS_HIGH (Page 2, Base Address = 0x12)
Bits Description (Default = 0x0000)
[15:0]
Table 65. YG_BIAS_HIGH (Page 2, Base Address = 0x16)
Bits Description (Default = 0x0000)
[15:0]
Table 66. ZG_BIAS_HIGH (Page 2, Base Address = 0x1A)
Bits Description (Default = 0x0000)
Table 67. XG_BIAS_LOW (Page 2, Base Address = 0x10)
Bits Description (Default = 0x0000)
[15:0]
Table 68. YG_BIAS_LOW (Page 2, Base Address = 0x14)
[15:0]
Table 69. ZG_BIAS_LOW (Page 2, Base Address = 0x18)
The continuous bias estimator (CBE) accumulates and
averages data in a 64-sample FIFO. The average time (t
)
A
for the bias estimates relies on the sample time base setting in
NULL_CNFG[3:0] (see Tab le 70). Users can load the correction
factors of the CBE into the gyroscope offset correction registers
(see Tab l e 64, Table 65, Tab l e 66, Tabl e 67, Tabl e 68, and Table 69)
using the bias null command in GLOB_CMD[0] (see Tabl e 114).
NULL_CNFG[13:8] provide on/off controls for the sensors that
update when issuing a bias null command. The factory default
configuration for NULL_CNFG enables the bias null command
for the gyroscopes, disables the bias null command for the accelerometers, and establishes the average time to ~26.64 seconds.
Time base control (TBC), range: 0 to 13 (default = 10);
TBC
= 2
/2460, time base,
t
B
t
= 64 × tB, average time
A
Turn to Page 3 (DIN = 0x8003) and set GLOB_CMD[0] = 1
(DIN = 0x8201, then DIN = 0x8300) to update the user offset
registers with the correction factors of the CBE. Make sure that the
inertial platform is stable during the entire average time for optimal
bias estimates.
Manual Sensitivity Correction
The x_GYRO_SCALE registers enable sensitivity adjustment
(see Tab l e 71, Table 72, and Tabl e 73).
Table 71. X_GYRO_SCALE (Page 2, Base Address = 0x04)
MEMS gyroscopes typically have a bias response to linear
acceleration that is normal to their axis of rotation. The ADIS16488
offers an optional compensation function for this effect. Turn to
Page 3 (DIN = 0x8003) and set CONFIG[7] = 1 (DIN = 0x9080,
DIN = 0x9100).
Table 78. XA_BIAS_LOW (Page 2, Base Address = 0x1C)
Bits Description (Default = 0x0000)
[15:0]
X-axis accelerometer offset correction, low word,
Twos complement, 0 g = 0x0000,
1 LSB = 0.8 mg ÷ 2
16
= ~0.0000122 mg
Table 79. YA_BIAS_LOW (Page 2, Base Address = 0x20)
Table 74. CONFIG (Page 3, Base Address = 0x0A)
Bits Description (Default = 0x00C0)
[15:8] Not used
7 Linear-g compensation for gyroscopes (1 = enabled)
6 Point of percussion alignment (1 = enabled)
1
Real-time clock, daylight savings time
(1: enabled, 0: disabled)
0
Real-time clock control
(1: relative/elapsed timer mode, 0: calendar mode)
ACCELEROMETERS
The user-calibration for the accelerometers includes registers
for adjusting bias and sensitivity, as shown in Figure 23.
Figure 23. User Calibration Signal Path, Gyroscopes
Manual Bias Correction
The xA_BIAS_HIGH (see Tab l e 75, Tab l e 76, and Ta bl e 77) and
xA_BIAS_LOW (see Tab l e 78, Tab l e 79, and Tabl e 80) registers
provide a bias adjustment function for the output of each gyroscope
sensor. The xA_BIAS_HIGH registers use the same format as
x_ACCL_OUT registers. The xA_BIAS_LOW registers use the
same format as x_ACCL_LOW registers.
[15:0]
Y-axis accelerometer offset correction, low word,
Twos complement, 0 g = 0x0000,
1 LSB = 0.8 mg ÷ 2
16
= ~0.0000122 mg
Table 80. ZA_BIAS_LOW (Page 2, Base Address = 0x24)
Tabl e 84, Tab l e 85, and Tab le 86 describe the register format
for the hard-iron correction factors: H
, HY, and HZ. These
X
registers use a twos complement format. Table 87 provides
some numerical examples for converting the digital codes
for these registers into their decimal equivalent.
Table 84. HARD_IRON_X (Page 2, Base Address = 0x28)
The soft-iron correction matrix contains correction factors for
both sensitivity (S
S
). The registers that represent each soft-iron correction factor
32
are in Ta b le 88 (S
Tabl e 92 (S
Tabl e 96 (S
22
33
, S22, S33) and alignment (S12, S13, S21, S23, S31,
11
), Tabl e 89 (S12), Tabl e 90 (S13), Tabl e 91 (S21),
11
), Table 93 (S23), Tabl e 94 (S31), Table 95 (S32), and
). Table 97 offers some numerical examples for
converting between the digital codes and their effect on the
magnetometer output, in terms of percent-change.
Table 88. SOFT_IRON_S11 (Page 2, Base Address = 0x2E)
Barometric pressure bias correction factor, low word
10277-022
PIN 1
PIN 23
POINT OF PERCUSSION
ALIGNME NT REFERENCE POINT.
SEE CONFIG[6].
BAROMETERS
The BR_BIAS_HIGH register (see Tab le 98) and
BR_BIAS_LOW register (Tabl e 99) provide an offset
control function and use the same format as the output
registers, BAROM_OUT and BAROM_LOW.
Table 98. BR_BIAS_HIGH (Page 2, Base Address = 0x42)
Bits Description (Default = 0x0000)
[15:0]
Table 99. BR_BIAS_LOW (Page 2, Base Address = 0x40)
Bits Description (Default = 0x0000)
Barometric pressure bias correction factor, high word
Twos complement, ±1.3 bar measurement range,
0 bar = 0x0000, 1 LSB = 40 µbar
Twos complement, ±1.3 bar measurement range,
0 bar = 0x0000, 1 LSB = 40 µbar ÷ 2
16
= ~0.00061 µbar
RESTORING FACTORY CALIBRATION
Turn to Page 3 (DIN = 0x8003) and set GLOB_CMD[6] = 1
(DIN = 0xA240, DIN = 0xA300) to execute the factory
calibration restore function. This function resets each user
calibration register to zero, resets all sensor data to 0, and
automatically updates the flash memory within 72 ms. See
Tabl e 114 for more information on GLOB_CMD.
POINT OF PERCUSSION ALIGNMENT
CONFIG[6] offers a point of percussion alignment function
that maps the accelerometer sensors to the corner of the package
identified in Figure 24. To activate this feature, turn to Page 3
(DIN = 0x8003), then set CONFIG[6] = 1 (DIN = 0x8A40,
DIN = 0x8B00). See Tab l e 74 for more information on the
CONFIG register.
Figure 24. Point of Percussion Reference Point
Rev. B | Page 26 of 36
Page 27
Data Sheet ADIS16488
[15:0]
[15:0]
Bits
Description (Default = 0x0000)
14
Not used
3
X-axis gyroscope alarm (1 = enabled)
ALARMS
Each sensor has an independent alarm function that provides
controls for alarm magnitude, polarity, and enabling a dynamic
rate-of-change option. The ALM_STS register (see Ta bl e 49)
contains the alarm output flags and the FNCTIO_CTRL register
(see Tab l e 117) provides an option for configuring one of the
digital I/O lines as an alarm indicator.
STATIC ALARM USE
The static alarm setting compares each sensor’s output with the
trigger settings in the xx_ALM_MAGN registers (see Tab l e 100,
Tabl e 101, Tab l e 102, Tabl e 103, Tab l e 104, Ta b l e 105, Ta b l e 106,
Tabl e 107, Table 108, and Ta b l e 109) of that sensor. The polarity
controls for each alarm are in the ALM_CNFG_x registers (see
Tabl e 110, Tab le 111, Tabl e 112). The polarity establishes
whether greater than or less than produces an alarm condition.
The comparison between the xx_ALM_MAGN value and the
output data only applies to the upper word or 16 bits of the
output data.
DYNAMIC ALARM USE
The dynamic alarm setting provides the option of comparing the
change in each sensor’s output over a period of 48.7 ms with that
sensor’s xx_ALM_MAGN register.
Table 100. XG_ALM_MAGN (Page 3, Base Address = 0x28)
Table 112. ALM_CNFG_2 (Page 3, Base Address = 0x24)
Bits Description (Default = 0x0000)
[15:8] Not used
7 Barometer alarm (1 = enabled)
6 Not used
5 Barometer alarm polarity (1 = greater than)
4 Barometer dynamic enable (1 = enabled)
2 Not used
1 Z-axis magnetometer alarm polarity (1 = greater than)
0 Z-axis magnetometer dynamic enable (1 = enabled)
Alarm Example
Tabl e 113 offers an alarm configuration example, which sets the
Z-axis gyroscope alarm to trip when Z_GYRO_OUT > 131.1°/sec
(0x199B).
Table 113. Alarm Configuration Example
DIN Description
0xAC9B Set ZG_ALM_MAGN[7:0] = 0x9B
0xAD19 Set ZG_ALM_MAGN[15:8] = 0x19
0xA000 Set ALM_CNFG_0[7:0] = 0x00
0xA103 Set ALM_CNFG_0[15:8] = 0x03
Rev. B | Page 28 of 36
Page 29
Data Sheet ADIS16488
2
Flash memory test
50 ms
RETENTION (Years)
SYSTEM CONTROLS
The ADIS16488 provides a number of system-level controls
for managing its operation, which include reset, self-test,
calibration, memory management, and I/O configuration.
GLOBAL COMMANDS
The GLOB_CMD register (see Tabl e 114) provides trigger bits for
several operations. Write 1 to the appropriate bit in GLOB_CMD to
start a function. After the function completes, the bit restores to 0.
Table 114. GLOB_CMD (Page 3, Base Address = 0x02)
Bits Description Execution Time
[15:8] Not used Not applicable
7 Software reset 120 ms
6 Factory calibration restore 75 ms
[5:4] Not used Not applicable
3 Flash memory update 375 ms
1 Self-test 12 ms
0 Bias null See Table 70
MEMORY MANAGEMENT
The data retention of the flash memory depends on temperature
and the number of write cycles. Figure 25 characterizes the
dependence on temperature, and the FLSHCNT_LOW and
FLSHCNT_HIGH registers (see Table 115 and Ta bl e 116)
provide a running count of flash write cycles. The flash updates
every time GLOB_CMD[6], GLOB_CMD[3], or GLOB_CMD[0]
is set to 1.
Table 115. FLSHCNT_LOW (Page 2, Base Address = 0x7C)
Bits Description
[15:0] Binary counter; number of flash updates, lower word
Table 116. FLSHCNT_HIGH (Page 2, Base Address = 0x7E)
Bits Description
[15:0] Binary counter; number of flash updates, upper word
Software Reset
Tur n to Page 3 (DIN = 0x8003) and then set GLOB_CMD[7] = 1
(DIN = 0x8280, DIN = 0x8300) to reset the operation, which
removes all data, initializes all registers from their flash settings,
and starts data collection. This function provides a firmware
alternative to the
RST
line (see Ta bl e 5, Pin 8).
Automatic Self-Test
Tur n to Page 3 (DIN = 0x8003) and then set GLOB_CMD[1] = 1
(DIN = 0x8202, then DIN = 0x8300) to run an automatic selftest routine, which executes the following steps:
1. Measure output on each sensor.
2. Activate self-test on each sensor.
3. Measure output on each sensor.
4. Deactivate the self-test on each sensor.
5. Calculate the difference with self-test on and off.
6. Compare the difference with internal pass/fail criteria.
7. Report the pass/fail results for each sensor in DIAG_STS.
After waiting 12 ms for this test to complete, turn to Page 0
(DIN = 0x8000) and read DIAG_STS using DIN = 0x0A00.
Note that using an external clock can extend this time. When
using an external clock of 100 Hz, this time extends to 35 ms.
Note that 100 Hz is too slow for optimal sensor performance.
600
450
300
150
0
3040
557085100125135150
JUNCTION T E M P E R ATURE (°C)
Figure 25. Flash Memory Retention
10277-023
Flash Memory Test
Tur n to Page 3 (DIN = 0x8003), and then set GLOB_CMD[2] = 1
(DIN = 0x8204, DIN = 0x8300) to run a checksum test of the
internal flash memory, which compares a factory-programmed
value with the current sum of the same memory locations. The
result of this test loads into SYS_E_FLAG[6]. Tur n to Page 0
(DIN = 0x8000) and use DIN = 0x0800 to read SYS_E_FLAG.
GENERAL-PURPOSE I/O
There are four general-purpose I/O lines: DIO1, DIO2, DIO3, and
DIO4. The FNCTIO_CTRL register controls the basic function
of each I/O line, which provides a number of useful functions.
Each I/O line will only support one function at a time. In cases
where a single line has two different assignments, the enable bit
for the lower-priority function will automatically reset to zero
and be disabled. The priority is (1) data-ready, (2) sync clock
input, (3) alarm indicator, and (4) general-purpose, where 1
identifies the highest priority and 4 indicates the lowest priority.
Rev. B | Page 29 of 36
Page 30
ADIS16488 Data Sheet
3
General-Purpose I/O Line 4 (DIO4) direction control
0
Table 117. FNCTIO_CTRL (Page 3, Base Address = 0x06)
FNCTIO_CTRL[3:0] provide some configuration options for
using one of the DIOx lines as a data-ready indicator signal,
which can drive a processor’s interrupt control line. The factory
default assigns DIO2 as a positive polarity, data-ready signal.
Use the following sequence to change this assignment to DIO1
with a negative polarity: turn to Page 3 (DIN = 0x8003) and set
FNCTIO_CTRL[3:0] = 1000 (DIN = 0x8608, then DIN = 0x8700).
The timing jitter on the data-ready signal is ±1.4 µs.
Input Sync/Clock Control
FNCTIO_CTRL[7:4] provide some configuration options for
using one of the DIOx lines as an input synchronization signal
for sampling inertial sensor data. For example, use the following
sequence to establish DIO4 as a positive polarity, input clock pin
and keep the factory default setting for the data-ready function:
turn to Page 3 (DIN = 0x8003) and set FNCTIO_CTRL[7:0]
= 0xFD (DIN = 0x86FD, then DIN = 0x8700). Note that this
command also disables the internal sampling clock, and no
data sampling takes place without the input clock signal.
When selecting a clock input frequency, consider the 330 Hz
sensor bandwidth, because under sampling the sensors can
degrade noise and stability performance.
General-Purpose I/O Control
When FNCTIO_CTRL does not configure a DIOx pin,
GPIO_CTRL provides register controls for general-purpose use
of the pin. GPIO_CTRL[3:0] provides input/output assignment
controls for each line. When the DIOx lines are inputs, monitor
their level by reading GPIO_CTRL[7:4]. When the DIOx lines
are used as outputs, set their level by writing to GPIO_CTRL[7:4].
For example, use the following sequence to set DIO1 and
DIO3 as high and low output lines, respectively, and set DIO2
and DIO4 as input lines. Turn to Page 3 (DIN = 0x8003) and set
GPIO_CTRL[7:0] = 0x15 (DIN = 0x8815, then DIN = 0x8900).
Table 118. GPIO_CTRL (Page 3, Base Address = 0x08)
Bits Description (Default = 0x00X0)1
[15:8] Don’t care
7 General-Purpose I/O Line 4 (DIO4) data level
6 General-Purpose I/O Line 3 (DIO3) data level
5 General-Purpose I/O Line 2 (DIO2) data level
4 General-Purpose I/O Line 1 (DIO1) data level
(1 = output, 0 = input)
2
1
1
GPIO_CTRL[7:4] reflects levels on DIOx lines.
General-Purpose I/O Line 3 (DIO3) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 2 (DIO2) direction control
(1 = output, 0 = input)
General-Purpose I/O Line 1 (DIO1) direction control
(1 = output, 0 = input)
POWER MANAGEMENT
The SLP_CNT register (see Tab l e 119) provides controls for
both power-down mode and sleep modes. The trade-off
between power-down mode and sleep mode is between idle
power and recovery time. Power-down mode offers the best
idle power consumption but requires the most time to recover.
Also, all volatile settings are lost during power-down but are
preserved during sleep mode.
For timed sleep mode, turn to Page 3 (DIN = 0x8003), write the
amount of sleep time to SLP_CNT[7:0] and then, set SLP_CNT[8]
= 1 (DIN = 0x9101) to start the sleep period. For a timed powerdown period, change the last command to set SLP_CNT[9] = 1
(DIN = 0x9102). To power down or sleep for an indefinite
period, set SLP_CNT[7:0] = 0x00 first, then set either
SLP_CNT[8] or SLP_CNT[9] to 1. Note that the command
takes effect when the
from sleep or power-down mode, use one of the following
options to restore normal operation:
• Assert
• Pulse
CS
from high to low.
RST
low, then high again.
•Cycle the power.
line goes high. To awaken the device
CS
For example, set SLP_CNT[7:0] = 0x64 (DIN = 0x9064), then
set SLP_CNT[8] = 1 (DIN = 0x9101) to start a sleep period of
100 seconds.
Rev. B | Page 30 of 36
Page 31
Data Sheet ADIS16488
Table 119. SLP_CNT (Page 3, Base Address = 0x10)
Bits Description
[15:10] Not used
9 Power-down mode
8 Normal sleep mode
[7:0]
Programmable time bits; 1 sec/LSB;
0x00 = indefinite
If the sleep mode and power-down mode bits are both set high,
the normal sleep mode (SLP_CNT[8]) bit takes precedence.
General-Purpose Registers
The USER_SCR_x registers (see Tabl e 120, Tab l e 121, Tab l e 122,
and Tabl e 123) provide four 16-bit registers for storing data.
Table 120. USER_SCR_1 (Page 2, Base Address = 0x74)
Bits Description
[15:0] User-defined
Table 121. USER_SCR_2 (Page 2, Base Address = 0x76)
Bits Description
[15:0] User-defined
Table 122. USER_SCR_3 (Page 2, Base Address = 0x78)
Bits Description
[15:0] User-defined
Table 123. USER_SCR_4 (Page 2, Base Address = 0x7A)
Bits Description
[15:0] User-defined
Real-Time Clock Configuration/Data
The VDDRTC power supply pin (see Tabl e 5, Pin 23) provides
a separate supply for the real-time clock (RTC) function. This
enables the RTC to keep track of time, even when the main supply
(VDD) is off. Configure the RTC function by selecting one of
two modes in CONFIG[0] (see Tabl e 74). The real-time clock
data is available in the TIME_MS_OUT register (see Ta b l e 124),
TIME_DH_OUT register (see Table 125), and TIME_YM_OUT
register (see Tab l e 126). When using the elapsed timer mode,
the time data registers start at 0x0000 when the device starts
up (or resets) and begin keeping time in a manner that is
similar to a stopwatch. When using the clock/calendar mode,
write the current time to the real-time registers in the following
sequence: seconds (TIME_MS_OUT[5:0]), minutes (TIME_
MS_OUT[13:8]), hours (TIME_DH_OUT[5:0]), day
(TIME_DH_OUT[12:8]), month (TIME_YM_OUT[3:0]),
and year (TIME_YM_OUT[14:8]). The updates to the timer
do not become active until a successful write to the TIME_
YM_OUT[14:8] byte. The real-time clock registers reflect the
newly updated values only after the next seconds tick of the
clock that follows the write to TIME_YM_OUT[14:8] (year).
Writ i ng t o T IM E_ YM_OUT[14:8] activates all timing values;
therefore, always write to this location last when updating the
timer, even if the year information does not require updating.
Write the current time to each time data register after setting
CONFIG[0] = 1 (DIN = 0x8003, DIN = 0x8A01). Note that
CONFIG[1] provides a bit for managing daylight savings time.
After the CONFIG and TIME_xx_OUT registers are
configured, set GLOB_CMD[3] = 1 (DIN = 0x8003, DIN =
0x8204, DIN = 0x8300) to back these settings up in flash, and
use a separate 3.3 V source to supply power to the VDDRTC
function. Note that access to time data in the TIME_xx_OUT
registers requires normal operation (VDD = 3.3 V and full
startup), but the timer function only requires that VDDRTC =
3.3 V when the rest of the ADIS16488 is turned off.
Table 124. TIME_MS_OUT (Page 0, Base Address = 0x78)
Bits Description
[15:14] Not used
[13:8] Minutes, binary data, range = 0 to 59
[7:6] Not used
[5:0] Seconds, binary data, range = 0 to 59
Table 125. TIME_DH_OUT (Page 0, Base Address = 0x7A)
Bits Description
[15:13] Not used
[12:8] Day, binary data, range = 1 to 31
[7:6] Not used
[5:0] Hours, binary data, range = 0 to 23
Table 126. TIME_YM_OUT (Page 0, Base Address = 0x7C)
Bits Description
[15] Not used
[14:8] Year, binary data, range = 0 to 99, relative to 2000 A.D.
[7:4] Not used
[3:0] Month, binary data, range = 1 to 12
Rev. B | Page 31 of 36
Page 32
ADIS16488 Data Sheet
10277-024
ADIS16488
MOUNTING
HOLES
6.35mm
58.42mm
64.77mm
66.04mm
59.69mm
6.35mm
1.65mm
11.30mm
1RST2SCLK
3CS4DOUT
5DNC
6DIN
7GND8GND
9GND10VDD
11VDD12VDD
13DIO114DIO2
15DIO316DIO4
J1
10277-200
10277-025
0.560 BSC 2×
ALIGNMENT HOLES
FOR MATING SOCKET
2.500 BSC 4×
19.800 BSC
39.600 BSC
42.600
21.300 BSC
5 BSC5 BSC
1.642 BSC
NOTES
1. ALL DI M E NS IONS IN mm UNITS.
0.4334 [11.0]
0.0240 [0.610]
0.019685
[0.5000]
(TYP)
0.054 [1.37]
0.0394 [1.00]
0.0394 [1.00]
0.1800
[4.57]
NONPLATED
THRU HOLE 2×
0.022± DIA (TYP)
0.022 DIA THRU HOLE (TYP)
NONPLATED THRU HOL E
10277-026
APPLICATIONS INFORMATION
PROTOTYPE INTERFACE BOARD
The ADIS16488/PCBZ includes one ADIS16488AMLZ, one
interface printed circuit board (PCB), and four M2 × 0.4 × 18 mm
machine screws. The interface PCB provides four holes for
ADIS16488AMLZ attachment and four larger holes for
attaching the interface PCB to another surface. The
ADIS16488AMLZ attachment holes are pre-tapped for M2 ×
0.4 mm machine screws and the four larger holes, located in
each corner, support attachment with M2.5 or #4 machine
screws. J1 is a dual-row, 2 mm (pitch) connector that works
with a number of ribbon cable systems, including 3M Part
Number 152212-0100-GB (ribbon crimp connector) and 3M Part
Number 3625/12 (ribbon cable). Note that J1 has 16 pads but
currently uses a 12-pin connector. The extra pins accommodate
future evaluation system plans.
Figure 27 provides the pin assignments for J1. The pin
descriptions match those listed in Tab l e 5. The C1 and C2
locations provide solder pads for extra capacitors, which
can provide additional filtering for start-up transients and
supply noise.
INSTALLATION TIPS
Figure 28 and Figure 29 provide the mechanical design
information used for the ADIS16488/PCBZ. Use these
figures when implementing a connector-down approach,
where the mating connector and the ADIS16488AMLZ are on
the same surface. When designing a connector-up system, use
the mounting holes shown in Figure 28 as a guide in designing
the bulkhead mounting system and use Figure 29 as a guide in
developing the mating connector interface on a flexible circuit
or other connector system. The suggested torque setting for the
attachment hardware is 40 inch-ounces, or 0.2825 N-m.
Figure 26. Physical Diagram for the ADIS16488/PCBZ
Figure 27. ADIS16488/PCBZ J1 Pin Assignments
Rev. B | Page 32 of 36
Figure 28. Suggested Mounting Hole Locations, Connector Down
Figure 29. Suggested Layout and Mechanical Design for the Matin g Connector
Page 33
Data Sheet ADIS16488
10-20-2010-B
BOTTOM VIEW
FRONT VIEW
44.254
44.000
43.746
42.854
42.600
42.346
47.254
47.000
46.746
14.254
14.000
13.746
3.454
3.200
2.946
39.854
39.600
39.346
Ø 2.40 BSC
(4 PLCS)
19.80
2.20 BSC
DETAIL A
DETAIL B
5.50
BSC
5.50
BSC
1.00 BSC
1.142 BSC
2.84 BSC
DETAIL A
DETAIL B
1.00 BSC
PITCH
0.30 SQ BSC
OUTLINE DIMENSIONS
Figure 30. 24-Lead Module with Connector Interface [MODULE]
(ML-24-6)
Dimensions shown in millimeters
ORDERING GUIDE
1, 2
Model
ADIS16488AMLZ −40°C to +85°C 24-Lead Module with Connector Interface [MODULE] ML-24-6
ADIS16488/PCBZ Interface PCB
1
Z = RoHS Compliant Part.
2
The ADIS16488/PCBZ includes one ADIS16488AMLZ and one interface board PCB. See Figure 26 for more information on the interface PCB.
Temperature Range Package Description Package Option