Datasheet ADIS16060 Datasheet (ANALOG DEVICES)

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FEATURES

Complete angular rate digital gyroscope

14-bit resolution

Scalable measurement range

Initial range: ±80°/sec (typical)

Increase range with external resistor
Z-axis (yaw rate) response
SPI digital output interface
High vibration rejection over wide frequency
2000 g-pow
1 kHz bandwidth

Selectable using external capacitor
Externally controlled self-test
Internal temperature sensor output
Dual auxiliary 14-bit ADC inputs
Absolute rate output for precision applications
5 V single-supply operation

8.2 mm × 8.2 mm × 5.2 mm package

−40°C to +105°C operation
RoHS compliant

ered shock survivability

Yaw Rate Gyroscope with SPI

ADIS16060

GENERAL DESCRIPTION

The ADIS16060 is a yaw rate gyroscope with an integrated
serial peripheral interface (SPI). It features an externally
selectable bandwidth response and scalable dynamic range.

The SPI port provides access to the rate sensor, an internal

emperature sensor, and two external analog signals (using

t
internal ADC). The digital data available at the SPI port is
proportional to the angular rate about the axis that is normal
to the top surface of the package.

An additional output pin provides a precision voltage reference.

digital self-test function electromechanically excites the sensor

A
to test the operation of the sensor and the signal-conditioning
circuits.

The ADIS16060 is available in an 8.2 mm × 8.2 mm × 5.2 mm,
16-

terminal, peripheral land grid array (LGA) package.

APPLICATIONS

Platform stabilization
Image stabilization
Guidance and control
Inertia measurement units
Robotics

AIN1

AIN2

FUNCTIONAL BLOCK DIAGRAM

FILT RATE

RATE

SENSOR

TEMPERATURE

SENSOR

MUX

V

CC

14-BIT

GND

Figure 1.

ADC

ADIS16060

DIGITAL

CONTRO L

SCLK

DIN

DOUT

MSEL1

MSEL2

07103-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2008 Analog Devices, Inc. All rights reserved.

ADIS16060

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TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Specifications .................................................................. 5

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics ............................................. 8

Theory of Operation ........................................................................ 9

Analog-to-Digital Converter Input............................................ 9

Rate Sensitive Axis ....................................................................... 9

Basic Operation .............................................................................. 10

Serial Peripheral Interface (SPI)............................................... 10

Output Data Formatting............................................................ 10

ADC Conversion........................................................................ 10

Applications Information.............................................................. 11

Supply and Common Considerations ..................................... 11

Setting Bandwidth...................................................................... 11

Increasing Measurement Range............................................... 11

Dynamic Digital Sensitivity Scaling ........................................ 11

Temperature Measurements ..................................................... 11

Self-Test Function ...................................................................... 11

Outline Dimensions ....................................................................... 12

Ordering Guide .......................................................................... 12

REVISION HISTORY

1/08—Revision 0: Initial Version

Rev. 0 | Page 2 of 12

ADIS16060

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SPECIFICATIONS

TA = 25°C, VCC = 5 V, angular rate = 0°/sec, C

= 0.01 F, ±1 g, unless otherwise noted.

OUT

Table 1.

Parameter Conditions Min

1

Typ Max Unit

SENSITIVITY

Dynamic Range
Initial

Change Over Temperature

2

3

Full-scale range over specifications range ±50 ±80 °/sec
Clockwise rotation is positive output,

= −40°C to +85°C

T

A

0.0110 0.0122 0.0134 °/sec/LSB

VCC = 4.75 V to 5.25 V ±3 %

Nonlinearity Best fit straight line 0.1 °/sec

NULL

Initial Nominal 0°/sec output is 8192 LSB −44 +44 °/sec
Change Over Temperature

3

VCC = 4.75 V to 5.25 V ±0.11 °/sec/°C
Turn-On Time Power on to ±0.5°/sec of final value 10 ms
Linear Acceleration Effect Any axis ±0.1 °/sec/g
Voltage Sensitivity VCC = 4.75 V to 5.25 V ±0.5 °/sec/V

NOISE PERFORMANCE

Rate Noise Density @ 25°C 0.04 °/sec/√Hz

FREQUENCY RESPONSE

3 dB Bandwidth (User-Selectable)

4

C

= 0 μF 1 1000 Hz

OUT

Sensor Resonant Frequency 14.5 kHz

SELF-TEST RESPONSE

Positive Self-Test
Negative Self-Test

5

5

See Table 5 +6226 LSB

See Table 5 −6226 LSB

TEMPERATURE SENSOR

Reading at 298 K 7700 8192 8684 LSB
Scale Factor Proportional to absolute temperature 0.034 K/LSB

LOGIC INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, I

IN

INH

INL

0.7 × V

V

CC

0.8 V

Typically 10 nA −1 +1 μA
Input Capacitance, CIN (DIN) 8 pF
Input Capacitance, CIN (MSEL1, MSEL2 )

ANALOG INPUTS For VIN < V

5 pF

CC

Resolution 14 Bits
Integral Nonlinearity Best fit straight line −6 +6 LSB
Differential Nonlinearity No missing codes to 13 bits −1 +6 LSB
Offset Error −10 +10 mV
Offset Error Temperature Drift ±0.3 ppm/°C
Gain Error −40 +40 mV
Gain Error Temperature Drift ±0.3 ppm/°C
Input Voltage Range 0 V

CC

V

Leakage Current 1 nA

DIGITAL OUTPUTS

Output High Voltage, V
Output Low Voltage, V

OH

OL

I

= 500 μA VCC − 0.3 V

SOURCE

I

= 500 μA 0.4 V

SINK

CONVERSION RATE

Conversion Time 10 μs
Throughput Rate 100 kSPS

Rev. 0 | Page 3 of 12

ADIS16060

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Parameter Conditions Min

1

Typ Max Unit

POWER SUPPLY All at TA = −40°C to +85°C

V

CC

4.75 5 5.25 V
VCC Quiescent Supply Current VCC @ 5 V, 50 kSPS sample rate 4.3 6.5 mA
Power Dissipation VCC @ 5 V, 50 kSPS sample rate 22 33 mW

TEMPERATURE RANGE Operation −40 +105 °C

1

All minimum and maximum specifications are guaranteed. Typical specifications are neither tested nor guaranteed.

2

Dynamic range is the maximum full-scale measurement range possible, including output swing range, initial offset, sensitivity, offset drift, and sensitivity drift at 5 V supply.

3

Defined as the output change from ambient to maximum temperature, or ambient to minimum temperature.

4

Frequency at which the response is 3 dB down from dc response. Bandwidth = 1/(2 × π × 200 kΩ × C

5

Self-test response varies with temperature.

OUT

). For C

= 0.01 μF, bandwidth = 80 Hz.

OUT

Rev. 0 | Page 4 of 12

ADIS16060

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TIMING SPECIFICATIONS

TA = 25°C, angular rate = 0°/sec, unless otherwise noted.

Table 2. Read/Output Sequence

Parameter Figure Reference Symbol Min Typ Max Unit

Serial Clock Frequency 2.9 MHz
Throughput Rate See Figure 2 t
MSEL1 Falling to SCLK Low

MSEL1 Falling to SCLK Rising
SCLK Falling to Data Remains Valid See Figure 2 t
MSEL1 Rising Edge to D

High Impedance

OUT

SCLK Falling to Data Valid See Figure 2 t
Acquisition Time See Figure 2 t
D

Fall Time See Figure 2 t

OUT

D

Rise Time See Figure 2 t

OUT

Data Setup Time See Figure 3 t
SCLK Falling Edge to MSEL2 Rising Edge See Figure 3 t
Data Hold Time See Figure 3 t

1

Guaranteed by design. All input signals are specified with tR = tF = 5 ns (10% to 90% of VCC) and timed from a voltage level of 1.6 V. The 5 V operating range spans from

4.75 V to 5.25 V.

Timing Diagrams

t

CYC

MSEL1

t

SUCS

SCLK

DOUT

145

t

CSD

HIGH-Z

NOTE:
A MINIMUM OF 20 CLOCK CYCLES ARE REQUIRED F OR 14-BIT CO NVERSION.

t

EN

D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

0

(MSB) (LSB)

Figure 2. Serial Interface Timing Diagram–Read/Output Sequence (CPOL = 0, CPHA = 0)

1

See Figure 2 t
See Figure 2 t

See Figure 2 t

COMPLETE CYCLE

t

HDO

CYC

CSD

SUCS

HDO

DIS

EN

ACQ

F

R

5

7

6

POWER DOW N

t

7

100 kHz
0 μs

20 ns
5 16 ns

14 100 ns
16 50 ns
400 ns
11 25 ns
11 25 ns
5 5 ns
0 0 ns

4.5 ns

t

ACQ

t

DIS

HIGH-Z

0

07103-002

MSEL2

SCLK

DIN

NOTE:
THE LAST EIGHT BITS CLOCKED IN ARE LATCHED WITH THE RISING EDGE OF THE MSEL2 LINE.

DB7

t

5

DB6 DB5 DB4 DB3 DB2 DB1 DB0

Figure 3. Serial interface Timing–Input/Configuration Sequence (CPOL = 0, CPHA = 1)

Rev. 0 | Page 5 of 12

t

6

07103-003

ADIS16060

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ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Acceleration (Any Axis, Unpowered, 0.5 ms) 2000 g
Acceleration (Any Axis, Powered, 0.5 ms) 2000 g
VCC to GND −0.3 V to +6.0 V
VCC to GND −0.3 V to VCC + 0.3 V
Analog Input Voltage to GND −0.3 V to VCC + 0.3 V
Digital Input Voltage to GND −0.3 V to +7.0 V
Digital Output Voltage to GND −0.3 V to VCC + 0.3 V
Operating Temperature Range −40°C to +105°C
Storage Temperature Range −65°C to +150°C

Stresses above those listed under the Absolute Maximum
Ratings may cause permanent damage to the device. This is a
stress rating only; functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Drops onto hard surfaces can cause shocks of greater than

g and exceed the absolute maximum rating of the device.

2000
Care should be exercised in handling the device to avoid damage.

ESD CAUTION

Rev. 0 | Page 6 of 12

ADIS16060

2

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

MSEL2

VIEW

FILT

TOP

CC

V

GND

GND

GND

GND

07103-004

7.373 BSC

9 10 11 12

AIN2

CC

V

AIN1

2.5050 BSC
8×

5.010 BSC

2×

4×

1.000 BSC
16×

Figure 5. Second-Level Assembly Pad Layout

MSEL1

16

15 14 13

DIN

SCLK

DOUT

4 3 2 1

NC

NOTES

1. NC = NO CONNECT
. THIS IS NOT AN ACTUAL “T OP VIEW ,” AS THE PI NS ARE NOT VI SIBLE F ROM THE

TOP. THIS IS A LAYOUT VIEW, WHICH REP RESENTS THE PIN CONFI GURATIO N, IF
THE PACKAGE IS LOOKED T HROUGH FROM THE TOP . THIS CO NFIGURATI ON IS
PROVIDED FOR PCB LAYOUT PURPOSES.

PIN 1
INDICATO R

ADIS16060

“LOOK THROUGH”

(Not to Scale)

5 6 7 8

RATE

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Type1Description

1 DIN I SPI Data Input.
2 SCLK I SPI Serial Clock.
3 DOUT O SPI Data Output.
4 NC No Connect.
5 RATE O Buffered Analog Output. Represents the angular rate signal.
6 FILT I External Capacitor Connection to Control Bandwidth.
7 V

CC

S Power Supply.
8 AIN1 I External Analog Input Channel 1.
9 AIN2 I External Analog Input Channel 2.
10 GND S Ground.
11 GND S Ground.
12 GND S Ground.
13 GND S Ground.
14 V
15
16

1

I = input; O = output; S = power supply.

CC

MSEL2
MSEL1

S Power Supply.

I SPI, Mode Select 2. Used for data input functions.

I SPI, Mode Select 1. Used for data output functions.

3.6865 BSC
8×

0.5000 BSC

16×

0.6700 BSC
12×

07103-005

Rev. 0 | Page 7 of 12

ADIS16060

–

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TYPICAL PERFORMANCE CHARACTERISTICS

0.18

0.16

0.14

0.12

0.10

0.08

0.06

0.04

PERCENT OF POPULATION (%)

0.02

0

–44

–40

–36

–32

–28

–24

–20

–16

–8

–4

–12

BIAS (°/sec)

048

Figure 6. Initial Bias Error Distribution, 25°C, V

121620242832364044

= 5 V

CC

07103-020

6800

6600

6400

6200

6000

5800

5600

5400

5200

5000

DIGITAL RATE OUTPUT RESPONSE (LSB)

4800

–60 120100806040200–20–40

TEMPERATURE ( °C)

Figure 9. Positive Self-Test Response vs. Temperature, V

CC

= 5 V

07103-009

0.30

0.25

0.20

0.15

0.10

PERCENT OF POPULATION (%)

0.05

0

–0.60

–0.55

–0.50

–0.45

–0.40

–0.35

–0.30

–0.25

–0.20

BIAS DRIFT OVER TEMPERATURE (°/sec/°C)

–0.15

Figure 7. Bias Drift Over −40°C to +85°C, V

0.04

0.03

0.02

0.01

0

–0.01

SENSITIV ITY ERROR (%)

–0.02

–0.03

4800

–5000

–5200

–5400

–5600

–5800

–6000

–6200

–6400

–6600

DIGITAL RATE OUTPUT RESPONSE (LSB)

0

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

0.50

0.55

–0.10

–0.05

= 5 V

CC

µ + 1σ

µ

µ – 1σ

0.60

07103-021

–6800

–60 120100806040200–20–40

TEMPERATURE ( °C)

Figure 10. Negative Self-Test Output Response vs. Temperature, V

0.1

0.01

ROOT ALL EN VARIANCE (°/ sec)

CC

= 5 V

07103-010

–0.04

–60 120100806040200–20–40

Figure 8. Sensitivity Drift vs. Temperature, V

TEMPERATURE (° C)

CC

= 5 V

07103-008

Rev. 0 | Page 8 of 12

0.001
1 100010010

Figure 11. Allen Variance, 25°C, V

Tau (°C)

= 5 V

CC

07103-011

ADIS16060

A

V

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THEORY OF OPERATION

The ADIS16060 operates on the principle of a resonator
gyroscope. Two polysilicon sensing structures each contain a
dither frame that is electrostatically driven to resonance. This
generates the necessary velocity element to produce a Coriolis
force while rotating. At two of the outer extremes of each frame,
orthogonal to the dither motion, are movable fingers that are
placed between fixed pickoff fingers to form a capacitive pickoff
structure that senses Coriolis motion.

The resulting signal is fed to a series of gain and demodulation
s

tages that produce the electrical rate signal output. The rate
signal is then converted to a digital representation of the output
on the SPI pins. The dual-sensor design provides linear acceleration
(vibration, shock) rejection. Fabricating the sensor with the signal­conditioning electronics preserves signal integrity in noisy
environments.

The electrostatic resonator requires 14 V to 16 V for operation.

ecause only 5 V is typically available in most applications, a charge

B
pump is included on chip. After the demodulation stage, a single­pole, low-pass filter on the chip is used to limit high frequency
artifacts before final amplification. The frequency response is
dominated by the second low-pass filter, which is set by adding
capacitance across RATE and FILT.

ANALOG-TO-DIGITAL CONVERTER INPUT

Figure 12 shows an equivalent circuit of the input structure of
the ADIS16060 auxiliary ADC.

The two diodes, D1 and D2, provide ESD protection for the analog
in

puts, AINx (AIN1 and AIN2). Care must be taken to ensure
that the analog input signal does not exceed the supply rails by
more than 0.3 V, because exceeding this level causes these diodes to
become forward-biased and to start conducting current. However,
these diodes can handle a forward-biased current of 130 mA
maximum. For instance, these conditions may eventually occur
when the input signals exceed either V

DD

or GND.

CC

During the acquisition phase, the impedance model for AINx is a
parallel combination of the capacitor C
by the series connection of R
capacitance. R

is typically 600 Ω and is a lumped component

IN

and CIN. C

IN

and the network formed

PIN

is primarily the pin

PIN

made up of some serial resistors and the on resistance of the
switches. C

is typically 30 pF and mainly functions as the

IN

ADC sampling capacitor.

During the conversion phase, when the switches are open, the
in

put impedance is limited to C

. RIN and CIN make a 1-pole,

PIN

low-pass filter that reduces undesirable aliasing effects and
limits the noise.

When the source impedance of the driving circuit is low, the

C input can be driven directly. Large source impedances

AD
significantly affect the ac performance, especially THD. The dc
performances are less sensitive to the input impedance.

RATE SENSITIVE AXIS

RATE

AXIS

LONGIT UDINAL

AXIS

1

LATERAL

AXIS

Figure 13. Rate Signal Increases wi

POSITIVE
MEASUREMENT
DIRECTIO N

8

5

4

th Clockwise Rotation

07103-019

INx

GND

Figure 12. Equivalent Analog Input Circuit

D1

C

PIN

D2

R

C

IN

IN

07103-018

Rev. 0 | Page 9 of 12

ADIS16060

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BASIC OPERATION

The ADIS16060 is designed for simple integration into indus­trial system designs, requiring only a 5 V power supply, two
mode select lines, and three serial communications lines. The
SPI handles all digital I/O communication in the ADIS16060.

SERIAL PERIPHERAL INTERFACE (SPI)

The ADIS16060 SPI port includes five signals: Mode Select 1

MSEL1

(
input (DIN), and data output (DOUT). The
when reading data out of the sensor (DOUT), and the
line is used when configuring the sensor (DIN).

Selecting Output Data

Refer to Table 5 to determine the appropriate DIN bit sequence
based on the required data source. Tabl e 2 and Figure 3 provide
t
After the
into the internal control register, which represents DB0 to DB7
in Tab l e 5 .

), Mode Select 2 (

he necessary timing details for the input configuration sequence.

MSEL2

goes high, the last eight DIN bits are loaded

MSEL2

), serial clock (SCLK), data

MSEL1

line is used

MSEL2

Output Data Access

Use Tabl e 2 and Figure 2 to determine the appropriate timing
considerations for reading output data.

OUTPUT DATA FORMATTING

All of the output data is in an offset-binary format, which in
this case, means that the ideal output for a zero rate condition is
8192 codes. If the sensitivity is equal to +0.0122°/sec/LSB, a rate
of +10°/sec results in a change of 820 codes, and a digital rate
output of 9012 codes. If an offset error of −20°/sec is introduced,
the output is reduced by 1639 codes (if typical sensitivity is
assumed), resulting in a digital rate output of 6552 codes.

ADC CONVERSION

The internal successive approximation ADC begins the conversion
process on the falling edge of
MSB first on the DOUT line at the 6
shown in Figure 2. The entire conversion process takes 20 SCLK
cy

cles. After

preparation for the next conversion cycle.

MSEL1

MSEL1

and starts to place data

th

falling edge of SCLK, as

goes high, the acquisition process starts in

Table 5. DIN Configuration Bit Assignments

Action DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Measure Angular Rate (Gyro) 0 0 1 0 0 0 0 0
Measure Temperature 0 0 0 1 0 0 0 0
Measure AIN2 1 0 0 0 0 0 0 0
Measure AIN1 0 1 0 0 0 0 0 0
Set Positive Self-Test and Output for Angular Rate 0 0 1 0 0 0 1 0
Set Negative Self-Test and Output for Angular Rate 0 0 1 0 0 0 0 1

Rev. 0 | Page 10 of 12

ADIS16060

(

)

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APPLICATIONS INFORMATION

SUPPLY AND COMMON CONSIDERATIONS

Power supply noise and transient behaviors can influence the
accuracy and stability of any sensor-based measurement system.
The ADIS16060 provides 0.2 F of decoupling capacitance on
the V

pin. Depending on the level of noise present in the

CC

power supply of the system, the ADIS16060 may not require
any additional decoupling capacitance for this supply.

SETTING BANDWIDTH

External Capacitor C
chip R

resistor to create a low-pass filter to limit the

OUT

bandwidth of the ADIS16060 rate response. The –3 dB
frequency set by R

=

f

OUT

()

and can be well controlled because R
during manufacturing to be 200 kΩ ± 5%. Setting the range
with an external resistor impacts R

=

R

OUT

()

In general, an additional hardware or software filter is added to
a

ttenuate high frequency noise arising from demodulation spikes
at the gyro’s 14 kHz resonant frequency. The noise spikes at 14 kHz
can be clearly seen in the power spectral density curve shown in
Figure 14.

INCREASING MEASUREMENT RANGE

Scaling the measurement range requires the addition of a single
resistor, connected across the RATE and FILT pins. The following
equation provides the proper relationship for selecting the
appropriate resistor:

=

R

EXT

where ∆ is the increase in range.

is used in combination with the on-

OUT

and C

OUT

1

π2

×

k200

+

k200

is

OUT

CR

×××

OUTOUT

has been trimmed

OUT

as follows:

OUT

R

EXT

R

EXT

k200

1

−Δ

1

0.1

0.01

0.001

NOISE DENSI TY (°/ sec/ Hz)

0.0001
10 100 100k1k 10k

Figure 14. Noise Spectral Density with 2-Pole, Low-Pass Filter (40 Hz and 250 Hz)

FREQUENCY (Hz)

07103-118

DYNAMIC DIGITAL SENSITIVITY SCALING

This device supports in-system, dynamic, digital sensitivity scaling.

TEMPERATURE MEASUREMENTS

When using the temperature sensor, an acquisition time of
greater than 40 µs helps to ensure proper setting and measurement
accuracy. See Tabl e 2 and Figure 2 for details on the definition
o

f acquisition time.

SELF-TEST FUNCTION

Exercising the self-test function is simple, as shown in this
example.

1. C

onfigure using DIN = 00100010 (positive self-test,

rate selected).

ad output.

2. Re

onfigure using DIN = 00100000 (positive self-test off,

3. C

rate selected)

4. Re

ad output.

5. C

alculate the difference between Step 2 and Step 4, and
compare this with the specified self-test output changes in
the Specifications section.

Exercising the negative self-test requires changing the sequence
in S

tep 1 to DIN = 00100001.

Rev. 0 | Page 11 of 12

ADIS16060

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OUTLINE DIMENSIONS

8.35

MAX

TOP VIEW

7.00
TYP

SIDE VIEW

5.010
BSC

(4×)

58

BOTTOM VIEW

8.20
TYP

5.20

MAX

7.373
BSC

(2×)

0.200

MIN

(ALL SIDES)

2.505
BSC

(8×)

13 16

12

9

Figure 15. 16-Terminal Stacked Land Grid Array [LGA]

(CC-16-1)

Dim

ensions shown in millimeters

PIN 1
INDICATOR

0.873 BSC
(16×)

1

0.797 BSC
(12×)

4

0.373 BSC
(16×)

022107-B

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADIS16060BCCZ
ADIS16060/PCBZ

1

Z = RoHS Compliant Part.

1

1

−40°C to +105°C 16-Terminal Stacked Land Grid Array (LGA) CC-16-1
Evaluation Board

©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07103-0-1/08(0)

Rev. 0 | Page 12 of 12