Datasheet ADG859 Datasheet (ANALOG DEVICES)

1.3 Ω CMOS, 1.8 V to 5.5 V Single SPDT

S2S

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FEATURES

1.8 V to 5.5 V single supply
Tiny 1.65 mm × 1.65 mm package
Low on resistance: 1.3 Ω at 5 V supply
High current-carrying capability:

300 mA

500 mA peak current at 5 V
Rail-to-rail operation
Typical power consumption: <0.01 μW
TTL-/CMOS-compatible inputs

APPLICATIONS

Cellular phones
PDAs
MP3 players
Battery-powered systems
Audio and video signal routing
Modems
PCMCIA cards
Hard drives
Relay replacement

continuous current

Switch/2:1 MUX in SOT-66 Package

ADG859

FUNCTIONAL BLOCK DIAGRAM

ADG859

1

IN

SWITCHES SHOWN

FOR A LOGIC 1 INPUT

Figure 1.

D

05258-001

GENERAL DESCRIPTION

The ADG859 is a monolithic, CMOS SPDT (single pole, double
throw) switch that operates with a supply range of 1.8 V to

5.5 V. It is designed to offer low on resistance of 2.3 Ω maxi­mum over the entire temperature range of −40°C to +125°C.
The ADG859 also has the capability of carrying large amounts
of current, typically 300 mA at 5 V operation. These features
make the ADG859 an ideal solution for applications that are
space-constrained, such as handsets, PDAs, and MP3 players.

Each switch conducts equally well in both
The device exhibits break-before-make switching action,
thereby preventing momentary shorting when switching
channels.

The ADG859 is available in a tiny 6-lead SOT-66 package.

directions when on.

PRODUCT HIGHLIGHTS

1. Low on resistance: 2.3 Ω maximum over the full

temperature range of −40°C to +125°C.

2. H

igh current-carrying capability.

3. T

iny 6-lead, 1.65 mm × 1.65 mm SOT-66 package.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.

ADG859

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TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

REVISION HISTORY

12/06—Rev. 0 to Rev. A

Changes to the Ordering Guide.................................................... 13

6/05—Revision 0: Initial Version

ESD Caution...................................................................................5

Pin Configuration and Function Descriptions..............................6

Typical Perf or m an c e Charac t e ristic s ..............................................7

Test Ci r c ui t s..................................................................................... 10

Te r mi n ol o g y .................................................................................... 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 13

Rev. A | Page 2 of 16

ADG859

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SPECIFICATIONS

VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted.1

Table 1.

Parameter

ANALOG SWITCH

Analog Signal Range 0 to VDD V
On Resistance, RON 1.3 Ω typ VDD = 4.5 V, VS = 0 V to VDD, IS = −100 mA;

2.1 2.2 2.3 Ω max Figure 16
On Resistance Match Between Channels, ∆RON 0.01 Ω typ VDD = 4.5 V, VS = 4.5V, IS = −100 mA;

0.093 0.163 0.163 Ω max Figure 16
On Resistance Flatness, R

0.32 Ω typ VDD = 4.5 V, VS = 0 V to VDD, IS = −100 mA;

FLAT (ON)

0.45 0.6 0.65 Ω max Figure 16
LEAKAGE CURRENTS VDD = 5.5 V

Source Off Leakage, IS (Off) ±0.02 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; Figure 17
Channel On Leakage, ID, IS (On) ±0.02 nA typ VS = VD = 1 V or 4.5 V; Figure 18

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, I

INL

2 V min

INH

0.8 V max

INL

or I

0.005 μA typ VIN = V

INH

±0.1 μA max
Digital Input Capacitance, CIN 4 pF typ

DYNAMIC CHARACTERISTICS2

tON 8 ns typ RL = 50 Ω, CL = 35 pF
10 11 12 ns max VS = 3 V; Figure 19
t

4.5 ns typ RL = 50 Ω, CL = 35 pF

OFF

6 6.5 7 ns max VS = 3 V; Figure 19
Break-Before-Make Time Delay, t

4 ns typ RL = 50 Ω, CL = 35 pF

BBM

1 ns min VS1 = VS2 = 1.5 V; Figure 20
Charge Injection ±13 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; Figure 21
Off Isolation −78 dB typ

Channel-to-Channel Crosstalk −78 dB typ

−3 dB Bandwidth
Insertion Loss

Total Harmonic Distortion (THD + N) 0.062 %

CS (Off) 18 pF typ f = 1 MHz
CD, CS (On) 45 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = 5.5 V

IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V
1 μA max

1

Temperature range is −40°C to +125°C.

2

Guaranteed by design; not subject to production test.

25°C

−40°C to
+85°C

−40°C to
+125°C Unit

Test Conditions/Comments

or V

INH

INL

= 50 Ω, CL = 5 pF, f = 100 kHz;

R

L

Figure 22

= 50 Ω, CL = 5 pF, f = 100 kHz;

R

L

Figure 23

125 MHz typ RL = 50 Ω, CL = 5 pF; Figure 24

−0.11

dB typ RL = 50 Ω, CL = 5 pF; Figure 24

= 32 Ω, f = 20 Hz to 20 kHz,

R

L

= 3 V p-p; Figure 14

V

S

Rev. A | Page 3 of 16

ADG859

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VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.1

Table 2.

Parameter

ANALOG SWITCH

Analog Signal Range 0 to VDD V
On Resistance, RON 3 Ω typ VDD = 2.7 V, VS = 0 V to VDD, IS = −100 mA;

4.3 4.5 4.7 Ω max Figure 16
On Resistance Match Between Channels, ∆RON 0.03 Ω typ VDD = 2.7 V, VS = 1.2 V, IS = −100 mA;

0.11 0.15 0.15 Ω max Figure 16
LEAKAGE CURRENTS VDD = 3.6 V

Source Off Leakage, IS (Off) ±0.02 nA typ VS = 3 V/1 V, VD = 1 V/3 V; Figure 17
Channel On Leakage, ID, IS (On) ±0.05 nA typ VS = VD = 1 V or 3 V; Figure 18

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

2.0 V min

INH

0.8 V max VDD = 3 V to 3.6 V

INL

0.7 V max VDD = 2.7 V
Input Current, I

or IIN 0.005 μA typ VIN = V

INL

±0.1 ±0.1 μA max
Digital Input Capacitance, CIN 4 pF typ

DYNAMIC CHARACTERISTICS2

tON 11 ns typ RL = 50 Ω, CL = 35 pF
15 16 17 ns max VS = 1.5 V; Figure 19
t

6 ns typ RL = 50 Ω, CL = 35 pF

OFF

9.5 10 11 ns max VS = 1.5 V; Figure 19
Break-Before-Make Time Delay, t

5 ns typ RL = 50 Ω, CL = 35 pF

BBM

1 ns min VS1 = VS2 = 1.5 V; Figure 20
Charge Injection ±7 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; Figure 21
Off Isolation −78 dB typ

Channel-to-Channel Crosstalk −78 dB typ

−3 dB Bandwidth 125 MHz typ RL = 50 Ω, CL = 5 pF; Figure 24
Insertion Loss

Total Harmonic Distortion (THD + N) 0.1 %

CS (Off) 18 pF typ f = 1 MHz
CD, CS (On) 46 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = 3.6 V

IDD 0.001 μA typ Digital inputs = 0 V or 3.6 V
1 μA max

1

Temperature range is −40°C to +125°C.

2

Guaranteed by design; not subject to production test.

25°C

−0.11

−40°C to
+85°C

−40°C to
+125°C Unit

Test Conditions/Comments

or V

INH

INL

= 50 Ω, CL = 5 pF, f = 100 kHz;

R

L

Figure 22
S1 to S2; R

= 50 Ω, CL = 5 pF,

L

f = 100 kHz; Figure 23

dB typ RL = 50 Ω, CL = 5 pF; Figure 24

= 32 Ω, f = 20 Hz to 20 kHz,

R

L

V

= 2 V p-p; Figure 14

S

Rev. A | Page 4 of 16

ADG859

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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 3.

Parameter Rating

VDD to GND −0.3 V to +7.0 V
Analog Inputs

Digital Inputs

Peak Current, S or D

5 V Operation 500 mA
3 V Operation 460 mA

Continuous Current, S or D

5 V Operation 300 mA
3 V Operation 275 mA

Operating Temperature Range

Automotive −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
SOT-66 Package (4-Layer Board)

θJA Thermal Impedance 191°C/W
Lead-Free Reflow

Peak Temperature

Time at Peak Temperature

1

Overvoltages at S or D are clamped by internal diodes. Current should be

limited to the maximum ratings given.

1

1

−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first

−0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first

260 (+0/−5)°C
10 sec to 40 sec

Stresses above those listed under Absolute Maximum Ratings
ma

y cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.

Table 4. Truth Table

Logic (IN) Switch 2 (S2) Switch 1 (S1)

0 Off On
1 On Off

ESD CAUTION

Rev. A | Page 5 of 16

ADG859

www.BDTIC.com/ADI

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

IN

ADG859

2

V

TOP VIEW

DD

(Not to Scale)

GND

3

Figure 2. 6-Lead SOT-66 Pin Configuration

Table 5. Pin Function Descriptions

Pin No. Mnemonic Description

1 IN Logic Control Input.
2 V

DD

Most Positive Power Supply Potential.
3 GND Ground (0 V) Reference.
4 S1 Source Terminal. Can be an input or an output.
5 D Drain Terminal. Can be an input or an output.
6 S2 Source Terminal. Can be an input or an output.

6

S2

D

5

S1

4

05258-002

Rev. A | Page 6 of 16

ADG859

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

2.0

1.8
VDD=4.5V

1.6

1.4

1.2

(Ω)

1.0

ON

R

0.8

0.6

0.4

0.2

0

012345

Figure 3. On Resistance vs. V

3.0

2.5

V

DD

2.0

(Ω)

1.5

ON

R

1.0

=3V

V

DD

V

DD

=3.6V

=5V

V

(V)

S/VD

(VD), VDD = 5 V ± 10%

S

VDD=2.7V

=3.3V

V

DD

V

DD

=5.5V

TA= 25°C
I

= 100mA

DS

TA=25°C
I

= 100mA

DS

3.0

2.5

2.0

1.5

1.0

ON RESISTANCE ( Ω)

0.5

05258-012

0

+25°C

+125°C

+85°C

–40°C

VDD=3V
I

= 100mA

DS

1.0 1.50 0.5 2.0 2.5 3.0

SOURCE VOL TAGE (V )

05258-013

Figure 6. On Resistance vs. Source Voltage for

DD

= 3 V

ID, IS (ON)

LEAKAGE (nA)

5

4

3

2

1

D

ifferent Temperatures, V

VDD = 5V

0.5

0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

V

(V)

S/VD

Figure 4. On Resistance vs. V

1.8

1.6

1.4

1.2

1.0

0.8

0.6

ON RESISTANCE ( Ω)

0.4

0.2

0

+25°C

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

+85°C

SOURCE VOL TAGE (V )

), VDD = 2.7 V to 3.6 V

S (VD

+125°C

–40°C

VDD=5V
I

Figure 5. On Resistance vs. Source Voltage for

D

ifferent Temperatures, V

DD

= 5 V

DS

= 100mA

DD

DD

= 5 V

= 3 V

IS (OFF)

ID, IS (ON)

(OFF)

I

S

05258-016

05258-015

0

05258-024

–1

4020–20 0–40 60 80 100 120

TEMPERATURE (°C)

Figure 7. Leakage vs. Temperature, V

4.5
VDD = 3V

4.0

3.5

3.0

2.5

2.0

1.5

LEAKAGE (nA)

1.0

0.5

0

05258-014

–0.5

4020–20 0–40 60 80 100 120

TEMPERATURE (°C)

Figure 8. Leakage vs. Temperature, V

Rev. A | Page 7 of 16

ADG859

www.BDTIC.com/ADI

30

25

TA = 25°C

–20

0

TA = 25°C
V

= 3V/5V

DD

20

15

10

CHARGE INJECTION (pC)

5

0

0 5.0

= 5V

V

DD

VDD = 3V

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

(V)

V

D

Figure 9. Charge Injection vs. Source Voltage

14

12

VDD = 3.3V

10

t

ON

8

VDD = 5V

6

V

4

2

= 3.3V

DD

t

OFF

VDD = 5V

TIME (ns)

05258-017

–40

–60

–80

ATTENUATION (dB)

–100

–120

100 1k 10k 100k 1M 10M 100M

FREQUENCY (Hz)

Figure 12. Off Isolation vs. Frequency

0

TA = 25°C
V

= 3V/5V

DD

–20

–40

–60

–80

ATTENUATION (dB)

–100

05258-020

0

Figure 10. t

0

–2

TA = 25°C
V

= 3V/5V

DD

–4

–6

–8

ON RESPONSE (dB)

–10

–12

100 1k 10k 100k 1M 10M 100M 1G

020–40 –20 40 60 80

TEMPERATURE (°C)

Times vs. Temperature

ON/tOFF

FREQUENCY (Hz)

Figure 11. Bandwidth

05258-018

05258-019

–120

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

Figure 13. Cross talk vs. Frequency

0.20

TA = 25°C

0.18

0.16

0.14

0.12

0.10

0.08

THD + N (%)

0.06

0.04

0.02

0

0 5k 10k 15k 20k

VDD = 3V, VS = 2V p-p

VDD = 5V, VS = 3V p-p

FREQUENCY (Hz)

Figure 14. Total Harmonic Distortion + Noise

100M

05258-021

05258-022

Rev. A | Page 8 of 16

ADG859

www.BDTIC.com/ADI

0

TA = 25°C
V

= 3V/5V

DD

–20

NO SUPPLY DECOUPLING

–40

–60

PSRR (dB)

–80

–100

–120

100 1k 10k 100k 1M 10M 100M

FREQUENCY (Hz)

Figure 15. PSRR

05258-023

Rev. A | Page 9 of 16

ADG859

V

V

V

V

V

V

www.BDTIC.com/ADI

TEST CIRCUITS

V

SD

I

S

Figure 16. On Resistance

IS (OFF) ID (OFF)

SD

A A

DS

05258-003

S

V

D

05258-004

Figure 17. Off Leakage

ID(ON)

D

A

V

D

05258-005

NC

S

NC = NO CONNECT

Figure 18. On Leakage

DD

0.1µF

V

DD

S2

V

S

S1

IN

V

IN

GND

D

R

C

L

50Ω

35pF

Figure 19. Switching Times, t

DD

0.1µF

V

DD

V

V

IN

S2

S

S1

IN

GND

D

R
50Ω

V

OUT

C

L

L

35pF

V

IN

V

OUT

IN

V

OUT

V

IN

V

OUT

V

L

50% 50%

50% 50%

t

ON

, t

ON

OFF

80%

t

BBM

90% 90%

t

BBM

t

OFF

05258-006

Figure 20. Break-Before-Make Time Delay, t

DD

V

S

IN

0.1µF

V

DD

S2

D

S1

IN

GND

NC = NO CONNECT

C
1nF

L

NC

V

OUT

VIN(NORMALLY
CLOSED SWITCH)

V

(NORMALLY

IN

OPEN SWITCH)

V

OUT

Figure 21. Charge Injection

Rev. A | Page 10 of 16

ΔV

OUT

Q

INJ=CL

BBM

ON

× ΔV

OUT

OFF

05258-007

5258-008

ADG859

V

V

V

www.BDTIC.com/ADI

DD

0.1µF

V

DD

S1

IN

V

IN

D

GND

OFF ISOLATION = 20 log

NC = NO CONNECT

NC

S2

50Ω

V

OUT

V

S

NETWORK

ANALYZER

50Ω

V

S

V

OUT

R

L

50Ω

05258-009

Figure 22. Off Isolation

DD

0.1µF

NETWORK

ANALYZER

V

OUT

V

R
50Ω

50Ω

S

L

IN

V

DD

S1

GND

D

R
50Ω

S2

CHANNEL-TO- CHANNEL CROSST ALK = 20 log

Figure 23. Channel-to-Channel Crosstalk

DD

0.1µF

V

DD

S1

IN

V

IN

INSERTION LOSS = 20 log

NC = NO CO NNECT

S2

D

GND

NC

V

OUT

V

OUT

WITH SWITCH

WITHOUT SWITCH

Figure 24. Bandwidth

V

OUT

V

S

NETWORK

ANALYZER

50Ω

V

OUT

R

L

50Ω

05258-010

V

S

5258-011

Rev. A | Page 11 of 16

ADG859

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TERMINOLOGY

V

DD

Most positive power supply potential.

I

DD

Positive supply current.

GND

Ground (0 V) reference.

S

Source terminal. Can be an input or an output.

D

Drain terminal. Can be an input or an output.

IN

Logic control input.

(VS)

V

D

Analog voltage on the D and S terminals.

R

ON

Ohmic resistance between the D and S terminals.

R

FLAT (ON)

Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured.

ΔR

ON

On resistance mismatch between any two channels.

I

(Off)

S

Source leakage current with the switch off.

I

(Off)

D

Drain leakage current with the switch off.

I

, IS (On)

D

Channel leakage current with the switch on.

V

INL

Maximum input voltage for Logic 0.

V

INH

Minimum input voltage for Logic 1.

(I

INL

INH

)

I

Input current of the digital input.

C

(Off)

S

Off switch source capacitance. Measured with reference to
g

round.

(Off)

C

D

Off switch drain capacitance. Measured with reference to
g

round.

, CS (On)

C

D

On switch capacitance. Measured with reference to ground.

C

IN

Digital input capacitance.

t

ON

Delay time between the 50% and 90% points of the digital input
and switch on condition.

t

OFF

Delay time between the 50% and 90% points of the digital input
and switch off condition.

t

BBM

On or off time measured between the 80% points of both
switches when switching from one to another.

Charge Injection

A measure of the glitch impulse transferred from the digital
i

nput to the analog output during on/off switching.

Off Isolation

A measure of unwanted signal coupling through an off switch.

Crosstalk

A measure of unwanted signal that is coupled through from one

nnel to another as a result of parasitic capacitance.

cha

−3 dB Bandwidth

The frequency at which the output is attenuated by 3 dB.

On Response

The frequency response of the on switch.

Insertion Loss

The loss due to the on resistance of the switch.

THD + N

The ratio of harmonic amplitudes plus noise of a signal to the
f

undamental.

Rev. A | Page 12 of 16

ADG859

www.BDTIC.com/ADI

OUTLINE DIMENSIONS

1.70

1.66

1.30

1.20

1.10

0.18

0.17

0.13

PIN 1

12° MAX

6

TOP VIEW

1

1.50

5

2

0.34 MAX

0.27 NOM

4

3

SEATING
PLANE

1.70

1.65

1.50

0.60

0.57

0.53

0.26

0.19

0.11

0.10 NOM

0.05 MIN

Figure 25. 6-Lead Small Outline Transistor Package [SOT-66]

(R

Y-6-1)

Dimensions shown in millimeters

BOTTOM

0.25 MAX

0.17 MIN

0.20 MIN

VIEW

0.50
BSC

0.30

0.23

0.10

ORDERING GUIDE

Model Temperature Range Package Description Package Option Branding

ADG859YRYZ-REEL
ADG859YRYZ-REEL7
ADG859BRYZ-REEL
ADG859BRYZ-REEL7
EVAL-ADG859EB Evaluation Board

1

Branding on this package is limited to two characters due to space constraints.

2

Z = Pb-free part.

2

−40°C to +125°C 6-Lead Small Outline Transistor Package [SOT-66] RY-6-1 04

2

−40°C to +125°C 6-Lead Small Outline Transistor Package [SOT-66] RY-6-1 04

2

−40°C to +85°C 6-Lead Small Outline Transistor Package [SOT-66] RY-6-1 02

2

−40°C to +85°C 6-Lead Small Outline Transistor Package [SOT-66] RY-6-1 02

1

Rev. A | Page 13 of 16

ADG859

www.BDTIC.com/ADI

NOTES

Rev. A | Page 14 of 16

ADG859

www.BDTIC.com/ADI

NOTES

Rev. A | Page 15 of 16

ADG859

www.BDTIC.com/ADI

NOTES

©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05258-0-12/06(A)

Rev. A | Page 16 of 16