500 mA peak current at 3.3 V
Automotive temperature range: –40°C to +125°C
Rail-to-rail switching operation
Typical power consumption (<0.1 µW)
APPLICATIONS
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communication systems
flatness
ON
Single SPDT Switch/2:1 MUX
ADG839
FUNCTIONAL BLOCK DIAGRAM
ADG839
2
1
IN
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
Figure 1.
PRODUCT HIGHLIGHTS
1. 0.6 Ω over full temperature range of –40°C to +125°C.
2. Compatible with 1.8 V CMOS logic.
3. High current handling capability (300 mA continuous
current at 3.3 V).
4. Low THD + N (0.01% typ).
5. Tiny SC70 package.
D
04449-001
GENERAL DESCRIPTION
The ADG839 is a low voltage CMOS device containing a singlepole, double-throw (SPDT) switch. This device offers ultralow
on resistance of less than 0.6 Ω over the full temperature range.
The ADG839 is fully specified for 1.8 V, 2.5 V, and 3.3 V supply
operation.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG839 exhibits break-before-make switching action.
The ADG839 is available in a 6-lead SC70 package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
−40°C to −40°C to
Parameter +25°C +85°C +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 0.35 Ω typ VDD = 2.3 V, VS = 0 V to VDD,
0.5 0.55 0.6 Ω max IS = 100 mA; Figure 19
On Resistance Match between 0.04 Ω typ VDD = 2.3 V, VS = 0.95 V,
Channels (∆RON) 0.075 0.085 0.095 Ω max IS = 100 mA
On Resistance Flatness (R
0.13 0.13 Ω max IS = 100 mA
LEAKAGE CURRENTS VDD = 2.7 V
Source Off Leakage IS (OFF) ±0.2 nA typ VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; Figure 20
Channel On Leakage ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 2.4 V; Figure 21
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INH
INL
Input Current
I
or I
INL
INH
±0.1 µA max
CIN, Digital Input Capacitance 3.2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
18 20 21 ns max VS = 1.5 V/0 V; Figure 22
t
7.5 ns typ RL = 50 Ω, CL = 35 pF
OFF
9.2 9.5 9.8 ns max VS = 1.5 V; Figure 22
Break-before-Make Time Delay (t
1 ns min VS1 = VS2 = 1.5 V;
Charge Injection 60 pC typ VS = 1.25 V, RS = 0 Ω, CL = 1 nF; Figure 24
Off Isolation −57 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 25
Channel-to-Channel Crosstalk −57 dB typ
Total Harmonic Distortion (THD + N) 0.021 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p
Insertion Loss −0.01 dB typ RL = 50 Ω, CL = 5 pF; Figure 27
–3 dB Bandwidth 25 MHz typRL = 50 Ω, CL = 5 pF; Figure 27
CS (OFF) 78 pF typ
CD, CS (ON) 127 pF typ VDD = 2.7 V
POWER REQUIREMENTS Digital inputs = 0 V or 2.7 V
I
DD
1 4 µA max
1
Temperature range for the Y version is −40°C to +125°C.
2
Guaranteed by design; not subject to production test.
−40°C to −40°C to
Parameter +25°C +85°C +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
On Resistance (RON) 0.5 Ω typ VDD = 1.8 V, VS = 0 V to VDD, IS = 100 mA;
0.8 1.2 1.2 Ω max Figure 19
1.3 2.5 2.5 Ω max VDD = 1.65 V, VS = 0 V to VDD, IS = 100 mA
On Resistance Match between 0.04 Ω typ VDD = 1.65 V, VS = TBD, IS = 100 mA
Channels (∆RON) 0.075 0.08 0.08 Ω max IS = 100 mA
On Resistance Flatness (R
) 0.3 Ω typ VDD = 1.65 V, VS = 0 V to VDD, IS = 100 mA
FLAT (ON)
LEAKAGE CURRENTS VDD = 1.95 V
Source Off Leakage IS (OFF) ±0.2 nA typ
Channel On Leakage ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 1.65 V; Figure 21
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INH
INL
0.65 V
0.35 V
DD
DD
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
±0.1 µA max
CIN, Digital Input Capacitance 3.2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
2
20 ns typ RL = 50 Ω, CL = 35 pF
28 30 31 ns max VS = 1.5 Ω/0 V; Figure 22
t
8 ns typ RL = 50 Ω, CL = 35 pF
OFF
10.1 10.5 10.7 ns max VS = 1.5 V; Figure 22
Break-before-Make Time Delay (t
) 12 ns typ RL = 50 Ω, CL = 35 pF
BBM
1 ns min VS1 = VS2 = 1 V; Figure 23
Charge Injection 50 pC typ VS = 1 V, RS = 0 V, CL = 1 nF; Figure 24
Off Isolation −57 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 25
Channel-to-Channel Crosstalk −57 dB typ S1 −S2;
R
Total Harmonic Distortion (THD + N) 0.033 % RL = 32 Ω, f = 20 Hz to 20 kHz,
Insertion Loss −0.01 dB typ RL = 50 Ω, CL = 5 pF; Figure 27
–3 dB Bandwidth 25 MHz typ RL = 50 Ω, CL = 5 pF; Figure 27
CS (OFF) 83 pF typ VDD = 1.95 V
CD, CS (ON) 132 pF typ Digital inputs = 0 V or 1.95 V
POWER REQUIREMENTS Digital inputs = 0 V or 1.95 V
I
DD
0.003 µA typ
1 4 µA max
1
Temperature range for the Y version is −40°C to +125°C.
2
Guaranteed by design; not subject to production test.
V
DD
V min
V max
= 0.6 V/1.65 V, VD = 1.65 V/0.6 V;
V
S
Figure 20
or V
INL
INH
= 50 Ω, CL = 5 pF, f = 100 kHz; Figure 26
L
V
= 1 V p-p
S
Rev. 0 | Page 5 of 16
Page 6
ADG839
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 5.
Parameter Rating
VDD to GND −0.3 V to +4.6 V
Analog Inputs
Digital Inputs
1
−0.3 V to VDD + 0.3 V
−0.3 V to 4.6 V or 10 mA,
whichever occurs first
Peak Current, S or D
3.3 V Operation 500 mA
2.5 V Operation 460 mA
1.8 V Operation
420 mA (pulsed at 1 ms,
10% duty cycle max)
Continuous Current, S or D
3.3 V Operation 300 mA
2.5 V Operation 275 mA
1.8 V Operation 250 mA
Operating Temperature Range
Automotive (Y Version) −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
SC70 Package 332°C/W
θJA Thermal Impedance 120°C/W
Lead Temperature,
300°C
Soldering (10 seconds)
IR Reflow, Peak Temperature 220°C
Overvoltages at S or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
Rev. 0 | Page 6 of 16
Page 7
ADG839
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
GND
IN
DD
1
ADG839
2
TOP VIEW
3
(Not to Scale)
6
S2
5
D
4
S1
04449-002
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1 IN Logic control input.
2 V
DD
Most positive power supply potential.
3 GND Ground (0 V) reference.
4, 6 S1, S2 Source terminal. Can be an input or output.
5 D Drain terminal. Can be an input or output.
For more information, refer to the Terminology section.
Rev. 0 | Page 7 of 16
Page 8
ADG839
TYPICAL PERFORMANCE CHARACTERISTICS
0.40
0.35
0.30
0.25
0.20
0.15
ON RESISTANCE (Ω)
0.10
0.05
0
00.51.01.52.02.53.03.5
VD, VS(V)
Figure 3. On Resistance vs. V
0.45
0.40
0.35
0.30
0.25
0.20
0.15
ON RESISTANCE (Ω)
0.10
0.05
0
00.51.01.52.02.5
VDD = 2.3V
VD, VS(V)
Figure 4. On Resistance vs. V
0.8
0.7
0.6
0.5
0.4
0.3
ON RESISTANCE (Ω)
0.2
V
DD
= 1.80V
VDD = 3.0V
= 3.3V
V
DD
V
TA = 25°C
(VS) VDD = 3 V to 3.6 V
D
= 2.5V
V
DD
= 2.7V
V
DD
(VS) VDD = 2.5 V ± 0.2 V
D
VDD = 1.65V
= 1.95V
V
DD
= 3.6V
DD
TA = 25°C
04449-022
04449-023
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
ON RESISTANCE (Ω)
0.10
0.05
0
03.02.52.01.51.00.5
Figure 6. On Resistance vs. V
0.6
0.5
0.4
0.3
–40°C
0.2
ON RESISTANCE (Ω)
0.1
0
02.52.01.51.00.5
Figure 7. On Resistance vs. V
0.7
0.6
0.5
0.4
0.3
ON RESISTANCE (Ω)
0.2
+25°C
+125°C
+85°C
+25°C
–40°C
VDD = 3.3V
VD, VS(V)
(VS) for Different Temperature, VDD = 3.3 V
D
+125°C
+85°C
+25°C
VDD = 2.5V
VD, VS(V)
(VS) for Different Temperature, VDD = 2.5 V
D
+125°C
+85°C
–40°C
04449-025
04449-026
0.1
0
02.01.81.61.41.21.00.80.60.40.2
Figure 5. On Resistance vs. V
VD, VS(V)
(VS) VDD = 1.8 V ± 0.15 V
D
TA = 25°C
04449-024
Rev. 0 | Page 8 of 16
0.1
VDD = 1.8V
0
01.81.61.41.21.00.80.60.40.2
Figure 8. On Resistance vs. V
VD, VS(V)
(VS) for Different Temperature, VDD = 1.8 V
D
04449-027
Page 9
ADG839
100
VDD = 3.3V
90
80
70
60
50
40
30
CURRENT (nA)
20
10
0
–10
–40120100806040200–20
TEMPERATURE (°C)
Figure 9. Leakage Current vs. Temperature, V
80
VDD = 2.5V
70
60
50
40
30
CURRENT (nA)
20
10
0
–10
–40120100806040200–20
TEMPERATURE (°C)
Figure 10. Leakage Current vs. Temperature, V
70
VDD = 1.8V
60
50
40
30
20
CURRENT (nA)
10
0
–10
–40120100806040200–20
TEMPERATURE (°C)
Figure 11. Leakage Current vs. Temperature, V
ID, IS (ON)
(OFF)
I
S
= 3.3 V
DD
ID, IS (ON)
(OFF)
I
S
= 2.5 V
DD
ID, IS (ON)
I
S
= 1.8 V
DD
04449-012
04449-013
(OFF)
04449-014
180
TA = 25°C
160
140
120
100
80
60
CHARGE INJECTION (pC)
40
20
0
00.51.01.52.02.53.0
VD (V)
V
DD
VDD = 3.3V
= 1.8V
= 2.5V
V
DD
Figure 12. Charge Injection vs. Source Voltage
25
V
= 1.8V
t
ON
20
15
TIME (ns)
10
t
OFF
5
0
–40–20020406080100120
Figure 13. t
DD
= 2.5V
V
DD
= 3.3V
V
DD
VDD = 1.8V
TEMPERATURE (°C)
Times vs. Temperature
ON/tOFF
V
DD
= 2.5V
V
DD
= 3.3V
1
0
–1
TA = 25°C
= 3.3V/2.5V/1.8V
V
DD
–2
–3
–4
–5
–6
–7
–8
ON RESPONSE (dB)
–9
–10
–11
–12
1001k100k1M10M10k100M
FREQUENCY (Hz)
Figure 14. Bandwidth
04449-015
04449-016
04449-017
Rev. 0 | Page 9 of 16
Page 10
ADG839
0
TA = 25°C
V
–20
–40
= 3.3V/2.5V/1.8V
DD
0.05
0.04
TA = 25°C
32Ω LOAD
VDD = 1.8V; V p-p = 1V
–60
–80
OFF ISOLATION (dB)
–100
–120
1001k100k1M10M100M10k1G
FREQUENCY (Hz)
Figure 15. Off Isolation vs. Frequency
0
TA = 25°C
= 3.3V/2.5V/1.8V
V
DD
–20
–40
–60
–80
CROSS TALK (dB)
–100
–120
1001k100k1M10M100M10k1G
FREQUENCY (Hz)
Figure 16. Cross talk vs. Frequency
04449-018
04449-019
0.03
THD+N (%)
= 2.5V; V p-p = 2V
V
0.02
0.01
1010010k1k100k
DD
V
= 3.3V; V p-p = 3V
DD
FREQUENCY (Hz)
Figure 17. Total Harmonic Distortion + Noise
0
TA = 25°C
= 3.3V/2.5V/1.8V
V
DD
–20
–40
–60
PSRR (dB)
–80
–100
–120
1001k100k10k1M
FREQUENCY (Hz)
Figure 18. AC PSRR
04449-020
04449-021
Rev. 0 | Page 10 of 16
Page 11
ADG839
TERMINOLOGY
I
DD
Positive supply current.
(VS)
V
D
Analog voltage on Terminals D and S.
R
ON
Ohmic resistance between D and S.
R
FLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured.
∆R
ON
On resistance match between any two channels.
(OFF)
I
S
Source leakage current with the switch off.
(OFF)
I
D
Drain leakage current with the switch off.
, IS (ON)
I
D
Channel leakage current with the switch on.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
(I
INL
INH
)
I
Input current of the digital input.
(OFF)
C
S
Off switch source capacitance. Measured with reference to
ground.
(OFF)
C
D
Off switch drain capacitance. Measured with reference to
ground.
, CS (ON)
C
D
On switch capacitance. Measured with reference to ground.
C
IN
Digital input capacitance.
t
ON
Delay time between the 50% and the 90% points of the digital
input and switch on condition.
t
OFF
Delay time between the 50% and the 90% points of the digital
input and switch off condition.
t
BBM
On or off time measured between the 80% points of both
switches when switching from one to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during on-off switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal which is coupled through from
one channel to another as a result of parasitic capacitance.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The attenuation between the input and output ports of the
switch when the switch is in the on condition, and is due to the
on resistance of the switch.
THD + N
The ratio of the harmonic amplitudes plus noise of a signal to
the fundamental.
PSRR
Power Supply Rejection Ratio. This is a measure of the coupling
of unwanted ac signals on the power supply to the switch
output when the supply is not decoupled.
Rev. 0 | Page 11 of 16
Page 12
ADG839
V
V
V
V
V
TEST CIRCUITS
V
SD
S
Figure 19. On Resistance
IS (OFF)ID (OFF)
SD
AA
I
DS
04449-003
S
V
D
04449-004
NC
Figure 20. Off Leakage
DD
0.1µF
V
DD
S2
V
S
S1
IN
D
C
R
L
35pF
50Ω
V
IN
V
OUT
IN
V
OUT
V
L
50%50%
50%50%
90%90%
SD
Figure 21. On Leakage
ID (ON)
A
V
D
04449-005
IN
GND
Figure 22. Switching Times, tON, t
t
ON
OFF
t
OFF
04449-006
V
DD
0.1µF
V
DD
V
V
S2
S
S1
IN
IN
GND
D
R
50Ω
C
L
L
35pF
Figure 23. Break-before-Make Time Delay, t
V
OUT
IN
V
OUT
80%80%
t
BBM
BBM
t
BBM
04449-007
V
V
DD
0.1µF
V
DD
S2
D
S
S1
C
IN
GND
1nF
L
VIN (NORMALLY
CLOSED SWITCH)
NC
V
OUT
(NORMALLY
V
IN
OPEN SWITCH)
V
OUT
∆V
OUT
Figure 24. Charge Injection
Q
INJ
ON
= CL×∆V
OUT
OFF
04449-008
Rev. 0 | Page 12 of 16
Page 13
ADG839
V
V
V
S1
S2
0.1µF
DD
V
DD
GND
V
OUT
V
D
R
50Ω
S
04449-010
V
DD
0.1µF
V
DD
S1
IN
IN
OFF ISOLATION = 20 LOG
0.1µF
GND
V
DD
S2
D
NC
50Ω
V
OUT
V
S
Figure 25. Off Isolation
NETWORK
ANALYZER
50Ω
V
V
OUT
R
L
50Ω
NETWORK
ANALYZER
V
OUT
S
04449-009
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
V
R
50Ω
50Ω
S
L
IN
Figure 26. Channel-to-Channel Crosstalk
V
DD
S1
IN
IN
INSERTION LOSS = 20 LOG
S2
D
GND
NC
V
OUT
V
WITHOUT SWITCH
OUT
NETWORK
ANALYZER
50Ω
R
L
50Ω
WITH SWITCH
NETWORK
ANALYZER
V
S
V
OUT
04449-011
50Ω
V
S
V
OUT
R
50Ω
Figure 27. Bandwidth
V
DD
VDD± 50mV
BIAS
TEE
L
NC
V
DD
IN
S1
S2
GND
V
IN
D
NC
04449-028
Figure 27. PSRR
Rev. 0 | Page 13 of 16
Page 14
ADG839
OUTLINE DIMENSIONS
2.00 BSC
5 4
1.25 BSC
1.00
0.90
0.70
0.10MAX
6
1
2
PIN 1
1.30 BSC
0.30
0.15
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203AB
3
0.65 BSC
2.10 BSC
1.10 MAX
SEATING
PLANE
0.22
0.08
8°
4°
0°
Figure 28. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-6)
Dimensions shown in millimeters
0.46
0.36
0.26
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADG839YKSZ-500RL72–40°C to +125°C 6-Lead Thin Shrink Small Outline Transistor Package KS-6 SUA
ADG839YKSZ-REEL
ADG839YKSZ-REEL7
1
Branding on this package is limited to three characters due to space constraints.
2
Z = Pb-free part.
2
–40°C to +125°C 6-Lead Thin Shrink Small Outline Transistor Package KS-6 SUA
2
–40°C to +125°C 6-Lead Thin Shrink Small Outline Transistor Package KS-6 SUA