1.8 V to 5.5 V single supply
Automotive temperature range from −40°C to +125°C
400 mA current-carrying capability
Tiny 6-lead SOT-23, 8-lead MSOP, and 6-ball WLCSP packages
35 ns switching times
Low power consumption
TTL-/CMOS-compatible inputs
Pin compatible with ADG701/ADG702
APPLICATIONS
Power routing
Cellular phones
Modems
PCMCIA cards
Hard drives
Data acquisition systems
Communications systems
Relay replacement
Battery-powered systems
SPST Switches
ADG801/ADG802
FUNCTIONAL BLOCK DIAGRAM
ADG801
S
ADG802
S
SWITCHES SHOWN FOR
A LOGIC 1 INPUT
Figure 1.
D
IN
D
IN
02800-001
GENERAL DESCRIPTION
The ADG801 and ADG802 are monolithic CMOS, single-pole,
single throw (SPST) switches with on resistance of less than
0.4 Ω. These switches are designed using an advanced
submicron process that provides extremely low on resistance,
high switching speed, and low leakage currents.
The low on resistance of <0.4 Ω makes these parts ideal for
a
pplications where low on resistance switching is critical.
The ADG801 switch is normally open (NO), while the ADG802
is n
ormally closed (NC). Each switch conducts equally well in
both directions when on.
PRODUCT HIGHLIGHTS
1. Low on resistance (0.25 Ω typical).
2. 1.8 V t
3. T
4. 400 mA c
5. A
6. P
o 5.5 V single-supply operation.
iny 6-lead SOT-23, 8-lead MSOP, and 6-ball WLCSP
packages.
urrent-carrying capability.
utomotive temperature range from −40°C to +125°C.
in compatible with ADG701 (ADG801) and ADG702
(ADG802).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted. The automotive temperature range is −40°C to +125°C.
Table 1.
Parameter 25°C −40°C to +85°C −40°C to +125°C1Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 0.25 Ω typ VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
0.3 0.35 0.4 Ω max VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
On Resistance Flatness (R
0.07 0.08 Ω max
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, IS (Off) ±0.01 nA typ
±0.25 ±3 ±30 nA max
Drain Off Leakage, ID (Off) ±0.01 nA typ
±0.25 ±3 ±30 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V, or 4.5 V; Test Circuit 3
±0.25 ±3 ±30 nA max VS = VD = 1 V, or 4.5 V; Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INH
0.8 V max
INL
Input Current
I
or I
0.005 μA typ VIN = V
INL
INH
±0.1 μA max
CIN, Digital Input Capacitance 5 pF typ
DYNAMIC CHARACTERISTICS2
tON 35 ns typ RL = 50 Ω, CL = 35 pF
45 50 55 ns max VS = 3 V; Test Circuit 4
t
9 ns typ RL = 50 Ω, CL = 35 pF
OFF
15 18 21 ns max VS = 3 V; Test Circuit 4
Charge Injection 50 pC typ VS = 2.5 V, RS = 0 Ω; CL = 1 nF;
Test Circuit 5
Off Isolation −61 dB typ RL = 50 Ω, CL = 5 pF; f = 100 kHz;
Test Circuit 6
Bandwidth −3 dB 12 MHz typ RL = 50 Ω, CL = 5 pF; Test Circuit 7
CS (Off) 180 pF typ f = 1 MHz
CD (Off) 180 pF typ f = 1 MHz
CD, CS (On) 420 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V
1.0 2.0 μA max
1
On resistance parameters tested with IS = 10 mA.
2
Guaranteed by design, not subject to production test.
) 0.05 Ω typ VS = 0 V to VDD, IS = 100 mA
FLAT(ON)
= 4.5 V/1 V, VD = 1 V/4.5 V; Test
V
S
Circuit 2
= 4.5 V/1 V, VD = 1 V/4.5 V; Test
V
S
Circuit 2
= 4.5 V/1 V, VD = 1 V/4.5 V; Test
V
S
Circuit 2
= 4.5 V/1 V, VD = 1 V/4.5 V; Test
V
S
Circuit 2
2.0 V min
or V
INL
INH
Rev. A | Page 3 of 16
Page 4
ADG801/ADG802
www.BDTIC.com/ADI
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. The automotive temperature range is −40°C to +125°C.
Table 2.
Parameter 25°C −40°C to +85°C −40°C to +125°C1 Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 0.4 Ω typ VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
0.6 0.65 0.7 Ω max VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
On Resistance Flatness (R
LEAKAGE CURRENTS VDD = 3.6 V
Source Off Leakage, IS (Off) ±0.01 nA typ VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
±0.25 ±3 ±30 nA max VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
Drain Off Leakage, ID (Off) ±0.01 nA typ VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
±0.25 ±3 ±30 nA max VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V, or 3.3 V; Test Circuit 3
±0.25 ±3 ±30 nA max VS = VD = 1 V, or 3.3 V; Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INL
Input Current
I
or I
0.005 μA typ VIN = V
INL
INH
±0.1 μA max
CIN, Digital Input Capacitance 5 pF typ
DYNAMIC CHARACTERISTICS2
tON 40 ns typ RL = 50 Ω, CL = 35 pF
55 60 65 ns max VS = 1.5 V; Test Circuit 4
t
9 ns typ RL = 50 Ω, CL = 35 pF
OFF
15 18 21 ns max VS = 1.5 V; Test Circuit 4
Charge Injection 10 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Test Circuit 5
Off Isolation −61 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;
Test Circuit 6
Bandwidth −3 dB 12 MHz typ RL = 50 Ω, CL = 5 pF; Test Circuit 7
CS (Off) 180 pF typ f = 1 MHz
CD (Off) 180 pF typ f = 1 MHz
CD, CS (On) 420 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 3.6 V
IDD 0.001 μA typ Digital inputs = 0 V or 3.6 V
1.0 2.0 μA max
1
On resistance parameters tested with IS = 10 mA.
2
Guaranteed by design, not subject to production test.
) 0.1 0.1 0.1 Ω typ VS = 0 V to VDD, IS = 100 mA
FLAT(ON)
2.0 V min
INH
0.8 V max
or V
INL
INH
Rev. A | Page 4 of 16
Page 5
ADG801/ADG802
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Parameter Rating
VDD to GND −0.3 V to +7 V
Analog Inputs1
Digital Inputs1
Continuous Current, Pin S or Pin D 400 mA
Peak Current, Pin S or Pin D
Operating Temperature Range
tomotive
Au
Storage Temperature Range −65°C to +150°C
Junction Temperature (T
Package Power Dissipation ( T
MSOP
θJA Thermal Impedance 120°C/W
Lead Temperature, Soldering
(10 sec)
IR Reflow, Peak Temperature
(<20 sec)
Reflow Soldering (Pb-Free)
Peak Temperature 260(+0/−5)°C
Time at Peak Temperature 10 sec to 40 sec
1
Overvoltages at Pin IN, Pin S, or Pin D are clamped by internal diodes.
Current should be limited to the maximum ratings provided.
) 150°C
JMAX
−0.3 V to VDD + 0.3 V or
mA, whichever occurs first
30
−0.3 V to VDD + 0.3 V or
mA, whichever occurs first
30
800 mA, pulsed at 1 ms,
10% duty c
−40°C to +125°C
JMAX
300°C
235°C
ycle max
– TA)/θJA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 3. Truth Table
ADG801 (Pin IN) ADG802 (Pin IN) Switch Condition
0 1 Off
1 0 On
ESD CAUTION
Rev. A | Page 5 of 16
Page 6
ADG801/ADG802
V
www.BDTIC.com/ADI
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
D
2
S
(Not to Scale)
3
GND
NC = NO CONNECT
AD801/
ADG802
TOP VIEW
6
V
DD
5
NC
4
IN
02800-002
Figure 2. 6-Lead SOT-23
(RJ-6)
D
1
ADG801/
2
NC
ADG802
3
NC
TOP VIEW
(Not to Scale)
4
DD
NC = NO CONNECT
S
8
7
GND
6
IN
NC
5
02800-003
Figure 3. 8-Lead MSOP
(RM-8)
BALLA1
INDICATOR
B
A
VDD
1
2
3
(BALL SIDE DO WN)
NC = NO CONNECT
D
NC
S
IN GND
ADG801/
ADG802
TOP VIEW
Not to Scal e
02800-020
Figure 4. 6-Ball 2 ×3 WLCSP
(CB-6-1)
Table 4. Pin Function Descriptions
Pin Number
SOT-23 MSOP WLCSP
Mnemonic
Description
1 1 B1 D Drain Terminal. Can be an input or an output.
2 8 B2 S Source Terminal. Can be an input or an output.
3 7 B3 GND
4 6 A3 IN
5 2, 3, 5 A2 NC
6 4 A1 V
DD
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input.
Most Positive Power Supply Potential.
Rev. A | Page 6 of 16
Page 7
ADG801/ADG802
www.BDTIC.com/ADI
TERMINOLOGY
I
(I
)
INL
VDD
The most positive power supply potential.
I
DD
Positive supply current.
GND
Ground (0 V) reference.
S
The source terminal can be an input or an output.
D
The drain terminal can be an input or an output.
IN
Logic control input.
V
(VS)
D
Analog voltage on Terminal D and Terminal S.
R
ON
Ohmic resistance between Terminal D and Terminal S.
R
FLAT(ON)
The difference between the maximum and minimum value of
on resistance as measured over the specified analog signal range.
I
(Off)
S
Source leakage current with the switch off.
I
(Off)
D
Drain leakage current with the switch off.
I
, IS (On)
D
Channel leakage current with the switch on.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
INH
Input current of the digital input.
C
(Off)
S
The off switch source capacitance is measured with reference
to
ground.
C
(Off)
D
The off switch drain capacitance is measured with reference
to
ground.
, CS (On)
C
D
The on switch capacitance is measured with reference
ground.
to
C
IN
Digital input capacitance.
t
ON
The delay between applying the digital control input and when
t
he output switches on. See Figure 17.
t
OFF
The delay between applying the digital control input and when
t
he output switches off.
Charge Injection
A measure of the glitch impulse transferred from the digital
in
put to the analog output during switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
Rev. A | Page 7 of 16
Page 8
ADG801/ADG802
www.BDTIC.com/ADI
TYPICAL PERFORMANCE CHARACTERISTICS
0.50
0.45
0.40
0.35
0.30
0.25
0.20
ON RESISTANCE (Ω)
0.15
0.10
0.05
VDD = 2.7V
VDD = 3.0V
VDD = 3.3V
VDD = 4.5V
VDD = 5.0V
0
01.02.03.04.05.0 5.5
V
D
(VS) (V)
TA = 25°C
VDD = 5.5V
02800-004
3.5
3.0
2.5
2.0
1.5
1.0
CURRENT (nA)
0.5
–0.5
0
0
VDD = 5V, 3V
4020
60
TEMPERATURE (°C)
ID (OFF)
80
IS, ID(ON)
100120
IS (OFF)
02800-007
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
VDD = 5V
0
01.51.00.5
VDD = 3V
0
01.51.00.5
(VS)
D
+125°C
–40°C
2.0 2.5 3.0 3. 5 4.04.5 5. 0
–40°C
+85°C
+25°C
VD (VS) (V)
(VS) for Different Temperatures
D
+125°C
+25°C
VD (VS) (V)
2.02.53.0
+85°C
Figure 8. Leakage Current vs. Temperature Figure 5. On Resistance vs. V
400
TA = 25°C
300
200
100
0
CHARGE INJECTI ON (pC)
–100
–200
01.51.00.52.0 2.5 3.0 3.54.0 4.5 5.0
02800-005
VDD = 3V
VS (V)
VDD = 5V
02800-008
Figure 9. Charge Injection vs. Source Voltage Figure 6. On Resistance vs. V
50
45
t
ON
40
35
30
25
TIME (ns)
20
15
t
OFF
10
5
0
–20020406080100120
–40
02800-006
VDD = 3V
VDD = 5V
VDD = 3V, 5V
TEMPERATURE (°C)
02800-009
Figure 7. On Resistance vs. V
(VS) for Different Temperatures
D
Rev. A | Page 8 of 16
Figure 10. t
Times vs. Temperature
ON/tOFF
Page 9
ADG801/ADG802
A
–
A
www.BDTIC.com/ADI
10
TA = 25°C
V
= 3V, 5V
DD
–20
–30
TION (dB)
–40
–50
ATTENU
–60
–70
0.1110
Figure 11. Off Isolation vs. Fr
0
–1
–2
–3
–4
TION (dB)
–5
–6
ATTENU
–7
TA = 25°C
–8
V
= 3V, 5V
DD
–9
FREQUENCY (MHz)
02800-010
equency
110.2020
FREQUENCY (MHz)
02800-011
Figure 12. On Response vs. Frequency
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
LOGIC THRESHOLD VOLTAGE (V)
0.2
0
0
21
VIN RISING
VINFALL ING
345 6
VDD (V)
Figure 13. Logic Threshold Voltage vs. Supply Voltage
02800-012
Rev. A | Page 9 of 16
Page 10
ADG801/ADG802
V
V
www.BDTIC.com/ADI
TEST CIRCUITS
I
DS
V1
SD
I
(OFF)
S
SD
A
I
D
(OFF)
A
V
D
SD
NC
02800-014
NC = NO CONNECT
ID(ON)
A
V
D
2800-015
V
S
RON= V1/I
DS
2800-013
Figure 15. Off Leakage Figure 14. On Resistance
Figure 16. On Leakage
0.1µF
V
S
V
S
IN
R
S
DD
V
DD
SD
GND
DD
V
DD
SD
IN
GND
V
OUT
R
C
50Ω
L
L
35pF
Figure 17. Switching Times
V
V
OUT
C
1nF
L
V
V
OUT
Figure 18. Charge Injection
V
IN
V
IN
V
OUT
IN
ADG801
IN
ADG802
ADG801
ADG802
50%50%
50%50%
90%
t
ON
ON
Q
= CL × ΔV
INJ
OUT
90%
ΔV
t
OFF
OUT
OFF
02800-016
02800-017
Rev. A | Page 10 of 16
Page 11
ADG801/ADG802
V
V
www.BDTIC.com/ADI
0.1µF
DD
NETWORK
V
DD
ANALYZER
IN
V
IN
S
D
GND
50Ω
OFF ISOLATION = 20 log
R
50Ω
L
50Ω
V
S
V
OUT
V
OUT
V
S
02800-018
Figure 19. Off Isolation
0.1µF
IN
V
IN
DD
V
DD
S
D
GND
INSERTION LOSS = 20 log
NETWORK
ANALYZER
50Ω
V
V
OUT
R
L
50Ω
V
WITH SWITCH
OUT
V
WITHOUT SWITCH
OUT
S
02800-019
Figure 20. Bandwidth
Rev. A | Page 11 of 16
Page 12
ADG801/ADG802
www.BDTIC.com/ADI
OUTLINE DIMENSIONS
1.60 BSC
PIN 1
INDICATOR
1.30
1.15
0.90
0.15 MAX
2.90 BSC
13
1.90
BSC
0.50
0.30
4526
0.95 BSC
2.80 BSC
1.45 MAX
SEATING
PLANE
0.22
0.08
10°
0.60
4°
0.45
0°
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 21. 6-Lead Small Outline Transistor Package [SOT-23]
(RJ-6)
Dim
ensions shown in inches and (millimetes)
3.20
3.00
2.80
8
5
4
SEATING
PLANE
5.15
4.90
4.65
1.10 MAX
0.23
0.08
8°
0°
0.80
0.60
0.40
3.20
3.00
1
2.80
PIN 1
0.65 BSC
0.95
0.85
0.75
0.15
0.38
0.00
0.22
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 22. 8-Lead Mini Small Outline Package [MSOP]