Datasheet ADG784 Datasheet (Analog Devices)

CMOS 3 V/5 V, Wide Bandwidth Quad 2:1

a

FEATURES
Low Insertion Loss and On Resistance: 4  Typical
On-Resistance Flatness <2 
Bandwidth >200 MHz
Single 3 V/5 V Supply Operation
Rail-to-Rail Operation
Very Low Distortion: <1%
Low Quiescent Supply Current (100 nA Typical)
Fast Switching Times

10 ns

t

ON

t

4 ns

OFF

TTL/CMOS Compatible
For Functionally Equivalent Devices in 16-Lead QSOP/

SOIC Packages, See ADG774

APPLICATIONS
100VG-AnyLAN
Token Ring 4 Mbps/16 Mbps
ATM25/155
NIC Adapter and Hubs
Audio and Video Switching
Relay Replacement

Mux in Chip Scale Package

ADG784

FUNCTIONAL BLOCK DIAGRAM

ADG784

S1A

S1B

S2A

S2B

S3A

S3B

S4A

S4B

1-OF-2

DECODER

EN

IN

D1

D2

D3

D4

GENERAL DESCRIPTION

The ADG784 is a monolithic CMOS device comprising four
2:1 multiplexer/demultiplexers with high impedance outputs.
The CMOS process provides low power dissipation yet gives
high switching speed and low on resistance. The on-resistance
variation is typically less than 0.5 Ω with an input signal ranging
from 0 V to 5 V.

The bandwidth of the ADG784 is greater than 200 MHz and
this, coupled with low distortion (typically 0.5%), makes the
part suitable for switching fast ethernet signals.

The on-resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when switch­ing audio signals. Fast switching speed, coupled with high signal
bandwidth, also makes the parts suitable for video signal switch­ing. CMOS construction ensures ultralow power dissipation
making the parts ideally suited for portable and battery powered
instruments.

The ADG784 operates from a single 3.3 V/5 V supply and is
TTL logic compatible. The control logic for each switch is shown
in the Truth Table.

These switches conduct equally well in both directions when
ON, and have an input signal range that extends to the sup­plies. In the OFF condition, signal levels up to the supplies
are blocked. The ADG784 switches exhibit break-before­make switching action.

PRODUCT HIGHLIGHTS

1. Also Available as ADG774 in 16-Lead QSOP and SOIC.

2. Wide Bandwidth Data Rates >200 MHz.

3. Ultralow Power Dissipation.

4. Extended Signal Range.
The ADG784 is fabricated on a CMOS process giving an
increased signal range that fully extends to the supply rails.

5. Low Leakage over Temperature.

6. Break-Before-Make Switching.
This prevents channel shorting when the switches are config­ured as a multiplexer.

7. Crosstalk is typically –70 dB @ 30 MHz.

8. Off isolation is typically –60 dB @ 10 MHz.

9. Available in Chip Scale Package (CSP).

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

ADG784–SPECIFICATIONS

SINGLE SUPPLY

(VDD = 5 V  10%, GND = 0 V. All specifications T

MIN

to T

unless otherwise noted.)

MAX

B Version

to

T

Parameter 25CT

MIN

MAX

Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V
On Resistance (R

) 2.2 Ω typ VD = 0 V to VDD, IS = –10 mA

ON

DD

V

5 Ω max

On Resistance Match Between

Channels (∆R

)0.15 Ω typ VD = 0 V to VDD, IS = –10 mA

ON

0.5 Ω max

On Resistance Flatness (R

FLAT(ON)

) 0.5 Ω typ VD = 0 V to VDD; IS = –10 mA

1 Ω max

LEAKAGE CURRENTS

Source OFF Leakage IS (OFF) ± 0.01 nA typ VD = 4.5 V, VS = 1 V; VD = 1 V, VS = 4.5 V;

± 0.5 ± 1 nA max Test Circuit 2

Drain OFF Leakage I

(OFF) ± 0.01 nA typ VD = 4.5 V, VS = 1 V; VD = 1 V, VS = 4.5 V;

D

± 0.5 ± 1 nA max Test Circuit 2

Channel ON Leakage I

, IS (ON) ±0.01 nA typ VD = VS = 4.5 V; VD = VS = 1 V; Test Circuit 3

D

± 0.5 ± 1 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INL

INH

2.4 V min

0.8 V max

Input Current

I

INL

or I

INH

0.001 µA typ VIN = V

INL

or V

INH

± 0.5 µA max

DYNAMIC CHARACTERISTICS

t

ON

t

OFF

Break-Before-Make Time Delay, t

Off Isolation –65 dB typ R
Channel-to-Channel Crosstalk –75 dB typ R
Bandwidth –3 dB 240 MHz typ R
Distortion 0.5 % typ R
Charge Injection 10 pC typ C
C

(OFF) 10 pF typ f = 1 kHz

S

(OFF) 20 pF typ f = 1 kHz

C

D

2

10 ns typ RL = 100 Ω, CL = 35 pF,
20 ns max V

= 3 V; Test Circuit 4

S

4 ns typ RL = 100 Ω, CL = 35 pF,
8 ns max V

D

5 ns typ RL = 100 Ω, CL = 35 pF,
1 ns min V

= 3 V; Test Circuit 4

S

= VS2 = 5 V; Test Circuit 5

S1

= 100 Ω, f = 10 MHz; Test Circuit 7

L

= 100 Ω, f = 10 MHz; Test Circuit 8

L

= 100 Ω; Test Circuit 6

L

= 100 Ω

L

= 1 nF; Test Circuit 9

L

CD, CS (ON) 30 pF typ f = 1 MHz

POWER REQUIREMENTS V

I

DD

1 µA max

= 5.5 V

DD

Digital Inputs = 0 V or V

DD

0.001 µA typ

I

IN

I

O

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

1 µA typ VIN = 5 V
100 mA max VS/VD = 0 V

–2–

REV. 0

ADG784

SINGLE SUPPLY

(VDD = 3 V  10%, GND = 0 V. All specifications T

MIN

to T

unless otherwise noted.)

MAX

B Version

T

to

Parameter 25CT

MIN

MAX

Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V
On Resistance (R

)4 Ω typ VD = 0 V to VDD, IS = –10 mA

ON

DD

V

10 Ω max

On Resistance Match Between

Channels (∆R

)0.15 Ω typ VD = 0 V to VDD, IS = –10 mA

ON

0.5 Ω max

On Resistance Flatness (R

FLAT(ON)

) 2Ω typ VD = 0 V to VDD, IS = –10 mA

4 Ω max

LEAKAGE CURRENTS

Source OFF Leakage I

(OFF) ± 0.01 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;

S

± 0.5 ± 1 nA max Test Circuit 2

Drain OFF Leakage I

(OFF) ± 0.01 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V;

D

± 0.5 ± 1 nA max Test Circuit 2

Channel ON Leakage I

, IS (ON) ±0.01 nA typ VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3

D

± 0.5 ± 1 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INL

INH

2.0 V min

0.4 V max

Input Current

I

INL

or I

INH

0.001 µA typ VIN = V
± 0.5 µA max

DYNAMIC CHARACTERISTICS

t

ON

t

OFF

Break-Before-Make Time Delay, t

Off Isolation –65 dB typ R
Channel-to-Channel Crosstalk –75 dB typ R
Bandwidth –3 dB 240 MHz typ R
Distortion 2 % typ R
Charge Injection 3 pC typ C

(OFF) 10 pF typ f = 1 kHz

C

S

C

(OFF) 20 pF typ f = 1 kHz

D

2

12 ns typ RL = 100 Ω, CL = 35 pF,
25 ns max V

= 1.5 V; Test Circuit 4

S

5 ns typ RL = 100 Ω, CL = 35 pF,
10 ns max V

D

5 ns typ RL = 100 Ω, CL = 35 pF,
1 ns min V

= 1.5 V; Test Circuit 4

S

= VS2 = 3 V; Test Circuit 5

S1

= 50 Ω, f = 10 MHz; Test Circuit 7

L

= 50 Ω, f = 10 MHz; Test Circuit 8

L

= 50 Ω; Test Circuit 6

L

= 50 Ω

L

= 1 nF; Test Circuit 9

L

CD, CS (ON) 30 pF typ f = 1 MHz

POWER REQUIREMENTS V

= 3.3 V

DD

Digital Inputs = 0 V or V

I

DD

1 µA max

0.001 µA typ

I

IN

I

O

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

1 µA typ VIN = 3 V
100 mA max VS/VD = 0 V

INL

or V

INH

DD

REV. 0

Table I. Truth Table

EN IN D1 D2 D3 D4 Function

1 X Hi-Z Hi-Z Hi-Z Hi-Z DISABLE
0 0 S1A S2A S3A S4A IN = 0
0 1 S1B S2B S3B S4B IN = 1

–3–

ADG784

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

(TA = 25°C unless otherwise noted.)

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

Analog, Digital Inputs

2

. . . . . . . . . . –0.3 V to VDD + 0.3 V or

1

30 mA, Whichever Occurs First

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA

Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA

(Pulsed at 1 ms, 10% Duty Cycle max)

Operating Temperature Range

Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Chip Scale Package

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 32°C/W

θ

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.

2

Overvoltages at IN, S or D will be clamped by internal diodes. Current should be

limited to the maximum ratings given.

PIN CONFIGURATION

20 IN

19 NC

18 VDD

17 NC

16 EN

S1A 1
S1B 2

D1 3
S2A 4
S2B 5

NC = NO CONNECT

NOTE: EXPOSED PAD TIED TO SUBSTRATE, GND.

PIN 1
INDICATOR

ADG784

TOP VIEW

D2 6

NC 7

D3 10

NC 9

GND 8

15 S4A
14 S4B
13 D4
12 S3A
11 S3B

TERMINOLOGY

V

DD

Most Positive Power Supply Potential.
GND Ground (0 V) Reference.
S Source Terminal. May be an input or output.
D Drain Terminal. May be an input or output.
IN Logic Control Input.
EN Logic Control Input.
R

ON

∆R

ON

R

FLAT(ON)

Ohmic resistance between D and S.

On Resistance match between any two channels

i.e., R

max – R

ON

ON

min.

Flatness is defined as the difference between

the maximum and minimum value of on resis-

tance as measured over the specified analog

signal range.

(OFF) Source Leakage Current with the switch “OFF.”

I

S

I

(OFF) Drain Leakage Current with the switch “OFF.”

D

I

, IS (ON) Channel Leakage Current with the switch “ON.”

D

V

) Analog Voltage on Terminals D, S.

D (VS

C

(OFF) “OFF” Switch Source Capacitance.

S

C

(OFF) “OFF” Switch Drain Capacitance.

D

C

, CS (ON) “ON” Switch Capacitance.

D

t

ON

Delay between applying the digital control input

and the output switching on. See Test Circuit 4.
t

OFF

Delay between applying the digital control input

and the output switching Off.
t

D

“OFF” time or “ON” time measured between

the 90% points of both switches, when switching

from one address state to another. See Test

Circuit 5.
Crosstalk A measure of unwanted signal that is coupled

through from one channel to another as a result

of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through an

“OFF” switch.
Bandwidth Frequency response of the switch in the ON

state measured at 3 dB down.
Distortion R

FLAT(ON)/RL

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADG784BCP –40°C to +85°C Chip Scale Package CP-20

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG784 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

–4–

REV. 0

VDD = 5V

FREQUENCY – Hz

0

10M10k

ON RESPONSE – dB

–4

–2

100k 1M 100M

–6

Typical Performance Characteristics–ADG784

5.0

VDD = 2.7V

4.5

4.0

3.5

3.0

– 

2.5

ON

R

2.0

1.5

1.0

0.5

0

VDD = 3.0V

VDD = 4.5V

VDD = 5.0V

1.3 2.5 3.7 4.9

OR VD DRAIN OR SOURCE VOLTAGE – V

V

S

TA = 25C

TPC 1. On Resistance as a Function of VD (VS) for
Various Single Supplies

3.0
VDD = 5V

2.5

2.0

– 

1.5

ON

R

1.0

0.5

0

1.3 2.5 3.7 4.9

OR VO DRAIN OR SOURCE VOLTAGE – V

V

S

+85C

+25C

–40C

TPC 4. On Response vs. Frequency

0

VDD = 5V

–10

–20

–30

–40

–50

–60

ATTENUATION – dB

–70

–80

–90

–100

100k 1G1M 10M 100M

R

L

= 100

FREQUENCY – Hz

TPC 2. On Resistance as a Function of VD (VS) for

TPC 5. Off Isolation vs. Frequency

Different Temperatures with 5 V Single Supplies

4.5

VDD = 3V

4.0

3.5

3.0

2.5

– 

ON

2.0

R

1.5

1.0

0.5

0

0.6 1.1 1.6 2.1 2.6
OR VD DRAIN OR SOURCE VOLTAGE – V

V

S

+85C

+25C

–40C

TPC 3. On Resistance as a Function of VD (VS) for
Different Temperatures with 3 V Single Supplies

0

VDD = 5V

–10

–20

–30

–40

–50

–60

ATTENUATION – dB

–70

–80

–90

–100

= 100

R

L

= 0.316V

V

P-P

100k 1G1M 10M 100M

FREQUENCY – Hz

TPC 6. Crosstalk vs. Frequency

REV. 0

–5–

ADG784

20

15

10

5

0

CHARGE INJECTION – pC

–5

VDD = 5V
T

= 25 C

A

–10

0 5.00.5 1.0 1.5 2.0 2.5

SOURCE VOLTAGE – V

3.0

3.5 4.0 4.5

TPC 7. Charge Injection vs. Source Voltage

10 BASE TX+

10 BASE TX–

100 BASE TX+

100 BASE TX–

10 BASE TX+

10 BASE TX–

100 BASE TX+

100 BASE TX–

10 BASE TX

100 BASE TX

TX1

TX2

RX1

RX2

ADG784

RJ45

TRANSFORMER

TX1

RX1

Figure 2. Loop Back

Figure 1. Full Duplex Transceiver

120 100

Figure 3. Line Termination

–6–

Figure 4. Line Clamp

REV. 0

Test Circuits

ADG784

I

DS

V1

SD

V

S

RON = V1/I

DS

Test Circuit 1. On Resistance

V

S

5V

0.1F

V

DD

SD

IN

GND

EN

5V

0.1F

IS (OFF) ID (OFF)

SD

A A

V

S

V

D

Test Circuit 2. Off Leakage

3V

V

IN

V

OUT

R

100

C

L

L

35pF

V

OUT

Test Circuit 4. Switching Times

50% 50%

90% 90%

t

ON

SD

V

S

ID (ON)

A

V

D

Test Circuit 3. On Leakage

t

OFF

V

DD

S1A

V

S1B

S

V

EN

S

DECODER

GND

D1

R

L

100

V

C

L

35pF

OUT

3V

V

IN

0V

V

OUT

V

S

50% 50%

50% 50%

t

D

t

D

Test Circuit 5. Break-Before-Make Time Delay

V

DD

0.1F

ADG784

S1A

IN

V

IN

EN

D1

GND

NETWORK

ANALYZER

50

V

S

V

50

OUT

IN

V

IN

V

0.1F

ADG784

EN

DD

NETWORK
ANALYZER

S1A

50

D1

GND

50

50

V

S

V

OUT

REV. 0

Test Circuit 6. Bandwidth

Test Circuit 7. Off Isolation

–7–

ADG784

V

DD

0.1F

NETWORK

ADG784

S2A

S1A

IN

ANALYZER

50

V

S

V

OUT

50

GND

D1

D2

50

C02374–2.5–4/01(0)

V

IN

EN

Test Circuit 8. Channel-to-Channel Crosstalk

5V

V

DD

ADG784

R

S

V

S

S1A

S1B

S2A

S2B

S3A

S3B

S4A

S4B

1-OF-2

DECODER

EN

D1 V

C
1nF

C
1nF

C
1nF

C
1nF

IN

OUT

L

D2 V

OUT

L

D3 V

OUT

L

D4 V

OUT

L

3V

V

IN

V

OUT

Q

= CL  V

INJ

OUT

V

OUT

Test Circuit 9. Charge Injection

PIN 1

INDICATOR

0.035 (0.90) MAX

0.033 (0.85) NOM

SEATING

PLANE

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

20-Lead CSP

(CP-20)

0.157 (4.0)
BSC SQ

TOP

VIEW

12 MAX

0.020 (0.50)
BSC

CONTROLLING DIMENSIONS ARE IN MILLIMETERS

0.148 (3.75)
BSC SQ

0.031 (0.80) MAX

0.026 (0.65) NOM

0.008 (0.20)
REF

0.024 (0.60)

0.017 (0.42)

0.009 (0.24)

0.012 (0.30)

0.009 (0.23)

0.007 (0.18)

0.030 (0.75)

0.022 (0.60)

0.014 (0.50)

0.002 (0.05)

0.0004 (0.01)

0.0 (0.0)

–8–

0.024 (0.60)

0.017 (0.42)

0.009 (0.24)

16

15

11

10

0.010 (0.25)

BOTTOM

VIEW

0.080 (2.00)
REF

MIN

20

6

1

5

0.080 (2.25)

0.083 (2.10) SQ

0.077 (1.95)

REV. 0

PRINTED IN U.S.A.

PRINTED IN U.S.A.